Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
3aa551c9 | 11 | #include <linux/kthread.h> |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/random.h> | |
14 | #include <linux/interrupt.h> | |
1aeb272c | 15 | #include <linux/slab.h> |
3aa551c9 | 16 | #include <linux/sched.h> |
1da177e4 LT |
17 | |
18 | #include "internals.h" | |
19 | ||
1da177e4 LT |
20 | /** |
21 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 22 | * @irq: interrupt number to wait for |
1da177e4 LT |
23 | * |
24 | * This function waits for any pending IRQ handlers for this interrupt | |
25 | * to complete before returning. If you use this function while | |
26 | * holding a resource the IRQ handler may need you will deadlock. | |
27 | * | |
28 | * This function may be called - with care - from IRQ context. | |
29 | */ | |
30 | void synchronize_irq(unsigned int irq) | |
31 | { | |
cb5bc832 | 32 | struct irq_desc *desc = irq_to_desc(irq); |
a98ce5c6 | 33 | unsigned int status; |
1da177e4 | 34 | |
7d94f7ca | 35 | if (!desc) |
c2b5a251 MW |
36 | return; |
37 | ||
a98ce5c6 HX |
38 | do { |
39 | unsigned long flags; | |
40 | ||
41 | /* | |
42 | * Wait until we're out of the critical section. This might | |
43 | * give the wrong answer due to the lack of memory barriers. | |
44 | */ | |
45 | while (desc->status & IRQ_INPROGRESS) | |
46 | cpu_relax(); | |
47 | ||
48 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 49 | raw_spin_lock_irqsave(&desc->lock, flags); |
a98ce5c6 | 50 | status = desc->status; |
239007b8 | 51 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
52 | |
53 | /* Oops, that failed? */ | |
54 | } while (status & IRQ_INPROGRESS); | |
3aa551c9 TG |
55 | |
56 | /* | |
57 | * We made sure that no hardirq handler is running. Now verify | |
58 | * that no threaded handlers are active. | |
59 | */ | |
60 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); | |
1da177e4 | 61 | } |
1da177e4 LT |
62 | EXPORT_SYMBOL(synchronize_irq); |
63 | ||
3aa551c9 TG |
64 | #ifdef CONFIG_SMP |
65 | cpumask_var_t irq_default_affinity; | |
66 | ||
771ee3b0 TG |
67 | /** |
68 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
69 | * @irq: Interrupt to check | |
70 | * | |
71 | */ | |
72 | int irq_can_set_affinity(unsigned int irq) | |
73 | { | |
08678b08 | 74 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 | 75 | |
6b8ff312 | 76 | if (CHECK_IRQ_PER_CPU(desc->status) || !desc->irq_data.chip || |
c96b3b3c | 77 | !desc->irq_data.chip->irq_set_affinity) |
771ee3b0 TG |
78 | return 0; |
79 | ||
80 | return 1; | |
81 | } | |
82 | ||
591d2fb0 TG |
83 | /** |
84 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
85 | * @desc: irq descriptor which has affitnity changed | |
86 | * | |
87 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
88 | * to the interrupt thread itself. We can not call | |
89 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
90 | * code can be called from hard interrupt context. | |
91 | */ | |
92 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 TG |
93 | { |
94 | struct irqaction *action = desc->action; | |
95 | ||
96 | while (action) { | |
97 | if (action->thread) | |
591d2fb0 | 98 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
99 | action = action->next; |
100 | } | |
101 | } | |
102 | ||
771ee3b0 TG |
103 | /** |
104 | * irq_set_affinity - Set the irq affinity of a given irq | |
105 | * @irq: Interrupt to set affinity | |
106 | * @cpumask: cpumask | |
107 | * | |
108 | */ | |
0de26520 | 109 | int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
771ee3b0 | 110 | { |
08678b08 | 111 | struct irq_desc *desc = irq_to_desc(irq); |
c96b3b3c | 112 | struct irq_chip *chip = desc->irq_data.chip; |
f6d87f4b | 113 | unsigned long flags; |
771ee3b0 | 114 | |
c96b3b3c | 115 | if (!chip->irq_set_affinity) |
771ee3b0 TG |
116 | return -EINVAL; |
117 | ||
239007b8 | 118 | raw_spin_lock_irqsave(&desc->lock, flags); |
f6d87f4b | 119 | |
771ee3b0 | 120 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
57b150cc | 121 | if (desc->status & IRQ_MOVE_PCNTXT) { |
c96b3b3c | 122 | if (!chip->irq_set_affinity(&desc->irq_data, cpumask, false)) { |
6b8ff312 | 123 | cpumask_copy(desc->irq_data.affinity, cpumask); |
591d2fb0 | 124 | irq_set_thread_affinity(desc); |
57b150cc YL |
125 | } |
126 | } | |
6ec3cfec | 127 | else { |
f6d87f4b | 128 | desc->status |= IRQ_MOVE_PENDING; |
7f7ace0c | 129 | cpumask_copy(desc->pending_mask, cpumask); |
f6d87f4b | 130 | } |
771ee3b0 | 131 | #else |
c96b3b3c | 132 | if (!chip->irq_set_affinity(&desc->irq_data, cpumask, false)) { |
6b8ff312 | 133 | cpumask_copy(desc->irq_data.affinity, cpumask); |
591d2fb0 | 134 | irq_set_thread_affinity(desc); |
57b150cc | 135 | } |
771ee3b0 | 136 | #endif |
f6d87f4b | 137 | desc->status |= IRQ_AFFINITY_SET; |
239007b8 | 138 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
771ee3b0 TG |
139 | return 0; |
140 | } | |
141 | ||
e7a297b0 PWJ |
142 | int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) |
143 | { | |
144 | struct irq_desc *desc = irq_to_desc(irq); | |
145 | unsigned long flags; | |
146 | ||
147 | if (!desc) | |
148 | return -EINVAL; | |
149 | ||
150 | raw_spin_lock_irqsave(&desc->lock, flags); | |
151 | desc->affinity_hint = m; | |
152 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
153 | ||
154 | return 0; | |
155 | } | |
156 | EXPORT_SYMBOL_GPL(irq_set_affinity_hint); | |
157 | ||
18404756 MK |
158 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
159 | /* | |
160 | * Generic version of the affinity autoselector. | |
161 | */ | |
548c8933 | 162 | static int setup_affinity(unsigned int irq, struct irq_desc *desc) |
18404756 | 163 | { |
18404756 MK |
164 | if (!irq_can_set_affinity(irq)) |
165 | return 0; | |
166 | ||
f6d87f4b TG |
167 | /* |
168 | * Preserve an userspace affinity setup, but make sure that | |
169 | * one of the targets is online. | |
170 | */ | |
612e3684 | 171 | if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) { |
6b8ff312 | 172 | if (cpumask_any_and(desc->irq_data.affinity, cpu_online_mask) |
0de26520 RR |
173 | < nr_cpu_ids) |
174 | goto set_affinity; | |
f6d87f4b TG |
175 | else |
176 | desc->status &= ~IRQ_AFFINITY_SET; | |
177 | } | |
178 | ||
6b8ff312 | 179 | cpumask_and(desc->irq_data.affinity, cpu_online_mask, irq_default_affinity); |
0de26520 | 180 | set_affinity: |
c96b3b3c | 181 | desc->irq_data.chip->irq_set_affinity(&desc->irq_data, desc->irq_data.affinity, false); |
18404756 | 182 | |
18404756 MK |
183 | return 0; |
184 | } | |
f6d87f4b | 185 | #else |
548c8933 | 186 | static inline int setup_affinity(unsigned int irq, struct irq_desc *d) |
f6d87f4b TG |
187 | { |
188 | return irq_select_affinity(irq); | |
189 | } | |
18404756 MK |
190 | #endif |
191 | ||
f6d87f4b TG |
192 | /* |
193 | * Called when affinity is set via /proc/irq | |
194 | */ | |
195 | int irq_select_affinity_usr(unsigned int irq) | |
196 | { | |
197 | struct irq_desc *desc = irq_to_desc(irq); | |
198 | unsigned long flags; | |
199 | int ret; | |
200 | ||
239007b8 | 201 | raw_spin_lock_irqsave(&desc->lock, flags); |
548c8933 | 202 | ret = setup_affinity(irq, desc); |
3aa551c9 | 203 | if (!ret) |
591d2fb0 | 204 | irq_set_thread_affinity(desc); |
239007b8 | 205 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
206 | |
207 | return ret; | |
208 | } | |
209 | ||
210 | #else | |
548c8933 | 211 | static inline int setup_affinity(unsigned int irq, struct irq_desc *desc) |
f6d87f4b TG |
212 | { |
213 | return 0; | |
214 | } | |
1da177e4 LT |
215 | #endif |
216 | ||
0a0c5168 RW |
217 | void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) |
218 | { | |
219 | if (suspend) { | |
685fd0b4 | 220 | if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND)) |
0a0c5168 RW |
221 | return; |
222 | desc->status |= IRQ_SUSPENDED; | |
223 | } | |
224 | ||
225 | if (!desc->depth++) { | |
226 | desc->status |= IRQ_DISABLED; | |
bc310dda | 227 | desc->irq_data.chip->irq_disable(&desc->irq_data); |
0a0c5168 RW |
228 | } |
229 | } | |
230 | ||
1da177e4 LT |
231 | /** |
232 | * disable_irq_nosync - disable an irq without waiting | |
233 | * @irq: Interrupt to disable | |
234 | * | |
235 | * Disable the selected interrupt line. Disables and Enables are | |
236 | * nested. | |
237 | * Unlike disable_irq(), this function does not ensure existing | |
238 | * instances of the IRQ handler have completed before returning. | |
239 | * | |
240 | * This function may be called from IRQ context. | |
241 | */ | |
242 | void disable_irq_nosync(unsigned int irq) | |
243 | { | |
d3c60047 | 244 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
245 | unsigned long flags; |
246 | ||
7d94f7ca | 247 | if (!desc) |
c2b5a251 MW |
248 | return; |
249 | ||
3876ec9e | 250 | chip_bus_lock(desc); |
239007b8 | 251 | raw_spin_lock_irqsave(&desc->lock, flags); |
0a0c5168 | 252 | __disable_irq(desc, irq, false); |
239007b8 | 253 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3876ec9e | 254 | chip_bus_sync_unlock(desc); |
1da177e4 | 255 | } |
1da177e4 LT |
256 | EXPORT_SYMBOL(disable_irq_nosync); |
257 | ||
258 | /** | |
259 | * disable_irq - disable an irq and wait for completion | |
260 | * @irq: Interrupt to disable | |
261 | * | |
262 | * Disable the selected interrupt line. Enables and Disables are | |
263 | * nested. | |
264 | * This function waits for any pending IRQ handlers for this interrupt | |
265 | * to complete before returning. If you use this function while | |
266 | * holding a resource the IRQ handler may need you will deadlock. | |
267 | * | |
268 | * This function may be called - with care - from IRQ context. | |
269 | */ | |
270 | void disable_irq(unsigned int irq) | |
271 | { | |
d3c60047 | 272 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 273 | |
7d94f7ca | 274 | if (!desc) |
c2b5a251 MW |
275 | return; |
276 | ||
1da177e4 LT |
277 | disable_irq_nosync(irq); |
278 | if (desc->action) | |
279 | synchronize_irq(irq); | |
280 | } | |
1da177e4 LT |
281 | EXPORT_SYMBOL(disable_irq); |
282 | ||
0a0c5168 | 283 | void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) |
1adb0850 | 284 | { |
0a0c5168 RW |
285 | if (resume) |
286 | desc->status &= ~IRQ_SUSPENDED; | |
287 | ||
1adb0850 TG |
288 | switch (desc->depth) { |
289 | case 0: | |
0a0c5168 | 290 | err_out: |
b8c512f6 | 291 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
292 | break; |
293 | case 1: { | |
294 | unsigned int status = desc->status & ~IRQ_DISABLED; | |
295 | ||
0a0c5168 RW |
296 | if (desc->status & IRQ_SUSPENDED) |
297 | goto err_out; | |
1adb0850 TG |
298 | /* Prevent probing on this irq: */ |
299 | desc->status = status | IRQ_NOPROBE; | |
300 | check_irq_resend(desc, irq); | |
301 | /* fall-through */ | |
302 | } | |
303 | default: | |
304 | desc->depth--; | |
305 | } | |
306 | } | |
307 | ||
1da177e4 LT |
308 | /** |
309 | * enable_irq - enable handling of an irq | |
310 | * @irq: Interrupt to enable | |
311 | * | |
312 | * Undoes the effect of one call to disable_irq(). If this | |
313 | * matches the last disable, processing of interrupts on this | |
314 | * IRQ line is re-enabled. | |
315 | * | |
70aedd24 | 316 | * This function may be called from IRQ context only when |
6b8ff312 | 317 | * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! |
1da177e4 LT |
318 | */ |
319 | void enable_irq(unsigned int irq) | |
320 | { | |
d3c60047 | 321 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
322 | unsigned long flags; |
323 | ||
7d94f7ca | 324 | if (!desc) |
c2b5a251 MW |
325 | return; |
326 | ||
3876ec9e | 327 | chip_bus_lock(desc); |
239007b8 | 328 | raw_spin_lock_irqsave(&desc->lock, flags); |
0a0c5168 | 329 | __enable_irq(desc, irq, false); |
239007b8 | 330 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3876ec9e | 331 | chip_bus_sync_unlock(desc); |
1da177e4 | 332 | } |
1da177e4 LT |
333 | EXPORT_SYMBOL(enable_irq); |
334 | ||
0c5d1eb7 | 335 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 336 | { |
08678b08 | 337 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
338 | int ret = -ENXIO; |
339 | ||
6b8ff312 TG |
340 | if (desc->irq_data.chip->set_wake) |
341 | ret = desc->irq_data.chip->set_wake(irq, on); | |
2db87321 UKK |
342 | |
343 | return ret; | |
344 | } | |
345 | ||
ba9a2331 TG |
346 | /** |
347 | * set_irq_wake - control irq power management wakeup | |
348 | * @irq: interrupt to control | |
349 | * @on: enable/disable power management wakeup | |
350 | * | |
15a647eb DB |
351 | * Enable/disable power management wakeup mode, which is |
352 | * disabled by default. Enables and disables must match, | |
353 | * just as they match for non-wakeup mode support. | |
354 | * | |
355 | * Wakeup mode lets this IRQ wake the system from sleep | |
356 | * states like "suspend to RAM". | |
ba9a2331 TG |
357 | */ |
358 | int set_irq_wake(unsigned int irq, unsigned int on) | |
359 | { | |
08678b08 | 360 | struct irq_desc *desc = irq_to_desc(irq); |
ba9a2331 | 361 | unsigned long flags; |
2db87321 | 362 | int ret = 0; |
ba9a2331 | 363 | |
15a647eb DB |
364 | /* wakeup-capable irqs can be shared between drivers that |
365 | * don't need to have the same sleep mode behaviors. | |
366 | */ | |
239007b8 | 367 | raw_spin_lock_irqsave(&desc->lock, flags); |
15a647eb | 368 | if (on) { |
2db87321 UKK |
369 | if (desc->wake_depth++ == 0) { |
370 | ret = set_irq_wake_real(irq, on); | |
371 | if (ret) | |
372 | desc->wake_depth = 0; | |
373 | else | |
374 | desc->status |= IRQ_WAKEUP; | |
375 | } | |
15a647eb DB |
376 | } else { |
377 | if (desc->wake_depth == 0) { | |
7a2c4770 | 378 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
379 | } else if (--desc->wake_depth == 0) { |
380 | ret = set_irq_wake_real(irq, on); | |
381 | if (ret) | |
382 | desc->wake_depth = 1; | |
383 | else | |
384 | desc->status &= ~IRQ_WAKEUP; | |
385 | } | |
15a647eb | 386 | } |
2db87321 | 387 | |
239007b8 | 388 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ba9a2331 TG |
389 | return ret; |
390 | } | |
391 | EXPORT_SYMBOL(set_irq_wake); | |
392 | ||
1da177e4 LT |
393 | /* |
394 | * Internal function that tells the architecture code whether a | |
395 | * particular irq has been exclusively allocated or is available | |
396 | * for driver use. | |
397 | */ | |
398 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
399 | { | |
d3c60047 | 400 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 401 | struct irqaction *action; |
cc8c3b78 | 402 | unsigned long flags; |
1da177e4 | 403 | |
7d94f7ca YL |
404 | if (!desc) |
405 | return 0; | |
406 | ||
407 | if (desc->status & IRQ_NOREQUEST) | |
1da177e4 LT |
408 | return 0; |
409 | ||
cc8c3b78 | 410 | raw_spin_lock_irqsave(&desc->lock, flags); |
08678b08 | 411 | action = desc->action; |
1da177e4 | 412 | if (action) |
3cca53b0 | 413 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
414 | action = NULL; |
415 | ||
cc8c3b78 TG |
416 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
417 | ||
1da177e4 LT |
418 | return !action; |
419 | } | |
420 | ||
6a6de9ef TG |
421 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
422 | { | |
423 | /* | |
424 | * If the architecture still has not overriden | |
425 | * the flow handler then zap the default. This | |
426 | * should catch incorrect flow-type setting. | |
427 | */ | |
428 | if (desc->handle_irq == &handle_bad_irq) | |
429 | desc->handle_irq = NULL; | |
430 | } | |
431 | ||
0c5d1eb7 | 432 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
b2ba2c30 | 433 | unsigned long flags) |
82736f4d UKK |
434 | { |
435 | int ret; | |
6b8ff312 | 436 | struct irq_chip *chip = desc->irq_data.chip; |
82736f4d | 437 | |
b2ba2c30 | 438 | if (!chip || !chip->irq_set_type) { |
82736f4d UKK |
439 | /* |
440 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
441 | * flow-types? | |
442 | */ | |
3ff68a6a | 443 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
444 | chip ? (chip->name ? : "unknown") : "unknown"); |
445 | return 0; | |
446 | } | |
447 | ||
f2b662da | 448 | /* caller masked out all except trigger mode flags */ |
b2ba2c30 | 449 | ret = chip->irq_set_type(&desc->irq_data, flags); |
82736f4d UKK |
450 | |
451 | if (ret) | |
b2ba2c30 TG |
452 | pr_err("setting trigger mode %lu for irq %u failed (%pF)\n", |
453 | flags, irq, chip->irq_set_type); | |
0c5d1eb7 | 454 | else { |
f2b662da DB |
455 | if (flags & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
456 | flags |= IRQ_LEVEL; | |
0c5d1eb7 | 457 | /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */ |
f2b662da DB |
458 | desc->status &= ~(IRQ_LEVEL | IRQ_TYPE_SENSE_MASK); |
459 | desc->status |= flags; | |
46732475 | 460 | |
6b8ff312 TG |
461 | if (chip != desc->irq_data.chip) |
462 | irq_chip_set_defaults(desc->irq_data.chip); | |
0c5d1eb7 | 463 | } |
82736f4d UKK |
464 | |
465 | return ret; | |
466 | } | |
467 | ||
b25c340c TG |
468 | /* |
469 | * Default primary interrupt handler for threaded interrupts. Is | |
470 | * assigned as primary handler when request_threaded_irq is called | |
471 | * with handler == NULL. Useful for oneshot interrupts. | |
472 | */ | |
473 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
474 | { | |
475 | return IRQ_WAKE_THREAD; | |
476 | } | |
477 | ||
399b5da2 TG |
478 | /* |
479 | * Primary handler for nested threaded interrupts. Should never be | |
480 | * called. | |
481 | */ | |
482 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
483 | { | |
484 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
485 | return IRQ_NONE; | |
486 | } | |
487 | ||
3aa551c9 TG |
488 | static int irq_wait_for_interrupt(struct irqaction *action) |
489 | { | |
490 | while (!kthread_should_stop()) { | |
491 | set_current_state(TASK_INTERRUPTIBLE); | |
f48fe81e TG |
492 | |
493 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
494 | &action->thread_flags)) { | |
3aa551c9 TG |
495 | __set_current_state(TASK_RUNNING); |
496 | return 0; | |
f48fe81e TG |
497 | } |
498 | schedule(); | |
3aa551c9 TG |
499 | } |
500 | return -1; | |
501 | } | |
502 | ||
b25c340c TG |
503 | /* |
504 | * Oneshot interrupts keep the irq line masked until the threaded | |
505 | * handler finished. unmask if the interrupt has not been disabled and | |
506 | * is marked MASKED. | |
507 | */ | |
508 | static void irq_finalize_oneshot(unsigned int irq, struct irq_desc *desc) | |
509 | { | |
0b1adaa0 | 510 | again: |
3876ec9e | 511 | chip_bus_lock(desc); |
239007b8 | 512 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
513 | |
514 | /* | |
515 | * Implausible though it may be we need to protect us against | |
516 | * the following scenario: | |
517 | * | |
518 | * The thread is faster done than the hard interrupt handler | |
519 | * on the other CPU. If we unmask the irq line then the | |
520 | * interrupt can come in again and masks the line, leaves due | |
521 | * to IRQ_INPROGRESS and the irq line is masked forever. | |
522 | */ | |
523 | if (unlikely(desc->status & IRQ_INPROGRESS)) { | |
524 | raw_spin_unlock_irq(&desc->lock); | |
3876ec9e | 525 | chip_bus_sync_unlock(desc); |
0b1adaa0 TG |
526 | cpu_relax(); |
527 | goto again; | |
528 | } | |
529 | ||
b25c340c TG |
530 | if (!(desc->status & IRQ_DISABLED) && (desc->status & IRQ_MASKED)) { |
531 | desc->status &= ~IRQ_MASKED; | |
0eda58b7 | 532 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
b25c340c | 533 | } |
239007b8 | 534 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 535 | chip_bus_sync_unlock(desc); |
b25c340c TG |
536 | } |
537 | ||
61f38261 | 538 | #ifdef CONFIG_SMP |
591d2fb0 TG |
539 | /* |
540 | * Check whether we need to change the affinity of the interrupt thread. | |
541 | */ | |
542 | static void | |
543 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
544 | { | |
545 | cpumask_var_t mask; | |
546 | ||
547 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
548 | return; | |
549 | ||
550 | /* | |
551 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
552 | * try again next time | |
553 | */ | |
554 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
555 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
556 | return; | |
557 | } | |
558 | ||
239007b8 | 559 | raw_spin_lock_irq(&desc->lock); |
6b8ff312 | 560 | cpumask_copy(mask, desc->irq_data.affinity); |
239007b8 | 561 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 TG |
562 | |
563 | set_cpus_allowed_ptr(current, mask); | |
564 | free_cpumask_var(mask); | |
565 | } | |
61f38261 BP |
566 | #else |
567 | static inline void | |
568 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
569 | #endif | |
591d2fb0 | 570 | |
3aa551c9 TG |
571 | /* |
572 | * Interrupt handler thread | |
573 | */ | |
574 | static int irq_thread(void *data) | |
575 | { | |
576 | struct sched_param param = { .sched_priority = MAX_USER_RT_PRIO/2, }; | |
577 | struct irqaction *action = data; | |
578 | struct irq_desc *desc = irq_to_desc(action->irq); | |
b25c340c | 579 | int wake, oneshot = desc->status & IRQ_ONESHOT; |
3aa551c9 TG |
580 | |
581 | sched_setscheduler(current, SCHED_FIFO, ¶m); | |
582 | current->irqaction = action; | |
583 | ||
584 | while (!irq_wait_for_interrupt(action)) { | |
585 | ||
591d2fb0 TG |
586 | irq_thread_check_affinity(desc, action); |
587 | ||
3aa551c9 TG |
588 | atomic_inc(&desc->threads_active); |
589 | ||
239007b8 | 590 | raw_spin_lock_irq(&desc->lock); |
3aa551c9 TG |
591 | if (unlikely(desc->status & IRQ_DISABLED)) { |
592 | /* | |
593 | * CHECKME: We might need a dedicated | |
594 | * IRQ_THREAD_PENDING flag here, which | |
595 | * retriggers the thread in check_irq_resend() | |
596 | * but AFAICT IRQ_PENDING should be fine as it | |
597 | * retriggers the interrupt itself --- tglx | |
598 | */ | |
599 | desc->status |= IRQ_PENDING; | |
239007b8 | 600 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 | 601 | } else { |
239007b8 | 602 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 TG |
603 | |
604 | action->thread_fn(action->irq, action->dev_id); | |
b25c340c TG |
605 | |
606 | if (oneshot) | |
607 | irq_finalize_oneshot(action->irq, desc); | |
3aa551c9 TG |
608 | } |
609 | ||
610 | wake = atomic_dec_and_test(&desc->threads_active); | |
611 | ||
612 | if (wake && waitqueue_active(&desc->wait_for_threads)) | |
613 | wake_up(&desc->wait_for_threads); | |
614 | } | |
615 | ||
616 | /* | |
617 | * Clear irqaction. Otherwise exit_irq_thread() would make | |
618 | * fuzz about an active irq thread going into nirvana. | |
619 | */ | |
620 | current->irqaction = NULL; | |
621 | return 0; | |
622 | } | |
623 | ||
624 | /* | |
625 | * Called from do_exit() | |
626 | */ | |
627 | void exit_irq_thread(void) | |
628 | { | |
629 | struct task_struct *tsk = current; | |
630 | ||
631 | if (!tsk->irqaction) | |
632 | return; | |
633 | ||
634 | printk(KERN_ERR | |
635 | "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", | |
636 | tsk->comm ? tsk->comm : "", tsk->pid, tsk->irqaction->irq); | |
637 | ||
638 | /* | |
639 | * Set the THREAD DIED flag to prevent further wakeups of the | |
640 | * soon to be gone threaded handler. | |
641 | */ | |
642 | set_bit(IRQTF_DIED, &tsk->irqaction->flags); | |
643 | } | |
644 | ||
1da177e4 LT |
645 | /* |
646 | * Internal function to register an irqaction - typically used to | |
647 | * allocate special interrupts that are part of the architecture. | |
648 | */ | |
d3c60047 | 649 | static int |
327ec569 | 650 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 651 | { |
f17c7545 | 652 | struct irqaction *old, **old_ptr; |
8b126b77 | 653 | const char *old_name = NULL; |
1da177e4 | 654 | unsigned long flags; |
399b5da2 | 655 | int nested, shared = 0; |
82736f4d | 656 | int ret; |
1da177e4 | 657 | |
7d94f7ca | 658 | if (!desc) |
c2b5a251 MW |
659 | return -EINVAL; |
660 | ||
6b8ff312 | 661 | if (desc->irq_data.chip == &no_irq_chip) |
1da177e4 LT |
662 | return -ENOSYS; |
663 | /* | |
664 | * Some drivers like serial.c use request_irq() heavily, | |
665 | * so we have to be careful not to interfere with a | |
666 | * running system. | |
667 | */ | |
3cca53b0 | 668 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
669 | /* |
670 | * This function might sleep, we want to call it first, | |
671 | * outside of the atomic block. | |
672 | * Yes, this might clear the entropy pool if the wrong | |
673 | * driver is attempted to be loaded, without actually | |
674 | * installing a new handler, but is this really a problem, | |
675 | * only the sysadmin is able to do this. | |
676 | */ | |
677 | rand_initialize_irq(irq); | |
678 | } | |
679 | ||
b25c340c TG |
680 | /* Oneshot interrupts are not allowed with shared */ |
681 | if ((new->flags & IRQF_ONESHOT) && (new->flags & IRQF_SHARED)) | |
682 | return -EINVAL; | |
683 | ||
3aa551c9 | 684 | /* |
399b5da2 TG |
685 | * Check whether the interrupt nests into another interrupt |
686 | * thread. | |
687 | */ | |
688 | nested = desc->status & IRQ_NESTED_THREAD; | |
689 | if (nested) { | |
690 | if (!new->thread_fn) | |
691 | return -EINVAL; | |
692 | /* | |
693 | * Replace the primary handler which was provided from | |
694 | * the driver for non nested interrupt handling by the | |
695 | * dummy function which warns when called. | |
696 | */ | |
697 | new->handler = irq_nested_primary_handler; | |
698 | } | |
699 | ||
3aa551c9 | 700 | /* |
399b5da2 TG |
701 | * Create a handler thread when a thread function is supplied |
702 | * and the interrupt does not nest into another interrupt | |
703 | * thread. | |
3aa551c9 | 704 | */ |
399b5da2 | 705 | if (new->thread_fn && !nested) { |
3aa551c9 TG |
706 | struct task_struct *t; |
707 | ||
708 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
709 | new->name); | |
710 | if (IS_ERR(t)) | |
711 | return PTR_ERR(t); | |
712 | /* | |
713 | * We keep the reference to the task struct even if | |
714 | * the thread dies to avoid that the interrupt code | |
715 | * references an already freed task_struct. | |
716 | */ | |
717 | get_task_struct(t); | |
718 | new->thread = t; | |
3aa551c9 TG |
719 | } |
720 | ||
1da177e4 LT |
721 | /* |
722 | * The following block of code has to be executed atomically | |
723 | */ | |
239007b8 | 724 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
725 | old_ptr = &desc->action; |
726 | old = *old_ptr; | |
06fcb0c6 | 727 | if (old) { |
e76de9f8 TG |
728 | /* |
729 | * Can't share interrupts unless both agree to and are | |
730 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 731 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
732 | * set the trigger type must match. |
733 | */ | |
3cca53b0 | 734 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
735 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
736 | old_name = old->name; | |
f5163427 | 737 | goto mismatch; |
8b126b77 | 738 | } |
f5163427 | 739 | |
284c6680 | 740 | #if defined(CONFIG_IRQ_PER_CPU) |
f5163427 | 741 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
742 | if ((old->flags & IRQF_PERCPU) != |
743 | (new->flags & IRQF_PERCPU)) | |
f5163427 DS |
744 | goto mismatch; |
745 | #endif | |
1da177e4 LT |
746 | |
747 | /* add new interrupt at end of irq queue */ | |
748 | do { | |
f17c7545 IM |
749 | old_ptr = &old->next; |
750 | old = *old_ptr; | |
1da177e4 LT |
751 | } while (old); |
752 | shared = 1; | |
753 | } | |
754 | ||
1da177e4 | 755 | if (!shared) { |
6b8ff312 | 756 | irq_chip_set_defaults(desc->irq_data.chip); |
e76de9f8 | 757 | |
3aa551c9 TG |
758 | init_waitqueue_head(&desc->wait_for_threads); |
759 | ||
e76de9f8 | 760 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 761 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
762 | ret = __irq_set_trigger(desc, irq, |
763 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 764 | |
3aa551c9 TG |
765 | if (ret) |
766 | goto out_thread; | |
e76de9f8 TG |
767 | } else |
768 | compat_irq_chip_set_default_handler(desc); | |
82736f4d UKK |
769 | #if defined(CONFIG_IRQ_PER_CPU) |
770 | if (new->flags & IRQF_PERCPU) | |
771 | desc->status |= IRQ_PER_CPU; | |
772 | #endif | |
6a6de9ef | 773 | |
b25c340c | 774 | desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | IRQ_ONESHOT | |
1adb0850 | 775 | IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED); |
94d39e1f | 776 | |
b25c340c TG |
777 | if (new->flags & IRQF_ONESHOT) |
778 | desc->status |= IRQ_ONESHOT; | |
779 | ||
94d39e1f TG |
780 | if (!(desc->status & IRQ_NOAUTOEN)) { |
781 | desc->depth = 0; | |
782 | desc->status &= ~IRQ_DISABLED; | |
37e12df7 | 783 | desc->irq_data.chip->irq_startup(&desc->irq_data); |
e76de9f8 TG |
784 | } else |
785 | /* Undo nested disables: */ | |
786 | desc->depth = 1; | |
18404756 | 787 | |
612e3684 TG |
788 | /* Exclude IRQ from balancing if requested */ |
789 | if (new->flags & IRQF_NOBALANCING) | |
790 | desc->status |= IRQ_NO_BALANCING; | |
791 | ||
18404756 | 792 | /* Set default affinity mask once everything is setup */ |
548c8933 | 793 | setup_affinity(irq, desc); |
0c5d1eb7 DB |
794 | |
795 | } else if ((new->flags & IRQF_TRIGGER_MASK) | |
796 | && (new->flags & IRQF_TRIGGER_MASK) | |
797 | != (desc->status & IRQ_TYPE_SENSE_MASK)) { | |
798 | /* hope the handler works with the actual trigger mode... */ | |
799 | pr_warning("IRQ %d uses trigger mode %d; requested %d\n", | |
800 | irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK), | |
801 | (int)(new->flags & IRQF_TRIGGER_MASK)); | |
1da177e4 | 802 | } |
82736f4d | 803 | |
69ab8494 | 804 | new->irq = irq; |
f17c7545 | 805 | *old_ptr = new; |
82736f4d | 806 | |
8528b0f1 LT |
807 | /* Reset broken irq detection when installing new handler */ |
808 | desc->irq_count = 0; | |
809 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
810 | |
811 | /* | |
812 | * Check whether we disabled the irq via the spurious handler | |
813 | * before. Reenable it and give it another chance. | |
814 | */ | |
815 | if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) { | |
816 | desc->status &= ~IRQ_SPURIOUS_DISABLED; | |
0a0c5168 | 817 | __enable_irq(desc, irq, false); |
1adb0850 TG |
818 | } |
819 | ||
239007b8 | 820 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 821 | |
69ab8494 TG |
822 | /* |
823 | * Strictly no need to wake it up, but hung_task complains | |
824 | * when no hard interrupt wakes the thread up. | |
825 | */ | |
826 | if (new->thread) | |
827 | wake_up_process(new->thread); | |
828 | ||
2c6927a3 | 829 | register_irq_proc(irq, desc); |
1da177e4 LT |
830 | new->dir = NULL; |
831 | register_handler_proc(irq, new); | |
832 | ||
833 | return 0; | |
f5163427 DS |
834 | |
835 | mismatch: | |
3f050447 | 836 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 837 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 838 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
839 | if (old_name) |
840 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
841 | dump_stack(); |
842 | } | |
3f050447 | 843 | #endif |
3aa551c9 TG |
844 | ret = -EBUSY; |
845 | ||
846 | out_thread: | |
239007b8 | 847 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3aa551c9 TG |
848 | if (new->thread) { |
849 | struct task_struct *t = new->thread; | |
850 | ||
851 | new->thread = NULL; | |
852 | if (likely(!test_bit(IRQTF_DIED, &new->thread_flags))) | |
853 | kthread_stop(t); | |
854 | put_task_struct(t); | |
855 | } | |
856 | return ret; | |
1da177e4 LT |
857 | } |
858 | ||
d3c60047 TG |
859 | /** |
860 | * setup_irq - setup an interrupt | |
861 | * @irq: Interrupt line to setup | |
862 | * @act: irqaction for the interrupt | |
863 | * | |
864 | * Used to statically setup interrupts in the early boot process. | |
865 | */ | |
866 | int setup_irq(unsigned int irq, struct irqaction *act) | |
867 | { | |
868 | struct irq_desc *desc = irq_to_desc(irq); | |
869 | ||
870 | return __setup_irq(irq, desc, act); | |
871 | } | |
eb53b4e8 | 872 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 873 | |
cbf94f06 MD |
874 | /* |
875 | * Internal function to unregister an irqaction - used to free | |
876 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 877 | */ |
cbf94f06 | 878 | static struct irqaction *__free_irq(unsigned int irq, void *dev_id) |
1da177e4 | 879 | { |
d3c60047 | 880 | struct irq_desc *desc = irq_to_desc(irq); |
f17c7545 | 881 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
882 | unsigned long flags; |
883 | ||
ae88a23b | 884 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 885 | |
7d94f7ca | 886 | if (!desc) |
f21cfb25 | 887 | return NULL; |
1da177e4 | 888 | |
239007b8 | 889 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
890 | |
891 | /* | |
892 | * There can be multiple actions per IRQ descriptor, find the right | |
893 | * one based on the dev_id: | |
894 | */ | |
f17c7545 | 895 | action_ptr = &desc->action; |
1da177e4 | 896 | for (;;) { |
f17c7545 | 897 | action = *action_ptr; |
1da177e4 | 898 | |
ae88a23b IM |
899 | if (!action) { |
900 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 901 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 902 | |
f21cfb25 | 903 | return NULL; |
ae88a23b | 904 | } |
1da177e4 | 905 | |
8316e381 IM |
906 | if (action->dev_id == dev_id) |
907 | break; | |
f17c7545 | 908 | action_ptr = &action->next; |
ae88a23b | 909 | } |
dbce706e | 910 | |
ae88a23b | 911 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 912 | *action_ptr = action->next; |
ae88a23b IM |
913 | |
914 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 915 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
6b8ff312 TG |
916 | if (desc->irq_data.chip->release) |
917 | desc->irq_data.chip->release(irq, dev_id); | |
b77d6adc | 918 | #endif |
dbce706e | 919 | |
ae88a23b IM |
920 | /* If this was the last handler, shut down the IRQ line: */ |
921 | if (!desc->action) { | |
922 | desc->status |= IRQ_DISABLED; | |
bc310dda TG |
923 | if (desc->irq_data.chip->irq_shutdown) |
924 | desc->irq_data.chip->irq_shutdown(&desc->irq_data); | |
ae88a23b | 925 | else |
bc310dda | 926 | desc->irq_data.chip->irq_disable(&desc->irq_data); |
ae88a23b | 927 | } |
3aa551c9 | 928 | |
e7a297b0 PWJ |
929 | #ifdef CONFIG_SMP |
930 | /* make sure affinity_hint is cleaned up */ | |
931 | if (WARN_ON_ONCE(desc->affinity_hint)) | |
932 | desc->affinity_hint = NULL; | |
933 | #endif | |
934 | ||
239007b8 | 935 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ae88a23b IM |
936 | |
937 | unregister_handler_proc(irq, action); | |
938 | ||
939 | /* Make sure it's not being used on another CPU: */ | |
940 | synchronize_irq(irq); | |
1da177e4 | 941 | |
70edcd77 | 942 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
943 | /* |
944 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
945 | * event to happen even now it's being freed, so let's make sure that | |
946 | * is so by doing an extra call to the handler .... | |
947 | * | |
948 | * ( We do this after actually deregistering it, to make sure that a | |
949 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
950 | */ | |
951 | if (action->flags & IRQF_SHARED) { | |
952 | local_irq_save(flags); | |
953 | action->handler(irq, dev_id); | |
954 | local_irq_restore(flags); | |
1da177e4 | 955 | } |
ae88a23b | 956 | #endif |
2d860ad7 LT |
957 | |
958 | if (action->thread) { | |
959 | if (!test_bit(IRQTF_DIED, &action->thread_flags)) | |
960 | kthread_stop(action->thread); | |
961 | put_task_struct(action->thread); | |
962 | } | |
963 | ||
f21cfb25 MD |
964 | return action; |
965 | } | |
966 | ||
cbf94f06 MD |
967 | /** |
968 | * remove_irq - free an interrupt | |
969 | * @irq: Interrupt line to free | |
970 | * @act: irqaction for the interrupt | |
971 | * | |
972 | * Used to remove interrupts statically setup by the early boot process. | |
973 | */ | |
974 | void remove_irq(unsigned int irq, struct irqaction *act) | |
975 | { | |
976 | __free_irq(irq, act->dev_id); | |
977 | } | |
eb53b4e8 | 978 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 979 | |
f21cfb25 MD |
980 | /** |
981 | * free_irq - free an interrupt allocated with request_irq | |
982 | * @irq: Interrupt line to free | |
983 | * @dev_id: Device identity to free | |
984 | * | |
985 | * Remove an interrupt handler. The handler is removed and if the | |
986 | * interrupt line is no longer in use by any driver it is disabled. | |
987 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
988 | * on the card it drives before calling this function. The function | |
989 | * does not return until any executing interrupts for this IRQ | |
990 | * have completed. | |
991 | * | |
992 | * This function must not be called from interrupt context. | |
993 | */ | |
994 | void free_irq(unsigned int irq, void *dev_id) | |
995 | { | |
70aedd24 TG |
996 | struct irq_desc *desc = irq_to_desc(irq); |
997 | ||
998 | if (!desc) | |
999 | return; | |
1000 | ||
3876ec9e | 1001 | chip_bus_lock(desc); |
cbf94f06 | 1002 | kfree(__free_irq(irq, dev_id)); |
3876ec9e | 1003 | chip_bus_sync_unlock(desc); |
1da177e4 | 1004 | } |
1da177e4 LT |
1005 | EXPORT_SYMBOL(free_irq); |
1006 | ||
1007 | /** | |
3aa551c9 | 1008 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 1009 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
1010 | * @handler: Function to be called when the IRQ occurs. |
1011 | * Primary handler for threaded interrupts | |
b25c340c TG |
1012 | * If NULL and thread_fn != NULL the default |
1013 | * primary handler is installed | |
f48fe81e TG |
1014 | * @thread_fn: Function called from the irq handler thread |
1015 | * If NULL, no irq thread is created | |
1da177e4 LT |
1016 | * @irqflags: Interrupt type flags |
1017 | * @devname: An ascii name for the claiming device | |
1018 | * @dev_id: A cookie passed back to the handler function | |
1019 | * | |
1020 | * This call allocates interrupt resources and enables the | |
1021 | * interrupt line and IRQ handling. From the point this | |
1022 | * call is made your handler function may be invoked. Since | |
1023 | * your handler function must clear any interrupt the board | |
1024 | * raises, you must take care both to initialise your hardware | |
1025 | * and to set up the interrupt handler in the right order. | |
1026 | * | |
3aa551c9 TG |
1027 | * If you want to set up a threaded irq handler for your device |
1028 | * then you need to supply @handler and @thread_fn. @handler ist | |
1029 | * still called in hard interrupt context and has to check | |
1030 | * whether the interrupt originates from the device. If yes it | |
1031 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1032 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1033 | * @thread_fn. This split handler design is necessary to support |
1034 | * shared interrupts. | |
1035 | * | |
1da177e4 LT |
1036 | * Dev_id must be globally unique. Normally the address of the |
1037 | * device data structure is used as the cookie. Since the handler | |
1038 | * receives this value it makes sense to use it. | |
1039 | * | |
1040 | * If your interrupt is shared you must pass a non NULL dev_id | |
1041 | * as this is required when freeing the interrupt. | |
1042 | * | |
1043 | * Flags: | |
1044 | * | |
3cca53b0 | 1045 | * IRQF_SHARED Interrupt is shared |
3cca53b0 | 1046 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy |
0c5d1eb7 | 1047 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1048 | * |
1049 | */ | |
3aa551c9 TG |
1050 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1051 | irq_handler_t thread_fn, unsigned long irqflags, | |
1052 | const char *devname, void *dev_id) | |
1da177e4 | 1053 | { |
06fcb0c6 | 1054 | struct irqaction *action; |
08678b08 | 1055 | struct irq_desc *desc; |
d3c60047 | 1056 | int retval; |
1da177e4 LT |
1057 | |
1058 | /* | |
1059 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1060 | * otherwise we'll have trouble later trying to figure out | |
1061 | * which interrupt is which (messes up the interrupt freeing | |
1062 | * logic etc). | |
1063 | */ | |
3cca53b0 | 1064 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 1065 | return -EINVAL; |
7d94f7ca | 1066 | |
cb5bc832 | 1067 | desc = irq_to_desc(irq); |
7d94f7ca | 1068 | if (!desc) |
1da177e4 | 1069 | return -EINVAL; |
7d94f7ca | 1070 | |
08678b08 | 1071 | if (desc->status & IRQ_NOREQUEST) |
6550c775 | 1072 | return -EINVAL; |
b25c340c TG |
1073 | |
1074 | if (!handler) { | |
1075 | if (!thread_fn) | |
1076 | return -EINVAL; | |
1077 | handler = irq_default_primary_handler; | |
1078 | } | |
1da177e4 | 1079 | |
45535732 | 1080 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1081 | if (!action) |
1082 | return -ENOMEM; | |
1083 | ||
1084 | action->handler = handler; | |
3aa551c9 | 1085 | action->thread_fn = thread_fn; |
1da177e4 | 1086 | action->flags = irqflags; |
1da177e4 | 1087 | action->name = devname; |
1da177e4 LT |
1088 | action->dev_id = dev_id; |
1089 | ||
3876ec9e | 1090 | chip_bus_lock(desc); |
d3c60047 | 1091 | retval = __setup_irq(irq, desc, action); |
3876ec9e | 1092 | chip_bus_sync_unlock(desc); |
70aedd24 | 1093 | |
377bf1e4 AV |
1094 | if (retval) |
1095 | kfree(action); | |
1096 | ||
a304e1b8 | 1097 | #ifdef CONFIG_DEBUG_SHIRQ |
6ce51c43 | 1098 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1099 | /* |
1100 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1101 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1102 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1103 | * run in parallel with our fake. | |
a304e1b8 | 1104 | */ |
59845b1f | 1105 | unsigned long flags; |
a304e1b8 | 1106 | |
377bf1e4 | 1107 | disable_irq(irq); |
59845b1f | 1108 | local_irq_save(flags); |
377bf1e4 | 1109 | |
59845b1f | 1110 | handler(irq, dev_id); |
377bf1e4 | 1111 | |
59845b1f | 1112 | local_irq_restore(flags); |
377bf1e4 | 1113 | enable_irq(irq); |
a304e1b8 DW |
1114 | } |
1115 | #endif | |
1da177e4 LT |
1116 | return retval; |
1117 | } | |
3aa551c9 | 1118 | EXPORT_SYMBOL(request_threaded_irq); |
ae731f8d MZ |
1119 | |
1120 | /** | |
1121 | * request_any_context_irq - allocate an interrupt line | |
1122 | * @irq: Interrupt line to allocate | |
1123 | * @handler: Function to be called when the IRQ occurs. | |
1124 | * Threaded handler for threaded interrupts. | |
1125 | * @flags: Interrupt type flags | |
1126 | * @name: An ascii name for the claiming device | |
1127 | * @dev_id: A cookie passed back to the handler function | |
1128 | * | |
1129 | * This call allocates interrupt resources and enables the | |
1130 | * interrupt line and IRQ handling. It selects either a | |
1131 | * hardirq or threaded handling method depending on the | |
1132 | * context. | |
1133 | * | |
1134 | * On failure, it returns a negative value. On success, | |
1135 | * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED. | |
1136 | */ | |
1137 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
1138 | unsigned long flags, const char *name, void *dev_id) | |
1139 | { | |
1140 | struct irq_desc *desc = irq_to_desc(irq); | |
1141 | int ret; | |
1142 | ||
1143 | if (!desc) | |
1144 | return -EINVAL; | |
1145 | ||
1146 | if (desc->status & IRQ_NESTED_THREAD) { | |
1147 | ret = request_threaded_irq(irq, NULL, handler, | |
1148 | flags, name, dev_id); | |
1149 | return !ret ? IRQC_IS_NESTED : ret; | |
1150 | } | |
1151 | ||
1152 | ret = request_irq(irq, handler, flags, name, dev_id); | |
1153 | return !ret ? IRQC_IS_HARDIRQ : ret; | |
1154 | } | |
1155 | EXPORT_SYMBOL_GPL(request_any_context_irq); |