[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / sound / vx_core.h

/*
 * Driver for Digigram VX soundcards
 *
 * Hardware core part
 *
 * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

#ifndef __SOUND_VX_COMMON_H
#define __SOUND_VX_COMMON_H

#include <sound/pcm.h>
#include <sound/hwdep.h>
#include <linux/interrupt.h>

struct firmware;
struct device;

#define VX_DRIVER_VERSION	0x010000	/* 1.0.0 */

/*
 */
#define SIZE_MAX_CMD    0x10
#define SIZE_MAX_STATUS 0x10

struct vx_rmh {
	u16	LgCmd;		/* length of the command to send (WORDs) */
	u16	LgStat;		/* length of the status received (WORDs) */
	u32	Cmd[SIZE_MAX_CMD];
	u32	Stat[SIZE_MAX_STATUS];
	u16	DspStat;	/* status type, RMP_SSIZE_XXX */
};
	
typedef u64 pcx_time_t;

#define VX_MAX_PIPES	16
#define VX_MAX_PERIODS	32
#define VX_MAX_CODECS	2

struct vx_ibl_info {
	int size;	/* the current IBL size (0 = query) in bytes */
	int max_size;	/* max. IBL size in bytes */
	int min_size;	/* min. IBL size in bytes */
	int granularity;	/* granularity */
};

struct vx_pipe {
	int number;
	unsigned int is_capture: 1;
	unsigned int data_mode: 1;
	unsigned int running: 1;
	unsigned int prepared: 1;
	int channels;
	unsigned int differed_type;
	pcx_time_t pcx_time;
	struct snd_pcm_substream *substream;

	int hbuf_size;		/* H-buffer size in bytes */
	int buffer_bytes;	/* the ALSA pcm buffer size in bytes */
	int period_bytes;	/* the ALSA pcm period size in bytes */
	int hw_ptr;		/* the current hardware pointer in bytes */
	int position;		/* the current position in frames (playback only) */
	int transferred;	/* the transferred size (per period) in frames */
	int align;		/* size of alignment */
	u64 cur_count;		/* current sample position (for playback) */

	unsigned int references;     /* an output pipe may be used for monitoring and/or playback */
	struct vx_pipe *monitoring_pipe;  /* pointer to the monitoring pipe (capture pipe only)*/

	struct tasklet_struct start_tq;
};

struct vx_core;

struct snd_vx_ops {
	/* low-level i/o */
	unsigned char (*in8)(struct vx_core *chip, int reg);
	unsigned int (*in32)(struct vx_core *chip, int reg);
	void (*out8)(struct vx_core *chip, int reg, unsigned char val);
	void (*out32)(struct vx_core *chip, int reg, unsigned int val);
	/* irq */
	int (*test_and_ack)(struct vx_core *chip);
	void (*validate_irq)(struct vx_core *chip, int enable);
	/* codec */
	void (*write_codec)(struct vx_core *chip, int codec, unsigned int data);
	void (*akm_write)(struct vx_core *chip, int reg, unsigned int data);
	void (*reset_codec)(struct vx_core *chip);
	void (*change_audio_source)(struct vx_core *chip, int src);
	void (*set_clock_source)(struct vx_core *chp, int src);
	/* chip init */
	int (*load_dsp)(struct vx_core *chip, int idx, const struct firmware *fw);
	void (*reset_dsp)(struct vx_core *chip);
	void (*reset_board)(struct vx_core *chip, int cold_reset);
	int (*add_controls)(struct vx_core *chip);
	/* pcm */
	void (*dma_write)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
			  struct vx_pipe *pipe, int count);
	void (*dma_read)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
			  struct vx_pipe *pipe, int count);
};

struct snd_vx_hardware {
	const char *name;
	int type;	/* VX_TYPE_XXX */

	/* hardware specs */
	unsigned int num_codecs;
	unsigned int num_ins;
	unsigned int num_outs;
	unsigned int output_level_max;
	const unsigned int *output_level_db_scale;
};

/* hwdep id string */
#define SND_VX_HWDEP_ID		"VX Loader"

/* hardware type */
enum {
	/* VX222 PCI */
	VX_TYPE_BOARD,		/* old VX222 PCI */
	VX_TYPE_V2,		/* VX222 V2 PCI */
	VX_TYPE_MIC,		/* VX222 Mic PCI */
	/* VX-pocket */
	VX_TYPE_VXPOCKET,	/* VXpocket V2 */
	VX_TYPE_VXP440,		/* VXpocket 440 */
	VX_TYPE_NUMS
};

/* chip status */
enum {
	VX_STAT_XILINX_LOADED	= (1 << 0),	/* devices are registered */
	VX_STAT_DEVICE_INIT	= (1 << 1),	/* devices are registered */
	VX_STAT_CHIP_INIT	= (1 << 2),	/* all operational */
	VX_STAT_IN_SUSPEND	= (1 << 10),	/* in suspend phase */
	VX_STAT_IS_STALE	= (1 << 15)	/* device is stale */
};

/* min/max values for analog output for old codecs */
#define VX_ANALOG_OUT_LEVEL_MAX		0xe3

struct vx_core {
	/* ALSA stuff */
	struct snd_card *card;
	struct snd_pcm *pcm[VX_MAX_CODECS];
	int type;	/* VX_TYPE_XXX */

	int irq;
	/* ports are defined externally */

	/* low-level functions */
	struct snd_vx_hardware *hw;
	struct snd_vx_ops *ops;

	spinlock_t lock;
	spinlock_t irq_lock;
	struct tasklet_struct tq;

	unsigned int chip_status;
	unsigned int pcm_running;

	struct device *dev;
	struct snd_hwdep *hwdep;

	struct vx_rmh irq_rmh;	/* RMH used in interrupts */

	unsigned int audio_info; /* see VX_AUDIO_INFO */
	unsigned int audio_ins;
	unsigned int audio_outs;
	struct vx_pipe **playback_pipes;
	struct vx_pipe **capture_pipes;

	/* clock and audio sources */
	unsigned int audio_source;	/* current audio input source */
	unsigned int audio_source_target;
	unsigned int clock_mode;	/* clock mode (VX_CLOCK_MODE_XXX) */
	unsigned int clock_source;	/* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
	unsigned int freq;		/* current frequency */
	unsigned int freq_detected;	/* detected frequency from digital in */
	unsigned int uer_detected;	/* VX_UER_MODE_XXX */
	unsigned int uer_bits;	/* IEC958 status bits */
	struct vx_ibl_info ibl;	/* IBL information */

	/* mixer setting */
	int output_level[VX_MAX_CODECS][2];	/* analog output level */
	int audio_gain[2][4];			/* digital audio level (playback/capture) */
	unsigned char audio_active[4];		/* mute/unmute on digital playback */
	int audio_monitor[4];			/* playback hw-monitor level */
	unsigned char audio_monitor_active[4];	/* playback hw-monitor mute/unmute */

	struct mutex mixer_mutex;

	const struct firmware *firmware[4]; /* loaded firmware data */
};


/*
 * constructor
 */
struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
			      struct snd_vx_ops *ops, int extra_size);
int snd_vx_setup_firmware(struct vx_core *chip);
int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *dsp);
int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *dsp);
int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp);

void snd_vx_free_firmware(struct vx_core *chip);

/*
 * interrupt handler; exported for pcmcia
 */
irqreturn_t snd_vx_irq_handler(int irq, void *dev);

/*
 * lowlevel functions
 */
static inline int vx_test_and_ack(struct vx_core *chip)
{
	return chip->ops->test_and_ack(chip);
}

static inline void vx_validate_irq(struct vx_core *chip, int enable)
{
	chip->ops->validate_irq(chip, enable);
}

static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg)
{
	return chip->ops->in8(chip, reg);
}

static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg)
{
	return chip->ops->in32(chip, reg);
}

static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val)
{
	chip->ops->out8(chip, reg, val);
}

static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val)
{
	chip->ops->out32(chip, reg, val);
}

#define vx_inb(chip,reg)	snd_vx_inb(chip, VX_##reg)
#define vx_outb(chip,reg,val)	snd_vx_outb(chip, VX_##reg,val)
#define vx_inl(chip,reg)	snd_vx_inl(chip, VX_##reg)
#define vx_outl(chip,reg,val)	snd_vx_outl(chip, VX_##reg,val)

static inline void vx_reset_dsp(struct vx_core *chip)
{
	chip->ops->reset_dsp(chip);
}

int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh);
int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh);
int vx_send_rih(struct vx_core *chip, int cmd);
int vx_send_rih_nolock(struct vx_core *chip, int cmd);

void vx_reset_codec(struct vx_core *chip, int cold_reset);

/*
 * check the bit on the specified register
 * returns zero if a bit matches, or a negative error code.
 * exported for vxpocket driver
 */
int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time);
#define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
#define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
#define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)


/*
 * pseudo-DMA transfer
 */
static inline void vx_pseudo_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
				       struct vx_pipe *pipe, int count)
{
	chip->ops->dma_write(chip, runtime, pipe, count);
}

static inline void vx_pseudo_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
				      struct vx_pipe *pipe, int count)
{
	chip->ops->dma_read(chip, runtime, pipe, count);
}


/* error with hardware code,
 * the return value is -(VX_ERR_MASK | actual-hw-error-code)
 */
#define VX_ERR_MASK	0x1000000
#define vx_get_error(err)	(-(err) & ~VX_ERR_MASK)


/*
 * pcm stuff
 */
int snd_vx_pcm_new(struct vx_core *chip);
void vx_pcm_update_intr(struct vx_core *chip, unsigned int events);

/*
 * mixer stuff
 */
int snd_vx_mixer_new(struct vx_core *chip);
void vx_toggle_dac_mute(struct vx_core *chip, int mute);
int vx_sync_audio_source(struct vx_core *chip);
int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active);

/*
 * IEC958 & clock stuff
 */
void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
int vx_set_clock(struct vx_core *chip, unsigned int freq);
void vx_set_internal_clock(struct vx_core *chip, unsigned int freq);
int vx_change_frequency(struct vx_core *chip);


/*
 * PM
 */
int snd_vx_suspend(struct vx_core *card);
int snd_vx_resume(struct vx_core *card);

/*
 * hardware constants
 */

#define vx_has_new_dsp(chip)	((chip)->type != VX_TYPE_BOARD)
#define vx_is_pcmcia(chip)	((chip)->type >= VX_TYPE_VXPOCKET)

/* audio input source */
enum {
	VX_AUDIO_SRC_DIGITAL,
	VX_AUDIO_SRC_LINE,
	VX_AUDIO_SRC_MIC
};

/* clock source */
enum {
	INTERNAL_QUARTZ,
	UER_SYNC
};

/* clock mode */
enum {
	VX_CLOCK_MODE_AUTO,	/* depending on the current audio source */
	VX_CLOCK_MODE_INTERNAL,	/* fixed to internal quartz */
	VX_CLOCK_MODE_EXTERNAL	/* fixed to UER sync */
};

/* SPDIF/UER type */
enum {
	VX_UER_MODE_CONSUMER,
	VX_UER_MODE_PROFESSIONAL,
	VX_UER_MODE_NOT_PRESENT,
};

/* register indices */
enum {
	VX_ICR,
	VX_CVR,
	VX_ISR,
	VX_IVR,
	VX_RXH,
	VX_TXH = VX_RXH,
	VX_RXM,
	VX_TXM = VX_RXM,
	VX_RXL,
	VX_TXL = VX_RXL,
	VX_DMA,
	VX_CDSP,
	VX_RFREQ,
	VX_RUER_V2,
	VX_GAIN,
	VX_DATA = VX_GAIN,
	VX_MEMIRQ,
	VX_ACQ,
	VX_BIT0,
	VX_BIT1,
	VX_MIC0,
	VX_MIC1,
	VX_MIC2,
	VX_MIC3,
	VX_PLX0,
	VX_PLX1,
	VX_PLX2,

	VX_LOFREQ,  // V2: ACQ, VP: RFREQ
	VX_HIFREQ,  // V2: BIT0, VP: RUER_V2
	VX_CSUER,   // V2: BIT1, VP: BIT0
	VX_RUER,    // V2: RUER_V2, VP: BIT1

	VX_REG_MAX,

	/* aliases for VX board */
	VX_RESET_DMA = VX_ISR,
	VX_CFG = VX_RFREQ,
	VX_STATUS = VX_MEMIRQ,
	VX_SELMIC = VX_MIC0,
	VX_COMPOT = VX_MIC1,
	VX_SCOMPR = VX_MIC2,
	VX_GLIMIT = VX_MIC3,
	VX_INTCSR = VX_PLX0,
	VX_CNTRL = VX_PLX1,
	VX_GPIOC = VX_PLX2,

	/* aliases for VXPOCKET board */
	VX_MICRO = VX_MEMIRQ,
	VX_CODEC2 = VX_MEMIRQ,
	VX_DIALOG = VX_ACQ,

};

/* RMH status type */
enum {
	RMH_SSIZE_FIXED = 0,	/* status size given by the driver (in LgStat) */
	RMH_SSIZE_ARG = 1,	/* status size given in the LSB byte */
	RMH_SSIZE_MASK = 2,	/* status size given in bitmask */
};


/* bits for ICR register */
#define ICR_HF1		0x10
#define ICR_HF0		0x08
#define ICR_TREQ	0x02	/* Interrupt mode + HREQ set on for transfer (->DSP) request */
#define ICR_RREQ	0x01	/* Interrupt mode + RREQ set on for transfer (->PC) request */

/* bits for CVR register */
#define CVR_HC		0x80

/* bits for ISR register */
#define ISR_HF3		0x10
#define ISR_HF2		0x08
#define ISR_CHK		0x10
#define ISR_ERR		0x08
#define ISR_TX_READY	0x04
#define ISR_TX_EMPTY	0x02
#define ISR_RX_FULL	0x01

/* Constants used to access the DATA register */
#define VX_DATA_CODEC_MASK	0x80
#define VX_DATA_XICOR_MASK	0x80

/* Constants used to access the CSUER register (both for VX2 and VXP) */
#define VX_SUER_FREQ_MASK		0x0c
#define VX_SUER_FREQ_32KHz_MASK		0x0c
#define VX_SUER_FREQ_44KHz_MASK		0x00
#define VX_SUER_FREQ_48KHz_MASK		0x04
#define VX_SUER_DATA_PRESENT_MASK	0x02
#define VX_SUER_CLOCK_PRESENT_MASK	0x01

#define VX_CUER_HH_BITC_SEL_MASK	0x08
#define VX_CUER_MH_BITC_SEL_MASK	0x04
#define VX_CUER_ML_BITC_SEL_MASK	0x02
#define VX_CUER_LL_BITC_SEL_MASK	0x01

#define XX_UER_CBITS_OFFSET_MASK	0x1f


/* bits for audio_info */
#define VX_AUDIO_INFO_REAL_TIME	(1<<0)	/* real-time processing available */
#define VX_AUDIO_INFO_OFFLINE	(1<<1)	/* offline processing available */
#define VX_AUDIO_INFO_MPEG1	(1<<5)
#define VX_AUDIO_INFO_MPEG2	(1<<6)
#define VX_AUDIO_INFO_LINEAR_8	(1<<7)
#define VX_AUDIO_INFO_LINEAR_16	(1<<8)
#define VX_AUDIO_INFO_LINEAR_24	(1<<9)

/* DSP Interrupt Request values */
#define VXP_IRQ_OFFSET		0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
/* call with vx_send_irq_dsp() */
#define IRQ_MESS_WRITE_END          0x30
#define IRQ_MESS_WRITE_NEXT         0x32
#define IRQ_MESS_READ_NEXT          0x34
#define IRQ_MESS_READ_END           0x36
#define IRQ_MESSAGE                 0x38
#define IRQ_RESET_CHK               0x3A
#define IRQ_CONNECT_STREAM_NEXT     0x26
#define IRQ_CONNECT_STREAM_END      0x28
#define IRQ_PAUSE_START_CONNECT     0x2A
#define IRQ_END_CONNECTION          0x2C

/* Is there async. events pending ( IT Source Test ) */
#define ASYNC_EVENTS_PENDING            0x008000
#define HBUFFER_EVENTS_PENDING          0x004000   // Not always accurate
#define NOTIF_EVENTS_PENDING            0x002000
#define TIME_CODE_EVENT_PENDING         0x001000
#define FREQUENCY_CHANGE_EVENT_PENDING  0x000800
#define END_OF_BUFFER_EVENTS_PENDING    0x000400
#define FATAL_DSP_ERROR                 0xff0000

/* Stream Format Header Defines */ 
#define HEADER_FMT_BASE			0xFED00000
#define HEADER_FMT_MONO			0x000000C0
#define HEADER_FMT_INTEL		0x00008000
#define HEADER_FMT_16BITS		0x00002000
#define HEADER_FMT_24BITS		0x00004000
#define HEADER_FMT_UPTO11		0x00000200	/* frequency is less or equ. to 11k.*/
#define HEADER_FMT_UPTO32		0x00000100	/* frequency is over 11k and less then 32k.*/

/* Constants used to access the Codec */
#define XX_CODEC_SELECTOR               0x20
/* codec commands */
#define XX_CODEC_ADC_CONTROL_REGISTER   0x01
#define XX_CODEC_DAC_CONTROL_REGISTER   0x02
#define XX_CODEC_LEVEL_LEFT_REGISTER    0x03
#define XX_CODEC_LEVEL_RIGHT_REGISTER   0x04
#define XX_CODEC_PORT_MODE_REGISTER     0x05
#define XX_CODEC_STATUS_REPORT_REGISTER 0x06
#define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07

/*
 * Audio-level control values
 */
#define CVAL_M110DB		0x000	/* -110dB */
#define CVAL_M99DB		0x02C
#define CVAL_M21DB		0x163
#define CVAL_M18DB		0x16F
#define CVAL_M10DB		0x18F
#define CVAL_0DB		0x1B7
#define CVAL_18DB		0x1FF	/* +18dB */
#define CVAL_MAX		0x1FF

#define AUDIO_IO_HAS_MUTE_LEVEL			0x400000
#define AUDIO_IO_HAS_MUTE_MONITORING_1		0x200000
#define AUDIO_IO_HAS_MUTE_MONITORING_2		0x100000
#define VALID_AUDIO_IO_DIGITAL_LEVEL		0x01
#define VALID_AUDIO_IO_MONITORING_LEVEL		0x02
#define VALID_AUDIO_IO_MUTE_LEVEL		0x04
#define VALID_AUDIO_IO_MUTE_MONITORING_1	0x08
#define VALID_AUDIO_IO_MUTE_MONITORING_2	0x10


#endif /* __SOUND_VX_COMMON_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Driver for Digigram VX soundcards
	3	*
	4	* Hardware core part
	5	*
	6	* Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22
	23	#ifndef __SOUND_VX_COMMON_H
	24	#define __SOUND_VX_COMMON_H
	25
	26	#include <sound/pcm.h>
	27	#include <sound/hwdep.h>
	28	#include <linux/interrupt.h>
	29
1da177e4 LT	30	struct firmware;
	31	struct device;
	32
1da177e4 LT	33	#define VX_DRIVER_VERSION 0x010000 /* 1.0.0 */
	34
	35	/*
	36	*/
	37	#define SIZE_MAX_CMD 0x10
	38	#define SIZE_MAX_STATUS 0x10
	39
	40	struct vx_rmh {
	41	u16 LgCmd; /* length of the command to send (WORDs) */
	42	u16 LgStat; /* length of the status received (WORDs) */
	43	u32 Cmd[SIZE_MAX_CMD];
	44	u32 Stat[SIZE_MAX_STATUS];
	45	u16 DspStat; /* status type, RMP_SSIZE_XXX */
	46	};
	47
	48	typedef u64 pcx_time_t;
	49
	50	#define VX_MAX_PIPES 16
	51	#define VX_MAX_PERIODS 32
	52	#define VX_MAX_CODECS 2
	53
	54	struct vx_ibl_info {
	55	int size; /* the current IBL size (0 = query) in bytes */
	56	int max_size; /* max. IBL size in bytes */
	57	int min_size; /* min. IBL size in bytes */
	58	int granularity; /* granularity */
	59	};
	60
	61	struct vx_pipe {
	62	int number;
	63	unsigned int is_capture: 1;
	64	unsigned int data_mode: 1;
	65	unsigned int running: 1;
	66	unsigned int prepared: 1;
	67	int channels;
	68	unsigned int differed_type;
	69	pcx_time_t pcx_time;
af26367f	70	struct snd_pcm_substream *substream;
1da177e4 LT	71
	72	int hbuf_size; /* H-buffer size in bytes */
	73	int buffer_bytes; /* the ALSA pcm buffer size in bytes */
	74	int period_bytes; /* the ALSA pcm period size in bytes */
	75	int hw_ptr; /* the current hardware pointer in bytes */
	76	int position; /* the current position in frames (playback only) */
	77	int transferred; /* the transferred size (per period) in frames */
	78	int align; /* size of alignment */
	79	u64 cur_count; /* current sample position (for playback) */
	80
	81	unsigned int references; /* an output pipe may be used for monitoring and/or playback */
af26367f	82	struct vx_pipe monitoring_pipe; / pointer to the monitoring pipe (capture pipe only)*/
1da177e4 LT	83
	84	struct tasklet_struct start_tq;
	85	};
	86
af26367f TI	87	struct vx_core;
af26367f TI	88
1da177e4 LT	89	struct snd_vx_ops {
1da177e4 LT	90	/* low-level i/o */
af26367f TI	91	unsigned char (in8)(struct vx_core chip, int reg);
	92	unsigned int (in32)(struct vx_core chip, int reg);
	93	void (out8)(struct vx_core chip, int reg, unsigned char val);
	94	void (out32)(struct vx_core chip, int reg, unsigned int val);
1da177e4	95	/* irq */
af26367f TI	96	int (test_and_ack)(struct vx_core chip);
af26367f TI	97	void (validate_irq)(struct vx_core chip, int enable);
1da177e4	98	/* codec */
af26367f TI	99	void (write_codec)(struct vx_core chip, int codec, unsigned int data);
	100	void (akm_write)(struct vx_core chip, int reg, unsigned int data);
	101	void (reset_codec)(struct vx_core chip);
	102	void (change_audio_source)(struct vx_core chip, int src);
	103	void (set_clock_source)(struct vx_core chp, int src);
1da177e4	104	/* chip init */
af26367f TI	105	int (load_dsp)(struct vx_core chip, int idx, const struct firmware *fw);
	106	void (reset_dsp)(struct vx_core chip);
	107	void (reset_board)(struct vx_core chip, int cold_reset);
	108	int (add_controls)(struct vx_core chip);
1da177e4	109	/* pcm */
af26367f TI	110	void (dma_write)(struct vx_core chip, struct snd_pcm_runtime *runtime,
	111	struct vx_pipe *pipe, int count);
	112	void (dma_read)(struct vx_core chip, struct snd_pcm_runtime *runtime,
	113	struct vx_pipe *pipe, int count);
1da177e4 LT	114	};
	115
	116	struct snd_vx_hardware {
	117	const char *name;
	118	int type; /* VX_TYPE_XXX */
	119
	120	/* hardware specs */
	121	unsigned int num_codecs;
	122	unsigned int num_ins;
	123	unsigned int num_outs;
	124	unsigned int output_level_max;
0cb29ea0	125	const unsigned int *output_level_db_scale;
1da177e4 LT	126	};
	127
	128	/* hwdep id string */
	129	#define SND_VX_HWDEP_ID "VX Loader"
	130
	131	/* hardware type */
	132	enum {
	133	/* VX222 PCI */
	134	VX_TYPE_BOARD, /* old VX222 PCI */
	135	VX_TYPE_V2, /* VX222 V2 PCI */
	136	VX_TYPE_MIC, /* VX222 Mic PCI */
	137	/* VX-pocket */
	138	VX_TYPE_VXPOCKET, /* VXpocket V2 */
	139	VX_TYPE_VXP440, /* VXpocket 440 */
	140	VX_TYPE_NUMS
	141	};
	142
	143	/* chip status */
	144	enum {
	145	VX_STAT_XILINX_LOADED = (1 << 0), /* devices are registered */
	146	VX_STAT_DEVICE_INIT = (1 << 1), /* devices are registered */
	147	VX_STAT_CHIP_INIT = (1 << 2), /* all operational */
	148	VX_STAT_IN_SUSPEND = (1 << 10), /* in suspend phase */
	149	VX_STAT_IS_STALE = (1 << 15) /* device is stale */
	150	};
	151
	152	/* min/max values for analog output for old codecs */
	153	#define VX_ANALOG_OUT_LEVEL_MAX 0xe3
	154
af26367f	155	struct vx_core {
1da177e4	156	/* ALSA stuff */
af26367f TI	157	struct snd_card *card;
af26367f TI	158	struct snd_pcm *pcm[VX_MAX_CODECS];
1da177e4 LT	159	int type; /* VX_TYPE_XXX */
	160
	161	int irq;
	162	/* ports are defined externally */
	163
	164	/* low-level functions */
	165	struct snd_vx_hardware *hw;
	166	struct snd_vx_ops *ops;
	167
	168	spinlock_t lock;
	169	spinlock_t irq_lock;
	170	struct tasklet_struct tq;
	171
	172	unsigned int chip_status;
	173	unsigned int pcm_running;
	174
	175	struct device *dev;
af26367f	176	struct snd_hwdep *hwdep;
1da177e4 LT	177
	178	struct vx_rmh irq_rmh; /* RMH used in interrupts */
	179
	180	unsigned int audio_info; /* see VX_AUDIO_INFO */
	181	unsigned int audio_ins;
	182	unsigned int audio_outs;
	183	struct vx_pipe **playback_pipes;
	184	struct vx_pipe **capture_pipes;
	185
	186	/* clock and audio sources */
	187	unsigned int audio_source; /* current audio input source */
	188	unsigned int audio_source_target;
	189	unsigned int clock_mode; /* clock mode (VX_CLOCK_MODE_XXX) */
	190	unsigned int clock_source; /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
	191	unsigned int freq; /* current frequency */
	192	unsigned int freq_detected; /* detected frequency from digital in */
	193	unsigned int uer_detected; /* VX_UER_MODE_XXX */
	194	unsigned int uer_bits; /* IEC958 status bits */
	195	struct vx_ibl_info ibl; /* IBL information */
	196
	197	/* mixer setting */
	198	int output_level[VX_MAX_CODECS][2]; /* analog output level */
	199	int audio_gain[2][4]; /* digital audio level (playback/capture) */
	200	unsigned char audio_active[4]; /* mute/unmute on digital playback */
	201	int audio_monitor[4]; /* playback hw-monitor level */
	202	unsigned char audio_monitor_active[4]; /* playback hw-monitor mute/unmute */
	203
ef9f0a42	204	struct mutex mixer_mutex;
1da177e4 LT	205
	206	const struct firmware firmware[4]; / loaded firmware data */
	207	};
	208
	209
	210	/*
	211	* constructor
	212	*/
af26367f TI	213	struct vx_core snd_vx_create(struct snd_card card, struct snd_vx_hardware *hw,
	214	struct snd_vx_ops *ops, int extra_size);
	215	int snd_vx_setup_firmware(struct vx_core *chip);
	216	int snd_vx_load_boot_image(struct vx_core chip, const struct firmware dsp);
	217	int snd_vx_dsp_boot(struct vx_core chip, const struct firmware dsp);
	218	int snd_vx_dsp_load(struct vx_core chip, const struct firmware dsp);
1da177e4	219
af26367f	220	void snd_vx_free_firmware(struct vx_core *chip);
1da177e4 LT	221
	222	/*
	223	* interrupt handler; exported for pcmcia
	224	*/
7d12e780	225	irqreturn_t snd_vx_irq_handler(int irq, void *dev);
1da177e4 LT	226
	227	/*
	228	* lowlevel functions
	229	*/
af26367f	230	static inline int vx_test_and_ack(struct vx_core *chip)
1da177e4	231	{
1da177e4 LT	232	return chip->ops->test_and_ack(chip);
	233	}
	234
af26367f	235	static inline void vx_validate_irq(struct vx_core *chip, int enable)
1da177e4	236	{
1da177e4 LT	237	chip->ops->validate_irq(chip, enable);
	238	}
	239
af26367f	240	static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg)
1da177e4	241	{
1da177e4 LT	242	return chip->ops->in8(chip, reg);
	243	}
	244
af26367f	245	static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg)
1da177e4	246	{
1da177e4 LT	247	return chip->ops->in32(chip, reg);
	248	}
	249
af26367f	250	static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val)
1da177e4	251	{
1da177e4 LT	252	chip->ops->out8(chip, reg, val);
	253	}
	254
af26367f	255	static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val)
1da177e4	256	{
1da177e4 LT	257	chip->ops->out32(chip, reg, val);
	258	}
	259
	260	#define vx_inb(chip,reg) snd_vx_inb(chip, VX_##reg)
	261	#define vx_outb(chip,reg,val) snd_vx_outb(chip, VX_##reg,val)
	262	#define vx_inl(chip,reg) snd_vx_inl(chip, VX_##reg)
	263	#define vx_outl(chip,reg,val) snd_vx_outl(chip, VX_##reg,val)
	264
af26367f	265	static inline void vx_reset_dsp(struct vx_core *chip)
1da177e4	266	{
1da177e4 LT	267	chip->ops->reset_dsp(chip);
	268	}
	269
af26367f TI	270	int vx_send_msg(struct vx_core chip, struct vx_rmh rmh);
	271	int vx_send_msg_nolock(struct vx_core chip, struct vx_rmh rmh);
	272	int vx_send_rih(struct vx_core *chip, int cmd);
	273	int vx_send_rih_nolock(struct vx_core *chip, int cmd);
1da177e4	274
af26367f	275	void vx_reset_codec(struct vx_core *chip, int cold_reset);
1da177e4 LT	276
	277	/*
	278	* check the bit on the specified register
	279	* returns zero if a bit matches, or a negative error code.
	280	* exported for vxpocket driver
	281	*/
af26367f	282	int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time);
1da177e4 LT	283	#define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
	284	#define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
	285	#define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)
	286
	287
	288	/*
	289	* pseudo-DMA transfer
	290	*/
af26367f TI	291	static inline void vx_pseudo_dma_write(struct vx_core chip, struct snd_pcm_runtime runtime,
af26367f TI	292	struct vx_pipe *pipe, int count)
1da177e4	293	{
1da177e4 LT	294	chip->ops->dma_write(chip, runtime, pipe, count);
	295	}
	296
af26367f TI	297	static inline void vx_pseudo_dma_read(struct vx_core chip, struct snd_pcm_runtime runtime,
af26367f TI	298	struct vx_pipe *pipe, int count)
1da177e4	299	{
1da177e4 LT	300	chip->ops->dma_read(chip, runtime, pipe, count);
	301	}
	302
	303
	304
	305	/* error with hardware code,
	306	* the return value is -(VX_ERR_MASK \| actual-hw-error-code)
	307	*/
	308	#define VX_ERR_MASK 0x1000000
	309	#define vx_get_error(err) (-(err) & ~VX_ERR_MASK)
	310
	311
	312	/*
	313	* pcm stuff
	314	*/
af26367f TI	315	int snd_vx_pcm_new(struct vx_core *chip);
af26367f TI	316	void vx_pcm_update_intr(struct vx_core *chip, unsigned int events);
1da177e4 LT	317
	318	/*
	319	* mixer stuff
	320	*/
af26367f TI	321	int snd_vx_mixer_new(struct vx_core *chip);
	322	void vx_toggle_dac_mute(struct vx_core *chip, int mute);
	323	int vx_sync_audio_source(struct vx_core *chip);
	324	int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active);
1da177e4 LT	325
	326	/*
	327	* IEC958 & clock stuff
	328	*/
af26367f TI	329	void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
	330	int vx_set_clock(struct vx_core *chip, unsigned int freq);
	331	void vx_set_internal_clock(struct vx_core *chip, unsigned int freq);
	332	int vx_change_frequency(struct vx_core *chip);
1da177e4 LT	333
1da177e4 LT	334
0ed1cad1 TI	335	/*
	336	* PM
	337	*/
68cb2b55	338	int snd_vx_suspend(struct vx_core *card);
0ed1cad1 TI	339	int snd_vx_resume(struct vx_core *card);
0ed1cad1 TI	340
1da177e4 LT	341	/*
	342	* hardware constants
	343	*/
	344
	345	#define vx_has_new_dsp(chip) ((chip)->type != VX_TYPE_BOARD)
	346	#define vx_is_pcmcia(chip) ((chip)->type >= VX_TYPE_VXPOCKET)
	347
	348	/* audio input source */
	349	enum {
	350	VX_AUDIO_SRC_DIGITAL,
	351	VX_AUDIO_SRC_LINE,
	352	VX_AUDIO_SRC_MIC
	353	};
	354
	355	/* clock source */
	356	enum {
	357	INTERNAL_QUARTZ,
	358	UER_SYNC
	359	};
	360
	361	/* clock mode */
	362	enum {
	363	VX_CLOCK_MODE_AUTO, /* depending on the current audio source */
	364	VX_CLOCK_MODE_INTERNAL, /* fixed to internal quartz */
	365	VX_CLOCK_MODE_EXTERNAL /* fixed to UER sync */
	366	};
	367
	368	/* SPDIF/UER type */
	369	enum {
	370	VX_UER_MODE_CONSUMER,
	371	VX_UER_MODE_PROFESSIONAL,
	372	VX_UER_MODE_NOT_PRESENT,
	373	};
	374
	375	/* register indices */
	376	enum {
	377	VX_ICR,
	378	VX_CVR,
	379	VX_ISR,
	380	VX_IVR,
	381	VX_RXH,
	382	VX_TXH = VX_RXH,
	383	VX_RXM,
	384	VX_TXM = VX_RXM,
	385	VX_RXL,
	386	VX_TXL = VX_RXL,
	387	VX_DMA,
	388	VX_CDSP,
	389	VX_RFREQ,
	390	VX_RUER_V2,
	391	VX_GAIN,
	392	VX_DATA = VX_GAIN,
	393	VX_MEMIRQ,
	394	VX_ACQ,
	395	VX_BIT0,
	396	VX_BIT1,
	397	VX_MIC0,
	398	VX_MIC1,
	399	VX_MIC2,
	400	VX_MIC3,
	401	VX_PLX0,
	402	VX_PLX1,
	403	VX_PLX2,
	404
405	VX_LOFREQ, // V2: ACQ, VP: RFREQ
406	VX_HIFREQ, // V2: BIT0, VP: RUER_V2
407	VX_CSUER, // V2: BIT1, VP: BIT0
408	VX_RUER, // V2: RUER_V2, VP: BIT1
409
410	VX_REG_MAX,
411
412	/* aliases for VX board */
413	VX_RESET_DMA = VX_ISR,
414	VX_CFG = VX_RFREQ,
415	VX_STATUS = VX_MEMIRQ,
416	VX_SELMIC = VX_MIC0,
417	VX_COMPOT = VX_MIC1,
418	VX_SCOMPR = VX_MIC2,
419	VX_GLIMIT = VX_MIC3,
420	VX_INTCSR = VX_PLX0,
421	VX_CNTRL = VX_PLX1,
422	VX_GPIOC = VX_PLX2,
423
424	/* aliases for VXPOCKET board */
425	VX_MICRO = VX_MEMIRQ,
426	VX_CODEC2 = VX_MEMIRQ,
427	VX_DIALOG = VX_ACQ,
428
429	};
430
431	/* RMH status type */
432	enum {
433	RMH_SSIZE_FIXED = 0, /* status size given by the driver (in LgStat) */
434	RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */
435	RMH_SSIZE_MASK = 2, /* status size given in bitmask */
436	};
437
438
439	/* bits for ICR register */
440	#define ICR_HF1 0x10
441	#define ICR_HF0 0x08
442	#define ICR_TREQ 0x02 /* Interrupt mode + HREQ set on for transfer (->DSP) request */
443	#define ICR_RREQ 0x01 /* Interrupt mode + RREQ set on for transfer (->PC) request */
444
445	/* bits for CVR register */
446	#define CVR_HC 0x80
447
448	/* bits for ISR register */
449	#define ISR_HF3 0x10
450	#define ISR_HF2 0x08
451	#define ISR_CHK 0x10
452	#define ISR_ERR 0x08
453	#define ISR_TX_READY 0x04
454	#define ISR_TX_EMPTY 0x02
455	#define ISR_RX_FULL 0x01
456
457	/* Constants used to access the DATA register */
458	#define VX_DATA_CODEC_MASK 0x80
459	#define VX_DATA_XICOR_MASK 0x80
460
461	/* Constants used to access the CSUER register (both for VX2 and VXP) */
462	#define VX_SUER_FREQ_MASK 0x0c
463	#define VX_SUER_FREQ_32KHz_MASK 0x0c
464	#define VX_SUER_FREQ_44KHz_MASK 0x00
465	#define VX_SUER_FREQ_48KHz_MASK 0x04
466	#define VX_SUER_DATA_PRESENT_MASK 0x02
467	#define VX_SUER_CLOCK_PRESENT_MASK 0x01
468
469	#define VX_CUER_HH_BITC_SEL_MASK 0x08
470	#define VX_CUER_MH_BITC_SEL_MASK 0x04
471	#define VX_CUER_ML_BITC_SEL_MASK 0x02
472	#define VX_CUER_LL_BITC_SEL_MASK 0x01
473
474	#define XX_UER_CBITS_OFFSET_MASK 0x1f
475
476
477	/* bits for audio_info */
478	#define VX_AUDIO_INFO_REAL_TIME (1<<0) /* real-time processing available */
479	#define VX_AUDIO_INFO_OFFLINE (1<<1) /* offline processing available */
480	#define VX_AUDIO_INFO_MPEG1 (1<<5)
481	#define VX_AUDIO_INFO_MPEG2 (1<<6)
482	#define VX_AUDIO_INFO_LINEAR_8 (1<<7)
483	#define VX_AUDIO_INFO_LINEAR_16 (1<<8)
484	#define VX_AUDIO_INFO_LINEAR_24 (1<<9)
485
486	/* DSP Interrupt Request values */
487	#define VXP_IRQ_OFFSET 0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
488	/* call with vx_send_irq_dsp() */
489	#define IRQ_MESS_WRITE_END 0x30
490	#define IRQ_MESS_WRITE_NEXT 0x32
491	#define IRQ_MESS_READ_NEXT 0x34
492	#define IRQ_MESS_READ_END 0x36
493	#define IRQ_MESSAGE 0x38
494	#define IRQ_RESET_CHK 0x3A
495	#define IRQ_CONNECT_STREAM_NEXT 0x26
496	#define IRQ_CONNECT_STREAM_END 0x28
497	#define IRQ_PAUSE_START_CONNECT 0x2A
498	#define IRQ_END_CONNECTION 0x2C
499
500	/* Is there async. events pending ( IT Source Test ) */
501	#define ASYNC_EVENTS_PENDING 0x008000
502	#define HBUFFER_EVENTS_PENDING 0x004000 // Not always accurate
503	#define NOTIF_EVENTS_PENDING 0x002000
504	#define TIME_CODE_EVENT_PENDING 0x001000
505	#define FREQUENCY_CHANGE_EVENT_PENDING 0x000800
506	#define END_OF_BUFFER_EVENTS_PENDING 0x000400
507	#define FATAL_DSP_ERROR 0xff0000
508
509	/* Stream Format Header Defines */
510	#define HEADER_FMT_BASE 0xFED00000
511	#define HEADER_FMT_MONO 0x000000C0
512	#define HEADER_FMT_INTEL 0x00008000
513	#define HEADER_FMT_16BITS 0x00002000
514	#define HEADER_FMT_24BITS 0x00004000
515	#define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.*/
516	#define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less then 32k.*/
517
518	/* Constants used to access the Codec */
519	#define XX_CODEC_SELECTOR 0x20
520	/* codec commands */
521	#define XX_CODEC_ADC_CONTROL_REGISTER 0x01
522	#define XX_CODEC_DAC_CONTROL_REGISTER 0x02
523	#define XX_CODEC_LEVEL_LEFT_REGISTER 0x03
524	#define XX_CODEC_LEVEL_RIGHT_REGISTER 0x04
525	#define XX_CODEC_PORT_MODE_REGISTER 0x05
526	#define XX_CODEC_STATUS_REPORT_REGISTER 0x06
527	#define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07
528
529	/*
530	* Audio-level control values
531	*/
532	#define CVAL_M110DB 0x000 /* -110dB */
533	#define CVAL_M99DB 0x02C
534	#define CVAL_M21DB 0x163
535	#define CVAL_M18DB 0x16F
536	#define CVAL_M10DB 0x18F
537	#define CVAL_0DB 0x1B7
538	#define CVAL_18DB 0x1FF /* +18dB */
539	#define CVAL_MAX 0x1FF
540
541	#define AUDIO_IO_HAS_MUTE_LEVEL 0x400000
542	#define AUDIO_IO_HAS_MUTE_MONITORING_1 0x200000
543	#define AUDIO_IO_HAS_MUTE_MONITORING_2 0x100000
544	#define VALID_AUDIO_IO_DIGITAL_LEVEL 0x01
545	#define VALID_AUDIO_IO_MONITORING_LEVEL 0x02
546	#define VALID_AUDIO_IO_MUTE_LEVEL 0x04
547	#define VALID_AUDIO_IO_MUTE_MONITORING_1 0x08
548	#define VALID_AUDIO_IO_MUTE_MONITORING_2 0x10
549
550
551	#endif /* __SOUND_VX_COMMON_H */