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ASoC: core - PCM mutex per rtd
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / sound / soc.h
CommitLineData
808db4a4
RP		 1/*
2 * linux/sound/soc.h -- ALSA SoC Layer
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_SND_SOC_H
14#define __LINUX_SND_SOC_H
15
16#include <linux/platform_device.h>
17#include <linux/types.h>
d5021ec9 18#include <linux/notifier.h>
4484bb2e 19#include <linux/workqueue.h>
ec67624d
LCM		 20#include <linux/interrupt.h>
21#include <linux/kernel.h>
808db4a4
RP		 22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/control.h>
25#include <sound/ac97_codec.h>
26
808db4a4
RP		 27/*
28 * Convenience kcontrol builders
29 */
4eaa9819
JS		 30#define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) \
31 ((unsigned long)&(struct soc_mixer_control) \
762b8df7 32 {.reg = xreg, .shift = xshift, .rshift = xshift, .max = xmax, \
d11bb4a9 33 .platform_max = xmax, .invert = xinvert})
4eaa9819
JS		 34#define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
35 ((unsigned long)&(struct soc_mixer_control) \
d11bb4a9 36 {.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
a7a4ac86 37#define SOC_SINGLE(xname, reg, shift, max, invert) \
808db4a4
RP		 38{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
39 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
40 .put = snd_soc_put_volsw, \
a7a4ac86
PZ		 41 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
42#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
43{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
44 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
45 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
46 .tlv.p = (tlv_array), \
47 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
48 .put = snd_soc_put_volsw, \
49 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
4eaa9819 50#define SOC_DOUBLE(xname, xreg, shift_left, shift_right, xmax, xinvert) \
808db4a4
RP		 51{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
52 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
53 .put = snd_soc_put_volsw, \
4eaa9819
JS		 54 .private_value = (unsigned long)&(struct soc_mixer_control) \
55 {.reg = xreg, .shift = shift_left, .rshift = shift_right, \
d11bb4a9 56 .max = xmax, .platform_max = xmax, .invert = xinvert} }
4eaa9819 57#define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \
808db4a4
RP		 58{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
59 .info = snd_soc_info_volsw_2r, \
60 .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
4eaa9819
JS		 61 .private_value = (unsigned long)&(struct soc_mixer_control) \
62 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
d11bb4a9 63 .max = xmax, .platform_max = xmax, .invert = xinvert} }
4eaa9819 64#define SOC_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert, tlv_array) \
a7a4ac86
PZ		 65{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
66 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
67 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
68 .tlv.p = (tlv_array), \
69 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
70 .put = snd_soc_put_volsw, \
4eaa9819
JS		 71 .private_value = (unsigned long)&(struct soc_mixer_control) \
72 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
d11bb4a9 73 .max = xmax, .platform_max = xmax, .invert = xinvert} }
4eaa9819 74#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
a7a4ac86
PZ		 75{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
76 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
77 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
78 .tlv.p = (tlv_array), \
79 .info = snd_soc_info_volsw_2r, \
80 .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
4eaa9819
JS		 81 .private_value = (unsigned long)&(struct soc_mixer_control) \
82 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
d11bb4a9 83 .max = xmax, .platform_max = xmax, .invert = xinvert} }
4eaa9819 84#define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
e13ac2e9
MB		 85{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
86 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
87 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
88 .tlv.p = (tlv_array), \
89 .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \
90 .put = snd_soc_put_volsw_s8, \
4eaa9819 91 .private_value = (unsigned long)&(struct soc_mixer_control) \
d11bb4a9
PU		 92 {.reg = xreg, .min = xmin, .max = xmax, \
93 .platform_max = xmax} }
f8ba0b7b 94#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmax, xtexts) \
808db4a4 95{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
f8ba0b7b
JS		 96 .max = xmax, .texts = xtexts }
97#define SOC_ENUM_SINGLE(xreg, xshift, xmax, xtexts) \
98 SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmax, xtexts)
99#define SOC_ENUM_SINGLE_EXT(xmax, xtexts) \
100{ .max = xmax, .texts = xtexts }
2e72f8e3
PU		 101#define SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xmax, xtexts, xvalues) \
102{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
103 .mask = xmask, .max = xmax, .texts = xtexts, .values = xvalues}
104#define SOC_VALUE_ENUM_SINGLE(xreg, xshift, xmask, xmax, xtexts, xvalues) \
105 SOC_VALUE_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xmax, xtexts, xvalues)
808db4a4
RP		 106#define SOC_ENUM(xname, xenum) \
107{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
108 .info = snd_soc_info_enum_double, \
109 .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
110 .private_value = (unsigned long)&xenum }
2e72f8e3
PU		 111#define SOC_VALUE_ENUM(xname, xenum) \
112{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
74155556 113 .info = snd_soc_info_enum_double, \
2e72f8e3
PU		 114 .get = snd_soc_get_value_enum_double, \
115 .put = snd_soc_put_value_enum_double, \
116 .private_value = (unsigned long)&xenum }
f8ba0b7b 117#define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
808db4a4
RP		 118 xhandler_get, xhandler_put) \
119{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1c433fbd 120 .info = snd_soc_info_volsw, \
808db4a4 121 .get = xhandler_get, .put = xhandler_put, \
f8ba0b7b 122 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
7629ad24
DM		 123#define SOC_DOUBLE_EXT(xname, xreg, shift_left, shift_right, xmax, xinvert,\
124 xhandler_get, xhandler_put) \
125{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
126 .info = snd_soc_info_volsw, \
127 .get = xhandler_get, .put = xhandler_put, \
128 .private_value = (unsigned long)&(struct soc_mixer_control) \
129 {.reg = xreg, .shift = shift_left, .rshift = shift_right, \
d11bb4a9 130 .max = xmax, .platform_max = xmax, .invert = xinvert} }
f8ba0b7b 131#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\
10144c09
MM		 132 xhandler_get, xhandler_put, tlv_array) \
133{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
134 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
135 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
136 .tlv.p = (tlv_array), \
137 .info = snd_soc_info_volsw, \
138 .get = xhandler_get, .put = xhandler_put, \
f8ba0b7b 139 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
d0af93db
JS		 140#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
141 xhandler_get, xhandler_put, tlv_array) \
142{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
143 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
144 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
145 .tlv.p = (tlv_array), \
146 .info = snd_soc_info_volsw, \
147 .get = xhandler_get, .put = xhandler_put, \
148 .private_value = (unsigned long)&(struct soc_mixer_control) \
149 {.reg = xreg, .shift = shift_left, .rshift = shift_right, \
d11bb4a9 150 .max = xmax, .platform_max = xmax, .invert = xinvert} }
3ce91d5a
JS		 151#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\
152 xhandler_get, xhandler_put, tlv_array) \
153{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
154 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
155 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
156 .tlv.p = (tlv_array), \
157 .info = snd_soc_info_volsw_2r, \
158 .get = xhandler_get, .put = xhandler_put, \
159 .private_value = (unsigned long)&(struct soc_mixer_control) \
160 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
d11bb4a9 161 .max = xmax, .platform_max = xmax, .invert = xinvert} }
808db4a4
RP		 162#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
163{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
164 .info = snd_soc_info_bool_ext, \
165 .get = xhandler_get, .put = xhandler_put, \
166 .private_value = xdata }
167#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
168{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
169 .info = snd_soc_info_enum_ext, \
170 .get = xhandler_get, .put = xhandler_put, \
171 .private_value = (unsigned long)&xenum }
172
b6f4bb38 173#define SOC_DOUBLE_R_SX_TLV(xname, xreg_left, xreg_right, xshift,\
174 xmin, xmax, tlv_array) \
175{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
176 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
177 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
178 .tlv.p = (tlv_array), \
179 .info = snd_soc_info_volsw_2r_sx, \
180 .get = snd_soc_get_volsw_2r_sx, \
181 .put = snd_soc_put_volsw_2r_sx, \
182 .private_value = (unsigned long)&(struct soc_mixer_control) \
183 {.reg = xreg_left, \
184 .rreg = xreg_right, .shift = xshift, \
185 .min = xmin, .max = xmax} }
186
187
6c2fb6a8
GL		 188/*
189 * Simplified versions of above macros, declaring a struct and calculating
190 * ARRAY_SIZE internally
191 */
192#define SOC_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xtexts) \
193 struct soc_enum name = SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, \
194 ARRAY_SIZE(xtexts), xtexts)
195#define SOC_ENUM_SINGLE_DECL(name, xreg, xshift, xtexts) \
196 SOC_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xtexts)
197#define SOC_ENUM_SINGLE_EXT_DECL(name, xtexts) \
198 struct soc_enum name = SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtexts), xtexts)
199#define SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xmask, xtexts, xvalues) \
200 struct soc_enum name = SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, \
201 ARRAY_SIZE(xtexts), xtexts, xvalues)
202#define SOC_VALUE_ENUM_SINGLE_DECL(name, xreg, xshift, xmask, xtexts, xvalues) \
203 SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xmask, xtexts, xvalues)
204
0168bf0d
LG		 205/*
206 * Component probe and remove ordering levels for components with runtime
207 * dependencies.
208 */
209#define SND_SOC_COMP_ORDER_FIRST -2
210#define SND_SOC_COMP_ORDER_EARLY -1
211#define SND_SOC_COMP_ORDER_NORMAL 0
212#define SND_SOC_COMP_ORDER_LATE 1
213#define SND_SOC_COMP_ORDER_LAST 2
214
0be9898a
MB		 215/*
216 * Bias levels
217 *
218 * @ON: Bias is fully on for audio playback and capture operations.
219 * @PREPARE: Prepare for audio operations. Called before DAPM switching for
220 * stream start and stop operations.
221 * @STANDBY: Low power standby state when no playback/capture operations are
222 * in progress. NOTE: The transition time between STANDBY and ON
223 * should be as fast as possible and no longer than 10ms.
224 * @OFF: Power Off. No restrictions on transition times.
225 */
226enum snd_soc_bias_level {
56fba41f
MB		 227 SND_SOC_BIAS_OFF = 0,
228 SND_SOC_BIAS_STANDBY = 1,
229 SND_SOC_BIAS_PREPARE = 2,
230 SND_SOC_BIAS_ON = 3,
0be9898a
MB		 231};
232
8a2cd618
MB		 233struct snd_jack;
234struct snd_soc_card;
808db4a4
RP		 235struct snd_soc_pcm_stream;
236struct snd_soc_ops;
808db4a4 237struct snd_soc_pcm_runtime;
3c4b266f 238struct snd_soc_dai;
f0fba2ad 239struct snd_soc_dai_driver;
12a48a8c 240struct snd_soc_platform;
d273ebe7 241struct snd_soc_dai_link;
f0fba2ad 242struct snd_soc_platform_driver;
808db4a4 243struct snd_soc_codec;
f0fba2ad 244struct snd_soc_codec_driver;
808db4a4 245struct soc_enum;
8a2cd618 246struct snd_soc_jack;
fa9879ed 247struct snd_soc_jack_zone;
8a2cd618 248struct snd_soc_jack_pin;
7a30a3db 249struct snd_soc_cache_ops;
ce6120cc 250#include <sound/soc-dapm.h>
f0fba2ad 251
ec67624d
LCM		 252#ifdef CONFIG_GPIOLIB
253struct snd_soc_jack_gpio;
254#endif
808db4a4
RP		 255
256typedef int (*hw_write_t)(void *,const char* ,int);
808db4a4
RP		 257
258extern struct snd_ac97_bus_ops soc_ac97_ops;
259
7084a42b 260enum snd_soc_control_type {
67850a89 261 SND_SOC_CUSTOM = 1,
7084a42b
MB		 262 SND_SOC_I2C,
263 SND_SOC_SPI,
264};
265
7a30a3db 266enum snd_soc_compress_type {
119bd789 267 SND_SOC_FLAT_COMPRESSION = 1,
a7f387d5
DP		 268 SND_SOC_LZO_COMPRESSION,
269 SND_SOC_RBTREE_COMPRESSION
7a30a3db
DP		 270};
271
b8c0dab9
LG		 272enum snd_soc_pcm_subclass {
273 SND_SOC_PCM_CLASS_PCM = 0,
274 SND_SOC_PCM_CLASS_BE = 1,
275};
276
ec4ee52a
MB		 277int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
278 unsigned int freq, int dir);
279int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
280 unsigned int freq_in, unsigned int freq_out);
281
70a7ca34
VK		 282int snd_soc_register_card(struct snd_soc_card *card);
283int snd_soc_unregister_card(struct snd_soc_card *card);
6f8ab4ac
MB		 284int snd_soc_suspend(struct device *dev);
285int snd_soc_resume(struct device *dev);
286int snd_soc_poweroff(struct device *dev);
f0fba2ad
LG		 287int snd_soc_register_platform(struct device *dev,
288 struct snd_soc_platform_driver *platform_drv);
289void snd_soc_unregister_platform(struct device *dev);
290int snd_soc_register_codec(struct device *dev,
001ae4c0 291 const struct snd_soc_codec_driver *codec_drv,
f0fba2ad
LG		 292 struct snd_soc_dai_driver *dai_drv, int num_dai);
293void snd_soc_unregister_codec(struct device *dev);
181e055e
MB		 294int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
295 unsigned int reg);
239c9706
DP		 296int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
297 unsigned int reg);
298int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
299 unsigned int reg);
17a52fd6 300int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
7084a42b
MB		 301 int addr_bits, int data_bits,
302 enum snd_soc_control_type control);
7a30a3db
DP		 303int snd_soc_cache_sync(struct snd_soc_codec *codec);
304int snd_soc_cache_init(struct snd_soc_codec *codec);
305int snd_soc_cache_exit(struct snd_soc_codec *codec);
306int snd_soc_cache_write(struct snd_soc_codec *codec,
307 unsigned int reg, unsigned int value);
308int snd_soc_cache_read(struct snd_soc_codec *codec,
309 unsigned int reg, unsigned int *value);
066d16c3
DP		 310int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
311 unsigned int reg);
312int snd_soc_default_readable_register(struct snd_soc_codec *codec,
313 unsigned int reg);
8020454c
DP		 314int snd_soc_default_writable_register(struct snd_soc_codec *codec,
315 unsigned int reg);
12a48a8c 316
7aae816d
MB		 317/* Utility functions to get clock rates from various things */
318int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
319int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params);
c0fa59df 320int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots);
7aae816d
MB		 321int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
322
808db4a4
RP		 323/* set runtime hw params */
324int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
325 const struct snd_pcm_hardware *hw);
808db4a4 326
8a2cd618 327/* Jack reporting */
f0fba2ad 328int snd_soc_jack_new(struct snd_soc_codec *codec, const char *id, int type,
8a2cd618
MB		 329 struct snd_soc_jack *jack);
330void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
331int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
332 struct snd_soc_jack_pin *pins);
d5021ec9
MB		 333void snd_soc_jack_notifier_register(struct snd_soc_jack *jack,
334 struct notifier_block *nb);
335void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack,
336 struct notifier_block *nb);
fa9879ed
VK		 337int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
338 struct snd_soc_jack_zone *zones);
339int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
ec67624d
LCM		 340#ifdef CONFIG_GPIOLIB
341int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
342 struct snd_soc_jack_gpio *gpios);
343void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
344 struct snd_soc_jack_gpio *gpios);
345#endif
8a2cd618 346
808db4a4
RP		 347/* codec register bit access */
348int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 349 unsigned int mask, unsigned int value);
dd1b3d53
MB		 350int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
351 unsigned short reg, unsigned int mask,
352 unsigned int value);
808db4a4 353int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 354 unsigned int mask, unsigned int value);
808db4a4
RP		 355
356int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
357 struct snd_ac97_bus_ops *ops, int num);
358void snd_soc_free_ac97_codec(struct snd_soc_codec *codec);
359
360/*
361 *Controls
362 */
363struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
efb7ac3f
MB		 364 void *data, char *long_name,
365 const char *prefix);
3e8e1952
IM		 366int snd_soc_add_controls(struct snd_soc_codec *codec,
367 const struct snd_kcontrol_new *controls, int num_controls);
808db4a4
RP		 368int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
369 struct snd_ctl_elem_info *uinfo);
370int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol,
371 struct snd_ctl_elem_info *uinfo);
372int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
373 struct snd_ctl_elem_value *ucontrol);
374int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
375 struct snd_ctl_elem_value *ucontrol);
2e72f8e3
PU		 376int snd_soc_get_value_enum_double(struct snd_kcontrol *kcontrol,
377 struct snd_ctl_elem_value *ucontrol);
378int snd_soc_put_value_enum_double(struct snd_kcontrol *kcontrol,
379 struct snd_ctl_elem_value *ucontrol);
808db4a4
RP		 380int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
381 struct snd_ctl_elem_info *uinfo);
382int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol,
383 struct snd_ctl_elem_info *uinfo);
392abe9c 384#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info
808db4a4
RP		 385int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
386 struct snd_ctl_elem_value *ucontrol);
387int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
388 struct snd_ctl_elem_value *ucontrol);
389int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol,
390 struct snd_ctl_elem_info *uinfo);
391int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol,
392 struct snd_ctl_elem_value *ucontrol);
393int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol,
394 struct snd_ctl_elem_value *ucontrol);
e13ac2e9
MB		 395int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol,
396 struct snd_ctl_elem_info *uinfo);
397int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
398 struct snd_ctl_elem_value *ucontrol);
399int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
400 struct snd_ctl_elem_value *ucontrol);
637d3847
PU		 401int snd_soc_limit_volume(struct snd_soc_codec *codec,
402 const char *name, int max);
b6f4bb38 403int snd_soc_info_volsw_2r_sx(struct snd_kcontrol *kcontrol,
404 struct snd_ctl_elem_info *uinfo);
405int snd_soc_get_volsw_2r_sx(struct snd_kcontrol *kcontrol,
406 struct snd_ctl_elem_value *ucontrol);
407int snd_soc_put_volsw_2r_sx(struct snd_kcontrol *kcontrol,
408 struct snd_ctl_elem_value *ucontrol);
808db4a4 409
066d16c3
DP		 410/**
411 * struct snd_soc_reg_access - Describes whether a given register is
412 * readable, writable or volatile.
413 *
414 * @reg: the register number
415 * @read: whether this register is readable
416 * @write: whether this register is writable
417 * @vol: whether this register is volatile
418 */
419struct snd_soc_reg_access {
420 u16 reg;
421 u16 read;
422 u16 write;
423 u16 vol;
424};
425
8a2cd618
MB		 426/**
427 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
428 *
429 * @pin: name of the pin to update
430 * @mask: bits to check for in reported jack status
431 * @invert: if non-zero then pin is enabled when status is not reported
432 */
433struct snd_soc_jack_pin {
434 struct list_head list;
435 const char *pin;
436 int mask;
437 bool invert;
438};
439
fa9879ed
VK		 440/**
441 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
442 *
443 * @min_mv: start voltage in mv
444 * @max_mv: end voltage in mv
445 * @jack_type: type of jack that is expected for this voltage
446 * @debounce_time: debounce_time for jack, codec driver should wait for this
447 * duration before reading the adc for voltages
448 * @:list: list container
449 */
450struct snd_soc_jack_zone {
451 unsigned int min_mv;
452 unsigned int max_mv;
453 unsigned int jack_type;
454 unsigned int debounce_time;
455 struct list_head list;
456};
457
ec67624d
LCM		 458/**
459 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
460 *
461 * @gpio: gpio number
462 * @name: gpio name
463 * @report: value to report when jack detected
464 * @invert: report presence in low state
465 * @debouce_time: debouce time in ms
7887ab3a 466 * @wake: enable as wake source
fadddc87
MB		 467 * @jack_status_check: callback function which overrides the detection
468 * to provide more complex checks (eg, reading an
469 * ADC).
ec67624d
LCM		 470 */
471#ifdef CONFIG_GPIOLIB
472struct snd_soc_jack_gpio {
473 unsigned int gpio;
474 const char *name;
475 int report;
476 int invert;
477 int debounce_time;
7887ab3a
MB		 478 bool wake;
479
ec67624d 480 struct snd_soc_jack *jack;
4c14d78e 481 struct delayed_work work;
c871a053
JS		 482
483 int (*jack_status_check)(void);
ec67624d
LCM		 484};
485#endif
486
8a2cd618
MB		 487struct snd_soc_jack {
488 struct snd_jack *jack;
f0fba2ad 489 struct snd_soc_codec *codec;
8a2cd618
MB		 490 struct list_head pins;
491 int status;
d5021ec9 492 struct blocking_notifier_head notifier;
fa9879ed 493 struct list_head jack_zones;
8a2cd618
MB		 494};
495
808db4a4
RP		 496/* SoC PCM stream information */
497struct snd_soc_pcm_stream {
f0fba2ad 498 const char *stream_name;
1c433fbd
GG		 499 u64 formats; /* SNDRV_PCM_FMTBIT_* */
500 unsigned int rates; /* SNDRV_PCM_RATE_* */
808db4a4
RP		 501 unsigned int rate_min; /* min rate */
502 unsigned int rate_max; /* max rate */
503 unsigned int channels_min; /* min channels */
504 unsigned int channels_max; /* max channels */
808db4a4
RP		 505};
506
507/* SoC audio ops */
508struct snd_soc_ops {
509 int (*startup)(struct snd_pcm_substream *);
510 void (*shutdown)(struct snd_pcm_substream *);
511 int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
512 int (*hw_free)(struct snd_pcm_substream *);
513 int (*prepare)(struct snd_pcm_substream *);
514 int (*trigger)(struct snd_pcm_substream *, int);
515};
516
7a30a3db
DP		 517/* SoC cache ops */
518struct snd_soc_cache_ops {
0d735eaa 519 const char *name;
7a30a3db
DP		 520 enum snd_soc_compress_type id;
521 int (*init)(struct snd_soc_codec *codec);
522 int (*exit)(struct snd_soc_codec *codec);
523 int (*read)(struct snd_soc_codec *codec, unsigned int reg,
524 unsigned int *value);
525 int (*write)(struct snd_soc_codec *codec, unsigned int reg,
526 unsigned int value);
527 int (*sync)(struct snd_soc_codec *codec);
528};
529
f0fba2ad 530/* SoC Audio Codec device */
808db4a4 531struct snd_soc_codec {
f0fba2ad 532 const char *name;
ead9b919 533 const char *name_prefix;
f0fba2ad 534 int id;
0d0cf00a 535 struct device *dev;
001ae4c0 536 const struct snd_soc_codec_driver *driver;
0d0cf00a 537
f0fba2ad
LG		 538 struct mutex mutex;
539 struct snd_soc_card *card;
0d0cf00a 540 struct list_head list;
f0fba2ad
LG		 541 struct list_head card_list;
542 int num_dai;
23bbce34 543 enum snd_soc_compress_type compress_type;
aea170a0 544 size_t reg_size; /* reg_cache_size * reg_word_size */
1500b7b5
DP		 545 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
546 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 547 int (*writable_register)(struct snd_soc_codec *, unsigned int);
808db4a4
RP		 548
549 /* runtime */
808db4a4
RP		 550 struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */
551 unsigned int active;
dad8e7ae 552 unsigned int cache_bypass:1; /* Suppress access to the cache */
f0fba2ad
LG		 553 unsigned int suspended:1; /* Codec is in suspend PM state */
554 unsigned int probed:1; /* Codec has been probed */
555 unsigned int ac97_registered:1; /* Codec has been AC97 registered */
0562f788 556 unsigned int ac97_created:1; /* Codec has been created by SoC */
f0fba2ad 557 unsigned int sysfs_registered:1; /* codec has been sysfs registered */
fdf0f54d 558 unsigned int cache_init:1; /* codec cache has been initialized */
aaee8ef1
MB		 559 u32 cache_only; /* Suppress writes to hardware */
560 u32 cache_sync; /* Cache needs to be synced to hardware */
808db4a4
RP		 561
562 /* codec IO */
563 void *control_data; /* codec control (i2c/3wire) data */
67850a89 564 enum snd_soc_control_type control_type;
808db4a4 565 hw_write_t hw_write;
afa2f106 566 unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int);
c3acec26
MB		 567 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
568 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
5fb609d4 569 int (*bulk_write_raw)(struct snd_soc_codec *, unsigned int, const void *, size_t);
808db4a4 570 void *reg_cache;
3335ddca 571 const void *reg_def_copy;
7a30a3db
DP		 572 const struct snd_soc_cache_ops *cache_ops;
573 struct mutex cache_rw_mutex;
a96ca338 574
808db4a4 575 /* dapm */
ce6120cc 576 struct snd_soc_dapm_context dapm;
808db4a4 577
384c89e2 578#ifdef CONFIG_DEBUG_FS
88439ac7 579 struct dentry *debugfs_codec_root;
384c89e2 580 struct dentry *debugfs_reg;
79fb9387 581 struct dentry *debugfs_dapm;
384c89e2 582#endif
808db4a4
RP		 583};
584
f0fba2ad
LG		 585/* codec driver */
586struct snd_soc_codec_driver {
587
588 /* driver ops */
589 int (*probe)(struct snd_soc_codec *);
590 int (*remove)(struct snd_soc_codec *);
591 int (*suspend)(struct snd_soc_codec *,
592 pm_message_t state);
593 int (*resume)(struct snd_soc_codec *);
594
b7af1daf
MB		 595 /* Default control and setup, added after probe() is run */
596 const struct snd_kcontrol_new *controls;
597 int num_controls;
89b95ac0
MB		 598 const struct snd_soc_dapm_widget *dapm_widgets;
599 int num_dapm_widgets;
600 const struct snd_soc_dapm_route *dapm_routes;
601 int num_dapm_routes;
602
ec4ee52a
MB		 603 /* codec wide operations */
604 int (*set_sysclk)(struct snd_soc_codec *codec,
605 int clk_id, unsigned int freq, int dir);
606 int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source,
607 unsigned int freq_in, unsigned int freq_out);
608
f0fba2ad
LG		 609 /* codec IO */
610 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
611 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
612 int (*display_register)(struct snd_soc_codec *, char *,
613 size_t, unsigned int);
d4754ec9
DP		 614 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
615 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 616 int (*writable_register)(struct snd_soc_codec *, unsigned int);
f0fba2ad
LG		 617 short reg_cache_size;
618 short reg_cache_step;
619 short reg_word_size;
620 const void *reg_cache_default;
066d16c3
DP		 621 short reg_access_size;
622 const struct snd_soc_reg_access *reg_access_default;
7a30a3db 623 enum snd_soc_compress_type compress_type;
f0fba2ad
LG		 624
625 /* codec bias level */
626 int (*set_bias_level)(struct snd_soc_codec *,
627 enum snd_soc_bias_level level);
474b62d6
MB		 628
629 void (*seq_notifier)(struct snd_soc_dapm_context *,
f85a9e0d 630 enum snd_soc_dapm_type, int);
0168bf0d
LG		 631
632 /* probe ordering - for components with runtime dependencies */
633 int probe_order;
634 int remove_order;
808db4a4
RP		 635};
636
637/* SoC platform interface */
f0fba2ad 638struct snd_soc_platform_driver {
808db4a4 639
f0fba2ad
LG		 640 int (*probe)(struct snd_soc_platform *);
641 int (*remove)(struct snd_soc_platform *);
642 int (*suspend)(struct snd_soc_dai *dai);
643 int (*resume)(struct snd_soc_dai *dai);
808db4a4
RP		 644
645 /* pcm creation and destruction */
552d1ef6 646 int (*pcm_new)(struct snd_soc_pcm_runtime *);
808db4a4
RP		 647 void (*pcm_free)(struct snd_pcm *);
648
258020d0
PU		 649 /*
650 * For platform caused delay reporting.
651 * Optional.
652 */
653 snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
654 struct snd_soc_dai *);
655
808db4a4 656 /* platform stream ops */
f0fba2ad 657 struct snd_pcm_ops *ops;
0168bf0d
LG		 658
659 /* probe ordering - for components with runtime dependencies */
660 int probe_order;
661 int remove_order;
808db4a4
RP		 662};
663
f0fba2ad
LG		 664struct snd_soc_platform {
665 const char *name;
666 int id;
667 struct device *dev;
668 struct snd_soc_platform_driver *driver;
808db4a4 669
f0fba2ad
LG		 670 unsigned int suspended:1; /* platform is suspended */
671 unsigned int probed:1;
1c433fbd 672
f0fba2ad
LG		 673 struct snd_soc_card *card;
674 struct list_head list;
675 struct list_head card_list;
676};
808db4a4 677
f0fba2ad
LG		 678struct snd_soc_dai_link {
679 /* config - must be set by machine driver */
680 const char *name; /* Codec name */
681 const char *stream_name; /* Stream name */
682 const char *codec_name; /* for multi-codec */
683 const char *platform_name; /* for multi-platform */
684 const char *cpu_dai_name;
685 const char *codec_dai_name;
4ccab3e7 686
3efab7dc
MB		 687 /* Keep DAI active over suspend */
688 unsigned int ignore_suspend:1;
689
06f409d7
MB		 690 /* Symmetry requirements */
691 unsigned int symmetric_rates:1;
692
f0fba2ad
LG		 693 /* codec/machine specific init - e.g. add machine controls */
694 int (*init)(struct snd_soc_pcm_runtime *rtd);
06f409d7 695
f0fba2ad
LG		 696 /* machine stream operations */
697 struct snd_soc_ops *ops;
808db4a4
RP		 698};
699
ff819b83 700struct snd_soc_codec_conf {
ead9b919 701 const char *dev_name;
ff819b83
DP		 702
703 /*
704 * optional map of kcontrol, widget and path name prefixes that are
705 * associated per device
706 */
ead9b919 707 const char *name_prefix;
ff819b83
DP		 708
709 /*
710 * set this to the desired compression type if you want to
711 * override the one supplied in codec->driver->compress_type
712 */
713 enum snd_soc_compress_type compress_type;
ead9b919
JN		 714};
715
2eea392d
JN		 716struct snd_soc_aux_dev {
717 const char *name; /* Codec name */
718 const char *codec_name; /* for multi-codec */
719
720 /* codec/machine specific init - e.g. add machine controls */
721 int (*init)(struct snd_soc_dapm_context *dapm);
722};
723
87506549
MB		 724/* SoC card */
725struct snd_soc_card {
f0fba2ad 726 const char *name;
22de71ba
LG		 727 const char *long_name;
728 const char *driver_name;
c5af3a2e 729 struct device *dev;
f0fba2ad
LG		 730 struct snd_card *snd_card;
731 struct module *owner;
c5af3a2e
MB		 732
733 struct list_head list;
f0fba2ad 734 struct mutex mutex;
c5af3a2e 735
f0fba2ad 736 bool instantiated;
808db4a4 737
e7361ec4 738 int (*probe)(struct snd_soc_card *card);
28e9ad92 739 int (*late_probe)(struct snd_soc_card *card);
e7361ec4 740 int (*remove)(struct snd_soc_card *card);
808db4a4
RP		 741
742 /* the pre and post PM functions are used to do any PM work before and
743 * after the codec and DAI's do any PM work. */
70b2ac12
MB		 744 int (*suspend_pre)(struct snd_soc_card *card);
745 int (*suspend_post)(struct snd_soc_card *card);
746 int (*resume_pre)(struct snd_soc_card *card);
747 int (*resume_post)(struct snd_soc_card *card);
808db4a4 748
0b4d221b 749 /* callbacks */
87506549 750 int (*set_bias_level)(struct snd_soc_card *,
d4c6005f 751 struct snd_soc_dapm_context *dapm,
0be9898a 752 enum snd_soc_bias_level level);
1badabd9 753 int (*set_bias_level_post)(struct snd_soc_card *,
d4c6005f 754 struct snd_soc_dapm_context *dapm,
1badabd9 755 enum snd_soc_bias_level level);
0b4d221b 756
6c5f1fed 757 long pmdown_time;
96dd3622 758
808db4a4
RP		 759 /* CPU <--> Codec DAI links */
760 struct snd_soc_dai_link *dai_link;
761 int num_links;
f0fba2ad
LG		 762 struct snd_soc_pcm_runtime *rtd;
763 int num_rtd;
6308419a 764
ff819b83
DP		 765 /* optional codec specific configuration */
766 struct snd_soc_codec_conf *codec_conf;
767 int num_configs;
ead9b919 768
2eea392d
JN		 769 /*
770 * optional auxiliary devices such as amplifiers or codecs with DAI
771 * link unused
772 */
773 struct snd_soc_aux_dev *aux_dev;
774 int num_aux_devs;
775 struct snd_soc_pcm_runtime *rtd_aux;
776 int num_aux_rtd;
777
b7af1daf
MB		 778 const struct snd_kcontrol_new *controls;
779 int num_controls;
780
b8ad29de
MB		 781 /*
782 * Card-specific routes and widgets.
783 */
d06e48db 784 const struct snd_soc_dapm_widget *dapm_widgets;
b8ad29de 785 int num_dapm_widgets;
d06e48db 786 const struct snd_soc_dapm_route *dapm_routes;
b8ad29de
MB		 787 int num_dapm_routes;
788
6308419a 789 struct work_struct deferred_resume_work;
f0fba2ad
LG		 790
791 /* lists of probed devices belonging to this card */
792 struct list_head codec_dev_list;
793 struct list_head platform_dev_list;
794 struct list_head dai_dev_list;
a6052154 795
97c866de 796 struct list_head widgets;
8ddab3f5 797 struct list_head paths;
7be31be8 798 struct list_head dapm_list;
8ddab3f5 799
e37a4970
MB		 800 /* Generic DAPM context for the card */
801 struct snd_soc_dapm_context dapm;
802
a6052154
JN		 803#ifdef CONFIG_DEBUG_FS
804 struct dentry *debugfs_card_root;
3a45b867 805 struct dentry *debugfs_pop_time;
a6052154 806#endif
3a45b867 807 u32 pop_time;
dddf3e4c
MB		 808
809 void *drvdata;
808db4a4
RP		 810};
811
f0fba2ad
LG		 812/* SoC machine DAI configuration, glues a codec and cpu DAI together */
813struct snd_soc_pcm_runtime {
814 struct device dev;
87506549 815 struct snd_soc_card *card;
f0fba2ad 816 struct snd_soc_dai_link *dai_link;
b8c0dab9
LG		 817 struct mutex pcm_mutex;
818 enum snd_soc_pcm_subclass pcm_subclass;
819 struct snd_pcm_ops ops;
f0fba2ad
LG		 820
821 unsigned int complete:1;
822 unsigned int dev_registered:1;
808db4a4 823
f0fba2ad
LG		 824 /* Symmetry data - only valid if symmetry is being enforced */
825 unsigned int rate;
826 long pmdown_time;
827
828 /* runtime devices */
829 struct snd_pcm *pcm;
830 struct snd_soc_codec *codec;
831 struct snd_soc_platform *platform;
832 struct snd_soc_dai *codec_dai;
833 struct snd_soc_dai *cpu_dai;
834
835 struct delayed_work delayed_work;
808db4a4
RP		 836};
837
4eaa9819
JS		 838/* mixer control */
839struct soc_mixer_control {
d11bb4a9 840 int min, max, platform_max;
815ecf8d 841 unsigned int reg, rreg, shift, rshift, invert;
4eaa9819
JS		 842};
843
808db4a4
RP		 844/* enumerated kcontrol */
845struct soc_enum {
2e72f8e3
PU		 846 unsigned short reg;
847 unsigned short reg2;
848 unsigned char shift_l;
849 unsigned char shift_r;
850 unsigned int max;
851 unsigned int mask;
87023ff7 852 const char * const *texts;
2e72f8e3
PU		 853 const unsigned int *values;
854 void *dapm;
855};
856
5c82f567 857/* codec IO */
c3753707
MB		 858unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
859unsigned int snd_soc_write(struct snd_soc_codec *codec,
860 unsigned int reg, unsigned int val);
5fb609d4
DP		 861unsigned int snd_soc_bulk_write_raw(struct snd_soc_codec *codec,
862 unsigned int reg, const void *data, size_t len);
5c82f567 863
f0fba2ad
LG		 864/* device driver data */
865
dddf3e4c
MB		 866static inline void snd_soc_card_set_drvdata(struct snd_soc_card *card,
867 void *data)
868{
869 card->drvdata = data;
870}
871
872static inline void *snd_soc_card_get_drvdata(struct snd_soc_card *card)
873{
874 return card->drvdata;
875}
876
b2c812e2 877static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec,
f0fba2ad 878 void *data)
b2c812e2 879{
f0fba2ad 880 dev_set_drvdata(codec->dev, data);
b2c812e2
MB		 881}
882
883static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec)
884{
f0fba2ad
LG		 885 return dev_get_drvdata(codec->dev);
886}
887
888static inline void snd_soc_platform_set_drvdata(struct snd_soc_platform *platform,
889 void *data)
890{
891 dev_set_drvdata(platform->dev, data);
892}
893
894static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platform)
895{
896 return dev_get_drvdata(platform->dev);
897}
898
899static inline void snd_soc_pcm_set_drvdata(struct snd_soc_pcm_runtime *rtd,
900 void *data)
901{
902 dev_set_drvdata(&rtd->dev, data);
903}
904
905static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
906{
907 return dev_get_drvdata(&rtd->dev);
b2c812e2
MB		 908}
909
4e10bda0
VK		 910static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
911{
912 INIT_LIST_HEAD(&card->dai_dev_list);
913 INIT_LIST_HEAD(&card->codec_dev_list);
914 INIT_LIST_HEAD(&card->platform_dev_list);
915 INIT_LIST_HEAD(&card->widgets);
916 INIT_LIST_HEAD(&card->paths);
917 INIT_LIST_HEAD(&card->dapm_list);
918}
919
fb257897
MB		 920int snd_soc_util_init(void);
921void snd_soc_util_exit(void);
922
a47cbe72
MB		 923#include <sound/soc-dai.h>
924
faff4bb0 925#ifdef CONFIG_DEBUG_FS
8a9dab1a 926extern struct dentry *snd_soc_debugfs_root;
faff4bb0
SW		 927#endif
928
6f8ab4ac
MB		 929extern const struct dev_pm_ops snd_soc_pm_ops;
930
808db4a4 931#endif
kernel source for telekom puls (alcatel/mediatek)