projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 6fa3eb70 S |
1 | #ifndef __MT_CCCI_COMMON_H__ |
| 2 | #define __MT_CCCI_COMMON_H__ | |
| 3 | #include <asm/io.h> | |
| 4 | #include <asm/setup.h> | |
| 5 | ||
| 6 | /* | |
| 7 | * all code owned by CCCI should use modem index starts from ZERO | |
| 8 | */ | |
| 9 | typedef enum { | |
| 10 | MD_SYS1 = 0, // MD SYS name counts from 1, but internal index counts from 0 | |
| 11 | MD_SYS2, | |
| 12 | MD_SYS3, | |
| 13 | MD_SYS4, | |
| 14 | MD_SYS5 = 4, | |
| 15 | MAX_MD_NUM | |
| 16 | }MD_SYS; | |
| 17 | ||
| 18 | // Meta parsing section | |
| 19 | #define MD1_EN (1<<0) | |
| 20 | #define MD2_EN (1<<1) | |
| 21 | #define MD3_EN (1<<2) | |
| 22 | #define MD5_EN (1<<4) | |
| 23 | ||
| 24 | #define MD_2G_FLAG (1<<0) | |
| 25 | #define MD_FDD_FLAG (1<<1) | |
| 26 | #define MD_TDD_FLAG (1<<2) | |
| 27 | #define MD_LTE_FLAG (1<<3) | |
| 28 | #define MD_SGLTE_FLAG (1<<4) | |
| 29 | ||
| 30 | #define MD_WG_FLAG (MD_FDD_FLAG|MD_2G_FLAG) | |
| 31 | #define MD_TG_FLAG (MD_TDD_FLAG|MD_2G_FLAG) | |
| 32 | #define MD_LWG_FLAG (MD_LTE_FLAG|MD_FDD_FLAG|MD_2G_FLAG) | |
| 33 | #define MD_LTG_FLAG (MD_LTE_FLAG|MD_TDD_FLAG|MD_2G_FLAG) | |
| 34 | ||
| 35 | #define CCCI_SMEM_DUMP_SIZE 4096// smem size we dump when EE | |
| 36 | #define CCCI_SMEM_SIZE_EXCEPTION 0x200000//exception smem total size | |
| 37 | #define CCCI_SMEM_OFFSET_EXREC 2048// where the exception record begain in smem | |
| 38 | #define CCCC_SMEM_CCIF_SRAM_SIZE 16 | |
| 39 | #define CCCI_SMEM_OFFSET_CCIF_SRAM (CCCI_SMEM_OFFSET_EXREC+1024-CCCC_SMEM_CCIF_SRAM_SIZE) | |
| 40 | #define CCCI_SMEM_OFFSET_EPON 0xC64 | |
| 41 | #define CCCI_SMEM_OFFSET_SEQERR 0x34 | |
| 42 | #define CCCI_SMEM_OFFSET_CCCI_DEBUG 0 // where the MD CCCI debug info begain in smem | |
| 43 | #define CCCI_SMEM_CCCI_DEBUG_SIZE 2048 // MD CCCI debug info size | |
| 44 | #define CCCI_SMEM_OFFSET_MDSS_DEBUG 2048 // where the MD SS debug info begain in smem | |
| 45 | #define CCCI_SMEM_MDSS_DEBUG_SIZE 2048 // MD SS debug info size | |
| 46 | ||
| 47 | // MD type defination | |
| 48 | typedef enum { | |
| 49 | md_type_invalid = 0, | |
| 50 | modem_2g = 1, | |
| 51 | modem_3g, | |
| 52 | modem_wg, | |
| 53 | modem_tg, | |
| 54 | modem_lwg, | |
| 55 | modem_ltg, | |
| 56 | modem_sglte, | |
| 57 | MAX_IMG_NUM = modem_sglte // this enum starts from 1 | |
| 58 | } MD_LOAD_TYPE; | |
| 59 | ||
| 60 | // MD logger configure file | |
| 61 | #define MD1_LOGGER_FILE_PATH "/data/mdlog/mdlog1_config" | |
| 62 | #define MD2_LOGGER_FILE_PATH "/data/mdlog/mdlog2_config" | |
| 63 | ||
| 64 | // Image string and header | |
| 65 | // image name/path | |
| 66 | #define MOEDM_IMAGE_NAME "modem.img" | |
| 67 | #define DSP_IMAGE_NAME "DSP_ROM" | |
| 68 | #define CONFIG_MODEM_FIRMWARE_PATH "/etc/firmware/" | |
| 69 | #define CONFIG_MODEM_FIRMWARE_CIP_PATH "/custom/etc/firmware/" | |
| 70 | #define IMG_ERR_STR_LEN 64 | |
| 71 | ||
| 72 | // image header constants | |
| 73 | #define MD_HEADER_MAGIC_NO "CHECK_HEADER" | |
| 74 | ||
| 75 | #define DEBUG_STR "Debug" | |
| 76 | #define RELEASE_STR "Release" | |
| 77 | #define INVALID_STR "INVALID" | |
| 78 | ||
| 79 | struct md_check_header { | |
| 80 | unsigned char check_header[12]; /* magic number is "CHECK_HEADER"*/ | |
| 81 | unsigned int header_verno; /* header structure version number */ | |
| 82 | unsigned int product_ver; /* 0x0:invalid; 0x1:debug version; 0x2:release version */ | |
| 83 | unsigned int image_type; /* 0x0:invalid; 0x1:2G modem; 0x2: 3G modem */ | |
| 84 | unsigned char platform[16]; /* MT6573_S01 or MT6573_S02 */ | |
| 85 | unsigned char build_time[64]; /* build time string */ | |
| 86 | unsigned char build_ver[64]; /* project version, ex:11A_MD.W11.28 */ | |
| 87 | ||
| 88 | unsigned char bind_sys_id; /* bind to md sys id, MD SYS1: 1, MD SYS2: 2 */ | |
| 89 | unsigned char ext_attr; /* no shrink: 0, shrink: 1*/ | |
| 90 | unsigned char reserved[2]; /* for reserved */ | |
| 91 | ||
| 92 | unsigned int mem_size; /* md ROM/RAM image size requested by md */ | |
| 93 | unsigned int md_img_size; /* md image size, exclude head size*/ | |
| 94 | unsigned int reserved_info; /* for reserved */ | |
| 95 | unsigned int size; /* the size of this structure */ | |
| 96 | } __attribute__ ((packed)); | |
| 97 | ||
| 98 | struct md_check_header_v3 { | |
| 99 | unsigned char check_header[12]; /* magic number is "CHECK_HEADER"*/ | |
| 100 | unsigned int header_verno; /* header structure version number */ | |
| 101 | unsigned int product_ver; /* 0x0:invalid; 0x1:debug version; 0x2:release version */ | |
| 102 | unsigned int image_type; /* 0x0:invalid; 0x1:2G modem; 0x2: 3G modem */ | |
| 103 | unsigned char platform[16]; /* MT6573_S01 or MT6573_S02 */ | |
| 104 | unsigned char build_time[64]; /* build time string */ | |
| 105 | unsigned char build_ver[64]; /* project version, ex:11A_MD.W11.28 */ | |
| 106 | ||
| 107 | unsigned char bind_sys_id; /* bind to md sys id, MD SYS1: 1, MD SYS2: 2, MD SYS5: 5 */ | |
| 108 | unsigned char ext_attr; /* no shrink: 0, shrink: 1 */ | |
| 109 | unsigned char reserved[2]; /* for reserved */ | |
| 110 | ||
| 111 | unsigned int mem_size; /* md ROM/RAM image size requested by md */ | |
| 112 | unsigned int md_img_size; /* md image size, exclude head size */ | |
| 113 | unsigned int rpc_sec_mem_addr; /* RPC secure memory address */ | |
| 114 | ||
| 115 | unsigned int dsp_img_offset; | |
| 116 | unsigned int dsp_img_size; | |
| 117 | unsigned char reserved2[88]; | |
| 118 | ||
| 119 | unsigned int size; /* the size of this structure */ | |
| 120 | } __attribute__ ((packed)); | |
| 121 | ||
| 122 | ||
| 123 | //================================================================================= | |
| 124 | // IOCTL defination | |
| 125 | //================================================================================= | |
| 126 | // CCCI == EEMCS | |
| 127 | #define CCCI_IOC_MAGIC 'C' | |
| 128 | #define CCCI_IOC_MD_RESET _IO(CCCI_IOC_MAGIC, 0) // mdlogger // META // muxreport | |
| 129 | #define CCCI_IOC_GET_MD_STATE _IOR(CCCI_IOC_MAGIC, 1, unsigned int) // audio | |
| 130 | #define CCCI_IOC_PCM_BASE_ADDR _IOR(CCCI_IOC_MAGIC, 2, unsigned int) // audio | |
| 131 | #define CCCI_IOC_PCM_LEN _IOR(CCCI_IOC_MAGIC, 3, unsigned int) // audio | |
| 132 | #define CCCI_IOC_FORCE_MD_ASSERT _IO(CCCI_IOC_MAGIC, 4) // muxreport // mdlogger | |
| 133 | #define CCCI_IOC_ALLOC_MD_LOG_MEM _IO(CCCI_IOC_MAGIC, 5) // mdlogger | |
| 134 | #define CCCI_IOC_DO_MD_RST _IO(CCCI_IOC_MAGIC, 6) // md_init | |
| 135 | #define CCCI_IOC_SEND_RUN_TIME_DATA _IO(CCCI_IOC_MAGIC, 7) // md_init | |
| 136 | #define CCCI_IOC_GET_MD_INFO _IOR(CCCI_IOC_MAGIC, 8, unsigned int) // md_init | |
| 137 | #define CCCI_IOC_GET_MD_EX_TYPE _IOR(CCCI_IOC_MAGIC, 9, unsigned int) // mdlogger | |
| 138 | #define CCCI_IOC_SEND_STOP_MD_REQUEST _IO(CCCI_IOC_MAGIC, 10) // muxreport | |
| 139 | #define CCCI_IOC_SEND_START_MD_REQUEST _IO(CCCI_IOC_MAGIC, 11) // muxreport | |
| 140 | #define CCCI_IOC_DO_STOP_MD _IO(CCCI_IOC_MAGIC, 12) // md_init | |
| 141 | #define CCCI_IOC_DO_START_MD _IO(CCCI_IOC_MAGIC, 13) // md_init | |
| 142 | #define CCCI_IOC_ENTER_DEEP_FLIGHT _IO(CCCI_IOC_MAGIC, 14) // RILD // factory | |
| 143 | #define CCCI_IOC_LEAVE_DEEP_FLIGHT _IO(CCCI_IOC_MAGIC, 15) // RILD // factory | |
| 144 | #define CCCI_IOC_POWER_ON_MD _IO(CCCI_IOC_MAGIC, 16) // md_init | |
| 145 | #define CCCI_IOC_POWER_OFF_MD _IO(CCCI_IOC_MAGIC, 17) // md_init | |
| 146 | #define CCCI_IOC_POWER_ON_MD_REQUEST _IO(CCCI_IOC_MAGIC, 18) | |
| 147 | #define CCCI_IOC_POWER_OFF_MD_REQUEST _IO(CCCI_IOC_MAGIC, 19) | |
| 148 | #define CCCI_IOC_SIM_SWITCH _IOW(CCCI_IOC_MAGIC, 20, unsigned int) // RILD // factory | |
| 149 | #define CCCI_IOC_SEND_BATTERY_INFO _IO(CCCI_IOC_MAGIC, 21) // md_init | |
| 150 | #define CCCI_IOC_SIM_SWITCH_TYPE _IOR(CCCI_IOC_MAGIC, 22, unsigned int) // RILD | |
| 151 | #define CCCI_IOC_STORE_SIM_MODE _IOW(CCCI_IOC_MAGIC, 23, unsigned int) // RILD | |
| 152 | #define CCCI_IOC_GET_SIM_MODE _IOR(CCCI_IOC_MAGIC, 24, unsigned int) // RILD | |
| 153 | #define CCCI_IOC_RELOAD_MD_TYPE _IO(CCCI_IOC_MAGIC, 25) // META // md_init // muxreport | |
| 154 | #define CCCI_IOC_GET_SIM_TYPE _IOR(CCCI_IOC_MAGIC, 26, unsigned int) // terservice | |
| 155 | #define CCCI_IOC_ENABLE_GET_SIM_TYPE _IOW(CCCI_IOC_MAGIC, 27, unsigned int) // terservice | |
| 156 | #define CCCI_IOC_SEND_ICUSB_NOTIFY _IOW(CCCI_IOC_MAGIC, 28, unsigned int) // icusbd | |
| 157 | #define CCCI_IOC_SET_MD_IMG_EXIST _IOW(CCCI_IOC_MAGIC, 29, unsigned int) // md_init | |
| 158 | #define CCCI_IOC_GET_MD_IMG_EXIST _IOR(CCCI_IOC_MAGIC, 30, unsigned int) // META | |
| 159 | #define CCCI_IOC_GET_MD_TYPE _IOR(CCCI_IOC_MAGIC, 31, unsigned int) // RILD | |
| 160 | #define CCCI_IOC_STORE_MD_TYPE _IOW(CCCI_IOC_MAGIC, 32, unsigned int) // RILD | |
| 161 | #define CCCI_IOC_GET_MD_TYPE_SAVING _IOR(CCCI_IOC_MAGIC, 33, unsigned int) // META | |
| 162 | #define CCCI_IOC_GET_EXT_MD_POST_FIX _IOR(CCCI_IOC_MAGIC, 34, unsigned int) // char[32] eemcs_fsd // mdlogger | |
| 163 | #define CCCI_IOC_FORCE_FD _IOW(CCCI_IOC_MAGIC, 35, unsigned int) // RILD(6577) | |
| 164 | #define CCCI_IOC_AP_ENG_BUILD _IOW(CCCI_IOC_MAGIC, 36, unsigned int) // md_init(6577) | |
| 165 | #define CCCI_IOC_GET_MD_MEM_SIZE _IOR(CCCI_IOC_MAGIC, 37, unsigned int) // md_init(6577) | |
| 166 | #define CCCI_IOC_UPDATE_SIM_SLOT_CFG _IOW(CCCI_IOC_MAGIC, 38, unsigned int) // RILD | |
| 167 | #define CCCI_IOC_GET_CFG_SETTING _IOW(CCCI_IOC_MAGIC, 39, unsigned int) // md_init | |
| 168 | ||
| 169 | #define CCCI_IOC_SET_MD_SBP_CFG _IOW(CCCI_IOC_MAGIC, 40, unsigned int) // md_init | |
| 170 | #define CCCI_IOC_GET_MD_SBP_CFG _IOW(CCCI_IOC_MAGIC, 41, unsigned int) // md_init | |
| 171 | #define CCCI_IOC_GET_MD_PROTOCOL_TYPE _IOR(CCCI_IOC_MAGIC, 42, char[16]) /*metal tool to get modem protocol type: AP_TST or DHL*/ | |
| 172 | #define CCCI_IOC_SEND_SIGNAL_TO_USER _IOW(CCCI_IOC_MAGIC, 43, unsigned int) // md_init | |
| 173 | ||
| 174 | ||
| 175 | #define CCCI_IOC_SET_HEADER _IO(CCCI_IOC_MAGIC, 112) // emcs_va | |
| 176 | #define CCCI_IOC_CLR_HEADER _IO(CCCI_IOC_MAGIC, 113) // emcs_va | |
| 177 | #define CCCI_IOC_DL_TRAFFIC_CONTROL _IOW(CCCI_IOC_MAGIC, 119, unsigned int) // mdlogger | |
| 178 | ||
| 179 | #define CCCI_IPC_MAGIC 'P' // only for IPC user | |
| 180 | // CCCI == EEMCS | |
| 181 | #define CCCI_IPC_RESET_RECV _IO(CCCI_IPC_MAGIC,0) | |
| 182 | #define CCCI_IPC_RESET_SEND _IO(CCCI_IPC_MAGIC,1) | |
| 183 | #define CCCI_IPC_WAIT_MD_READY _IO(CCCI_IPC_MAGIC,2) | |
| 184 | #define CCCI_IPC_KERN_WRITE_TEST _IO(CCCI_IPC_MAGIC,3) | |
| 185 | ||
| 186 | //================================================================================= | |
| 187 | // CCCI Error number defination | |
| 188 | //================================================================================= | |
| 189 | // CCCI error number region | |
| 190 | #define CCCI_ERR_MODULE_INIT_START_ID (0) | |
| 191 | #define CCCI_ERR_COMMON_REGION_START_ID (100) | |
| 192 | #define CCCI_ERR_CCIF_REGION_START_ID (200) | |
| 193 | #define CCCI_ERR_CCCI_REGION_START_ID (300) | |
| 194 | #define CCCI_ERR_LOAD_IMG_START_ID (400) | |
| 195 | ||
| 196 | // CCCI error number | |
| 197 | #define CCCI_ERR_MODULE_INIT_OK (CCCI_ERR_MODULE_INIT_START_ID+0) | |
| 198 | #define CCCI_ERR_INIT_DEV_NODE_FAIL (CCCI_ERR_MODULE_INIT_START_ID+1) | |
| 199 | #define CCCI_ERR_INIT_PLATFORM_FAIL (CCCI_ERR_MODULE_INIT_START_ID+2) | |
| 200 | #define CCCI_ERR_MK_DEV_NODE_FAIL (CCCI_ERR_MODULE_INIT_START_ID+3) | |
| 201 | #define CCCI_ERR_INIT_LOGIC_LAYER_FAIL (CCCI_ERR_MODULE_INIT_START_ID+4) | |
| 202 | #define CCCI_ERR_INIT_MD_CTRL_FAIL (CCCI_ERR_MODULE_INIT_START_ID+5) | |
| 203 | #define CCCI_ERR_INIT_CHAR_DEV_FAIL (CCCI_ERR_MODULE_INIT_START_ID+6) | |
| 204 | #define CCCI_ERR_INIT_TTY_FAIL (CCCI_ERR_MODULE_INIT_START_ID+7) | |
| 205 | #define CCCI_ERR_INIT_IPC_FAIL (CCCI_ERR_MODULE_INIT_START_ID+8) | |
| 206 | #define CCCI_ERR_INIT_RPC_FAIL (CCCI_ERR_MODULE_INIT_START_ID+9) | |
| 207 | #define CCCI_ERR_INIT_FS_FAIL (CCCI_ERR_MODULE_INIT_START_ID+10) | |
| 208 | #define CCCI_ERR_INIT_CCMNI_FAIL (CCCI_ERR_MODULE_INIT_START_ID+11) | |
| 209 | #define CCCI_ERR_INIT_VIR_CHAR_FAIL (CCCI_ERR_MODULE_INIT_START_ID+12) | |
| 210 | ||
| 211 | // ---- Common | |
| 212 | #define CCCI_ERR_FATAL_ERR (CCCI_ERR_COMMON_REGION_START_ID+0) | |
| 213 | #define CCCI_ERR_ASSERT_ERR (CCCI_ERR_COMMON_REGION_START_ID+1) | |
| 214 | #define CCCI_ERR_MD_IN_RESET (CCCI_ERR_COMMON_REGION_START_ID+2) | |
| 215 | #define CCCI_ERR_RESET_NOT_READY (CCCI_ERR_COMMON_REGION_START_ID+3) | |
| 216 | #define CCCI_ERR_GET_MEM_FAIL (CCCI_ERR_COMMON_REGION_START_ID+4) | |
| 217 | #define CCCI_ERR_GET_SMEM_SETTING_FAIL (CCCI_ERR_COMMON_REGION_START_ID+5) | |
| 218 | #define CCCI_ERR_INVALID_PARAM (CCCI_ERR_COMMON_REGION_START_ID+6) | |
| 219 | #define CCCI_ERR_LARGE_THAN_BUF_SIZE (CCCI_ERR_COMMON_REGION_START_ID+7) | |
| 220 | #define CCCI_ERR_GET_MEM_LAYOUT_FAIL (CCCI_ERR_COMMON_REGION_START_ID+8) | |
| 221 | #define CCCI_ERR_MEM_CHECK_FAIL (CCCI_ERR_COMMON_REGION_START_ID+9) | |
| 222 | #define CCCI_IPO_H_RESTORE_FAIL (CCCI_ERR_COMMON_REGION_START_ID+10) | |
| 223 | ||
| 224 | // ---- CCIF | |
| 225 | #define CCCI_ERR_CCIF_NOT_READY (CCCI_ERR_CCIF_REGION_START_ID+0) | |
| 226 | #define CCCI_ERR_CCIF_CALL_BACK_HAS_REGISTERED (CCCI_ERR_CCIF_REGION_START_ID+1) | |
| 227 | #define CCCI_ERR_CCIF_GET_NULL_POINTER (CCCI_ERR_CCIF_REGION_START_ID+2) | |
| 228 | #define CCCI_ERR_CCIF_UN_SUPPORT (CCCI_ERR_CCIF_REGION_START_ID+3) | |
| 229 | #define CCCI_ERR_CCIF_NO_PHYSICAL_CHANNEL (CCCI_ERR_CCIF_REGION_START_ID+4) | |
| 230 | #define CCCI_ERR_CCIF_INVALID_RUNTIME_LEN (CCCI_ERR_CCIF_REGION_START_ID+5) | |
| 231 | #define CCCI_ERR_CCIF_INVALID_MD_SYS_ID (CCCI_ERR_CCIF_REGION_START_ID+6) | |
| 232 | #define CCCI_ERR_CCIF_GET_HW_INFO_FAIL (CCCI_ERR_CCIF_REGION_START_ID+9) | |
| 233 | ||
| 234 | // ---- CCCI | |
| 235 | #define CCCI_ERR_INVALID_LOGIC_CHANNEL_ID (CCCI_ERR_CCCI_REGION_START_ID+0) | |
| 236 | #define CCCI_ERR_PUSH_RX_DATA_TO_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+1) | |
| 237 | #define CCCI_ERR_REG_CALL_BACK_FOR_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+2) | |
| 238 | #define CCCI_ERR_LOGIC_CH_HAS_REGISTERED (CCCI_ERR_CCCI_REGION_START_ID+3) | |
| 239 | #define CCCI_ERR_MD_NOT_READY (CCCI_ERR_CCCI_REGION_START_ID+4) | |
| 240 | #define CCCI_ERR_ALLOCATE_MEMORY_FAIL (CCCI_ERR_CCCI_REGION_START_ID+5) | |
| 241 | #define CCCI_ERR_CREATE_CCIF_INSTANCE_FAIL (CCCI_ERR_CCCI_REGION_START_ID+6) | |
| 242 | #define CCCI_ERR_REPEAT_CHANNEL_ID (CCCI_ERR_CCCI_REGION_START_ID+7) | |
| 243 | #define CCCI_ERR_KFIFO_IS_NOT_READY (CCCI_ERR_CCCI_REGION_START_ID+8) | |
| 244 | #define CCCI_ERR_GET_NULL_POINTER (CCCI_ERR_CCCI_REGION_START_ID+9) | |
| 245 | #define CCCI_ERR_GET_RX_DATA_FROM_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+10) | |
| 246 | #define CCCI_ERR_CHANNEL_NUM_MIS_MATCH (CCCI_ERR_CCCI_REGION_START_ID+11) | |
| 247 | #define CCCI_ERR_START_ADDR_NOT_4BYTES_ALIGN (CCCI_ERR_CCCI_REGION_START_ID+12) | |
| 248 | #define CCCI_ERR_NOT_DIVISIBLE_BY_4 (CCCI_ERR_CCCI_REGION_START_ID+13) | |
| 249 | #define CCCI_ERR_MD_AT_EXCEPTION (CCCI_ERR_CCCI_REGION_START_ID+14) | |
| 250 | #define CCCI_ERR_MD_CB_HAS_REGISTER (CCCI_ERR_CCCI_REGION_START_ID+15) | |
| 251 | #define CCCI_ERR_MD_INDEX_NOT_FOUND (CCCI_ERR_CCCI_REGION_START_ID+16) | |
| 252 | #define CCCI_ERR_DROP_PACKET (CCCI_ERR_CCCI_REGION_START_ID+17) | |
| 253 | #define CCCI_ERR_PORT_RX_FULL (CCCI_ERR_CCCI_REGION_START_ID+18) | |
| 254 | #define CCCI_ERR_SYSFS_NOT_READY (CCCI_ERR_CCCI_REGION_START_ID+19) | |
| 255 | #define CCCI_ERR_IPC_ID_ERROR (CCCI_ERR_CCCI_REGION_START_ID+20) | |
| 256 | #define CCCI_ERR_FUNC_ID_ERROR (CCCI_ERR_CCCI_REGION_START_ID+21) | |
| 257 | #define CCCI_ERR_INVALID_QUEUE_INDEX (CCCI_ERR_CCCI_REGION_START_ID+21) | |
| 258 | #define CCCI_ERR_HIF_NOT_POWER_ON (CCCI_ERR_CCCI_REGION_START_ID+22) | |
| 259 | ||
| 260 | // ---- Load image error | |
| 261 | #define CCCI_ERR_LOAD_IMG_NOMEM (CCCI_ERR_LOAD_IMG_START_ID+0) | |
| 262 | #define CCCI_ERR_LOAD_IMG_FILE_OPEN (CCCI_ERR_LOAD_IMG_START_ID+1) | |
| 263 | #define CCCI_ERR_LOAD_IMG_FILE_READ (CCCI_ERR_LOAD_IMG_START_ID+2) | |
| 264 | #define CCCI_ERR_LOAD_IMG_KERN_READ (CCCI_ERR_LOAD_IMG_START_ID+3) | |
| 265 | #define CCCI_ERR_LOAD_IMG_NO_ADDR (CCCI_ERR_LOAD_IMG_START_ID+4) | |
| 266 | #define CCCI_ERR_LOAD_IMG_NO_FIRST_BOOT (CCCI_ERR_LOAD_IMG_START_ID+5) | |
| 267 | #define CCCI_ERR_LOAD_IMG_LOAD_FIRM (CCCI_ERR_LOAD_IMG_START_ID+6) | |
| 268 | #define CCCI_ERR_LOAD_IMG_FIRM_NULL (CCCI_ERR_LOAD_IMG_START_ID+7) | |
| 269 | #define CCCI_ERR_LOAD_IMG_CHECK_HEAD (CCCI_ERR_LOAD_IMG_START_ID+8) | |
| 270 | #define CCCI_ERR_LOAD_IMG_SIGN_FAIL (CCCI_ERR_LOAD_IMG_START_ID+9) | |
| 271 | #define CCCI_ERR_LOAD_IMG_CIPHER_FAIL (CCCI_ERR_LOAD_IMG_START_ID+10) | |
| 272 | #define CCCI_ERR_LOAD_IMG_MD_CHECK (CCCI_ERR_LOAD_IMG_START_ID+11) | |
| 273 | #define CCCI_ERR_LOAD_IMG_DSP_CHECK (CCCI_ERR_LOAD_IMG_START_ID+12) | |
| 274 | #define CCCI_ERR_LOAD_IMG_ABNORAL_SIZE (CCCI_ERR_LOAD_IMG_START_ID+13) | |
| 275 | #define CCCI_ERR_LOAD_IMG_NOT_FOUND (CCCI_ERR_LOAD_IMG_START_ID+13) | |
| 276 | ||
| 277 | //================================================================================= | |
| 278 | // CCCI Channel ID and Message defination | |
| 279 | //================================================================================= | |
| 280 | typedef enum { | |
| 281 | CCCI_CONTROL_RX = 0, | |
| 282 | CCCI_CONTROL_TX = 1, | |
| 283 | CCCI_SYSTEM_RX = 2, | |
| 284 | CCCI_SYSTEM_TX = 3, | |
| 285 | CCCI_PCM_RX = 4, | |
| 286 | CCCI_PCM_TX = 5, | |
| 287 | CCCI_UART1_RX = 6, // META | |
| 288 | CCCI_UART1_RX_ACK = 7, | |
| 289 | CCCI_UART1_TX = 8, | |
| 290 | CCCI_UART1_TX_ACK = 9, | |
| 291 | CCCI_UART2_RX = 10, // MUX | |
| 292 | CCCI_UART2_RX_ACK = 11, | |
| 293 | CCCI_UART2_TX = 12, | |
| 294 | CCCI_UART2_TX_ACK = 13, | |
| 295 | CCCI_FS_RX = 14, | |
| 296 | CCCI_FS_TX = 15, | |
| 297 | CCCI_PMIC_RX = 16, | |
| 298 | CCCI_PMIC_TX = 17, | |
| 299 | CCCI_UEM_RX = 18, | |
| 300 | CCCI_UEM_TX = 19, | |
| 301 | CCCI_CCMNI1_RX = 20, | |
| 302 | CCCI_CCMNI1_RX_ACK = 21, | |
| 303 | CCCI_CCMNI1_TX = 22, | |
| 304 | CCCI_CCMNI1_TX_ACK = 23, | |
| 305 | CCCI_CCMNI2_RX = 24, | |
| 306 | CCCI_CCMNI2_RX_ACK = 25, | |
| 307 | CCCI_CCMNI2_TX = 26, | |
| 308 | CCCI_CCMNI2_TX_ACK = 27, | |
| 309 | CCCI_CCMNI3_RX = 28, | |
| 310 | CCCI_CCMNI3_RX_ACK = 29, | |
| 311 | CCCI_CCMNI3_TX = 30, | |
| 312 | CCCI_CCMNI3_TX_ACK = 31, | |
| 313 | CCCI_RPC_RX = 32, | |
| 314 | CCCI_RPC_TX = 33, | |
| 315 | CCCI_IPC_RX = 34, | |
| 316 | CCCI_IPC_RX_ACK = 35, | |
| 317 | CCCI_IPC_TX = 36, | |
| 318 | CCCI_IPC_TX_ACK = 37, | |
| 319 | CCCI_IPC_UART_RX = 38, | |
| 320 | CCCI_IPC_UART_RX_ACK = 39, | |
| 321 | CCCI_IPC_UART_TX = 40, | |
| 322 | CCCI_IPC_UART_TX_ACK = 41, | |
| 323 | CCCI_MD_LOG_RX = 42, | |
| 324 | CCCI_MD_LOG_TX = 43, | |
| 325 | /* ch44~49 reserved for ARM7 */ | |
| 326 | CCCI_IT_RX = 50, | |
| 327 | CCCI_IT_TX = 51, | |
| 328 | CCCI_IMSV_UL = 52, | |
| 329 | CCCI_IMSV_DL = 53, | |
| 330 | CCCI_IMSC_UL = 54, | |
| 331 | CCCI_IMSC_DL = 55, | |
| 332 | CCCI_IMSA_UL = 56, | |
| 333 | CCCI_IMSA_DL = 57, | |
| 334 | CCCI_IMSDC_UL = 58, | |
| 335 | CCCI_IMSDC_DL = 59, | |
| 336 | CCCI_ICUSB_RX = 60, | |
| 337 | CCCI_ICUSB_TX = 61, | |
| 338 | CCCI_LB_IT_RX = 62, | |
| 339 | CCCI_LB_IT_TX = 63, | |
| 340 | CCCI_CCMNI1_DL_ACK = 64, | |
| 341 | CCCI_CCMNI2_DL_ACK = 65, | |
| 342 | CCCI_CCMNI3_DL_ACK = 66, | |
| 343 | CCCI_STATUS_RX = 67, | |
| 344 | CCCI_STATUS_TX = 68, | |
| 345 | ||
| 346 | CCCI_MONITOR_CH, | |
| 347 | CCCI_DUMMY_CH, | |
| 348 | CCCI_MAX_CH_NUM, // RX channel ID should NOT be >= this!! | |
| 349 | ||
| 350 | CCCI_MONITOR_CH_ID = 0xf0000000, // for backward compatible | |
| 351 | CCCI_FORCE_ASSERT_CH = 20090215, | |
| 352 | CCCI_INVALID_CH_ID = 0xffffffff, | |
| 353 | }CCCI_CH; | |
| 354 | ||
| 355 | /* AP->md_init messages on monitor channel */ | |
| 356 | typedef enum { | |
| 357 | CCCI_MD_MSG_BOOT_READY = 0xFAF50001, | |
| 358 | CCCI_MD_MSG_BOOT_UP = 0xFAF50002, | |
| 359 | CCCI_MD_MSG_EXCEPTION = 0xFAF50003, | |
| 360 | CCCI_MD_MSG_RESET = 0xFAF50004, | |
| 361 | CCCI_MD_MSG_RESET_RETRY = 0xFAF50005, | |
| 362 | CCCI_MD_MSG_READY_TO_RESET = 0xFAF50006, | |
| 363 | CCCI_MD_MSG_BOOT_TIMEOUT = 0xFAF50007, | |
| 364 | CCCI_MD_MSG_STOP_MD_REQUEST = 0xFAF50008, | |
| 365 | CCCI_MD_MSG_START_MD_REQUEST = 0xFAF50009, | |
| 366 | CCCI_MD_MSG_ENTER_FLIGHT_MODE = 0xFAF5000A, | |
| 367 | CCCI_MD_MSG_LEAVE_FLIGHT_MODE = 0xFAF5000B, | |
| 368 | CCCI_MD_MSG_POWER_ON_REQUEST = 0xFAF5000C, | |
| 369 | CCCI_MD_MSG_POWER_OFF_REQUEST = 0xFAF5000D, | |
| 370 | CCCI_MD_MSG_SEND_BATTERY_INFO = 0xFAF5000E, | |
| 371 | CCCI_MD_MSG_NOTIFY = 0xFAF5000F, | |
| 372 | CCCI_MD_MSG_STORE_NVRAM_MD_TYPE = 0xFAF50010, | |
| 373 | CCCI_MD_MSG_CFG_UPDATE = 0xFAF50011, | |
| 374 | } CCCI_MD_MSG; | |
| 375 | ||
| 376 | ||
| 377 | // export to other kernel modules, better not let other module include ECCCI header directly (except IPC...) | |
| 378 | enum { | |
| 379 | MD_STATE_INVALID = 0, | |
| 380 | MD_STATE_BOOTING = 1, | |
| 381 | MD_STATE_READY = 2, | |
| 382 | MD_STATE_EXCEPTION = 3 | |
| 383 | }; // align to MD_BOOT_STAGE | |
| 384 | ||
| 385 | enum { | |
| 386 | ID_GET_MD_WAKEUP_SRC = 0, // for SPM | |
| 387 | ID_CCCI_DORMANCY = 1, // abandoned | |
| 388 | ID_LOCK_MD_SLEEP = 2, // abandoned | |
| 389 | ID_ACK_MD_SLEEP = 3, // abandoned | |
| 390 | ID_SSW_SWITCH_MODE = 4, // abandoned | |
| 391 | ID_SET_MD_TX_LEVEL = 5, // abandoned | |
| 392 | ID_GET_TXPOWER = 6, // for thermal | |
| 393 | ID_IPO_H_RESTORE_CB = 7, // abandoned | |
| 394 | ID_FORCE_MD_ASSERT = 8, // abandoned | |
| 395 | ID_PAUSE_LTE = 9, // for DVFS | |
| 396 | ID_STORE_SIM_SWITCH_MODE = 10, | |
| 397 | ID_GET_SIM_SWITCH_MODE = 11, | |
| 398 | ID_GET_MD_STATE = 12, // for DVFS | |
| 399 | //used for throttling feature - start | |
| 400 | ID_THROTTLING_CFG = 13, // For MD SW throughput throttling | |
| 401 | //used for throttling feature - end | |
| 402 | ||
| 403 | ID_UPDATE_TX_POWER = 100, // for SWTP | |
| 404 | ||
| 405 | }; | |
| 406 | ||
| 407 | enum { | |
| 408 | MODEM_CAP_NAPI = (1<<0), | |
| 409 | MODEM_CAP_TXBUSY_STOP = (1<<1), | |
| 410 | }; | |
| 411 | ||
| 412 | /* AP<->MD messages on control or system channel */ | |
| 413 | enum { | |
| 414 | // Control channel, MD->AP | |
| 415 | MD_INIT_START_BOOT = 0x0, | |
| 416 | MD_NORMAL_BOOT = 0x0, | |
| 417 | MD_NORMAL_BOOT_READY = 0x1, // not using | |
| 418 | MD_META_BOOT_READY = 0x2, // not using | |
| 419 | MD_RESET = 0x3, // not using | |
| 420 | MD_EX = 0x4, | |
| 421 | CCCI_DRV_VER_ERROR = 0x5, | |
| 422 | MD_EX_REC_OK = 0x6, | |
| 423 | MD_EX_RESUME = 0x7, // not using | |
| 424 | MD_EX_PASS = 0x8, | |
| 425 | MD_INIT_CHK_ID = 0x5555FFFF, | |
| 426 | MD_EX_CHK_ID = 0x45584350, | |
| 427 | MD_EX_REC_OK_CHK_ID = 0x45524543, | |
| 428 | ||
| 429 | // System channel, AP->MD || AP<-->MD message start from 0x100 | |
| 430 | MD_DORMANT_NOTIFY = 0x100, | |
| 431 | MD_SLP_REQUEST = 0x101, | |
| 432 | MD_TX_POWER = 0x102, | |
| 433 | MD_RF_TEMPERATURE = 0x103, | |
| 434 | MD_RF_TEMPERATURE_3G = 0x104, | |
| 435 | MD_GET_BATTERY_INFO = 0x105, | |
| 436 | MD_SIM_TYPE = 0x107, | |
| 437 | MD_ICUSB_NOTIFY = 0x108, | |
| 438 | //0x109 for md legacy use to crystal_thermal_change | |
| 439 | MD_LOW_BATTERY_LEVEL = 0x10A, | |
| 440 | // 0x10B-0x10C occupied by EEMCS | |
| 441 | MD_PAUSE_LTE = 0x10D, | |
| 442 | //used for throttling feature - start | |
| 443 | MD_THROTTLING = 0x112, // SW throughput throttling | |
| 444 | //used for throttling feature - end | |
| 445 | ||
| 446 | /* swtp */ | |
| 447 | MD_SW_MD1_TX_POWER = 0x10E, | |
| 448 | MD_SW_MD2_TX_POWER = 0x10F, | |
| 449 | MD_SW_MD1_TX_POWER_REQ = 0x110, | |
| 450 | MD_SW_MD2_TX_POWER_REQ = 0x111, | |
| 451 | ||
| 452 | // System channel, MD->AP message start from 0x1000 | |
| 453 | MD_WDT_MONITOR = 0x1000, | |
| 454 | // System channel, AP->MD message | |
| 455 | MD_WAKEN_UP = 0x10000, | |
| 456 | }; | |
| 457 | ||
| 458 | #define NORMAL_BOOT_ID 0 | |
| 459 | #define META_BOOT_ID 1 | |
| 460 | ||
| 461 | //================================================================================= | |
| 462 | // Image type and header defination part | |
| 463 | //================================================================================= | |
| 464 | typedef enum { | |
| 465 | IMG_MD = 0, | |
| 466 | IMG_DSP, | |
| 467 | IMG_NUM, | |
| 468 | } MD_IMG_TYPE; | |
| 469 | ||
| 470 | typedef enum{ | |
| 471 | INVALID_VARSION = 0, | |
| 472 | DEBUG_VERSION, | |
| 473 | RELEASE_VERSION | |
| 474 | } PRODUCT_VER_TYPE; | |
| 475 | ||
| 476 | #define IMG_NAME_LEN 32 | |
| 477 | #define IMG_POSTFIX_LEN 16 | |
| 478 | #define IMG_PATH_LEN 64 | |
| 479 | ||
| 480 | struct IMG_CHECK_INFO{ | |
| 481 | char *product_ver; /* debug/release/invalid */ | |
| 482 | char *image_type; /*2G/3G/invalid*/ | |
| 483 | char *platform; /* MT6573_S00(MT6573E1) or MT6573_S01(MT6573E2) */ | |
| 484 | char *build_time; /* build time string */ | |
| 485 | char *build_ver; /* project version, ex:11A_MD.W11.28 */ | |
| 486 | unsigned int mem_size; /*md rom+ram mem size*/ | |
| 487 | unsigned int md_img_size; /*modem image actual size, exclude head size*/ | |
| 488 | PRODUCT_VER_TYPE version; | |
| 489 | }; | |
| 490 | ||
| 491 | struct ccci_image_info | |
| 492 | { | |
| 493 | MD_IMG_TYPE type; | |
| 494 | char file_name[IMG_PATH_LEN]; | |
| 495 | phys_addr_t address; // phy memory address to load this image | |
| 496 | unsigned int size; // image size without signature, cipher and check header, read form check header | |
| 497 | unsigned int offset; // signature and cipher header | |
| 498 | unsigned int tail_length; // signature tail | |
| 499 | unsigned int dsp_offset; | |
| 500 | unsigned int dsp_size; | |
| 501 | char *ap_platform; | |
| 502 | struct IMG_CHECK_INFO img_info; // read from MD image header | |
| 503 | struct IMG_CHECK_INFO ap_info; // get from AP side configuration | |
| 504 | }; | |
| 505 | ||
| 506 | struct ccci_dev_cfg { | |
| 507 | unsigned int index; | |
| 508 | unsigned int major; | |
| 509 | unsigned int minor_base; | |
| 510 | unsigned int capability; | |
| 511 | }; | |
| 512 | ||
| 513 | typedef int (*get_status_func_t)(int,char*,int); | |
| 514 | typedef int (*boot_md_func_t)(int); | |
| 515 | ||
| 516 | // Rutime data common part | |
| 517 | typedef enum | |
| 518 | { | |
| 519 | FEATURE_NOT_EXIST = 0, | |
| 520 | FEATURE_NOT_SUPPORT, | |
| 521 | FEATURE_SUPPORT, | |
| 522 | FEATURE_PARTIALLY_SUPPORT, | |
| 523 | } MISC_FEATURE_STATE; | |
| 524 | ||
| 525 | typedef enum | |
| 526 | { | |
| 527 | MISC_DMA_ADDR = 0, | |
| 528 | MISC_32K_LESS, | |
| 529 | MISC_RAND_SEED, | |
| 530 | MISC_MD_COCLK_SETTING, | |
| 531 | MISC_MD_SBP_SETTING, | |
| 532 | MISC_MD_SEQ_CHECK, | |
| 533 | } MISC_FEATURE_ID; | |
| 534 | ||
| 535 | typedef enum { | |
| 536 | MODE_UNKNOWN = -1, // -1 | |
| 537 | MODE_IDLE, // 0 | |
| 538 | MODE_USB, // 1 | |
| 539 | MODE_SD, // 2 | |
| 540 | MODE_POLLING, // 3 | |
| 541 | MODE_WAITSD, // 4 | |
| 542 | } LOGGING_MODE; | |
| 543 | ||
| 544 | typedef enum { | |
| 545 | HIF_EX_INIT = 0, // interrupt | |
| 546 | HIF_EX_ACK, // AP->MD | |
| 547 | HIF_EX_INIT_DONE, // polling | |
| 548 | HIF_EX_CLEARQ_DONE, //interrupt | |
| 549 | HIF_EX_CLEARQ_ACK, // AP->MD | |
| 550 | HIF_EX_ALLQ_RESET, // polling | |
| 551 | }HIF_EX_STAGE; | |
| 552 | ||
| 553 | // runtime data format uses EEMCS's version, NOT the same with legacy CCCI | |
| 554 | struct modem_runtime { | |
| 555 | u32 Prefix; // "CCIF" | |
| 556 | u32 Platform_L; // Hardware Platform String ex: "TK6516E0" | |
| 557 | u32 Platform_H; | |
| 558 | u32 DriverVersion; // 0x00000923 since W09.23 | |
| 559 | u32 BootChannel; // Channel to ACK AP with boot ready | |
| 560 | u32 BootingStartID; // MD is booting. NORMAL_BOOT_ID or META_BOOT_ID | |
| 561 | #if 1 // not using in EEMCS | |
| 562 | u32 BootAttributes; // Attributes passing from AP to MD Booting | |
| 563 | u32 BootReadyID; // MD response ID if boot successful and ready | |
| 564 | u32 FileShareMemBase; | |
| 565 | u32 FileShareMemSize; | |
| 566 | u32 ExceShareMemBase; | |
| 567 | u32 ExceShareMemSize; | |
| 568 | u32 CCIFShareMemBase; | |
| 569 | u32 CCIFShareMemSize; | |
| 570 | u32 TotalShareMemBase; | |
| 571 | u32 TotalShareMemSize; | |
| 572 | u32 CheckSum; | |
| 573 | #endif | |
| 574 | u32 Postfix; //"CCIF" | |
| 575 | #if 1 // misc region | |
| 576 | u32 misc_prefix; // "MISC" | |
| 577 | u32 support_mask; | |
| 578 | u32 index; | |
| 579 | u32 next; | |
| 580 | u32 feature_0_val[4]; | |
| 581 | u32 feature_1_val[4]; | |
| 582 | u32 feature_2_val[4]; | |
| 583 | u32 feature_3_val[4]; | |
| 584 | u32 feature_4_val[4]; | |
| 585 | u32 feature_5_val[4]; | |
| 586 | u32 feature_6_val[4]; | |
| 587 | u32 feature_7_val[4]; | |
| 588 | u32 feature_8_val[4]; | |
| 589 | u32 feature_9_val[4]; | |
| 590 | u32 feature_10_val[4]; | |
| 591 | u32 feature_11_val[4]; | |
| 592 | u32 feature_12_val[4]; | |
| 593 | u32 feature_13_val[4]; | |
| 594 | u32 feature_14_val[4]; | |
| 595 | u32 feature_15_val[4]; | |
| 596 | u32 reserved_2[3]; | |
| 597 | u32 misc_postfix; // "MISC" | |
| 598 | #endif | |
| 599 | } __attribute__ ((packed)); | |
| 600 | ||
| 601 | typedef enum { | |
| 602 | ID_GET_FDD_THERMAL_DATA = 0, | |
| 603 | ID_GET_TDD_THERMAL_DATA, | |
| 604 | }SYS_CB_ID; | |
| 605 | ||
| 606 | typedef int (*ccci_sys_cb_func_t)(int, int); | |
| 607 | typedef struct{ | |
| 608 | SYS_CB_ID id; | |
| 609 | ccci_sys_cb_func_t func; | |
| 610 | }ccci_sys_cb_func_info_t; | |
| 611 | ||
| 612 | #define MAX_KERN_API 20 | |
| 613 | ||
| 614 | //============================================================================================== | |
| 615 | // Export API | |
| 616 | //============================================================================================== | |
| 617 | int ccci_get_fo_setting(char item[], unsigned int *val); // Export by ccci util | |
| 618 | void ccci_md_mem_reserve(void); // Export by ccci util | |
| 619 | unsigned int get_modem_is_enabled(int md_id); // Export by ccci util | |
| 620 | unsigned int ccci_get_modem_nr(void); // Export by ccci util | |
| 621 | int ccci_init_security(void); // Export by ccci util | |
| 622 | int ccci_sysfs_add_modem(int md_id, void *kobj, void *ktype, get_status_func_t, boot_md_func_t); // Export by ccci util | |
| 623 | int get_modem_support_cap(int md_id); // Export by ccci util | |
| 624 | int set_modem_support_cap(int md_id, int new_val); // Export by ccci util | |
| 625 | char* ccci_get_md_info_str(int md_id); // Export by ccci util | |
| 626 | int ccci_load_firmware(int md_id, void* img_inf, char img_err_str[], char post_fix[]); // Export by ccci util | |
| 627 | int get_md_resv_mem_info(int md_id, phys_addr_t *r_rw_base, unsigned int *r_rw_size, phys_addr_t *srw_base, unsigned int *srw_size); // Export by ccci util | |
| 628 | //used for throttling feature - start | |
| 629 | unsigned long ccci_get_md_boot_count(int md_id); | |
| 630 | //used for throttling feature - end | |
| 631 | ||
| 632 | int exec_ccci_kern_func_by_md_id(int md_id, unsigned int id, char *buf, unsigned int len); | |
| 633 | int register_ccci_sys_call_back(int md_id, unsigned int id, ccci_sys_cb_func_t func); | |
| 634 | int switch_sim_mode(int id, char *buf, unsigned int len); | |
| 635 | unsigned int get_sim_switch_type(void); | |
| 636 | ||
| 637 | #endif |