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1 | #ifndef __LINUX_REGMAP_H |
2 | #define __LINUX_REGMAP_H | |
3 | ||
4 | /* | |
5 | * Register map access API | |
6 | * | |
7 | * Copyright 2011 Wolfson Microelectronics plc | |
8 | * | |
9 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
b83a313b | 16 | #include <linux/list.h> |
6863ca62 | 17 | #include <linux/rbtree.h> |
93007668 | 18 | #include <linux/err.h> |
f1179e00 | 19 | #include <linux/bug.h> |
b83a313b | 20 | |
de477254 | 21 | struct module; |
313162d0 | 22 | struct device; |
9943fa30 | 23 | struct i2c_client; |
90f790d2 | 24 | struct irq_domain; |
a676f083 | 25 | struct spi_device; |
b83d2ff0 | 26 | struct regmap; |
6863ca62 | 27 | struct regmap_range_cfg; |
9943fa30 | 28 | |
9fabe24e DP |
29 | /* An enum of all the supported cache types */ |
30 | enum regcache_type { | |
31 | REGCACHE_NONE, | |
28644c80 | 32 | REGCACHE_RBTREE, |
2ac902ce MB |
33 | REGCACHE_COMPRESSED, |
34 | REGCACHE_FLAT, | |
9fabe24e DP |
35 | }; |
36 | ||
bd20eb54 MB |
37 | /** |
38 | * Default value for a register. We use an array of structs rather | |
39 | * than a simple array as many modern devices have very sparse | |
40 | * register maps. | |
41 | * | |
42 | * @reg: Register address. | |
43 | * @def: Register default value. | |
44 | */ | |
45 | struct reg_default { | |
46 | unsigned int reg; | |
47 | unsigned int def; | |
48 | }; | |
49 | ||
b83d2ff0 MB |
50 | #ifdef CONFIG_REGMAP |
51 | ||
141eba2e SW |
52 | enum regmap_endian { |
53 | /* Unspecified -> 0 -> Backwards compatible default */ | |
54 | REGMAP_ENDIAN_DEFAULT = 0, | |
55 | REGMAP_ENDIAN_BIG, | |
56 | REGMAP_ENDIAN_LITTLE, | |
57 | REGMAP_ENDIAN_NATIVE, | |
58 | }; | |
59 | ||
76aad392 DC |
60 | /** |
61 | * A register range, used for access related checks | |
62 | * (readable/writeable/volatile/precious checks) | |
63 | * | |
64 | * @range_min: address of first register | |
65 | * @range_max: address of last register | |
66 | */ | |
67 | struct regmap_range { | |
68 | unsigned int range_min; | |
69 | unsigned int range_max; | |
70 | }; | |
71 | ||
72 | /* | |
73 | * A table of ranges including some yes ranges and some no ranges. | |
74 | * If a register belongs to a no_range, the corresponding check function | |
75 | * will return false. If a register belongs to a yes range, the corresponding | |
76 | * check function will return true. "no_ranges" are searched first. | |
77 | * | |
78 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
79 | * @n_yes_ranges: size of the above array | |
80 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
81 | * @n_no_ranges: size of the above array | |
82 | */ | |
83 | struct regmap_access_table { | |
84 | const struct regmap_range *yes_ranges; | |
85 | unsigned int n_yes_ranges; | |
86 | const struct regmap_range *no_ranges; | |
87 | unsigned int n_no_ranges; | |
88 | }; | |
89 | ||
0d4529c5 DC |
90 | typedef void (*regmap_lock)(void *); |
91 | typedef void (*regmap_unlock)(void *); | |
92 | ||
dd898b20 MB |
93 | /** |
94 | * Configuration for the register map of a device. | |
95 | * | |
d3c242e1 SW |
96 | * @name: Optional name of the regmap. Useful when a device has multiple |
97 | * register regions. | |
98 | * | |
dd898b20 | 99 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
100 | * @reg_stride: The register address stride. Valid register addresses are a |
101 | * multiple of this value. If set to 0, a value of 1 will be | |
102 | * used. | |
82159ba8 | 103 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 104 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 105 | * |
3566cc9d | 106 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
107 | * can be written to. If this field is NULL but wr_table |
108 | * (see below) is not, the check is performed on such table | |
109 | * (a register is writeable if it belongs to one of the ranges | |
110 | * specified by wr_table). | |
3566cc9d | 111 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
112 | * can be read from. If this field is NULL but rd_table |
113 | * (see below) is not, the check is performed on such table | |
114 | * (a register is readable if it belongs to one of the ranges | |
115 | * specified by rd_table). | |
3566cc9d | 116 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
117 | * value can't be cached. If this field is NULL but |
118 | * volatile_table (see below) is not, the check is performed on | |
119 | * such table (a register is volatile if it belongs to one of | |
120 | * the ranges specified by volatile_table). | |
3566cc9d | 121 | * @precious_reg: Optional callback returning true if the rgister |
76aad392 DC |
122 | * should not be read outside of a call from the driver |
123 | * (eg, a clear on read interrupt status register). If this | |
124 | * field is NULL but precious_table (see below) is not, the | |
125 | * check is performed on such table (a register is precious if | |
126 | * it belongs to one of the ranges specified by precious_table). | |
127 | * @lock: Optional lock callback (overrides regmap's default lock | |
128 | * function, based on spinlock or mutex). | |
129 | * @unlock: As above for unlocking. | |
130 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
131 | * functions (ignored in case regular lock/unlock functions | |
132 | * are not overridden). | |
d2a5884a AS |
133 | * @reg_read: Optional callback that if filled will be used to perform |
134 | * all the reads from the registers. Should only be provided for | |
135 | * devices whos read operation cannot be represented as a simple read | |
136 | * operation on a bus such as SPI, I2C, etc. Most of the devices do | |
137 | * not need this. | |
138 | * @reg_write: Same as above for writing. | |
139 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex | |
140 | * to perform locking. This field is ignored if custom lock/unlock | |
141 | * functions are used (see fields lock/unlock of struct regmap_config). | |
142 | * This field is a duplicate of a similar file in | |
143 | * 'struct regmap_bus' and serves exact same purpose. | |
144 | * Use it only for "no-bus" cases. | |
bd20eb54 | 145 | * @max_register: Optional, specifies the maximum valid register index. |
76aad392 DC |
146 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
147 | * valid ranges for write access. | |
148 | * @rd_table: As above, for read access. | |
149 | * @volatile_table: As above, for volatile registers. | |
150 | * @precious_table: As above, for precious registers. | |
bd20eb54 MB |
151 | * @reg_defaults: Power on reset values for registers (for use with |
152 | * register cache support). | |
153 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 LPC |
154 | * |
155 | * @read_flag_mask: Mask to be set in the top byte of the register when doing | |
156 | * a read. | |
157 | * @write_flag_mask: Mask to be set in the top byte of the register when doing | |
158 | * a write. If both read_flag_mask and write_flag_mask are | |
159 | * empty the regmap_bus default masks are used. | |
2e33caf1 AJ |
160 | * @use_single_rw: If set, converts the bulk read and write operations into |
161 | * a series of single read and write operations. This is useful | |
162 | * for device that does not support bulk read and write. | |
9fabe24e DP |
163 | * |
164 | * @cache_type: The actual cache type. | |
165 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
166 | * register cache support). | |
167 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
168 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
169 | * DEFAULT, the @reg_format_endian_default value from the | |
170 | * regmap bus is used. | |
171 | * @val_format_endian: Endianness for formatted register values. If this is | |
172 | * DEFAULT, the @reg_format_endian_default value from the | |
173 | * regmap bus is used. | |
6863ca62 KG |
174 | * |
175 | * @ranges: Array of configuration entries for virtual address ranges. | |
176 | * @num_ranges: Number of range configuration entries. | |
dd898b20 | 177 | */ |
b83a313b | 178 | struct regmap_config { |
d3c242e1 SW |
179 | const char *name; |
180 | ||
b83a313b | 181 | int reg_bits; |
f01ee60f | 182 | int reg_stride; |
82159ba8 | 183 | int pad_bits; |
b83a313b | 184 | int val_bits; |
2e2ae66d | 185 | |
2e2ae66d MB |
186 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
187 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
188 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 189 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
0d4529c5 DC |
190 | regmap_lock lock; |
191 | regmap_unlock unlock; | |
192 | void *lock_arg; | |
bd20eb54 | 193 | |
d2a5884a AS |
194 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
195 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
196 | ||
197 | bool fast_io; | |
198 | ||
bd20eb54 | 199 | unsigned int max_register; |
76aad392 DC |
200 | const struct regmap_access_table *wr_table; |
201 | const struct regmap_access_table *rd_table; | |
202 | const struct regmap_access_table *volatile_table; | |
203 | const struct regmap_access_table *precious_table; | |
720e4616 | 204 | const struct reg_default *reg_defaults; |
9fabe24e DP |
205 | unsigned int num_reg_defaults; |
206 | enum regcache_type cache_type; | |
207 | const void *reg_defaults_raw; | |
208 | unsigned int num_reg_defaults_raw; | |
6f306441 LPC |
209 | |
210 | u8 read_flag_mask; | |
211 | u8 write_flag_mask; | |
2e33caf1 AJ |
212 | |
213 | bool use_single_rw; | |
141eba2e SW |
214 | |
215 | enum regmap_endian reg_format_endian; | |
216 | enum regmap_endian val_format_endian; | |
38e23194 | 217 | |
6863ca62 | 218 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 219 | unsigned int num_ranges; |
6863ca62 KG |
220 | }; |
221 | ||
222 | /** | |
223 | * Configuration for indirectly accessed or paged registers. | |
224 | * Registers, mapped to this virtual range, are accessed in two steps: | |
225 | * 1. page selector register update; | |
226 | * 2. access through data window registers. | |
227 | * | |
d058bb49 MB |
228 | * @name: Descriptive name for diagnostics |
229 | * | |
6863ca62 KG |
230 | * @range_min: Address of the lowest register address in virtual range. |
231 | * @range_max: Address of the highest register in virtual range. | |
232 | * | |
233 | * @page_sel_reg: Register with selector field. | |
234 | * @page_sel_mask: Bit shift for selector value. | |
235 | * @page_sel_shift: Bit mask for selector value. | |
236 | * | |
237 | * @window_start: Address of first (lowest) register in data window. | |
238 | * @window_len: Number of registers in data window. | |
239 | */ | |
240 | struct regmap_range_cfg { | |
d058bb49 MB |
241 | const char *name; |
242 | ||
6863ca62 KG |
243 | /* Registers of virtual address range */ |
244 | unsigned int range_min; | |
245 | unsigned int range_max; | |
246 | ||
247 | /* Page selector for indirect addressing */ | |
248 | unsigned int selector_reg; | |
249 | unsigned int selector_mask; | |
250 | int selector_shift; | |
251 | ||
252 | /* Data window (per each page) */ | |
253 | unsigned int window_start; | |
254 | unsigned int window_len; | |
b83a313b MB |
255 | }; |
256 | ||
0d509f2b MB |
257 | struct regmap_async; |
258 | ||
0135bbcc | 259 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 260 | size_t count); |
0135bbcc | 261 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
262 | const void *reg, size_t reg_len, |
263 | const void *val, size_t val_len); | |
0d509f2b MB |
264 | typedef int (*regmap_hw_async_write)(void *context, |
265 | const void *reg, size_t reg_len, | |
266 | const void *val, size_t val_len, | |
267 | struct regmap_async *async); | |
0135bbcc | 268 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
269 | const void *reg_buf, size_t reg_size, |
270 | void *val_buf, size_t val_size); | |
0d509f2b | 271 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 272 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
273 | |
274 | /** | |
275 | * Description of a hardware bus for the register map infrastructure. | |
276 | * | |
bacdbe07 | 277 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
278 | * to perform locking. This field is ignored if custom lock/unlock |
279 | * functions are used (see fields lock/unlock of | |
280 | * struct regmap_config). | |
b83a313b MB |
281 | * @write: Write operation. |
282 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
283 | * if not implemented on a given device. | |
0d509f2b MB |
284 | * @async_write: Write operation which completes asynchronously, optional and |
285 | * must serialise with respect to non-async I/O. | |
b83a313b MB |
286 | * @read: Read operation. Data is returned in the buffer used to transmit |
287 | * data. | |
0d509f2b | 288 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
289 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
290 | * a read. | |
141eba2e SW |
291 | * @reg_format_endian_default: Default endianness for formatted register |
292 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
293 | * DEFAULT, BIG is assumed. | |
294 | * @val_format_endian_default: Default endianness for formatted register | |
295 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
296 | * DEFAULT, BIG is assumed. | |
0d509f2b | 297 | * @async_size: Size of struct used for async work. |
b83a313b MB |
298 | */ |
299 | struct regmap_bus { | |
bacdbe07 | 300 | bool fast_io; |
b83a313b MB |
301 | regmap_hw_write write; |
302 | regmap_hw_gather_write gather_write; | |
0d509f2b | 303 | regmap_hw_async_write async_write; |
b83a313b | 304 | regmap_hw_read read; |
0135bbcc | 305 | regmap_hw_free_context free_context; |
0d509f2b | 306 | regmap_hw_async_alloc async_alloc; |
b83a313b | 307 | u8 read_flag_mask; |
141eba2e SW |
308 | enum regmap_endian reg_format_endian_default; |
309 | enum regmap_endian val_format_endian_default; | |
b83a313b MB |
310 | }; |
311 | ||
312 | struct regmap *regmap_init(struct device *dev, | |
313 | const struct regmap_bus *bus, | |
0135bbcc | 314 | void *bus_context, |
b83a313b | 315 | const struct regmap_config *config); |
9943fa30 MB |
316 | struct regmap *regmap_init_i2c(struct i2c_client *i2c, |
317 | const struct regmap_config *config); | |
a676f083 MB |
318 | struct regmap *regmap_init_spi(struct spi_device *dev, |
319 | const struct regmap_config *config); | |
878ec67b PZ |
320 | struct regmap *regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
321 | void __iomem *regs, | |
322 | const struct regmap_config *config); | |
a676f083 | 323 | |
c0eb4676 MB |
324 | struct regmap *devm_regmap_init(struct device *dev, |
325 | const struct regmap_bus *bus, | |
0135bbcc | 326 | void *bus_context, |
c0eb4676 MB |
327 | const struct regmap_config *config); |
328 | struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c, | |
329 | const struct regmap_config *config); | |
330 | struct regmap *devm_regmap_init_spi(struct spi_device *dev, | |
331 | const struct regmap_config *config); | |
878ec67b PZ |
332 | struct regmap *devm_regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
333 | void __iomem *regs, | |
334 | const struct regmap_config *config); | |
335 | ||
336 | /** | |
337 | * regmap_init_mmio(): Initialise register map | |
338 | * | |
339 | * @dev: Device that will be interacted with | |
340 | * @regs: Pointer to memory-mapped IO region | |
341 | * @config: Configuration for register map | |
342 | * | |
343 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
344 | * a struct regmap. | |
345 | */ | |
346 | static inline struct regmap *regmap_init_mmio(struct device *dev, | |
347 | void __iomem *regs, | |
348 | const struct regmap_config *config) | |
349 | { | |
350 | return regmap_init_mmio_clk(dev, NULL, regs, config); | |
351 | } | |
352 | ||
353 | /** | |
354 | * devm_regmap_init_mmio(): Initialise managed register map | |
355 | * | |
356 | * @dev: Device that will be interacted with | |
357 | * @regs: Pointer to memory-mapped IO region | |
358 | * @config: Configuration for register map | |
359 | * | |
360 | * The return value will be an ERR_PTR() on error or a valid pointer | |
361 | * to a struct regmap. The regmap will be automatically freed by the | |
362 | * device management code. | |
363 | */ | |
364 | static inline struct regmap *devm_regmap_init_mmio(struct device *dev, | |
365 | void __iomem *regs, | |
366 | const struct regmap_config *config) | |
367 | { | |
368 | return devm_regmap_init_mmio_clk(dev, NULL, regs, config); | |
369 | } | |
c0eb4676 | 370 | |
b83a313b | 371 | void regmap_exit(struct regmap *map); |
bf315173 MB |
372 | int regmap_reinit_cache(struct regmap *map, |
373 | const struct regmap_config *config); | |
72b39f6f | 374 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
b83a313b MB |
375 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
376 | int regmap_raw_write(struct regmap *map, unsigned int reg, | |
377 | const void *val, size_t val_len); | |
8eaeb219 LD |
378 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
379 | size_t val_count); | |
0d509f2b MB |
380 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
381 | const void *val, size_t val_len); | |
b83a313b MB |
382 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
383 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
384 | void *val, size_t val_len); | |
385 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
386 | size_t val_count); | |
387 | int regmap_update_bits(struct regmap *map, unsigned int reg, | |
388 | unsigned int mask, unsigned int val); | |
018690d3 MB |
389 | int regmap_update_bits_check(struct regmap *map, unsigned int reg, |
390 | unsigned int mask, unsigned int val, | |
391 | bool *change); | |
a6539c32 | 392 | int regmap_get_val_bytes(struct regmap *map); |
0d509f2b | 393 | int regmap_async_complete(struct regmap *map); |
221ad7f2 | 394 | bool regmap_can_raw_write(struct regmap *map); |
b83a313b | 395 | |
39a58439 | 396 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
397 | int regcache_sync_region(struct regmap *map, unsigned int min, |
398 | unsigned int max); | |
92afb286 | 399 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 400 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 401 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 402 | |
22f0d90a MB |
403 | int regmap_register_patch(struct regmap *map, const struct reg_default *regs, |
404 | int num_regs); | |
405 | ||
76aad392 DC |
406 | static inline bool regmap_reg_in_range(unsigned int reg, |
407 | const struct regmap_range *range) | |
408 | { | |
409 | return reg >= range->range_min && reg <= range->range_max; | |
410 | } | |
411 | ||
412 | bool regmap_reg_in_ranges(unsigned int reg, | |
413 | const struct regmap_range *ranges, | |
414 | unsigned int nranges); | |
415 | ||
f8beab2b MB |
416 | /** |
417 | * Description of an IRQ for the generic regmap irq_chip. | |
418 | * | |
419 | * @reg_offset: Offset of the status/mask register within the bank | |
420 | * @mask: Mask used to flag/control the register. | |
421 | */ | |
422 | struct regmap_irq { | |
423 | unsigned int reg_offset; | |
424 | unsigned int mask; | |
425 | }; | |
426 | ||
427 | /** | |
428 | * Description of a generic regmap irq_chip. This is not intended to | |
429 | * handle every possible interrupt controller, but it should handle a | |
430 | * substantial proportion of those that are found in the wild. | |
431 | * | |
432 | * @name: Descriptive name for IRQ controller. | |
433 | * | |
434 | * @status_base: Base status register address. | |
435 | * @mask_base: Base mask register address. | |
436 | * @ack_base: Base ack address. If zero then the chip is clear on read. | |
a43fd50d | 437 | * @wake_base: Base address for wake enables. If zero unsupported. |
022f926a | 438 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
0c00c50b | 439 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
440 | * |
441 | * @num_regs: Number of registers in each control bank. | |
442 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
443 | * assigned based on the index in the array of the interrupt. | |
444 | * @num_irqs: Number of descriptors. | |
445 | */ | |
446 | struct regmap_irq_chip { | |
447 | const char *name; | |
448 | ||
449 | unsigned int status_base; | |
450 | unsigned int mask_base; | |
451 | unsigned int ack_base; | |
a43fd50d | 452 | unsigned int wake_base; |
022f926a | 453 | unsigned int irq_reg_stride; |
36ac914b | 454 | unsigned int mask_invert; |
9442490a | 455 | unsigned int wake_invert; |
0c00c50b | 456 | bool runtime_pm; |
f8beab2b MB |
457 | |
458 | int num_regs; | |
459 | ||
460 | const struct regmap_irq *irqs; | |
461 | int num_irqs; | |
462 | }; | |
463 | ||
464 | struct regmap_irq_chip_data; | |
465 | ||
466 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 467 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b MB |
468 | struct regmap_irq_chip_data **data); |
469 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); | |
209a6006 | 470 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 471 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 472 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 473 | |
9cde5fcd MB |
474 | #else |
475 | ||
476 | /* | |
477 | * These stubs should only ever be called by generic code which has | |
478 | * regmap based facilities, if they ever get called at runtime | |
479 | * something is going wrong and something probably needs to select | |
480 | * REGMAP. | |
481 | */ | |
482 | ||
483 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
484 | unsigned int val) | |
485 | { | |
486 | WARN_ONCE(1, "regmap API is disabled"); | |
487 | return -EINVAL; | |
488 | } | |
489 | ||
490 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, | |
491 | const void *val, size_t val_len) | |
492 | { | |
493 | WARN_ONCE(1, "regmap API is disabled"); | |
494 | return -EINVAL; | |
495 | } | |
496 | ||
0d509f2b MB |
497 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
498 | const void *val, size_t val_len) | |
499 | { | |
500 | WARN_ONCE(1, "regmap API is disabled"); | |
501 | return -EINVAL; | |
502 | } | |
503 | ||
9cde5fcd MB |
504 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
505 | const void *val, size_t val_count) | |
506 | { | |
507 | WARN_ONCE(1, "regmap API is disabled"); | |
508 | return -EINVAL; | |
509 | } | |
510 | ||
511 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
512 | unsigned int *val) | |
513 | { | |
514 | WARN_ONCE(1, "regmap API is disabled"); | |
515 | return -EINVAL; | |
516 | } | |
517 | ||
518 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
519 | void *val, size_t val_len) | |
520 | { | |
521 | WARN_ONCE(1, "regmap API is disabled"); | |
522 | return -EINVAL; | |
523 | } | |
524 | ||
525 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, | |
526 | void *val, size_t val_count) | |
527 | { | |
528 | WARN_ONCE(1, "regmap API is disabled"); | |
529 | return -EINVAL; | |
530 | } | |
531 | ||
532 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, | |
533 | unsigned int mask, unsigned int val) | |
534 | { | |
535 | WARN_ONCE(1, "regmap API is disabled"); | |
536 | return -EINVAL; | |
537 | } | |
538 | ||
539 | static inline int regmap_update_bits_check(struct regmap *map, | |
540 | unsigned int reg, | |
541 | unsigned int mask, unsigned int val, | |
542 | bool *change) | |
543 | { | |
544 | WARN_ONCE(1, "regmap API is disabled"); | |
545 | return -EINVAL; | |
546 | } | |
547 | ||
548 | static inline int regmap_get_val_bytes(struct regmap *map) | |
549 | { | |
550 | WARN_ONCE(1, "regmap API is disabled"); | |
551 | return -EINVAL; | |
552 | } | |
553 | ||
554 | static inline int regcache_sync(struct regmap *map) | |
555 | { | |
556 | WARN_ONCE(1, "regmap API is disabled"); | |
557 | return -EINVAL; | |
558 | } | |
559 | ||
a313f9f5 MB |
560 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
561 | unsigned int max) | |
562 | { | |
563 | WARN_ONCE(1, "regmap API is disabled"); | |
564 | return -EINVAL; | |
565 | } | |
566 | ||
9cde5fcd MB |
567 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
568 | { | |
569 | WARN_ONCE(1, "regmap API is disabled"); | |
570 | } | |
571 | ||
572 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
573 | { | |
574 | WARN_ONCE(1, "regmap API is disabled"); | |
575 | } | |
576 | ||
577 | static inline void regcache_mark_dirty(struct regmap *map) | |
578 | { | |
579 | WARN_ONCE(1, "regmap API is disabled"); | |
580 | } | |
581 | ||
0d509f2b MB |
582 | static inline void regmap_async_complete(struct regmap *map) |
583 | { | |
584 | WARN_ONCE(1, "regmap API is disabled"); | |
585 | } | |
586 | ||
9cde5fcd MB |
587 | static inline int regmap_register_patch(struct regmap *map, |
588 | const struct reg_default *regs, | |
589 | int num_regs) | |
590 | { | |
591 | WARN_ONCE(1, "regmap API is disabled"); | |
592 | return -EINVAL; | |
593 | } | |
594 | ||
72b39f6f MB |
595 | static inline struct regmap *dev_get_regmap(struct device *dev, |
596 | const char *name) | |
597 | { | |
72b39f6f MB |
598 | return NULL; |
599 | } | |
600 | ||
9cde5fcd MB |
601 | #endif |
602 | ||
b83a313b | 603 | #endif |