nlm: Ensure callback code also checks that the files match
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / hardirq.h
CommitLineData
1da177e4
LT
1#ifndef LINUX_HARDIRQ_H
2#define LINUX_HARDIRQ_H
3
67bc4eb0 4#include <linux/preempt.h>
fbb9ce95 5#include <linux/lockdep.h>
6a60dd12 6#include <linux/ftrace_irq.h>
dcbf832e 7#include <linux/vtime.h>
1da177e4 8#include <asm/hardirq.h>
1da177e4
LT
9
10/*
11 * We put the hardirq and softirq counter into the preemption
12 * counter. The bitmask has the following meaning:
13 *
14 * - bits 0-7 are the preemption count (max preemption depth: 256)
15 * - bits 8-15 are the softirq count (max # of softirqs: 256)
16 *
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SR
17 * The hardirq count can in theory reach the same as NR_IRQS.
18 * In reality, the number of nested IRQS is limited to the stack
19 * size as well. For archs with over 1000 IRQS it is not practical
20 * to expect that they will all nest. We give a max of 10 bits for
21 * hardirq nesting. An arch may choose to give less than 10 bits.
22 * m68k expects it to be 8.
1da177e4 23 *
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24 * - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024)
25 * - bit 26 is the NMI_MASK
a7e4786b 26 * - bit 27 is the PREEMPT_ACTIVE flag
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LT
27 *
28 * PREEMPT_MASK: 0x000000ff
29 * SOFTIRQ_MASK: 0x0000ff00
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30 * HARDIRQ_MASK: 0x03ff0000
31 * NMI_MASK: 0x04000000
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32 */
33#define PREEMPT_BITS 8
34#define SOFTIRQ_BITS 8
5a5fb7db 35#define NMI_BITS 1
1da177e4 36
5a5fb7db 37#define MAX_HARDIRQ_BITS 10
23d0b8b0 38
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39#ifndef HARDIRQ_BITS
40# define HARDIRQ_BITS MAX_HARDIRQ_BITS
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EB
41#endif
42
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SR
43#if HARDIRQ_BITS > MAX_HARDIRQ_BITS
44#error HARDIRQ_BITS too high!
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45#endif
46
47#define PREEMPT_SHIFT 0
48#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
49#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
5a5fb7db 50#define NMI_SHIFT (HARDIRQ_SHIFT + HARDIRQ_BITS)
1da177e4
LT
51
52#define __IRQ_MASK(x) ((1UL << (x))-1)
53
54#define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
1da177e4 55#define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
8f28e8fa 56#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
5a5fb7db 57#define NMI_MASK (__IRQ_MASK(NMI_BITS) << NMI_SHIFT)
1da177e4
LT
58
59#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
60#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
61#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
5a5fb7db 62#define NMI_OFFSET (1UL << NMI_SHIFT)
1da177e4 63
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VP
64#define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET)
65
8e5b59a2
AB
66#ifndef PREEMPT_ACTIVE
67#define PREEMPT_ACTIVE_BITS 1
68#define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS)
69#define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT)
70#endif
71
5a5fb7db 72#if PREEMPT_ACTIVE < (1 << (NMI_SHIFT + NMI_BITS))
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PBG
73#error PREEMPT_ACTIVE is too low!
74#endif
75
1da177e4
LT
76#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
77#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
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78#define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \
79 | NMI_MASK))
1da177e4
LT
80
81/*
82 * Are we doing bottom half or hardware interrupt processing?
83 * Are we in a softirq context? Interrupt context?
75e1056f
VP
84 * in_softirq - Are we currently processing softirq or have bh disabled?
85 * in_serving_softirq - Are we currently processing softirq?
1da177e4
LT
86 */
87#define in_irq() (hardirq_count())
88#define in_softirq() (softirq_count())
89#define in_interrupt() (irq_count())
75e1056f 90#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET)
1da177e4 91
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92/*
93 * Are we in NMI context?
94 */
5a5fb7db 95#define in_nmi() (preempt_count() & NMI_MASK)
375b38b4 96
bdd4e85d 97#if defined(CONFIG_PREEMPT_COUNT)
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98# define PREEMPT_CHECK_OFFSET 1
99#else
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100# define PREEMPT_CHECK_OFFSET 0
101#endif
102
8c703d35
JC
103/*
104 * Are we running in atomic context? WARNING: this macro cannot
105 * always detect atomic context; in particular, it cannot know about
106 * held spinlocks in non-preemptible kernels. Thus it should not be
107 * used in the general case to determine whether sleeping is possible.
108 * Do not use in_atomic() in driver code.
109 */
4ba8216c 110#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != 0)
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111
112/*
113 * Check whether we were atomic before we did preempt_disable():
8e3e076c 114 * (used by the scheduler, *after* releasing the kernel lock)
4da1ce6d
IM
115 */
116#define in_atomic_preempt_off() \
117 ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
118
bdd4e85d 119#ifdef CONFIG_PREEMPT_COUNT
1da177e4 120# define preemptible() (preempt_count() == 0 && !irqs_disabled())
1da177e4
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121#else
122# define preemptible() 0
1da177e4
LT
123#endif
124
3aa551c9 125#if defined(CONFIG_SMP) || defined(CONFIG_GENERIC_HARDIRQS)
1da177e4
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126extern void synchronize_irq(unsigned int irq);
127#else
128# define synchronize_irq(irq) barrier()
129#endif
130
a57eb940 131#if defined(CONFIG_TINY_RCU) || defined(CONFIG_TINY_PREEMPT_RCU)
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PM
132
133static inline void rcu_nmi_enter(void)
134{
135}
136
137static inline void rcu_nmi_exit(void)
138{
139}
140
141#else
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PM
142extern void rcu_nmi_enter(void);
143extern void rcu_nmi_exit(void);
9b1d82fa 144#endif
2232c2d8 145
de30a2b3
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146/*
147 * It is safe to do non-atomic ops on ->hardirq_context,
148 * because NMI handlers may not preempt and the ops are
149 * always balanced, so the interrupted value of ->hardirq_context
150 * will always be restored.
151 */
79bf2bb3
TG
152#define __irq_enter() \
153 do { \
6a61671b 154 account_irq_enter_time(current); \
79bf2bb3
TG
155 add_preempt_count(HARDIRQ_OFFSET); \
156 trace_hardirq_enter(); \
157 } while (0)
158
159/*
160 * Enter irq context (on NO_HZ, update jiffies):
161 */
dde4b2b5 162extern void irq_enter(void);
de30a2b3
IM
163
164/*
165 * Exit irq context without processing softirqs:
166 */
167#define __irq_exit() \
168 do { \
169 trace_hardirq_exit(); \
6a61671b 170 account_irq_exit_time(current); \
de30a2b3 171 sub_preempt_count(HARDIRQ_OFFSET); \
1da177e4
LT
172 } while (0)
173
de30a2b3
IM
174/*
175 * Exit irq context and process softirqs if needed:
176 */
1da177e4
LT
177extern void irq_exit(void);
178
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SR
179#define nmi_enter() \
180 do { \
0f1ac8fd 181 lockdep_off(); \
2a7b8df0
SR
182 ftrace_nmi_enter(); \
183 BUG_ON(in_nmi()); \
184 add_preempt_count(NMI_OFFSET + HARDIRQ_OFFSET); \
2a7b8df0
SR
185 rcu_nmi_enter(); \
186 trace_hardirq_enter(); \
17666f02 187 } while (0)
5f34fe1c 188
2a7b8df0
SR
189#define nmi_exit() \
190 do { \
191 trace_hardirq_exit(); \
192 rcu_nmi_exit(); \
2a7b8df0
SR
193 BUG_ON(!in_nmi()); \
194 sub_preempt_count(NMI_OFFSET + HARDIRQ_OFFSET); \
195 ftrace_nmi_exit(); \
0f1ac8fd 196 lockdep_on(); \
17666f02 197 } while (0)
de30a2b3 198
1da177e4 199#endif /* LINUX_HARDIRQ_H */