Merge tag 'v3.10.55' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / com20020.h
CommitLineData
1da177e4
LT
1/*
2 * Linux ARCnet driver - COM20020 chipset support - function declarations
3 *
4 * Written 1997 by David Woodhouse.
5 * Written 1994-1999 by Avery Pennarun.
6 * Derived from skeleton.c by Donald Becker.
7 *
8 * Special thanks to Contemporary Controls, Inc. (www.ccontrols.com)
9 * for sponsoring the further development of this driver.
10 *
11 * **********************
12 *
13 * The original copyright of skeleton.c was as follows:
14 *
15 * skeleton.c Written 1993 by Donald Becker.
16 * Copyright 1993 United States Government as represented by the
17 * Director, National Security Agency. This software may only be used
18 * and distributed according to the terms of the GNU General Public License as
19 * modified by SRC, incorporated herein by reference.
20 *
21 * **********************
22 *
23 * For more details, see drivers/net/arcnet.c
24 *
25 * **********************
26 */
27#ifndef __COM20020_H
28#define __COM20020_H
29
30int com20020_check(struct net_device *dev);
31int com20020_found(struct net_device *dev, int shared);
0db155de 32extern const struct net_device_ops com20020_netdev_ops;
1da177e4
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33
34/* The number of low I/O ports used by the card. */
35#define ARCNET_TOTAL_SIZE 8
36
37/* various register addresses */
38#ifdef CONFIG_SA1100_CT6001
39#define BUS_ALIGN 2 /* 8 bit device on a 16 bit bus - needs padding */
40#else
41#define BUS_ALIGN 1
42#endif
43
44
45#define _INTMASK (ioaddr+BUS_ALIGN*0) /* writable */
46#define _STATUS (ioaddr+BUS_ALIGN*0) /* readable */
47#define _COMMAND (ioaddr+BUS_ALIGN*1) /* standard arcnet commands */
48#define _DIAGSTAT (ioaddr+BUS_ALIGN*1) /* diagnostic status register */
49#define _ADDR_HI (ioaddr+BUS_ALIGN*2) /* control registers for IO-mapped memory */
50#define _ADDR_LO (ioaddr+BUS_ALIGN*3)
51#define _MEMDATA (ioaddr+BUS_ALIGN*4) /* data port for IO-mapped memory */
52#define _SUBADR (ioaddr+BUS_ALIGN*5) /* the extended port _XREG refers to */
53#define _CONFIG (ioaddr+BUS_ALIGN*6) /* configuration register */
54#define _XREG (ioaddr+BUS_ALIGN*7) /* extra registers (indexed by _CONFIG
55 or _SUBADR) */
56
57/* in the ADDR_HI register */
58#define RDDATAflag 0x80 /* next access is a read (not a write) */
59
60/* in the DIAGSTAT register */
61#define NEWNXTIDflag 0x02 /* ID to which token is passed has changed */
62
63/* in the CONFIG register */
64#define RESETcfg 0x80 /* put card in reset state */
65#define TXENcfg 0x20 /* enable TX */
66
67/* in SETUP register */
68#define PROMISCset 0x10 /* enable RCV_ALL */
69#define P1MODE 0x80 /* enable P1-MODE for Backplane */
70#define SLOWARB 0x01 /* enable Slow Arbitration for >=5Mbps */
71
72/* COM2002x */
73#define SUB_TENTATIVE 0 /* tentative node ID */
74#define SUB_NODE 1 /* node ID */
75#define SUB_SETUP1 2 /* various options */
76#define SUB_TEST 3 /* test/diag register */
77
78/* COM20022 only */
79#define SUB_SETUP2 4 /* sundry options */
80#define SUB_BUSCTL 5 /* bus control options */
81#define SUB_DMACOUNT 6 /* DMA count options */
82
83#define SET_SUBADR(x) do { \
84 if ((x) < 4) \
85 { \
86 lp->config = (lp->config & ~0x03) | (x); \
87 SETCONF; \
88 } \
89 else \
90 { \
91 outb(x, _SUBADR); \
92 } \
93} while (0)
94
95#undef ARCRESET
96#undef ASTATUS
97#undef ACOMMAND
98#undef AINTMASK
99
100#define ARCRESET { outb(lp->config | 0x80, _CONFIG); \
101 udelay(5); \
102 outb(lp->config , _CONFIG); \
103 }
104#define ARCRESET0 { outb(0x18 | 0x80, _CONFIG); \
105 udelay(5); \
106 outb(0x18 , _CONFIG); \
107 }
108
109#define ASTATUS() inb(_STATUS)
110#define ADIAGSTATUS() inb(_DIAGSTAT)
111#define ACOMMAND(cmd) outb((cmd),_COMMAND)
112#define AINTMASK(msk) outb((msk),_INTMASK)
113
114#define SETCONF outb(lp->config, _CONFIG)
115
116#endif /* __COM20020_H */