[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / linux / async_tx.h

/*
 * Copyright © 2006, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 *
 */
#ifndef _ASYNC_TX_H_
#define _ASYNC_TX_H_
#include <linux/dmaengine.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>

/* on architectures without dma-mapping capabilities we need to ensure
 * that the asynchronous path compiles away
 */
#ifdef CONFIG_HAS_DMA
#define __async_inline
#else
#define __async_inline __always_inline
#endif

/**
 * dma_chan_ref - object used to manage dma channels received from the
 *   dmaengine core.
 * @chan - the channel being tracked
 * @node - node for the channel to be placed on async_tx_master_list
 * @rcu - for list_del_rcu
 * @count - number of times this channel is listed in the pool
 *	(for channels with multiple capabiities)
 */
struct dma_chan_ref {
	struct dma_chan *chan;
	struct list_head node;
	struct rcu_head rcu;
	atomic_t count;
};

/**
 * async_tx_flags - modifiers for the async_* calls
 * @ASYNC_TX_XOR_ZERO_DST: this flag must be used for xor operations where the
 * the destination address is not a source.  The asynchronous case handles this
 * implicitly, the synchronous case needs to zero the destination block.
 * @ASYNC_TX_XOR_DROP_DST: this flag must be used if the destination address is
 * also one of the source addresses.  In the synchronous case the destination
 * address is an implied source, whereas the asynchronous case it must be listed
 * as a source.  The destination address must be the first address in the source
 * array.
 * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a
 * dependency chain
 * @ASYNC_TX_FENCE: specify that the next operation in the dependency
 * chain uses this operation's result as an input
 */
enum async_tx_flags {
	ASYNC_TX_XOR_ZERO_DST	 = (1 << 0),
	ASYNC_TX_XOR_DROP_DST	 = (1 << 1),
	ASYNC_TX_ACK		 = (1 << 2),
	ASYNC_TX_FENCE		 = (1 << 3),
};

/**
 * struct async_submit_ctl - async_tx submission/completion modifiers
 * @flags: submission modifiers
 * @depend_tx: parent dependency of the current operation being submitted
 * @cb_fn: callback routine to run at operation completion
 * @cb_param: parameter for the callback routine
 * @scribble: caller provided space for dma/page address conversions
 */
struct async_submit_ctl {
	enum async_tx_flags flags;
	struct dma_async_tx_descriptor *depend_tx;
	dma_async_tx_callback cb_fn;
	void *cb_param;
	void *scribble;
};

#ifdef CONFIG_DMA_ENGINE
#define async_tx_issue_pending_all dma_issue_pending_all

/**
 * async_tx_issue_pending - send pending descriptor to the hardware channel
 * @tx: descriptor handle to retrieve hardware context
 *
 * Note: any dependent operations will have already been issued by
 * async_tx_channel_switch, or (in the case of no channel switch) will
 * be already pending on this channel.
 */
static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
{
	if (likely(tx)) {
		struct dma_chan *chan = tx->chan;
		struct dma_device *dma = chan->device;

		dma->device_issue_pending(chan);
	}
}
#ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL
#include <asm/async_tx.h>
#else
#define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \
	 __async_tx_find_channel(dep, type)
struct dma_chan *
__async_tx_find_channel(struct async_submit_ctl *submit,
			enum dma_transaction_type tx_type);
#endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */
#else
static inline void async_tx_issue_pending_all(void)
{
	do { } while (0);
}

static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
{
	do { } while (0);
}

static inline struct dma_chan *
async_tx_find_channel(struct async_submit_ctl *submit,
		      enum dma_transaction_type tx_type, struct page **dst,
		      int dst_count, struct page **src, int src_count,
		      size_t len)
{
	return NULL;
}
#endif

/**
 * async_tx_sync_epilog - actions to take if an operation is run synchronously
 * @cb_fn: function to call when the transaction completes
 * @cb_fn_param: parameter to pass to the callback routine
 */
static inline void
async_tx_sync_epilog(struct async_submit_ctl *submit)
{
	if (submit->cb_fn)
		submit->cb_fn(submit->cb_param);
}

typedef union {
	unsigned long addr;
	struct page *page;
	dma_addr_t dma;
} addr_conv_t;

static inline void
init_async_submit(struct async_submit_ctl *args, enum async_tx_flags flags,
		  struct dma_async_tx_descriptor *tx,
		  dma_async_tx_callback cb_fn, void *cb_param,
		  addr_conv_t *scribble)
{
	args->flags = flags;
	args->depend_tx = tx;
	args->cb_fn = cb_fn;
	args->cb_param = cb_param;
	args->scribble = scribble;
}

void async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
		     struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *
async_xor(struct page *dest, struct page **src_list, unsigned int offset,
	  int src_cnt, size_t len, struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *
async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
	      int src_cnt, size_t len, enum sum_check_flags *result,
	      struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *
async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
	     unsigned int src_offset, size_t len,
	     struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *
async_memset(struct page *dest, int val, unsigned int offset,
	     size_t len, struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *async_trigger_callback(struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *
async_gen_syndrome(struct page **blocks, unsigned int offset, int src_cnt,
		   size_t len, struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *
async_syndrome_val(struct page **blocks, unsigned int offset, int src_cnt,
		   size_t len, enum sum_check_flags *pqres, struct page *spare,
		   struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *
async_raid6_2data_recov(int src_num, size_t bytes, int faila, int failb,
			struct page **ptrs, struct async_submit_ctl *submit);

struct dma_async_tx_descriptor *
async_raid6_datap_recov(int src_num, size_t bytes, int faila,
			struct page **ptrs, struct async_submit_ctl *submit);

void async_tx_quiesce(struct dma_async_tx_descriptor **tx);
#endif /* _ASYNC_TX_H_ */
Commit	Line	Data
9bc89cd8 DW	1	/*
	2	* Copyright © 2006, Intel Corporation.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms and conditions of the GNU General Public License,
	6	* version 2, as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope it will be useful, but WITHOUT
	9	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	10	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	11	* more details.
	12	*
	13	* You should have received a copy of the GNU General Public License along with
	14	* this program; if not, write to the Free Software Foundation, Inc.,
	15	* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
	16	*
	17	*/
	18	#ifndef _ASYNC_TX_H_
	19	#define _ASYNC_TX_H_
	20	#include <linux/dmaengine.h>
	21	#include <linux/spinlock.h>
	22	#include <linux/interrupt.h>
	23
06164f31 DW	24	/* on architectures without dma-mapping capabilities we need to ensure
	25	* that the asynchronous path compiles away
	26	*/
	27	#ifdef CONFIG_HAS_DMA
	28	#define __async_inline
	29	#else
	30	#define __async_inline __always_inline
	31	#endif
	32
9bc89cd8 DW	33	/**
	34	* dma_chan_ref - object used to manage dma channels received from the
	35	* dmaengine core.
	36	* @chan - the channel being tracked
	37	* @node - node for the channel to be placed on async_tx_master_list
	38	* @rcu - for list_del_rcu
	39	* @count - number of times this channel is listed in the pool
	40	* (for channels with multiple capabiities)
	41	*/
	42	struct dma_chan_ref {
	43	struct dma_chan *chan;
	44	struct list_head node;
	45	struct rcu_head rcu;
	46	atomic_t count;
	47	};
	48
	49	/**
	50	* async_tx_flags - modifiers for the async_* calls
	51	* @ASYNC_TX_XOR_ZERO_DST: this flag must be used for xor operations where the
	52	* the destination address is not a source. The asynchronous case handles this
	53	* implicitly, the synchronous case needs to zero the destination block.
	54	* @ASYNC_TX_XOR_DROP_DST: this flag must be used if the destination address is
	55	* also one of the source addresses. In the synchronous case the destination
	56	* address is an implied source, whereas the asynchronous case it must be listed
	57	* as a source. The destination address must be the first address in the source
	58	* array.
9bc89cd8 DW	59	* @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a
9bc89cd8 DW	60	* dependency chain
0403e382 DW	61	* @ASYNC_TX_FENCE: specify that the next operation in the dependency
0403e382 DW	62	* chain uses this operation's result as an input
9bc89cd8 DW	63	*/
	64	enum async_tx_flags {
	65	ASYNC_TX_XOR_ZERO_DST = (1 << 0),
	66	ASYNC_TX_XOR_DROP_DST = (1 << 1),
88ba2aa5	67	ASYNC_TX_ACK = (1 << 2),
0403e382	68	ASYNC_TX_FENCE = (1 << 3),
9bc89cd8 DW	69	};
9bc89cd8 DW	70
a08abd8c DW	71	/**
	72	* struct async_submit_ctl - async_tx submission/completion modifiers
	73	* @flags: submission modifiers
	74	* @depend_tx: parent dependency of the current operation being submitted
	75	* @cb_fn: callback routine to run at operation completion
	76	* @cb_param: parameter for the callback routine
	77	* @scribble: caller provided space for dma/page address conversions
	78	*/
	79	struct async_submit_ctl {
	80	enum async_tx_flags flags;
	81	struct dma_async_tx_descriptor *depend_tx;
	82	dma_async_tx_callback cb_fn;
	83	void *cb_param;
	84	void *scribble;
	85	};
	86
9bc89cd8	87	#ifdef CONFIG_DMA_ENGINE
2ba05622	88	#define async_tx_issue_pending_all dma_issue_pending_all
95475e57 DW	89
	90	/**
	91	* async_tx_issue_pending - send pending descriptor to the hardware channel
	92	* @tx: descriptor handle to retrieve hardware context
	93	*
	94	* Note: any dependent operations will have already been issued by
	95	* async_tx_channel_switch, or (in the case of no channel switch) will
	96	* be already pending on this channel.
	97	*/
	98	static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
	99	{
	100	if (likely(tx)) {
	101	struct dma_chan *chan = tx->chan;
	102	struct dma_device *dma = chan->device;
	103
	104	dma->device_issue_pending(chan);
	105	}
	106	}
47437b2c DW	107	#ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL
	108	#include <asm/async_tx.h>
	109	#else
	110	#define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \
	111	__async_tx_find_channel(dep, type)
9bc89cd8	112	struct dma_chan *
a08abd8c DW	113	__async_tx_find_channel(struct async_submit_ctl *submit,
a08abd8c DW	114	enum dma_transaction_type tx_type);
47437b2c	115	#endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */
9bc89cd8 DW	116	#else
	117	static inline void async_tx_issue_pending_all(void)
	118	{
	119	do { } while (0);
95475e57 DW	120	}
	121
	122	static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx)
	123	{
	124	do { } while (0);
9bc89cd8 DW	125	}
9bc89cd8 DW	126
9bc89cd8	127	static inline struct dma_chan *
a08abd8c DW	128	async_tx_find_channel(struct async_submit_ctl *submit,
	129	enum dma_transaction_type tx_type, struct page **dst,
	130	int dst_count, struct page **src, int src_count,
	131	size_t len)
9bc89cd8 DW	132	{
	133	return NULL;
	134	}
	135	#endif
	136
	137	/**
	138	* async_tx_sync_epilog - actions to take if an operation is run synchronously
9bc89cd8 DW	139	* @cb_fn: function to call when the transaction completes
	140	* @cb_fn_param: parameter to pass to the callback routine
	141	*/
	142	static inline void
a08abd8c DW	143	async_tx_sync_epilog(struct async_submit_ctl *submit)
	144	{
	145	if (submit->cb_fn)
	146	submit->cb_fn(submit->cb_param);
	147	}
	148
	149	typedef union {
	150	unsigned long addr;
	151	struct page *page;
	152	dma_addr_t dma;
	153	} addr_conv_t;
	154
	155	static inline void
	156	init_async_submit(struct async_submit_ctl *args, enum async_tx_flags flags,
	157	struct dma_async_tx_descriptor *tx,
	158	dma_async_tx_callback cb_fn, void *cb_param,
	159	addr_conv_t *scribble)
9bc89cd8	160	{
a08abd8c DW	161	args->flags = flags;
	162	args->depend_tx = tx;
	163	args->cb_fn = cb_fn;
	164	args->cb_param = cb_param;
	165	args->scribble = scribble;
9bc89cd8 DW	166	}
9bc89cd8 DW	167
a08abd8c DW	168	void async_tx_submit(struct dma_chan chan, struct dma_async_tx_descriptor tx,
a08abd8c DW	169	struct async_submit_ctl *submit);
9bc89cd8 DW	170
	171	struct dma_async_tx_descriptor *
	172	async_xor(struct page dest, struct page *src_list, unsigned int offset,
a08abd8c	173	int src_cnt, size_t len, struct async_submit_ctl *submit);
9bc89cd8 DW	174
9bc89cd8 DW	175	struct dma_async_tx_descriptor *
a08abd8c	176	async_xor_val(struct page dest, struct page *src_list, unsigned int offset,
ad283ea4	177	int src_cnt, size_t len, enum sum_check_flags *result,
a08abd8c	178	struct async_submit_ctl *submit);
9bc89cd8 DW	179
	180	struct dma_async_tx_descriptor *
	181	async_memcpy(struct page dest, struct page src, unsigned int dest_offset,
a08abd8c DW	182	unsigned int src_offset, size_t len,
a08abd8c DW	183	struct async_submit_ctl *submit);
9bc89cd8 DW	184
	185	struct dma_async_tx_descriptor *
	186	async_memset(struct page *dest, int val, unsigned int offset,
a08abd8c	187	size_t len, struct async_submit_ctl *submit);
9bc89cd8	188
a08abd8c	189	struct dma_async_tx_descriptor async_trigger_callback(struct async_submit_ctl submit);
d2c52b79	190
b2f46fd8 DW	191	struct dma_async_tx_descriptor *
	192	async_gen_syndrome(struct page **blocks, unsigned int offset, int src_cnt,
	193	size_t len, struct async_submit_ctl *submit);
	194
	195	struct dma_async_tx_descriptor *
	196	async_syndrome_val(struct page **blocks, unsigned int offset, int src_cnt,
	197	size_t len, enum sum_check_flags pqres, struct page spare,
	198	struct async_submit_ctl *submit);
	199
0a82a623 DW	200	struct dma_async_tx_descriptor *
	201	async_raid6_2data_recov(int src_num, size_t bytes, int faila, int failb,
	202	struct page *ptrs, struct async_submit_ctl submit);
	203
	204	struct dma_async_tx_descriptor *
	205	async_raid6_datap_recov(int src_num, size_t bytes, int faila,
	206	struct page *ptrs, struct async_submit_ctl submit);
	207
d2c52b79	208	void async_tx_quiesce(struct dma_async_tx_descriptor **tx);
9bc89cd8	209	#endif /* _ASYNC_TX_H_ */