projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 48b5db20 JF |
1 | /****************************************************************************** |
| 2 | * arch-x86_32.h | |
| 3 | * | |
| 4 | * Guest OS interface to x86 32-bit Xen. | |
| 5 | * | |
| 6 | * Copyright (c) 2004, K A Fraser | |
| 7 | */ | |
| 8 | ||
| 77ef50a5 VN |
9 | #ifndef ASM_X86__XEN__INTERFACE_32_H |
| 10 | #define ASM_X86__XEN__INTERFACE_32_H | |
| 48b5db20 JF |
11 | |
| 12 | ||
| 13 | /* | |
| 14 | * These flat segments are in the Xen-private section of every GDT. Since these | |
| 15 | * are also present in the initial GDT, many OSes will be able to avoid | |
| 16 | * installing their own GDT. | |
| 17 | */ | |
| 18 | #define FLAT_RING1_CS 0xe019 /* GDT index 259 */ | |
| 19 | #define FLAT_RING1_DS 0xe021 /* GDT index 260 */ | |
| 20 | #define FLAT_RING1_SS 0xe021 /* GDT index 260 */ | |
| 21 | #define FLAT_RING3_CS 0xe02b /* GDT index 261 */ | |
| 22 | #define FLAT_RING3_DS 0xe033 /* GDT index 262 */ | |
| 23 | #define FLAT_RING3_SS 0xe033 /* GDT index 262 */ | |
| 24 | ||
| 25 | #define FLAT_KERNEL_CS FLAT_RING1_CS | |
| 26 | #define FLAT_KERNEL_DS FLAT_RING1_DS | |
| 27 | #define FLAT_KERNEL_SS FLAT_RING1_SS | |
| 28 | #define FLAT_USER_CS FLAT_RING3_CS | |
| 29 | #define FLAT_USER_DS FLAT_RING3_DS | |
| 30 | #define FLAT_USER_SS FLAT_RING3_SS | |
| 31 | ||
| 32 | /* And the trap vector is... */ | |
| 33 | #define TRAP_INSTR "int $0x82" | |
| 34 | ||
| 35 | /* | |
| 36 | * Virtual addresses beyond this are not modifiable by guest OSes. The | |
| 37 | * machine->physical mapping table starts at this address, read-only. | |
| 38 | */ | |
| 39 | #define __HYPERVISOR_VIRT_START 0xF5800000 | |
| 40 | ||
| 41 | #ifndef __ASSEMBLY__ | |
| 42 | ||
| 43 | struct cpu_user_regs { | |
| 44 | uint32_t ebx; | |
| 45 | uint32_t ecx; | |
| 46 | uint32_t edx; | |
| 47 | uint32_t esi; | |
| 48 | uint32_t edi; | |
| 49 | uint32_t ebp; | |
| 50 | uint32_t eax; | |
| 51 | uint16_t error_code; /* private */ | |
| 52 | uint16_t entry_vector; /* private */ | |
| 53 | uint32_t eip; | |
| 54 | uint16_t cs; | |
| 55 | uint8_t saved_upcall_mask; | |
| 56 | uint8_t _pad0; | |
| 57 | uint32_t eflags; /* eflags.IF == !saved_upcall_mask */ | |
| 58 | uint32_t esp; | |
| 59 | uint16_t ss, _pad1; | |
| 60 | uint16_t es, _pad2; | |
| 61 | uint16_t ds, _pad3; | |
| 62 | uint16_t fs, _pad4; | |
| 63 | uint16_t gs, _pad5; | |
| 64 | }; | |
| 65 | DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); | |
| 66 | ||
| 67 | typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ | |
| 68 | ||
| 69 | struct arch_vcpu_info { | |
| 70 | unsigned long cr2; | |
| 71 | unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */ | |
| 72 | }; | |
| 73 | ||
| 74 | struct xen_callback { | |
| 75 | unsigned long cs; | |
| 76 | unsigned long eip; | |
| 77 | }; | |
| 78 | typedef struct xen_callback xen_callback_t; | |
| 79 | ||
| 80 | #define XEN_CALLBACK(__cs, __eip) \ | |
| 81 | ((struct xen_callback){ .cs = (__cs), .eip = (unsigned long)(__eip) }) | |
| 82 | #endif /* !__ASSEMBLY__ */ | |
| 83 | ||
| 84 | ||
| 85 | /* | |
| 86 | * Page-directory addresses above 4GB do not fit into architectural %cr3. | |
| 87 | * When accessing %cr3, or equivalent field in vcpu_guest_context, guests | |
| 88 | * must use the following accessor macros to pack/unpack valid MFNs. | |
| 89 | * | |
| 90 | * Note that Xen is using the fact that the pagetable base is always | |
| 91 | * page-aligned, and putting the 12 MSB of the address into the 12 LSB | |
| 92 | * of cr3. | |
| 93 | */ | |
| 94 | #define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20)) | |
| 95 | #define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20)) | |
| 96 | ||
| 77ef50a5 | 97 | #endif /* ASM_X86__XEN__INTERFACE_32_H */ |