[GitHub/mt8127/android_kernel_alcatel_ttab.git] / include / asm-x86 / acpi.h

#ifndef _ASM_X86_ACPI_H
#define _ASM_X86_ACPI_H

/*
 *  Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
 *  Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#include <acpi/pdc_intel.h>

#include <asm/numa.h>
#include <asm/processor.h>
#include <asm/mmu.h>

#define COMPILER_DEPENDENT_INT64   long long
#define COMPILER_DEPENDENT_UINT64  unsigned long long

/*
 * Calling conventions:
 *
 * ACPI_SYSTEM_XFACE        - Interfaces to host OS (handlers, threads)
 * ACPI_EXTERNAL_XFACE      - External ACPI interfaces
 * ACPI_INTERNAL_XFACE      - Internal ACPI interfaces
 * ACPI_INTERNAL_VAR_XFACE  - Internal variable-parameter list interfaces
 */
#define ACPI_SYSTEM_XFACE
#define ACPI_EXTERNAL_XFACE
#define ACPI_INTERNAL_XFACE
#define ACPI_INTERNAL_VAR_XFACE

/* Asm macros */

#define ACPI_ASM_MACROS
#define BREAKPOINT3
#define ACPI_DISABLE_IRQS() local_irq_disable()
#define ACPI_ENABLE_IRQS()  local_irq_enable()
#define ACPI_FLUSH_CPU_CACHE()	wbinvd()

int __acpi_acquire_global_lock(unsigned int *lock);
int __acpi_release_global_lock(unsigned int *lock);

#define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
	((Acq) = __acpi_acquire_global_lock(&facs->global_lock))

#define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
	((Acq) = __acpi_release_global_lock(&facs->global_lock))

/*
 * Math helper asm macros
 */
#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
	asm("divl %2;"				     \
	    :"=a"(q32), "=d"(r32)		     \
	    :"r"(d32),				     \
	     "0"(n_lo), "1"(n_hi))


#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
	asm("shrl   $1,%2	;"	\
	    "rcrl   $1,%3;"		\
	    :"=r"(n_hi), "=r"(n_lo)	\
	    :"0"(n_hi), "1"(n_lo))

#ifdef CONFIG_ACPI
extern int acpi_lapic;
extern int acpi_ioapic;
extern int acpi_noirq;
extern int acpi_strict;
extern int acpi_disabled;
extern int acpi_ht;
extern int acpi_pci_disabled;
extern int acpi_skip_timer_override;
extern int acpi_use_timer_override;

static inline void disable_acpi(void)
{
	acpi_disabled = 1;
	acpi_ht = 0;
	acpi_pci_disabled = 1;
	acpi_noirq = 1;
}

/* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
#define FIX_ACPI_PAGES 4

extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);

static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
static inline void acpi_disable_pci(void)
{
	acpi_pci_disabled = 1;
	acpi_noirq_set();
}
extern int acpi_irq_balance_set(char *str);

/* routines for saving/restoring kernel state */
extern int acpi_save_state_mem(void);
extern void acpi_restore_state_mem(void);

extern unsigned long acpi_wakeup_address;

/* early initialization routine */
extern void acpi_reserve_bootmem(void);

/*
 * Check if the CPU can handle C2 and deeper
 */
static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
{
	/*
	 * Early models (<=5) of AMD Opterons are not supposed to go into
	 * C2 state.
	 *
	 * Steppings 0x0A and later are good
	 */
	if (boot_cpu_data.x86 == 0x0F &&
	    boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
	    boot_cpu_data.x86_model <= 0x05 &&
	    boot_cpu_data.x86_mask < 0x0A)
		return 1;
	else
		return max_cstate;
}

#else /* !CONFIG_ACPI */

#define acpi_lapic 0
#define acpi_ioapic 0
static inline void acpi_noirq_set(void) { }
static inline void acpi_disable_pci(void) { }
static inline void disable_acpi(void) { }

#endif /* !CONFIG_ACPI */

#define ARCH_HAS_POWER_INIT	1

struct bootnode;

#ifdef CONFIG_ACPI_NUMA
extern int acpi_numa;
extern int acpi_scan_nodes(unsigned long start, unsigned long end);
#ifdef CONFIG_X86_64
# define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
#endif
extern void acpi_fake_nodes(const struct bootnode *fake_nodes,
				   int num_nodes);
#else
static inline void acpi_fake_nodes(const struct bootnode *fake_nodes,
				   int num_nodes)
{
}
#endif

#define acpi_unlazy_tlb(x)	leave_mm(x)

#endif /*__X86_ASM_ACPI_H*/
Commit	Line	Data
c1c30634 AS	1	#ifndef _ASM_X86_ACPI_H
	2	#define _ASM_X86_ACPI_H
	3
0b80fc72 TG	4	/*
	5	* Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
	6	* Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
	7	*
	8	* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	23	*
	24	* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	25	*/
	26	#include <acpi/pdc_intel.h>
c1c30634	27
0b80fc72	28	#include <asm/numa.h>
c1c30634	29	#include <asm/processor.h>
bde6f5f5	30	#include <asm/mmu.h>
c1c30634	31
0b80fc72 TG	32	#define COMPILER_DEPENDENT_INT64 long long
	33	#define COMPILER_DEPENDENT_UINT64 unsigned long long
	34
	35	/*
	36	* Calling conventions:
	37	*
	38	* ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
	39	* ACPI_EXTERNAL_XFACE - External ACPI interfaces
	40	* ACPI_INTERNAL_XFACE - Internal ACPI interfaces
	41	* ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
	42	*/
	43	#define ACPI_SYSTEM_XFACE
	44	#define ACPI_EXTERNAL_XFACE
	45	#define ACPI_INTERNAL_XFACE
	46	#define ACPI_INTERNAL_VAR_XFACE
	47
	48	/* Asm macros */
	49
	50	#define ACPI_ASM_MACROS
	51	#define BREAKPOINT3
	52	#define ACPI_DISABLE_IRQS() local_irq_disable()
	53	#define ACPI_ENABLE_IRQS() local_irq_enable()
	54	#define ACPI_FLUSH_CPU_CACHE() wbinvd()
	55
	56	int __acpi_acquire_global_lock(unsigned int *lock);
	57	int __acpi_release_global_lock(unsigned int *lock);
	58
	59	#define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
	60	((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
	61
	62	#define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
	63	((Acq) = __acpi_release_global_lock(&facs->global_lock))
	64
	65	/*
	66	* Math helper asm macros
	67	*/
	68	#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
	69	asm("divl %2;" \
	70	:"=a"(q32), "=d"(r32) \
	71	:"r"(d32), \
	72	"0"(n_lo), "1"(n_hi))
	73
	74
	75	#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
	76	asm("shrl $1,%2 ;" \
	77	"rcrl $1,%3;" \
	78	:"=r"(n_hi), "=r"(n_lo) \
	79	:"0"(n_hi), "1"(n_lo))
	80
	81	#ifdef CONFIG_ACPI
	82	extern int acpi_lapic;
	83	extern int acpi_ioapic;
	84	extern int acpi_noirq;
	85	extern int acpi_strict;
	86	extern int acpi_disabled;
	87	extern int acpi_ht;
	88	extern int acpi_pci_disabled;
	89	extern int acpi_skip_timer_override;
	90	extern int acpi_use_timer_override;
	91
	92	static inline void disable_acpi(void)
	93	{
	94	acpi_disabled = 1;
	95	acpi_ht = 0;
96	acpi_pci_disabled = 1;
97	acpi_noirq = 1;
98	}
99
100	/* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
101	#define FIX_ACPI_PAGES 4
102
103	extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
104
105	static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
106	static inline void acpi_disable_pci(void)
107	{
108	acpi_pci_disabled = 1;
109	acpi_noirq_set();
110	}
111	extern int acpi_irq_balance_set(char *str);
112
113	/* routines for saving/restoring kernel state */
114	extern int acpi_save_state_mem(void);
115	extern void acpi_restore_state_mem(void);
116
117	extern unsigned long acpi_wakeup_address;
118
119	/* early initialization routine */
120	extern void acpi_reserve_bootmem(void);
121
c1c30634 AS	122	/*
	123	* Check if the CPU can handle C2 and deeper
	124	*/
	125	static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
	126	{
	127	/*
	128	* Early models (<=5) of AMD Opterons are not supposed to go into
	129	* C2 state.
	130	*
	131	* Steppings 0x0A and later are good
	132	*/
	133	if (boot_cpu_data.x86 == 0x0F &&
	134	boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
	135	boot_cpu_data.x86_model <= 0x05 &&
	136	boot_cpu_data.x86_mask < 0x0A)
	137	return 1;
	138	else
	139	return max_cstate;
	140	}
	141
0b80fc72 TG	142	#else /* !CONFIG_ACPI */
	143
	144	#define acpi_lapic 0
	145	#define acpi_ioapic 0
	146	static inline void acpi_noirq_set(void) { }
	147	static inline void acpi_disable_pci(void) { }
	148	static inline void disable_acpi(void) { }
	149
	150	#endif /* !CONFIG_ACPI */
	151
	152	#define ARCH_HAS_POWER_INIT 1
	153
	154	struct bootnode;
	155
	156	#ifdef CONFIG_ACPI_NUMA
	157	extern int acpi_numa;
	158	extern int acpi_scan_nodes(unsigned long start, unsigned long end);
	159	#ifdef CONFIG_X86_64
	160	# define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
c1c30634	161	#endif
7ba65c7e	162	extern void acpi_fake_nodes(const struct bootnode *fake_nodes,
0b80fc72 TG	163	int num_nodes);
	164	#else
	165	static inline void acpi_fake_nodes(const struct bootnode *fake_nodes,
	166	int num_nodes)
	167	{
	168	}
	169	#endif
	170
bde6f5f5 VP	171	#define acpi_unlazy_tlb(x) leave_mm(x)
bde6f5f5 VP	172
0b80fc72	173	#endif /__X86_ASM_ACPI_H/