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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994 by Waldorf Electronics | |
7 | * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle | |
8 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
20d60d99 | 9 | * Copyright (C) 2007 Maciej W. Rozycki |
1da177e4 LT |
10 | */ |
11 | #ifndef _ASM_DELAY_H | |
12 | #define _ASM_DELAY_H | |
13 | ||
1da177e4 | 14 | #include <linux/param.h> |
88de09f3 | 15 | #include <linux/smp.h> |
20d60d99 | 16 | |
1da177e4 | 17 | #include <asm/compiler.h> |
20d60d99 | 18 | #include <asm/war.h> |
1da177e4 | 19 | |
1da177e4 LT |
20 | static inline void __delay(unsigned long loops) |
21 | { | |
22 | if (sizeof(long) == 4) | |
23 | __asm__ __volatile__ ( | |
5ee82350 RB |
24 | " .set noreorder \n" |
25 | " .align 3 \n" | |
26 | "1: bnez %0, 1b \n" | |
27 | " subu %0, 1 \n" | |
28 | " .set reorder \n" | |
1da177e4 LT |
29 | : "=r" (loops) |
30 | : "0" (loops)); | |
31 | else if (sizeof(long) == 8) | |
32 | __asm__ __volatile__ ( | |
5ee82350 RB |
33 | " .set noreorder \n" |
34 | " .align 3 \n" | |
35 | "1: bnez %0, 1b \n" | |
36 | " dsubu %0, 1 \n" | |
37 | " .set reorder \n" | |
38 | : "=r" (loops) | |
39 | : "0" (loops)); | |
1da177e4 LT |
40 | } |
41 | ||
42 | ||
43 | /* | |
44 | * Division by multiplication: you don't have to worry about | |
45 | * loss of precision. | |
46 | * | |
47 | * Use only for very small delays ( < 1 msec). Should probably use a | |
48 | * lookup table, really, as the multiplications take much too long with | |
49 | * short delays. This is a "reasonable" implementation, though (and the | |
50 | * first constant multiplications gets optimized away if the delay is | |
51 | * a constant) | |
52 | */ | |
53 | ||
54 | static inline void __udelay(unsigned long usecs, unsigned long lpj) | |
55 | { | |
20d60d99 | 56 | unsigned long hi, lo; |
1da177e4 LT |
57 | |
58 | /* | |
f12555d2 AN |
59 | * The rates of 128 is rounded wrongly by the catchall case |
60 | * for 64-bit. Excessive precission? Probably ... | |
1da177e4 | 61 | */ |
875d43e7 | 62 | #if defined(CONFIG_64BIT) && (HZ == 128) |
1da177e4 | 63 | usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */ |
875d43e7 | 64 | #elif defined(CONFIG_64BIT) |
1da177e4 LT |
65 | usecs *= (0x8000000000000000UL / (500000 / HZ)); |
66 | #else /* 32-bit junk follows here */ | |
67 | usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) + | |
68 | 0x80000000ULL) >> 32); | |
69 | #endif | |
70 | ||
71 | if (sizeof(long) == 4) | |
72 | __asm__("multu\t%2, %3" | |
73 | : "=h" (usecs), "=l" (lo) | |
74 | : "r" (usecs), "r" (lpj) | |
75 | : GCC_REG_ACCUM); | |
20d60d99 | 76 | else if (sizeof(long) == 8 && !R4000_WAR) |
1da177e4 LT |
77 | __asm__("dmultu\t%2, %3" |
78 | : "=h" (usecs), "=l" (lo) | |
79 | : "r" (usecs), "r" (lpj) | |
80 | : GCC_REG_ACCUM); | |
20d60d99 MR |
81 | else if (sizeof(long) == 8 && R4000_WAR) |
82 | __asm__("dmultu\t%3, %4\n\tmfhi\t%0" | |
83 | : "=r" (usecs), "=h" (hi), "=l" (lo) | |
84 | : "r" (usecs), "r" (lpj) | |
85 | : GCC_REG_ACCUM); | |
1da177e4 LT |
86 | |
87 | __delay(usecs); | |
88 | } | |
89 | ||
83598f1c | 90 | #define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val |
1da177e4 | 91 | |
21a151d8 | 92 | #define udelay(usecs) __udelay((usecs), __udelay_val) |
1da177e4 | 93 | |
a0f08209 AN |
94 | /* make sure "usecs *= ..." in udelay do not overflow. */ |
95 | #if HZ >= 1000 | |
96 | #define MAX_UDELAY_MS 1 | |
97 | #elif HZ <= 200 | |
98 | #define MAX_UDELAY_MS 5 | |
99 | #else | |
100 | #define MAX_UDELAY_MS (1000 / HZ) | |
101 | #endif | |
102 | ||
1da177e4 | 103 | #endif /* _ASM_DELAY_H */ |