[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / watchdog / nuc900_wdt.c

/*
 * Copyright (c) 2009 Nuvoton technology corporation.
 *
 * Wan ZongShun <mcuos.com@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation;version 2 of the License.
 *
 */

#include <linux/bitops.h>
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#include <linux/uaccess.h>

#define REG_WTCR		0x1c
#define WTCLK			(0x01 << 10)
#define WTE			(0x01 << 7)	/*wdt enable*/
#define WTIS			(0x03 << 4)
#define WTIF			(0x01 << 3)
#define WTRF			(0x01 << 2)
#define WTRE			(0x01 << 1)
#define WTR			(0x01 << 0)
/*
 * The watchdog time interval can be calculated via following formula:
 * WTIS		real time interval (formula)
 * 0x00		((2^ 14 ) * ((external crystal freq) / 256))seconds
 * 0x01		((2^ 16 ) * ((external crystal freq) / 256))seconds
 * 0x02		((2^ 18 ) * ((external crystal freq) / 256))seconds
 * 0x03		((2^ 20 ) * ((external crystal freq) / 256))seconds
 *
 * The external crystal freq is 15Mhz in the nuc900 evaluation board.
 * So 0x00 = +-0.28 seconds, 0x01 = +-1.12 seconds, 0x02 = +-4.48 seconds,
 * 0x03 = +- 16.92 seconds..
 */
#define WDT_HW_TIMEOUT		0x02
#define WDT_TIMEOUT		(HZ/2)
#define WDT_HEARTBEAT		15

static int heartbeat = WDT_HEARTBEAT;
module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

struct nuc900_wdt {
	struct resource  *res;
	struct clk	 *wdt_clock;
	struct platform_device *pdev;
	void __iomem	 *wdt_base;
	char		 expect_close;
	struct timer_list timer;
	spinlock_t       wdt_lock;
	unsigned long next_heartbeat;
};

static unsigned long nuc900wdt_busy;
static struct nuc900_wdt *nuc900_wdt;

static inline void nuc900_wdt_keepalive(void)
{
	unsigned int val;

	spin_lock(&nuc900_wdt->wdt_lock);

	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	val |= (WTR | WTIF);
	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);

	spin_unlock(&nuc900_wdt->wdt_lock);
}

static inline void nuc900_wdt_start(void)
{
	unsigned int val;

	spin_lock(&nuc900_wdt->wdt_lock);

	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	val |= (WTRE | WTE | WTR | WTCLK | WTIF);
	val &= ~WTIS;
	val |= (WDT_HW_TIMEOUT << 0x04);
	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);

	spin_unlock(&nuc900_wdt->wdt_lock);

	nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
	mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
}

static inline void nuc900_wdt_stop(void)
{
	unsigned int val;

	del_timer(&nuc900_wdt->timer);

	spin_lock(&nuc900_wdt->wdt_lock);

	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	val &= ~WTE;
	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);

	spin_unlock(&nuc900_wdt->wdt_lock);
}

static inline void nuc900_wdt_ping(void)
{
	nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
}

static int nuc900_wdt_open(struct inode *inode, struct file *file)
{

	if (test_and_set_bit(0, &nuc900wdt_busy))
		return -EBUSY;

	nuc900_wdt_start();

	return nonseekable_open(inode, file);
}

static int nuc900_wdt_close(struct inode *inode, struct file *file)
{
	if (nuc900_wdt->expect_close == 42)
		nuc900_wdt_stop();
	else {
		dev_crit(&nuc900_wdt->pdev->dev,
			"Unexpected close, not stopping watchdog!\n");
		nuc900_wdt_ping();
	}

	nuc900_wdt->expect_close = 0;
	clear_bit(0, &nuc900wdt_busy);
	return 0;
}

static const struct watchdog_info nuc900_wdt_info = {
	.identity	= "nuc900 watchdog",
	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
						WDIOF_MAGICCLOSE,
};

static long nuc900_wdt_ioctl(struct file *file,
					unsigned int cmd, unsigned long arg)
{
	void __user *argp = (void __user *)arg;
	int __user *p = argp;
	int new_value;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		return copy_to_user(argp, &nuc900_wdt_info,
				sizeof(nuc900_wdt_info)) ? -EFAULT : 0;
	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		return put_user(0, p);

	case WDIOC_KEEPALIVE:
		nuc900_wdt_ping();
		return 0;

	case WDIOC_SETTIMEOUT:
		if (get_user(new_value, p))
			return -EFAULT;

		heartbeat = new_value;
		nuc900_wdt_ping();

		return put_user(new_value, p);
	case WDIOC_GETTIMEOUT:
		return put_user(heartbeat, p);
	default:
		return -ENOTTY;
	}
}

static ssize_t nuc900_wdt_write(struct file *file, const char __user *data,
						size_t len, loff_t *ppos)
{
	if (!len)
		return 0;

	/* Scan for magic character */
	if (!nowayout) {
		size_t i;

		nuc900_wdt->expect_close = 0;

		for (i = 0; i < len; i++) {
			char c;
			if (get_user(c, data + i))
				return -EFAULT;
			if (c == 'V') {
				nuc900_wdt->expect_close = 42;
				break;
			}
		}
	}

	nuc900_wdt_ping();
	return len;
}

static void nuc900_wdt_timer_ping(unsigned long data)
{
	if (time_before(jiffies, nuc900_wdt->next_heartbeat)) {
		nuc900_wdt_keepalive();
		mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
	} else
		dev_warn(&nuc900_wdt->pdev->dev, "Will reset the machine !\n");
}

static const struct file_operations nuc900wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.unlocked_ioctl	= nuc900_wdt_ioctl,
	.open		= nuc900_wdt_open,
	.release	= nuc900_wdt_close,
	.write		= nuc900_wdt_write,
};

static struct miscdevice nuc900wdt_miscdev = {
	.minor		= WATCHDOG_MINOR,
	.name		= "watchdog",
	.fops		= &nuc900wdt_fops,
};

static int nuc900wdt_probe(struct platform_device *pdev)
{
	int ret = 0;

	nuc900_wdt = kzalloc(sizeof(struct nuc900_wdt), GFP_KERNEL);
	if (!nuc900_wdt)
		return -ENOMEM;

	nuc900_wdt->pdev = pdev;

	spin_lock_init(&nuc900_wdt->wdt_lock);

	nuc900_wdt->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (nuc900_wdt->res == NULL) {
		dev_err(&pdev->dev, "no memory resource specified\n");
		ret = -ENOENT;
		goto err_get;
	}

	if (!request_mem_region(nuc900_wdt->res->start,
				resource_size(nuc900_wdt->res), pdev->name)) {
		dev_err(&pdev->dev, "failed to get memory region\n");
		ret = -ENOENT;
		goto err_get;
	}

	nuc900_wdt->wdt_base = ioremap(nuc900_wdt->res->start,
					resource_size(nuc900_wdt->res));
	if (nuc900_wdt->wdt_base == NULL) {
		dev_err(&pdev->dev, "failed to ioremap() region\n");
		ret = -EINVAL;
		goto err_req;
	}

	nuc900_wdt->wdt_clock = clk_get(&pdev->dev, NULL);
	if (IS_ERR(nuc900_wdt->wdt_clock)) {
		dev_err(&pdev->dev, "failed to find watchdog clock source\n");
		ret = PTR_ERR(nuc900_wdt->wdt_clock);
		goto err_map;
	}

	clk_enable(nuc900_wdt->wdt_clock);

	setup_timer(&nuc900_wdt->timer, nuc900_wdt_timer_ping, 0);

	ret = misc_register(&nuc900wdt_miscdev);
	if (ret) {
		dev_err(&pdev->dev, "err register miscdev on minor=%d (%d)\n",
			WATCHDOG_MINOR, ret);
		goto err_clk;
	}

	return 0;

err_clk:
	clk_disable(nuc900_wdt->wdt_clock);
	clk_put(nuc900_wdt->wdt_clock);
err_map:
	iounmap(nuc900_wdt->wdt_base);
err_req:
	release_mem_region(nuc900_wdt->res->start,
					resource_size(nuc900_wdt->res));
err_get:
	kfree(nuc900_wdt);
	return ret;
}

static int nuc900wdt_remove(struct platform_device *pdev)
{
	misc_deregister(&nuc900wdt_miscdev);

	clk_disable(nuc900_wdt->wdt_clock);
	clk_put(nuc900_wdt->wdt_clock);

	iounmap(nuc900_wdt->wdt_base);

	release_mem_region(nuc900_wdt->res->start,
					resource_size(nuc900_wdt->res));

	kfree(nuc900_wdt);

	return 0;
}

static struct platform_driver nuc900wdt_driver = {
	.probe		= nuc900wdt_probe,
	.remove		= nuc900wdt_remove,
	.driver		= {
		.name	= "nuc900-wdt",
		.owner	= THIS_MODULE,
	},
};

module_platform_driver(nuc900wdt_driver);

MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
MODULE_DESCRIPTION("Watchdog driver for NUC900");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
MODULE_ALIAS("platform:nuc900-wdt");
Commit	Line	Data
0400e313 WZ	1	/*
	2	* Copyright (c) 2009 Nuvoton technology corporation.
	3	*
	4	* Wan ZongShun <mcuos.com@gmail.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation;version 2 of the License.
	9	*
	10	*/
	11
	12	#include <linux/bitops.h>
	13	#include <linux/errno.h>
	14	#include <linux/fs.h>
	15	#include <linux/init.h>
	16	#include <linux/io.h>
	17	#include <linux/clk.h>
	18	#include <linux/kernel.h>
	19	#include <linux/miscdevice.h>
	20	#include <linux/module.h>
	21	#include <linux/moduleparam.h>
	22	#include <linux/platform_device.h>
5a0e3ad6	23	#include <linux/slab.h>
0400e313 WZ	24	#include <linux/interrupt.h>
	25	#include <linux/types.h>
	26	#include <linux/watchdog.h>
	27	#include <linux/uaccess.h>
	28
	29	#define REG_WTCR 0x1c
	30	#define WTCLK (0x01 << 10)
	31	#define WTE (0x01 << 7) /wdt enable/
	32	#define WTIS (0x03 << 4)
	33	#define WTIF (0x01 << 3)
	34	#define WTRF (0x01 << 2)
	35	#define WTRE (0x01 << 1)
	36	#define WTR (0x01 << 0)
	37	/*
	38	* The watchdog time interval can be calculated via following formula:
	39	* WTIS real time interval (formula)
	40	* 0x00 ((2^ 14 ) * ((external crystal freq) / 256))seconds
	41	* 0x01 ((2^ 16 ) * ((external crystal freq) / 256))seconds
	42	* 0x02 ((2^ 18 ) * ((external crystal freq) / 256))seconds
	43	* 0x03 ((2^ 20 ) * ((external crystal freq) / 256))seconds
	44	*
	45	* The external crystal freq is 15Mhz in the nuc900 evaluation board.
	46	* So 0x00 = +-0.28 seconds, 0x01 = +-1.12 seconds, 0x02 = +-4.48 seconds,
	47	* 0x03 = +- 16.92 seconds..
	48	*/
	49	#define WDT_HW_TIMEOUT 0x02
	50	#define WDT_TIMEOUT (HZ/2)
	51	#define WDT_HEARTBEAT 15
	52
	53	static int heartbeat = WDT_HEARTBEAT;
	54	module_param(heartbeat, int, 0);
	55	MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
	56	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
	57
86a1e189 WVS	58	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	59	module_param(nowayout, bool, 0);
0400e313 WZ	60	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	61	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	62
	63	struct nuc900_wdt {
	64	struct resource *res;
	65	struct clk *wdt_clock;
	66	struct platform_device *pdev;
	67	void __iomem *wdt_base;
	68	char expect_close;
	69	struct timer_list timer;
	70	spinlock_t wdt_lock;
	71	unsigned long next_heartbeat;
	72	};
	73
	74	static unsigned long nuc900wdt_busy;
e352829a	75	static struct nuc900_wdt *nuc900_wdt;
0400e313 WZ	76
	77	static inline void nuc900_wdt_keepalive(void)
	78	{
	79	unsigned int val;
	80
	81	spin_lock(&nuc900_wdt->wdt_lock);
	82
	83	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	84	val \|= (WTR \| WTIF);
	85	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
	86
	87	spin_unlock(&nuc900_wdt->wdt_lock);
	88	}
	89
	90	static inline void nuc900_wdt_start(void)
	91	{
	92	unsigned int val;
	93
	94	spin_lock(&nuc900_wdt->wdt_lock);
	95
	96	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	97	val \|= (WTRE \| WTE \| WTR \| WTCLK \| WTIF);
	98	val &= ~WTIS;
	99	val \|= (WDT_HW_TIMEOUT << 0x04);
	100	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
	101
	102	spin_unlock(&nuc900_wdt->wdt_lock);
	103
	104	nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
	105	mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
	106	}
	107
	108	static inline void nuc900_wdt_stop(void)
	109	{
	110	unsigned int val;
	111
	112	del_timer(&nuc900_wdt->timer);
	113
	114	spin_lock(&nuc900_wdt->wdt_lock);
	115
	116	val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
	117	val &= ~WTE;
	118	__raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
	119
	120	spin_unlock(&nuc900_wdt->wdt_lock);
	121	}
	122
	123	static inline void nuc900_wdt_ping(void)
	124	{
	125	nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
	126	}
	127
	128	static int nuc900_wdt_open(struct inode inode, struct file file)
	129	{
	130
	131	if (test_and_set_bit(0, &nuc900wdt_busy))
	132	return -EBUSY;
	133
	134	nuc900_wdt_start();
	135
	136	return nonseekable_open(inode, file);
	137	}
	138
	139	static int nuc900_wdt_close(struct inode inode, struct file file)
140	{
141	if (nuc900_wdt->expect_close == 42)
142	nuc900_wdt_stop();
143	else {
144	dev_crit(&nuc900_wdt->pdev->dev,
145	"Unexpected close, not stopping watchdog!\n");
146	nuc900_wdt_ping();
147	}
148
149	nuc900_wdt->expect_close = 0;
150	clear_bit(0, &nuc900wdt_busy);
151	return 0;
152	}
153
154	static const struct watchdog_info nuc900_wdt_info = {
155	.identity = "nuc900 watchdog",
156	.options = WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \|
157	WDIOF_MAGICCLOSE,
158	};
159
160	static long nuc900_wdt_ioctl(struct file *file,
161	unsigned int cmd, unsigned long arg)
162	{
163	void __user argp = (void __user )arg;
164	int __user *p = argp;
165	int new_value;
166
167	switch (cmd) {
168	case WDIOC_GETSUPPORT:
169	return copy_to_user(argp, &nuc900_wdt_info,
170	sizeof(nuc900_wdt_info)) ? -EFAULT : 0;
171	case WDIOC_GETSTATUS:
172	case WDIOC_GETBOOTSTATUS:
173	return put_user(0, p);
174
175	case WDIOC_KEEPALIVE:
176	nuc900_wdt_ping();
177	return 0;
178
179	case WDIOC_SETTIMEOUT:
180	if (get_user(new_value, p))
181	return -EFAULT;
182
183	heartbeat = new_value;
184	nuc900_wdt_ping();
185
186	return put_user(new_value, p);
187	case WDIOC_GETTIMEOUT:
188	return put_user(heartbeat, p);
189	default:
190	return -ENOTTY;
191	}
192	}
193
194	static ssize_t nuc900_wdt_write(struct file file, const char __user data,
195	size_t len, loff_t *ppos)
196	{
197	if (!len)
198	return 0;
199
200	/* Scan for magic character */
201	if (!nowayout) {
202	size_t i;
203
204	nuc900_wdt->expect_close = 0;
205
206	for (i = 0; i < len; i++) {
207	char c;
208	if (get_user(c, data + i))
209	return -EFAULT;
210	if (c == 'V') {
211	nuc900_wdt->expect_close = 42;
212	break;
213	}
214	}
215	}
216
217	nuc900_wdt_ping();
218	return len;
219	}
220
221	static void nuc900_wdt_timer_ping(unsigned long data)
222	{
223	if (time_before(jiffies, nuc900_wdt->next_heartbeat)) {
224	nuc900_wdt_keepalive();
225	mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
226	} else
227	dev_warn(&nuc900_wdt->pdev->dev, "Will reset the machine !\n");
228	}
229
230	static const struct file_operations nuc900wdt_fops = {
231	.owner = THIS_MODULE,
232	.llseek = no_llseek,
233	.unlocked_ioctl = nuc900_wdt_ioctl,
234	.open = nuc900_wdt_open,
235	.release = nuc900_wdt_close,
236	.write = nuc900_wdt_write,
237	};
238
239	static struct miscdevice nuc900wdt_miscdev = {
240	.minor = WATCHDOG_MINOR,
241	.name = "watchdog",
242	.fops = &nuc900wdt_fops,
243	};
244
2d991a16	245	static int nuc900wdt_probe(struct platform_device *pdev)
0400e313 WZ	246	{
	247	int ret = 0;
	248
	249	nuc900_wdt = kzalloc(sizeof(struct nuc900_wdt), GFP_KERNEL);
	250	if (!nuc900_wdt)
	251	return -ENOMEM;
	252
	253	nuc900_wdt->pdev = pdev;
	254
	255	spin_lock_init(&nuc900_wdt->wdt_lock);
	256
	257	nuc900_wdt->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	258	if (nuc900_wdt->res == NULL) {
	259	dev_err(&pdev->dev, "no memory resource specified\n");
	260	ret = -ENOENT;
	261	goto err_get;
	262	}
	263
	264	if (!request_mem_region(nuc900_wdt->res->start,
	265	resource_size(nuc900_wdt->res), pdev->name)) {
	266	dev_err(&pdev->dev, "failed to get memory region\n");
	267	ret = -ENOENT;
	268	goto err_get;
	269	}
	270
	271	nuc900_wdt->wdt_base = ioremap(nuc900_wdt->res->start,
	272	resource_size(nuc900_wdt->res));
	273	if (nuc900_wdt->wdt_base == NULL) {
	274	dev_err(&pdev->dev, "failed to ioremap() region\n");
	275	ret = -EINVAL;
	276	goto err_req;
	277	}
	278
	279	nuc900_wdt->wdt_clock = clk_get(&pdev->dev, NULL);
	280	if (IS_ERR(nuc900_wdt->wdt_clock)) {
	281	dev_err(&pdev->dev, "failed to find watchdog clock source\n");
	282	ret = PTR_ERR(nuc900_wdt->wdt_clock);
	283	goto err_map;
	284	}
	285
	286	clk_enable(nuc900_wdt->wdt_clock);
	287
	288	setup_timer(&nuc900_wdt->timer, nuc900_wdt_timer_ping, 0);
	289
2865e770 AL	290	ret = misc_register(&nuc900wdt_miscdev);
2865e770 AL	291	if (ret) {
0400e313 WZ	292	dev_err(&pdev->dev, "err register miscdev on minor=%d (%d)\n",
	293	WATCHDOG_MINOR, ret);
	294	goto err_clk;
	295	}
	296
	297	return 0;
	298
	299	err_clk:
	300	clk_disable(nuc900_wdt->wdt_clock);
	301	clk_put(nuc900_wdt->wdt_clock);
	302	err_map:
	303	iounmap(nuc900_wdt->wdt_base);
	304	err_req:
	305	release_mem_region(nuc900_wdt->res->start,
	306	resource_size(nuc900_wdt->res));
	307	err_get:
	308	kfree(nuc900_wdt);
	309	return ret;
	310	}
	311
4b12b896	312	static int nuc900wdt_remove(struct platform_device *pdev)
0400e313 WZ	313	{
	314	misc_deregister(&nuc900wdt_miscdev);
	315
	316	clk_disable(nuc900_wdt->wdt_clock);
	317	clk_put(nuc900_wdt->wdt_clock);
	318
	319	iounmap(nuc900_wdt->wdt_base);
	320
	321	release_mem_region(nuc900_wdt->res->start,
	322	resource_size(nuc900_wdt->res));
	323
	324	kfree(nuc900_wdt);
	325
	326	return 0;
	327	}
	328
	329	static struct platform_driver nuc900wdt_driver = {
	330	.probe = nuc900wdt_probe,
82268714	331	.remove = nuc900wdt_remove,
0400e313 WZ	332	.driver = {
	333	.name = "nuc900-wdt",
	334	.owner = THIS_MODULE,
	335	},
	336	};
	337
b8ec6118	338	module_platform_driver(nuc900wdt_driver);
0400e313 WZ	339
	340	MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
	341	MODULE_DESCRIPTION("Watchdog driver for NUC900");
	342	MODULE_LICENSE("GPL");
	343	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
	344	MODULE_ALIAS("platform:nuc900-wdt");