[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / watchdog / iop_wdt.c

/*
 * drivers/char/watchdog/iop_wdt.c
 *
 * WDT driver for Intel I/O Processors
 * Copyright (C) 2005, Intel Corporation.
 *
 * Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 *
 *	Curt E Bruns <curt.e.bruns@intel.com>
 *	Peter Milne <peter.milne@d-tacq.com>
 *	Dan Williams <dan.j.williams@intel.com>
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/uaccess.h>
#include <mach/hardware.h>

static bool nowayout = WATCHDOG_NOWAYOUT;
static unsigned long wdt_status;
static unsigned long boot_status;
static DEFINE_SPINLOCK(wdt_lock);

#define WDT_IN_USE		0
#define WDT_OK_TO_CLOSE		1
#define WDT_ENABLED		2

static unsigned long iop_watchdog_timeout(void)
{
	return (0xffffffffUL / get_iop_tick_rate());
}

/**
 * wdt_supports_disable - determine if we are accessing a iop13xx watchdog
 * or iop3xx by whether it has a disable command
 */
static int wdt_supports_disable(void)
{
	int can_disable;

	if (IOP_WDTCR_EN_ARM != IOP_WDTCR_DIS_ARM)
		can_disable = 1;
	else
		can_disable = 0;

	return can_disable;
}

static void wdt_enable(void)
{
	/* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF
	 * Takes approx. 10.7s to timeout
	 */
	spin_lock(&wdt_lock);
	write_wdtcr(IOP_WDTCR_EN_ARM);
	write_wdtcr(IOP_WDTCR_EN);
	spin_unlock(&wdt_lock);
}

/* returns 0 if the timer was successfully disabled */
static int wdt_disable(void)
{
	/* Stop Counting */
	if (wdt_supports_disable()) {
		spin_lock(&wdt_lock);
		write_wdtcr(IOP_WDTCR_DIS_ARM);
		write_wdtcr(IOP_WDTCR_DIS);
		clear_bit(WDT_ENABLED, &wdt_status);
		spin_unlock(&wdt_lock);
		pr_info("Disabled\n");
		return 0;
	} else
		return 1;
}

static int iop_wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(WDT_IN_USE, &wdt_status))
		return -EBUSY;

	clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
	wdt_enable();
	set_bit(WDT_ENABLED, &wdt_status);
	return nonseekable_open(inode, file);
}

static ssize_t iop_wdt_write(struct file *file, const char *data, size_t len,
		  loff_t *ppos)
{
	if (len) {
		if (!nowayout) {
			size_t i;

			clear_bit(WDT_OK_TO_CLOSE, &wdt_status);

			for (i = 0; i != len; i++) {
				char c;

				if (get_user(c, data + i))
					return -EFAULT;
				if (c == 'V')
					set_bit(WDT_OK_TO_CLOSE, &wdt_status);
			}
		}
		wdt_enable();
	}
	return len;
}

static const struct watchdog_info ident = {
	.options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
	.identity = "iop watchdog",
};

static long iop_wdt_ioctl(struct file *file,
				unsigned int cmd, unsigned long arg)
{
	int options;
	int ret = -ENOTTY;
	int __user *argp = (int __user *)arg;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		if (copy_to_user(argp, &ident, sizeof(ident)))
			ret = -EFAULT;
		else
			ret = 0;
		break;

	case WDIOC_GETSTATUS:
		ret = put_user(0, argp);
		break;

	case WDIOC_GETBOOTSTATUS:
		ret = put_user(boot_status, argp);
		break;

	case WDIOC_SETOPTIONS:
		if (get_user(options, (int *)arg))
			return -EFAULT;

		if (options & WDIOS_DISABLECARD) {
			if (!nowayout) {
				if (wdt_disable() == 0) {
					set_bit(WDT_OK_TO_CLOSE, &wdt_status);
					ret = 0;
				} else
					ret = -ENXIO;
			} else
				ret = 0;
		}
		if (options & WDIOS_ENABLECARD) {
			wdt_enable();
			ret = 0;
		}
		break;

	case WDIOC_KEEPALIVE:
		wdt_enable();
		ret = 0;
		break;

	case WDIOC_GETTIMEOUT:
		ret = put_user(iop_watchdog_timeout(), argp);
		break;
	}
	return ret;
}

static int iop_wdt_release(struct inode *inode, struct file *file)
{
	int state = 1;
	if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
		if (test_bit(WDT_ENABLED, &wdt_status))
			state = wdt_disable();

	/* if the timer is not disabled reload and notify that we are still
	 * going down
	 */
	if (state != 0) {
		wdt_enable();
		pr_crit("Device closed unexpectedly - reset in %lu seconds\n",
			iop_watchdog_timeout());
	}

	clear_bit(WDT_IN_USE, &wdt_status);
	clear_bit(WDT_OK_TO_CLOSE, &wdt_status);

	return 0;
}

static const struct file_operations iop_wdt_fops = {
	.owner = THIS_MODULE,
	.llseek = no_llseek,
	.write = iop_wdt_write,
	.unlocked_ioctl = iop_wdt_ioctl,
	.open = iop_wdt_open,
	.release = iop_wdt_release,
};

static struct miscdevice iop_wdt_miscdev = {
	.minor = WATCHDOG_MINOR,
	.name = "watchdog",
	.fops = &iop_wdt_fops,
};

static int __init iop_wdt_init(void)
{
	int ret;

	/* check if the reset was caused by the watchdog timer */
	boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0;

	/* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset
	 * NOTE: An IB Reset will Reset both cores in the IOP342
	 */
	write_wdtsr(IOP13XX_WDTCR_IB_RESET);

	/* Register after we have the device set up so we cannot race
	   with an open */
	ret = misc_register(&iop_wdt_miscdev);
	if (ret == 0)
		pr_info("timeout %lu sec\n", iop_watchdog_timeout());

	return ret;
}

static void __exit iop_wdt_exit(void)
{
	misc_deregister(&iop_wdt_miscdev);
}

module_init(iop_wdt_init);
module_exit(iop_wdt_exit);

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");

MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>");
MODULE_DESCRIPTION("iop watchdog timer driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
Commit	Line	Data
70c14ff0 DW	1	/*
	2	* drivers/char/watchdog/iop_wdt.c
	3	*
	4	* WDT driver for Intel I/O Processors
	5	* Copyright (C) 2005, Intel Corporation.
	6	*
	7	* Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc.
	8	*
	9	* This program is free software; you can redistribute it and/or modify it
	10	* under the terms and conditions of the GNU General Public License,
	11	* version 2, as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope it will be useful, but WITHOUT
	14	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	15	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	16	* more details.
	17	*
	18	* You should have received a copy of the GNU General Public License along with
	19	* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
	20	* Place - Suite 330, Boston, MA 02111-1307 USA.
	21	*
	22	* Curt E Bruns <curt.e.bruns@intel.com>
	23	* Peter Milne <peter.milne@d-tacq.com>
	24	* Dan Williams <dan.j.williams@intel.com>
	25	*/
	26
27c766aa JP	27	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	28
70c14ff0 DW	29	#include <linux/module.h>
	30	#include <linux/kernel.h>
	31	#include <linux/fs.h>
	32	#include <linux/init.h>
	33	#include <linux/device.h>
	34	#include <linux/miscdevice.h>
	35	#include <linux/watchdog.h>
	36	#include <linux/uaccess.h>
a09e64fb	37	#include <mach/hardware.h>
70c14ff0	38
86a1e189	39	static bool nowayout = WATCHDOG_NOWAYOUT;
70c14ff0 DW	40	static unsigned long wdt_status;
70c14ff0 DW	41	static unsigned long boot_status;
1334f329	42	static DEFINE_SPINLOCK(wdt_lock);
70c14ff0 DW	43
	44	#define WDT_IN_USE 0
	45	#define WDT_OK_TO_CLOSE 1
	46	#define WDT_ENABLED 2
	47
	48	static unsigned long iop_watchdog_timeout(void)
	49	{
	50	return (0xffffffffUL / get_iop_tick_rate());
	51	}
	52
	53	/**
	54	* wdt_supports_disable - determine if we are accessing a iop13xx watchdog
	55	* or iop3xx by whether it has a disable command
	56	*/
	57	static int wdt_supports_disable(void)
	58	{
	59	int can_disable;
	60
	61	if (IOP_WDTCR_EN_ARM != IOP_WDTCR_DIS_ARM)
	62	can_disable = 1;
	63	else
	64	can_disable = 0;
	65
	66	return can_disable;
	67	}
	68
	69	static void wdt_enable(void)
	70	{
	71	/* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF
	72	* Takes approx. 10.7s to timeout
	73	*/
02e3814e	74	spin_lock(&wdt_lock);
70c14ff0 DW	75	write_wdtcr(IOP_WDTCR_EN_ARM);
70c14ff0 DW	76	write_wdtcr(IOP_WDTCR_EN);
02e3814e	77	spin_unlock(&wdt_lock);
70c14ff0 DW	78	}
	79
	80	/* returns 0 if the timer was successfully disabled */
	81	static int wdt_disable(void)
	82	{
	83	/* Stop Counting */
	84	if (wdt_supports_disable()) {
02e3814e	85	spin_lock(&wdt_lock);
70c14ff0 DW	86	write_wdtcr(IOP_WDTCR_DIS_ARM);
	87	write_wdtcr(IOP_WDTCR_DIS);
	88	clear_bit(WDT_ENABLED, &wdt_status);
02e3814e	89	spin_unlock(&wdt_lock);
27c766aa	90	pr_info("Disabled\n");
70c14ff0 DW	91	return 0;
	92	} else
	93	return 1;
	94	}
	95
	96	static int iop_wdt_open(struct inode inode, struct file file)
	97	{
	98	if (test_and_set_bit(WDT_IN_USE, &wdt_status))
	99	return -EBUSY;
	100
	101	clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
70c14ff0	102	wdt_enable();
70c14ff0	103	set_bit(WDT_ENABLED, &wdt_status);
70c14ff0 DW	104	return nonseekable_open(inode, file);
	105	}
	106
02e3814e	107	static ssize_t iop_wdt_write(struct file file, const char data, size_t len,
70c14ff0 DW	108	loff_t *ppos)
	109	{
	110	if (len) {
	111	if (!nowayout) {
	112	size_t i;
	113
	114	clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
	115
	116	for (i = 0; i != len; i++) {
	117	char c;
	118
	119	if (get_user(c, data + i))
	120	return -EFAULT;
	121	if (c == 'V')
	122	set_bit(WDT_OK_TO_CLOSE, &wdt_status);
	123	}
	124	}
	125	wdt_enable();
	126	}
70c14ff0 DW	127	return len;
	128	}
	129
02e3814e	130	static const struct watchdog_info ident = {
70c14ff0 DW	131	.options = WDIOF_CARDRESET \| WDIOF_MAGICCLOSE \| WDIOF_KEEPALIVEPING,
	132	.identity = "iop watchdog",
	133	};
	134
02e3814e AC	135	static long iop_wdt_ioctl(struct file *file,
02e3814e AC	136	unsigned int cmd, unsigned long arg)
70c14ff0 DW	137	{
	138	int options;
	139	int ret = -ENOTTY;
02e3814e	140	int __user argp = (int __user )arg;
70c14ff0 DW	141
	142	switch (cmd) {
	143	case WDIOC_GETSUPPORT:
e04ab958	144	if (copy_to_user(argp, &ident, sizeof(ident)))
70c14ff0 DW	145	ret = -EFAULT;
	146	else
	147	ret = 0;
	148	break;
	149
	150	case WDIOC_GETSTATUS:
02e3814e	151	ret = put_user(0, argp);
70c14ff0 DW	152	break;
	153
	154	case WDIOC_GETBOOTSTATUS:
02e3814e	155	ret = put_user(boot_status, argp);
70c14ff0 DW	156	break;
	157
	158	case WDIOC_SETOPTIONS:
	159	if (get_user(options, (int *)arg))
	160	return -EFAULT;
	161
	162	if (options & WDIOS_DISABLECARD) {
	163	if (!nowayout) {
	164	if (wdt_disable() == 0) {
	165	set_bit(WDT_OK_TO_CLOSE, &wdt_status);
	166	ret = 0;
	167	} else
	168	ret = -ENXIO;
	169	} else
	170	ret = 0;
	171	}
70c14ff0 DW	172	if (options & WDIOS_ENABLECARD) {
	173	wdt_enable();
	174	ret = 0;
	175	}
	176	break;
70c14ff0	177
0c06090c WVS	178	case WDIOC_KEEPALIVE:
	179	wdt_enable();
	180	ret = 0;
	181	break;
	182
	183	case WDIOC_GETTIMEOUT:
	184	ret = put_user(iop_watchdog_timeout(), argp);
	185	break;
70c14ff0	186	}
70c14ff0 DW	187	return ret;
	188	}
	189
	190	static int iop_wdt_release(struct inode inode, struct file file)
	191	{
	192	int state = 1;
	193	if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
	194	if (test_bit(WDT_ENABLED, &wdt_status))
	195	state = wdt_disable();
	196
4b512d26	197	/* if the timer is not disabled reload and notify that we are still
70c14ff0 DW	198	* going down
	199	*/
	200	if (state != 0) {
	201	wdt_enable();
27c766aa JP	202	pr_crit("Device closed unexpectedly - reset in %lu seconds\n",
27c766aa JP	203	iop_watchdog_timeout());
70c14ff0 DW	204	}
	205
	206	clear_bit(WDT_IN_USE, &wdt_status);
	207	clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
	208
	209	return 0;
	210	}
	211
	212	static const struct file_operations iop_wdt_fops = {
	213	.owner = THIS_MODULE,
	214	.llseek = no_llseek,
	215	.write = iop_wdt_write,
02e3814e	216	.unlocked_ioctl = iop_wdt_ioctl,
70c14ff0 DW	217	.open = iop_wdt_open,
	218	.release = iop_wdt_release,
	219	};
	220
	221	static struct miscdevice iop_wdt_miscdev = {
	222	.minor = WATCHDOG_MINOR,
	223	.name = "watchdog",
	224	.fops = &iop_wdt_fops,
	225	};
	226
	227	static int __init iop_wdt_init(void)
	228	{
	229	int ret;
	230
70c14ff0 DW	231	/* check if the reset was caused by the watchdog timer */
	232	boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0;
	233
	234	/* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset
	235	* NOTE: An IB Reset will Reset both cores in the IOP342
	236	*/
	237	write_wdtsr(IOP13XX_WDTCR_IB_RESET);
	238
02e3814e AC	239	/* Register after we have the device set up so we cannot race
	240	with an open */
	241	ret = misc_register(&iop_wdt_miscdev);
	242	if (ret == 0)
27c766aa	243	pr_info("timeout %lu sec\n", iop_watchdog_timeout());
02e3814e	244
70c14ff0 DW	245	return ret;
	246	}
	247
	248	static void __exit iop_wdt_exit(void)
	249	{
	250	misc_deregister(&iop_wdt_miscdev);
	251	}
	252
	253	module_init(iop_wdt_init);
	254	module_exit(iop_wdt_exit);
	255
86a1e189	256	module_param(nowayout, bool, 0);
70c14ff0 DW	257	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
	258
	259	MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>");
	260	MODULE_DESCRIPTION("iop watchdog timer driver");
	261	MODULE_LICENSE("GPL");
	262	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);