[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / watchdog / ar7_wdt.c

/*
 * drivers/watchdog/ar7_wdt.c
 *
 * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
 * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
 *
 * Some code taken from:
 * National Semiconductor SCx200 Watchdog support
 * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/miscdevice.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>
#include <linux/fs.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#include <linux/clk.h>

#include <asm/addrspace.h>
#include <asm/mach-ar7/ar7.h>

#define LONGNAME "TI AR7 Watchdog Timer"

MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
MODULE_DESCRIPTION(LONGNAME);
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);

static int margin = 60;
module_param(margin, int, 0);
MODULE_PARM_DESC(margin, "Watchdog margin in seconds");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");

#define READ_REG(x) readl((void __iomem *)&(x))
#define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))

struct ar7_wdt {
	u32 kick_lock;
	u32 kick;
	u32 change_lock;
	u32 change;
	u32 disable_lock;
	u32 disable;
	u32 prescale_lock;
	u32 prescale;
};

static unsigned long wdt_is_open;
static unsigned expect_close;
static DEFINE_SPINLOCK(wdt_lock);

/* XXX currently fixed, allows max margin ~68.72 secs */
#define prescale_value 0xffff

/* Resource of the WDT registers */
static struct resource *ar7_regs_wdt;
/* Pointer to the remapped WDT IO space */
static struct ar7_wdt *ar7_wdt;

static struct clk *vbus_clk;

static void ar7_wdt_kick(u32 value)
{
	WRITE_REG(ar7_wdt->kick_lock, 0x5555);
	if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) {
		WRITE_REG(ar7_wdt->kick_lock, 0xaaaa);
		if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) {
			WRITE_REG(ar7_wdt->kick, value);
			return;
		}
	}
	pr_err("failed to unlock WDT kick reg\n");
}

static void ar7_wdt_prescale(u32 value)
{
	WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a);
	if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) {
		WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5);
		if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) {
			WRITE_REG(ar7_wdt->prescale, value);
			return;
		}
	}
	pr_err("failed to unlock WDT prescale reg\n");
}

static void ar7_wdt_change(u32 value)
{
	WRITE_REG(ar7_wdt->change_lock, 0x6666);
	if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) {
		WRITE_REG(ar7_wdt->change_lock, 0xbbbb);
		if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) {
			WRITE_REG(ar7_wdt->change, value);
			return;
		}
	}
	pr_err("failed to unlock WDT change reg\n");
}

static void ar7_wdt_disable(u32 value)
{
	WRITE_REG(ar7_wdt->disable_lock, 0x7777);
	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) {
		WRITE_REG(ar7_wdt->disable_lock, 0xcccc);
		if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) {
			WRITE_REG(ar7_wdt->disable_lock, 0xdddd);
			if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {
				WRITE_REG(ar7_wdt->disable, value);
				return;
			}
		}
	}
	pr_err("failed to unlock WDT disable reg\n");
}

static void ar7_wdt_update_margin(int new_margin)
{
	u32 change;
	u32 vbus_rate;

	vbus_rate = clk_get_rate(vbus_clk);
	change = new_margin * (vbus_rate / prescale_value);
	if (change < 1)
		change = 1;
	if (change > 0xffff)
		change = 0xffff;
	ar7_wdt_change(change);
	margin = change * prescale_value / vbus_rate;
	pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n",
		margin, prescale_value, change, vbus_rate);
}

static void ar7_wdt_enable_wdt(void)
{
	pr_debug("enabling watchdog timer\n");
	ar7_wdt_disable(1);
	ar7_wdt_kick(1);
}

static void ar7_wdt_disable_wdt(void)
{
	pr_debug("disabling watchdog timer\n");
	ar7_wdt_disable(0);
}

static int ar7_wdt_open(struct inode *inode, struct file *file)
{
	/* only allow one at a time */
	if (test_and_set_bit(0, &wdt_is_open))
		return -EBUSY;
	ar7_wdt_enable_wdt();
	expect_close = 0;

	return nonseekable_open(inode, file);
}

static int ar7_wdt_release(struct inode *inode, struct file *file)
{
	if (!expect_close)
		pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n");
	else if (!nowayout)
		ar7_wdt_disable_wdt();
	clear_bit(0, &wdt_is_open);
	return 0;
}

static ssize_t ar7_wdt_write(struct file *file, const char *data,
			     size_t len, loff_t *ppos)
{
	/* check for a magic close character */
	if (len) {
		size_t i;

		spin_lock(&wdt_lock);
		ar7_wdt_kick(1);
		spin_unlock(&wdt_lock);

		expect_close = 0;
		for (i = 0; i < len; ++i) {
			char c;
			if (get_user(c, data + i))
				return -EFAULT;
			if (c == 'V')
				expect_close = 1;
		}

	}
	return len;
}

static long ar7_wdt_ioctl(struct file *file,
					unsigned int cmd, unsigned long arg)
{
	static const struct watchdog_info ident = {
		.identity = LONGNAME,
		.firmware_version = 1,
		.options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
						WDIOF_MAGICCLOSE),
	};
	int new_margin;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		if (copy_to_user((struct watchdog_info *)arg, &ident,
				sizeof(ident)))
			return -EFAULT;
		return 0;
	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		if (put_user(0, (int *)arg))
			return -EFAULT;
		return 0;
	case WDIOC_KEEPALIVE:
		ar7_wdt_kick(1);
		return 0;
	case WDIOC_SETTIMEOUT:
		if (get_user(new_margin, (int *)arg))
			return -EFAULT;
		if (new_margin < 1)
			return -EINVAL;

		spin_lock(&wdt_lock);
		ar7_wdt_update_margin(new_margin);
		ar7_wdt_kick(1);
		spin_unlock(&wdt_lock);

	case WDIOC_GETTIMEOUT:
		if (put_user(margin, (int *)arg))
			return -EFAULT;
		return 0;
	default:
		return -ENOTTY;
	}
}

static const struct file_operations ar7_wdt_fops = {
	.owner		= THIS_MODULE,
	.write		= ar7_wdt_write,
	.unlocked_ioctl	= ar7_wdt_ioctl,
	.open		= ar7_wdt_open,
	.release	= ar7_wdt_release,
	.llseek		= no_llseek,
};

static struct miscdevice ar7_wdt_miscdev = {
	.minor		= WATCHDOG_MINOR,
	.name		= "watchdog",
	.fops		= &ar7_wdt_fops,
};

static int ar7_wdt_probe(struct platform_device *pdev)
{
	int rc;

	ar7_regs_wdt =
		platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
	if (!ar7_regs_wdt) {
		pr_err("could not get registers resource\n");
		return -ENODEV;
	}

	ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
	if (IS_ERR(ar7_wdt))
		return PTR_ERR(ar7_wdt);

	vbus_clk = clk_get(NULL, "vbus");
	if (IS_ERR(vbus_clk)) {
		pr_err("could not get vbus clock\n");
		return PTR_ERR(vbus_clk);
	}

	ar7_wdt_disable_wdt();
	ar7_wdt_prescale(prescale_value);
	ar7_wdt_update_margin(margin);

	rc = misc_register(&ar7_wdt_miscdev);
	if (rc) {
		pr_err("unable to register misc device\n");
		goto out;
	}
	return 0;

out:
	clk_put(vbus_clk);
	vbus_clk = NULL;
	return rc;
}

static int ar7_wdt_remove(struct platform_device *pdev)
{
	misc_deregister(&ar7_wdt_miscdev);
	clk_put(vbus_clk);
	vbus_clk = NULL;
	return 0;
}

static void ar7_wdt_shutdown(struct platform_device *pdev)
{
	if (!nowayout)
		ar7_wdt_disable_wdt();
}

static struct platform_driver ar7_wdt_driver = {
	.probe = ar7_wdt_probe,
	.remove = ar7_wdt_remove,
	.shutdown = ar7_wdt_shutdown,
	.driver = {
		.owner = THIS_MODULE,
		.name = "ar7_wdt",
	},
};

module_platform_driver(ar7_wdt_driver);
Commit	Line	Data
c283cf2c MC	1	/*
	2	* drivers/watchdog/ar7_wdt.c
	3	*
	4	* Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
	5	* Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
	6	*
	7	* Some code taken from:
	8	* National Semiconductor SCx200 Watchdog support
	9	* Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or
	14	* (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	24	*/
	25
27c766aa JP	26	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	27
c283cf2c MC	28	#include <linux/module.h>
	29	#include <linux/moduleparam.h>
	30	#include <linux/errno.h>
	31	#include <linux/init.h>
	32	#include <linux/miscdevice.h>
64d4062a	33	#include <linux/platform_device.h>
c283cf2c	34	#include <linux/watchdog.h>
c283cf2c MC	35	#include <linux/fs.h>
	36	#include <linux/ioport.h>
	37	#include <linux/io.h>
	38	#include <linux/uaccess.h>
780019dd	39	#include <linux/clk.h>
c283cf2c MC	40
c283cf2c MC	41	#include <asm/addrspace.h>
c5e7f5a3	42	#include <asm/mach-ar7/ar7.h>
c283cf2c	43
c283cf2c MC	44	#define LONGNAME "TI AR7 Watchdog Timer"
	45
	46	MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
	47	MODULE_DESCRIPTION(LONGNAME);
	48	MODULE_LICENSE("GPL");
	49	MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
	50
	51	static int margin = 60;
	52	module_param(margin, int, 0);
	53	MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
	54
86a1e189 WVS	55	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	56	module_param(nowayout, bool, 0);
c283cf2c MC	57	MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
	58
	59	#define READ_REG(x) readl((void __iomem *)&(x))
	60	#define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))
	61
	62	struct ar7_wdt {
	63	u32 kick_lock;
	64	u32 kick;
	65	u32 change_lock;
	66	u32 change;
	67	u32 disable_lock;
	68	u32 disable;
	69	u32 prescale_lock;
	70	u32 prescale;
	71	};
	72
670d59c0	73	static unsigned long wdt_is_open;
c283cf2c	74	static unsigned expect_close;
1334f329	75	static DEFINE_SPINLOCK(wdt_lock);
c283cf2c MC	76
	77	/* XXX currently fixed, allows max margin ~68.72 secs */
	78	#define prescale_value 0xffff
	79
64d4062a FF	80	/* Resource of the WDT registers */
64d4062a FF	81	static struct resource *ar7_regs_wdt;
c283cf2c MC	82	/* Pointer to the remapped WDT IO space */
c283cf2c MC	83	static struct ar7_wdt *ar7_wdt;
c283cf2c	84
780019dd FF	85	static struct clk *vbus_clk;
780019dd FF	86
c283cf2c MC	87	static void ar7_wdt_kick(u32 value)
	88	{
	89	WRITE_REG(ar7_wdt->kick_lock, 0x5555);
	90	if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) {
	91	WRITE_REG(ar7_wdt->kick_lock, 0xaaaa);
	92	if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) {
	93	WRITE_REG(ar7_wdt->kick, value);
	94	return;
	95	}
	96	}
27c766aa	97	pr_err("failed to unlock WDT kick reg\n");
c283cf2c MC	98	}
	99
	100	static void ar7_wdt_prescale(u32 value)
	101	{
	102	WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a);
	103	if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) {
	104	WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5);
	105	if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) {
	106	WRITE_REG(ar7_wdt->prescale, value);
	107	return;
	108	}
	109	}
27c766aa	110	pr_err("failed to unlock WDT prescale reg\n");
c283cf2c MC	111	}
	112
	113	static void ar7_wdt_change(u32 value)
	114	{
	115	WRITE_REG(ar7_wdt->change_lock, 0x6666);
	116	if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) {
	117	WRITE_REG(ar7_wdt->change_lock, 0xbbbb);
	118	if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) {
	119	WRITE_REG(ar7_wdt->change, value);
	120	return;
	121	}
	122	}
27c766aa	123	pr_err("failed to unlock WDT change reg\n");
c283cf2c MC	124	}
	125
	126	static void ar7_wdt_disable(u32 value)
	127	{
	128	WRITE_REG(ar7_wdt->disable_lock, 0x7777);
	129	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) {
	130	WRITE_REG(ar7_wdt->disable_lock, 0xcccc);
	131	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) {
	132	WRITE_REG(ar7_wdt->disable_lock, 0xdddd);
	133	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {
	134	WRITE_REG(ar7_wdt->disable, value);
	135	return;
	136	}
	137	}
	138	}
27c766aa	139	pr_err("failed to unlock WDT disable reg\n");
c283cf2c MC	140	}
	141
	142	static void ar7_wdt_update_margin(int new_margin)
	143	{
	144	u32 change;
780019dd	145	u32 vbus_rate;
c283cf2c	146
780019dd FF	147	vbus_rate = clk_get_rate(vbus_clk);
780019dd FF	148	change = new_margin * (vbus_rate / prescale_value);
670d59c0 AC	149	if (change < 1)
	150	change = 1;
	151	if (change > 0xffff)
	152	change = 0xffff;
c283cf2c	153	ar7_wdt_change(change);
780019dd	154	margin = change * prescale_value / vbus_rate;
27c766aa JP	155	pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n",
27c766aa JP	156	margin, prescale_value, change, vbus_rate);
c283cf2c MC	157	}
	158
	159	static void ar7_wdt_enable_wdt(void)
	160	{
27c766aa	161	pr_debug("enabling watchdog timer\n");
c283cf2c MC	162	ar7_wdt_disable(1);
	163	ar7_wdt_kick(1);
	164	}
	165
	166	static void ar7_wdt_disable_wdt(void)
	167	{
27c766aa	168	pr_debug("disabling watchdog timer\n");
c283cf2c MC	169	ar7_wdt_disable(0);
	170	}
	171
	172	static int ar7_wdt_open(struct inode inode, struct file file)
	173	{
	174	/* only allow one at a time */
670d59c0	175	if (test_and_set_bit(0, &wdt_is_open))
c283cf2c MC	176	return -EBUSY;
	177	ar7_wdt_enable_wdt();
	178	expect_close = 0;
	179
	180	return nonseekable_open(inode, file);
	181	}
	182
	183	static int ar7_wdt_release(struct inode inode, struct file file)
	184	{
	185	if (!expect_close)
27c766aa	186	pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n");
c283cf2c MC	187	else if (!nowayout)
c283cf2c MC	188	ar7_wdt_disable_wdt();
670d59c0	189	clear_bit(0, &wdt_is_open);
c283cf2c MC	190	return 0;
	191	}
	192
c283cf2c MC	193	static ssize_t ar7_wdt_write(struct file file, const char data,
	194	size_t len, loff_t *ppos)
	195	{
	196	/* check for a magic close character */
	197	if (len) {
	198	size_t i;
	199
670d59c0	200	spin_lock(&wdt_lock);
c283cf2c	201	ar7_wdt_kick(1);
670d59c0	202	spin_unlock(&wdt_lock);
c283cf2c MC	203
	204	expect_close = 0;
	205	for (i = 0; i < len; ++i) {
	206	char c;
7944d3a5	207	if (get_user(c, data + i))
c283cf2c MC	208	return -EFAULT;
	209	if (c == 'V')
	210	expect_close = 1;
	211	}
	212
	213	}
	214	return len;
	215	}
	216
670d59c0 AC	217	static long ar7_wdt_ioctl(struct file *file,
670d59c0 AC	218	unsigned int cmd, unsigned long arg)
c283cf2c	219	{
42747d71	220	static const struct watchdog_info ident = {
c283cf2c MC	221	.identity = LONGNAME,
c283cf2c MC	222	.firmware_version = 1,
e73a7802 WVS	223	.options = (WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \|
e73a7802 WVS	224	WDIOF_MAGICCLOSE),
c283cf2c MC	225	};
	226	int new_margin;
	227
	228	switch (cmd) {
c283cf2c MC	229	case WDIOC_GETSUPPORT:
	230	if (copy_to_user((struct watchdog_info *)arg, &ident,
	231	sizeof(ident)))
	232	return -EFAULT;
	233	return 0;
	234	case WDIOC_GETSTATUS:
	235	case WDIOC_GETBOOTSTATUS:
	236	if (put_user(0, (int *)arg))
	237	return -EFAULT;
	238	return 0;
	239	case WDIOC_KEEPALIVE:
	240	ar7_wdt_kick(1);
	241	return 0;
	242	case WDIOC_SETTIMEOUT:
	243	if (get_user(new_margin, (int *)arg))
	244	return -EFAULT;
	245	if (new_margin < 1)
	246	return -EINVAL;
	247
670d59c0	248	spin_lock(&wdt_lock);
c283cf2c MC	249	ar7_wdt_update_margin(new_margin);
c283cf2c MC	250	ar7_wdt_kick(1);
670d59c0	251	spin_unlock(&wdt_lock);
c283cf2c MC	252
	253	case WDIOC_GETTIMEOUT:
	254	if (put_user(margin, (int *)arg))
	255	return -EFAULT;
	256	return 0;
0c06090c WVS	257	default:
0c06090c WVS	258	return -ENOTTY;
c283cf2c MC	259	}
	260	}
	261
b47a166e	262	static const struct file_operations ar7_wdt_fops = {
c283cf2c MC	263	.owner = THIS_MODULE,
c283cf2c MC	264	.write = ar7_wdt_write,
670d59c0	265	.unlocked_ioctl = ar7_wdt_ioctl,
c283cf2c MC	266	.open = ar7_wdt_open,
c283cf2c MC	267	.release = ar7_wdt_release,
6038f373	268	.llseek = no_llseek,
c283cf2c MC	269	};
	270
	271	static struct miscdevice ar7_wdt_miscdev = {
	272	.minor = WATCHDOG_MINOR,
	273	.name = "watchdog",
	274	.fops = &ar7_wdt_fops,
	275	};
	276
2d991a16	277	static int ar7_wdt_probe(struct platform_device *pdev)
c283cf2c MC	278	{
	279	int rc;
	280
64d4062a FF	281	ar7_regs_wdt =
	282	platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
	283	if (!ar7_regs_wdt) {
27c766aa	284	pr_err("could not get registers resource\n");
ae21cc20	285	return -ENODEV;
c283cf2c MC	286	}
c283cf2c MC	287
4c271bb6 TR	288	ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
	289	if (IS_ERR(ar7_wdt))
	290	return PTR_ERR(ar7_wdt);
c283cf2c	291
780019dd FF	292	vbus_clk = clk_get(NULL, "vbus");
780019dd FF	293	if (IS_ERR(vbus_clk)) {
27c766aa	294	pr_err("could not get vbus clock\n");
ae21cc20	295	return PTR_ERR(vbus_clk);
780019dd FF	296	}
780019dd FF	297
c283cf2c MC	298	ar7_wdt_disable_wdt();
	299	ar7_wdt_prescale(prescale_value);
	300	ar7_wdt_update_margin(margin);
	301
c283cf2c MC	302	rc = misc_register(&ar7_wdt_miscdev);
c283cf2c MC	303	if (rc) {
27c766aa	304	pr_err("unable to register misc device\n");
ae21cc20	305	goto out;
c283cf2c	306	}
ae21cc20	307	return 0;
c283cf2c	308
c283cf2c	309	out:
ae21cc20 JL	310	clk_put(vbus_clk);
ae21cc20 JL	311	vbus_clk = NULL;
c283cf2c MC	312	return rc;
	313	}
	314
4b12b896	315	static int ar7_wdt_remove(struct platform_device *pdev)
c283cf2c MC	316	{
c283cf2c MC	317	misc_deregister(&ar7_wdt_miscdev);
ae21cc20 JL	318	clk_put(vbus_clk);
ae21cc20 JL	319	vbus_clk = NULL;
64d4062a FF	320	return 0;
	321	}
	322
	323	static void ar7_wdt_shutdown(struct platform_device *pdev)
	324	{
	325	if (!nowayout)
	326	ar7_wdt_disable_wdt();
	327	}
	328
	329	static struct platform_driver ar7_wdt_driver = {
	330	.probe = ar7_wdt_probe,
82268714	331	.remove = ar7_wdt_remove,
64d4062a FF	332	.shutdown = ar7_wdt_shutdown,
	333	.driver = {
	334	.owner = THIS_MODULE,
	335	.name = "ar7_wdt",
	336	},
	337	};
	338
b8ec6118	339	module_platform_driver(ar7_wdt_driver);