fbdev: sh_mobile_meram: Move private data from .h to .c
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / sh_mobile_meram.c
CommitLineData
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DHG
1/*
2 * SuperH Mobile MERAM Driver for SuperH Mobile LCDC Driver
3 *
4 * Copyright (c) 2011 Damian Hobson-Garcia <dhobsong@igel.co.jp>
5 * Takanari Hayama <taki@igel.co.jp>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/device.h>
17673778 15#include <linux/pm_runtime.h>
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DHG
16#include <linux/io.h>
17#include <linux/slab.h>
18#include <linux/platform_device.h>
19
20#include "sh_mobile_meram.h"
21
22/* meram registers */
23#define MExxCTL 0x0
24#define MExxBSIZE 0x4
25#define MExxMNCF 0x8
26#define MExxSARA 0x10
27#define MExxSARB 0x14
28#define MExxSBSIZE 0x18
29
30#define MERAM_MExxCTL_VAL(ctl, next_icb, addr) \
31 ((ctl) | (((next_icb) & 0x1f) << 11) | (((addr) & 0x7ff) << 16))
32#define MERAM_MExxBSIZE_VAL(a, b, c) \
33 (((a) << 28) | ((b) << 16) | (c))
34
35#define MEVCR1 0x4
36#define MEACTS 0x10
37#define MEQSEL1 0x40
38#define MEQSEL2 0x44
39
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DHG
40struct sh_mobile_meram_priv {
41 void __iomem *base;
42 struct mutex lock;
43 unsigned long used_icb;
44 int used_meram_cache_regions;
45 unsigned long used_meram_cache[SH_MOBILE_MERAM_ICB_NUM];
46};
47
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48/* settings */
49#define MERAM_SEC_LINE 15
50#define MERAM_LINE_WIDTH 2048
51
52/*
53 * MERAM/ICB access functions
54 */
55
56#define MERAM_ICB_OFFSET(base, idx, off) \
57 ((base) + (0x400 + ((idx) * 0x20) + (off)))
58
59static inline void meram_write_icb(void __iomem *base, int idx, int off,
60 unsigned long val)
61{
62 iowrite32(val, MERAM_ICB_OFFSET(base, idx, off));
63}
64
65static inline unsigned long meram_read_icb(void __iomem *base, int idx, int off)
66{
67 return ioread32(MERAM_ICB_OFFSET(base, idx, off));
68}
69
70static inline void meram_write_reg(void __iomem *base, int off,
71 unsigned long val)
72{
73 iowrite32(val, base + off);
74}
75
76static inline unsigned long meram_read_reg(void __iomem *base, int off)
77{
78 return ioread32(base + off);
79}
80
81/*
82 * register ICB
83 */
84
85#define MERAM_CACHE_START(p) ((p) >> 16)
86#define MERAM_CACHE_END(p) ((p) & 0xffff)
87#define MERAM_CACHE_SET(o, s) ((((o) & 0xffff) << 16) | \
88 (((o) + (s) - 1) & 0xffff))
89
90/*
91 * check if there's no overlaps in MERAM allocation.
92 */
93
94static inline int meram_check_overlap(struct sh_mobile_meram_priv *priv,
95 struct sh_mobile_meram_icb *new)
96{
97 int i;
98 int used_start, used_end, meram_start, meram_end;
99
100 /* valid ICB? */
101 if (new->marker_icb & ~0x1f || new->cache_icb & ~0x1f)
102 return 1;
103
104 if (test_bit(new->marker_icb, &priv->used_icb) ||
105 test_bit(new->cache_icb, &priv->used_icb))
106 return 1;
107
108 for (i = 0; i < priv->used_meram_cache_regions; i++) {
109 used_start = MERAM_CACHE_START(priv->used_meram_cache[i]);
110 used_end = MERAM_CACHE_END(priv->used_meram_cache[i]);
111 meram_start = new->meram_offset;
112 meram_end = new->meram_offset + new->meram_size;
113
114 if ((meram_start >= used_start && meram_start < used_end) ||
115 (meram_end > used_start && meram_end < used_end))
116 return 1;
117 }
118
119 return 0;
120}
121
122/*
123 * mark the specified ICB as used
124 */
125
126static inline void meram_mark(struct sh_mobile_meram_priv *priv,
127 struct sh_mobile_meram_icb *new)
128{
129 int n;
130
131 if (new->marker_icb < 0 || new->cache_icb < 0)
132 return;
133
134 __set_bit(new->marker_icb, &priv->used_icb);
135 __set_bit(new->cache_icb, &priv->used_icb);
136
137 n = priv->used_meram_cache_regions;
138
139 priv->used_meram_cache[n] = MERAM_CACHE_SET(new->meram_offset,
140 new->meram_size);
141
142 priv->used_meram_cache_regions++;
143}
144
145/*
146 * unmark the specified ICB as used
147 */
148
149static inline void meram_unmark(struct sh_mobile_meram_priv *priv,
150 struct sh_mobile_meram_icb *icb)
151{
152 int i;
153 unsigned long pattern;
154
155 if (icb->marker_icb < 0 || icb->cache_icb < 0)
156 return;
157
158 __clear_bit(icb->marker_icb, &priv->used_icb);
159 __clear_bit(icb->cache_icb, &priv->used_icb);
160
161 pattern = MERAM_CACHE_SET(icb->meram_offset, icb->meram_size);
162 for (i = 0; i < priv->used_meram_cache_regions; i++) {
163 if (priv->used_meram_cache[i] == pattern) {
164 while (i < priv->used_meram_cache_regions - 1) {
165 priv->used_meram_cache[i] =
166 priv->used_meram_cache[i + 1] ;
167 i++;
168 }
169 priv->used_meram_cache[i] = 0;
170 priv->used_meram_cache_regions--;
171 break;
172 }
173 }
174}
175
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176/*
177 * is this a YCbCr(NV12, NV16 or NV24) colorspace
178 */
179static inline int is_nvcolor(int cspace)
180{
181 if (cspace == SH_MOBILE_MERAM_PF_NV ||
182 cspace == SH_MOBILE_MERAM_PF_NV24)
183 return 1;
184 return 0;
185}
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186
187/*
188 * set the next address to fetch
189 */
190static inline void meram_set_next_addr(struct sh_mobile_meram_priv *priv,
191 struct sh_mobile_meram_cfg *cfg,
192 unsigned long base_addr_y,
193 unsigned long base_addr_c)
194{
195 unsigned long target;
196
197 target = (cfg->current_reg) ? MExxSARA : MExxSARB;
198 cfg->current_reg ^= 1;
199
200 /* set the next address to fetch */
201 meram_write_icb(priv->base, cfg->icb[0].cache_icb, target,
202 base_addr_y);
203 meram_write_icb(priv->base, cfg->icb[0].marker_icb, target,
204 base_addr_y + cfg->icb[0].cache_unit);
205
3fedd2ac 206 if (is_nvcolor(cfg->pixelformat)) {
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207 meram_write_icb(priv->base, cfg->icb[1].cache_icb, target,
208 base_addr_c);
209 meram_write_icb(priv->base, cfg->icb[1].marker_icb, target,
210 base_addr_c + cfg->icb[1].cache_unit);
211 }
212}
213
214/*
215 * get the next ICB address
216 */
217static inline void meram_get_next_icb_addr(struct sh_mobile_meram_info *pdata,
218 struct sh_mobile_meram_cfg *cfg,
219 unsigned long *icb_addr_y,
220 unsigned long *icb_addr_c)
221{
222 unsigned long icb_offset;
223
224 if (pdata->addr_mode == SH_MOBILE_MERAM_MODE0)
225 icb_offset = 0x80000000 | (cfg->current_reg << 29);
226 else
227 icb_offset = 0xc0000000 | (cfg->current_reg << 23);
228
229 *icb_addr_y = icb_offset | (cfg->icb[0].marker_icb << 24);
06c8a6a3 230 if (is_nvcolor(cfg->pixelformat))
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231 *icb_addr_c = icb_offset | (cfg->icb[1].marker_icb << 24);
232}
233
234#define MERAM_CALC_BYTECOUNT(x, y) \
235 (((x) * (y) + (MERAM_LINE_WIDTH - 1)) & ~(MERAM_LINE_WIDTH - 1))
236
237/*
238 * initialize MERAM
239 */
240
241static int meram_init(struct sh_mobile_meram_priv *priv,
242 struct sh_mobile_meram_icb *icb,
243 int xres, int yres, int *out_pitch)
244{
245 unsigned long total_byte_count = MERAM_CALC_BYTECOUNT(xres, yres);
246 unsigned long bnm;
247 int lcdc_pitch, xpitch, line_cnt;
248 int save_lines;
249
250 /* adjust pitch to 1024, 2048, 4096 or 8192 */
251 lcdc_pitch = (xres - 1) | 1023;
252 lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 1);
253 lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 2);
254 lcdc_pitch += 1;
255
256 /* derive settings */
257 if (lcdc_pitch == 8192 && yres >= 1024) {
258 lcdc_pitch = xpitch = MERAM_LINE_WIDTH;
259 line_cnt = total_byte_count >> 11;
260 *out_pitch = xres;
261 save_lines = (icb->meram_size / 16 / MERAM_SEC_LINE);
262 save_lines *= MERAM_SEC_LINE;
263 } else {
264 xpitch = xres;
265 line_cnt = yres;
266 *out_pitch = lcdc_pitch;
267 save_lines = icb->meram_size / (lcdc_pitch >> 10) / 2;
268 save_lines &= 0xff;
269 }
270 bnm = (save_lines - 1) << 16;
271
272 /* TODO: we better to check if we have enough MERAM buffer size */
273
274 /* set up ICB */
275 meram_write_icb(priv->base, icb->cache_icb, MExxBSIZE,
276 MERAM_MExxBSIZE_VAL(0x0, line_cnt - 1, xpitch - 1));
277 meram_write_icb(priv->base, icb->marker_icb, MExxBSIZE,
278 MERAM_MExxBSIZE_VAL(0xf, line_cnt - 1, xpitch - 1));
279
280 meram_write_icb(priv->base, icb->cache_icb, MExxMNCF, bnm);
281 meram_write_icb(priv->base, icb->marker_icb, MExxMNCF, bnm);
282
283 meram_write_icb(priv->base, icb->cache_icb, MExxSBSIZE, xpitch);
284 meram_write_icb(priv->base, icb->marker_icb, MExxSBSIZE, xpitch);
285
286 /* save a cache unit size */
287 icb->cache_unit = xres * save_lines;
288
289 /*
290 * Set MERAM for framebuffer
291 *
292 * 0x70f: WD = 0x3, WS=0x1, CM=0x1, MD=FB mode
293 * we also chain the cache_icb and the marker_icb.
294 * we also split the allocated MERAM buffer between two ICBs.
295 */
296 meram_write_icb(priv->base, icb->cache_icb, MExxCTL,
297 MERAM_MExxCTL_VAL(0x70f, icb->marker_icb,
298 icb->meram_offset));
299 meram_write_icb(priv->base, icb->marker_icb, MExxCTL,
300 MERAM_MExxCTL_VAL(0x70f, icb->cache_icb,
301 icb->meram_offset +
302 icb->meram_size / 2));
303
304 return 0;
305}
306
307static void meram_deinit(struct sh_mobile_meram_priv *priv,
308 struct sh_mobile_meram_icb *icb)
309{
310 /* disable ICB */
311 meram_write_icb(priv->base, icb->cache_icb, MExxCTL, 0);
312 meram_write_icb(priv->base, icb->marker_icb, MExxCTL, 0);
313 icb->cache_unit = 0;
314}
315
316/*
317 * register the ICB
318 */
319
320static int sh_mobile_meram_register(struct sh_mobile_meram_info *pdata,
321 struct sh_mobile_meram_cfg *cfg,
322 int xres, int yres, int pixelformat,
323 unsigned long base_addr_y,
324 unsigned long base_addr_c,
325 unsigned long *icb_addr_y,
326 unsigned long *icb_addr_c,
327 int *pitch)
328{
329 struct platform_device *pdev;
330 struct sh_mobile_meram_priv *priv;
331 int n, out_pitch;
332 int error = 0;
333
334 if (!pdata || !pdata->priv || !pdata->pdev || !cfg)
335 return -EINVAL;
336
337 if (pixelformat != SH_MOBILE_MERAM_PF_NV &&
3fedd2ac 338 pixelformat != SH_MOBILE_MERAM_PF_NV24 &&
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DHG
339 pixelformat != SH_MOBILE_MERAM_PF_RGB)
340 return -EINVAL;
341
342 priv = pdata->priv;
343 pdev = pdata->pdev;
344
345 dev_dbg(&pdev->dev, "registering %dx%d (%s) (y=%08lx, c=%08lx)",
346 xres, yres, (!pixelformat) ? "yuv" : "rgb",
347 base_addr_y, base_addr_c);
348
349 mutex_lock(&priv->lock);
350
351 /* we can't handle wider than 8192px */
352 if (xres > 8192) {
353 dev_err(&pdev->dev, "width exceeding the limit (> 8192).");
354 error = -EINVAL;
355 goto err;
356 }
357
358 if (priv->used_meram_cache_regions + 2 > SH_MOBILE_MERAM_ICB_NUM) {
359 dev_err(&pdev->dev, "no more ICB available.");
360 error = -EINVAL;
361 goto err;
362 }
363
364 /* do we have at least one ICB config? */
365 if (cfg->icb[0].marker_icb < 0 || cfg->icb[0].cache_icb < 0) {
366 dev_err(&pdev->dev, "at least one ICB is required.");
367 error = -EINVAL;
368 goto err;
369 }
370
371 /* make sure that there's no overlaps */
372 if (meram_check_overlap(priv, &cfg->icb[0])) {
373 dev_err(&pdev->dev, "conflicting config detected.");
374 error = -EINVAL;
375 goto err;
376 }
377 n = 1;
378
379 /* do the same if we have the second ICB set */
380 if (cfg->icb[1].marker_icb >= 0 && cfg->icb[1].cache_icb >= 0) {
381 if (meram_check_overlap(priv, &cfg->icb[1])) {
382 dev_err(&pdev->dev, "conflicting config detected.");
383 error = -EINVAL;
384 goto err;
385 }
386 n = 2;
387 }
388
3fedd2ac 389 if (is_nvcolor(pixelformat) && n != 2) {
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DHG
390 dev_err(&pdev->dev, "requires two ICB sets for planar Y/C.");
391 error = -EINVAL;
392 goto err;
393 }
394
395 /* we now register the ICB */
396 cfg->pixelformat = pixelformat;
397 meram_mark(priv, &cfg->icb[0]);
3fedd2ac 398 if (is_nvcolor(pixelformat))
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DHG
399 meram_mark(priv, &cfg->icb[1]);
400
401 /* initialize MERAM */
402 meram_init(priv, &cfg->icb[0], xres, yres, &out_pitch);
403 *pitch = out_pitch;
404 if (pixelformat == SH_MOBILE_MERAM_PF_NV)
405 meram_init(priv, &cfg->icb[1], xres, (yres + 1) / 2,
406 &out_pitch);
3fedd2ac
DHG
407 else if (pixelformat == SH_MOBILE_MERAM_PF_NV24)
408 meram_init(priv, &cfg->icb[1], 2 * xres, (yres + 1) / 2,
409 &out_pitch);
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DHG
410
411 cfg->current_reg = 1;
412 meram_set_next_addr(priv, cfg, base_addr_y, base_addr_c);
413 meram_get_next_icb_addr(pdata, cfg, icb_addr_y, icb_addr_c);
414
415 dev_dbg(&pdev->dev, "registered - can access via y=%08lx, c=%08lx",
416 *icb_addr_y, *icb_addr_c);
417
418err:
419 mutex_unlock(&priv->lock);
420 return error;
421}
422
423static int sh_mobile_meram_unregister(struct sh_mobile_meram_info *pdata,
424 struct sh_mobile_meram_cfg *cfg)
425{
426 struct sh_mobile_meram_priv *priv;
427
428 if (!pdata || !pdata->priv || !cfg)
429 return -EINVAL;
430
431 priv = pdata->priv;
432
433 mutex_lock(&priv->lock);
434
435 /* deinit & unmark */
3fedd2ac 436 if (is_nvcolor(cfg->pixelformat)) {
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DHG
437 meram_deinit(priv, &cfg->icb[1]);
438 meram_unmark(priv, &cfg->icb[1]);
439 }
440 meram_deinit(priv, &cfg->icb[0]);
441 meram_unmark(priv, &cfg->icb[0]);
442
443 mutex_unlock(&priv->lock);
444
445 return 0;
446}
447
448static int sh_mobile_meram_update(struct sh_mobile_meram_info *pdata,
449 struct sh_mobile_meram_cfg *cfg,
450 unsigned long base_addr_y,
451 unsigned long base_addr_c,
452 unsigned long *icb_addr_y,
453 unsigned long *icb_addr_c)
454{
455 struct sh_mobile_meram_priv *priv;
456
457 if (!pdata || !pdata->priv || !cfg)
458 return -EINVAL;
459
460 priv = pdata->priv;
461
462 mutex_lock(&priv->lock);
463
464 meram_set_next_addr(priv, cfg, base_addr_y, base_addr_c);
465 meram_get_next_icb_addr(pdata, cfg, icb_addr_y, icb_addr_c);
466
467 mutex_unlock(&priv->lock);
468
469 return 0;
470}
471
472static struct sh_mobile_meram_ops sh_mobile_meram_ops = {
473 .module = THIS_MODULE,
474 .meram_register = sh_mobile_meram_register,
475 .meram_unregister = sh_mobile_meram_unregister,
476 .meram_update = sh_mobile_meram_update,
477};
478
479/*
480 * initialize MERAM
481 */
482
483static int sh_mobile_meram_remove(struct platform_device *pdev);
484
485static int __devinit sh_mobile_meram_probe(struct platform_device *pdev)
486{
487 struct sh_mobile_meram_priv *priv;
488 struct sh_mobile_meram_info *pdata = pdev->dev.platform_data;
489 struct resource *res;
490 int error;
491
492 if (!pdata) {
493 dev_err(&pdev->dev, "no platform data defined\n");
494 return -EINVAL;
495 }
496
497 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
498 if (!res) {
499 dev_err(&pdev->dev, "cannot get platform resources\n");
500 return -ENOENT;
501 }
502
503 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
504 if (!priv) {
505 dev_err(&pdev->dev, "cannot allocate device data\n");
506 return -ENOMEM;
507 }
508
509 platform_set_drvdata(pdev, priv);
510
511 /* initialize private data */
512 mutex_init(&priv->lock);
513 priv->base = ioremap_nocache(res->start, resource_size(res));
514 if (!priv->base) {
515 dev_err(&pdev->dev, "ioremap failed\n");
516 error = -EFAULT;
517 goto err;
518 }
519 pdata->ops = &sh_mobile_meram_ops;
520 pdata->priv = priv;
521 pdata->pdev = pdev;
522
523 /* initialize ICB addressing mode */
524 if (pdata->addr_mode == SH_MOBILE_MERAM_MODE1)
525 meram_write_reg(priv->base, MEVCR1, 1 << 29);
526
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DHG
527 pm_runtime_enable(&pdev->dev);
528
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DHG
529 dev_info(&pdev->dev, "sh_mobile_meram initialized.");
530
531 return 0;
532
533err:
534 sh_mobile_meram_remove(pdev);
535
536 return error;
537}
538
539
540static int sh_mobile_meram_remove(struct platform_device *pdev)
541{
542 struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
543
17673778
DHG
544 pm_runtime_disable(&pdev->dev);
545
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DHG
546 if (priv->base)
547 iounmap(priv->base);
548
549 mutex_destroy(&priv->lock);
550
551 kfree(priv);
552
553 return 0;
554}
555
556static struct platform_driver sh_mobile_meram_driver = {
557 .driver = {
558 .name = "sh_mobile_meram",
559 .owner = THIS_MODULE,
560 },
561 .probe = sh_mobile_meram_probe,
562 .remove = sh_mobile_meram_remove,
563};
564
565static int __init sh_mobile_meram_init(void)
566{
567 return platform_driver_register(&sh_mobile_meram_driver);
568}
569
570static void __exit sh_mobile_meram_exit(void)
571{
572 platform_driver_unregister(&sh_mobile_meram_driver);
573}
574
575module_init(sh_mobile_meram_init);
576module_exit(sh_mobile_meram_exit);
577
578MODULE_DESCRIPTION("SuperH Mobile MERAM driver");
579MODULE_AUTHOR("Damian Hobson-Garcia / Takanari Hayama");
580MODULE_LICENSE("GPL v2");