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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / pvr2fb.c
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1da177e4
LT		 1/* drivers/video/pvr2fb.c
2 *
3 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega
4 * Dreamcast.
5 *
6 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>
7 * Copyright (c) 2001, 2002, 2003, 2004, 2005 Paul Mundt <lethal@linux-sh.org>
8 *
9 * This file is part of the LinuxDC project (linuxdc.sourceforge.net).
10 *
11 */
12
13/*
14 * This driver is mostly based on the excellent amifb and vfb sources. It uses
15 * an odd scheme for converting hardware values to/from framebuffer values,
16 * here are some hacked-up formulas:
17 *
18 * The Dreamcast has screen offsets from each side of its four borders and
19 * the start offsets of the display window. I used these values to calculate
20 * 'pseudo' values (think of them as placeholders) for the fb video mode, so
21 * that when it came time to convert these values back into their hardware
22 * values, I could just add mode- specific offsets to get the correct mode
23 * settings:
24 *
25 * left_margin = diwstart_h - borderstart_h;
26 * right_margin = borderstop_h - (diwstart_h + xres);
27 * upper_margin = diwstart_v - borderstart_v;
28 * lower_margin = borderstop_v - (diwstart_h + yres);
29 *
30 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
31 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
32 *
33 * Then, when it's time to convert back to hardware settings, the only
34 * constants are the borderstart_* offsets, all other values are derived from
35 * the fb video mode:
36 *
37 * // PAL
38 * borderstart_h = 116;
39 * borderstart_v = 44;
40 * ...
41 * borderstop_h = borderstart_h + hsync_total - hsync_len;
42 * ...
43 * diwstart_v = borderstart_v - upper_margin;
44 *
45 * However, in the current implementation, the borderstart values haven't had
46 * the benefit of being fully researched, so some modes may be broken.
47 */
48
49#undef DEBUG
50
51#include <linux/module.h>
52#include <linux/kernel.h>
53#include <linux/errno.h>
54#include <linux/string.h>
55#include <linux/mm.h>
1da177e4
LT		 56#include <linux/slab.h>
57#include <linux/delay.h>
1da177e4
LT		 58#include <linux/interrupt.h>
59#include <linux/fb.h>
60#include <linux/init.h>
61#include <linux/pci.h>
62
63#ifdef CONFIG_SH_DREAMCAST
64#include <asm/machvec.h>
65#include <asm/mach/sysasic.h>
66#endif
67
68#ifdef CONFIG_SH_DMA
69#include <linux/pagemap.h>
70#include <asm/mach/dma.h>
71#include <asm/dma.h>
72#endif
73
74#ifdef CONFIG_SH_STORE_QUEUES
75#include <asm/uaccess.h>
76#include <asm/cpu/sq.h>
77#endif
78
79#ifndef PCI_DEVICE_ID_NEC_NEON250
80# define PCI_DEVICE_ID_NEC_NEON250 0x0067
81#endif
82
83/* 2D video registers */
84#define DISP_BASE par->mmio_base
85#define DISP_BRDRCOLR (DISP_BASE + 0x40)
86#define DISP_DIWMODE (DISP_BASE + 0x44)
87#define DISP_DIWADDRL (DISP_BASE + 0x50)
88#define DISP_DIWADDRS (DISP_BASE + 0x54)
89#define DISP_DIWSIZE (DISP_BASE + 0x5c)
90#define DISP_SYNCCONF (DISP_BASE + 0xd0)
91#define DISP_BRDRHORZ (DISP_BASE + 0xd4)
92#define DISP_SYNCSIZE (DISP_BASE + 0xd8)
93#define DISP_BRDRVERT (DISP_BASE + 0xdc)
94#define DISP_DIWCONF (DISP_BASE + 0xe8)
95#define DISP_DIWHSTRT (DISP_BASE + 0xec)
96#define DISP_DIWVSTRT (DISP_BASE + 0xf0)
97
98/* Pixel clocks, one for TV output, doubled for VGA output */
99#define TV_CLK 74239
100#define VGA_CLK 37119
101
102/* This is for 60Hz - the VTOTAL is doubled for interlaced modes */
103#define PAL_HTOTAL 863
104#define PAL_VTOTAL 312
105#define NTSC_HTOTAL 857
106#define NTSC_VTOTAL 262
107
108/* Supported cable types */
109enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE };
110
111/* Supported video output types */
112enum { VO_PAL, VO_NTSC, VO_VGA };
113
114/* Supported palette types */
115enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 };
116
117struct pvr2_params { unsigned int val; char *name; };
118static struct pvr2_params cables[] __initdata = {
119 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" },
120};
121
122static struct pvr2_params outputs[] __initdata = {
123 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" },
124};
125
126/*
127 * This describes the current video mode
128 */
129
130static struct pvr2fb_par {
131 unsigned int hsync_total; /* Clocks/line */
132 unsigned int vsync_total; /* Lines/field */
133 unsigned int borderstart_h;
134 unsigned int borderstop_h;
135 unsigned int borderstart_v;
136 unsigned int borderstop_v;
137 unsigned int diwstart_h; /* Horizontal offset of the display field */
138 unsigned int diwstart_v; /* Vertical offset of the display field, for
139 interlaced modes, this is the long field */
140 unsigned long disp_start; /* Address of image within VRAM */
141 unsigned char is_interlaced; /* Is the display interlaced? */
142 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */
143 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */
144
145 unsigned long mmio_base; /* MMIO base */
146} *currentpar;
147
148static struct fb_info *fb_info;
149
150static struct fb_fix_screeninfo pvr2_fix __initdata = {
151 .id = "NEC PowerVR2",
152 .type = FB_TYPE_PACKED_PIXELS,
153 .visual = FB_VISUAL_TRUECOLOR,
154 .ypanstep = 1,
155 .ywrapstep = 1,
156 .accel = FB_ACCEL_NONE,
157};
158
159static struct fb_var_screeninfo pvr2_var __initdata = {
160 .xres = 640,
161 .yres = 480,
162 .xres_virtual = 640,
163 .yres_virtual = 480,
164 .bits_per_pixel =16,
165 .red = { 11, 5, 0 },
166 .green = { 5, 6, 0 },
167 .blue = { 0, 5, 0 },
168 .activate = FB_ACTIVATE_NOW,
169 .height = -1,
170 .width = -1,
171 .vmode = FB_VMODE_NONINTERLACED,
172};
173
174static int cable_type = CT_VGA;
175static int video_output = VO_VGA;
176
177static int nopan = 0;
178static int nowrap = 1;
179
180/*
181 * We do all updating, blanking, etc. during the vertical retrace period
182 */
183static unsigned int do_vmode_full = 0; /* Change the video mode */
184static unsigned int do_vmode_pan = 0; /* Update the video mode */
185static short do_blank = 0; /* (Un)Blank the screen */
186
187static unsigned int is_blanked = 0; /* Is the screen blanked? */
188
189#ifdef CONFIG_SH_STORE_QUEUES
d2b06a8b 190static unsigned long pvr2fb_map;
1da177e4
LT		 191#endif
192
193#ifdef CONFIG_SH_DMA
194static unsigned int shdma = PVR2_CASCADE_CHAN;
195static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS;
196#endif
197
198/* Interface used by the world */
199
200int pvr2fb_setup(char*);
201
202static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue,
203 unsigned int transp, struct fb_info *info);
204static int pvr2fb_blank(int blank, struct fb_info *info);
205static unsigned long get_line_length(int xres_virtual, int bpp);
206static void set_color_bitfields(struct fb_var_screeninfo *var);
207static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
208static int pvr2fb_set_par(struct fb_info *info);
209static void pvr2_update_display(struct fb_info *info);
210static void pvr2_init_display(struct fb_info *info);
211static void pvr2_do_blank(void);
7d12e780 212static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id);
1da177e4
LT		 213static int pvr2_init_cable(void);
214static int pvr2_get_param(const struct pvr2_params *p, const char *s,
215 int val, int size);
d2b06a8b 216#ifdef CONFIG_SH_DMA
1da177e4
LT		 217static ssize_t pvr2fb_write(struct file *file, const char *buf,
218 size_t count, loff_t *ppos);
d2b06a8b 219#endif
1da177e4
LT		 220
221static struct fb_ops pvr2fb_ops = {
d2b06a8b
PM		 222 .owner = THIS_MODULE,
223 .fb_setcolreg = pvr2fb_setcolreg,
224 .fb_blank = pvr2fb_blank,
225 .fb_check_var = pvr2fb_check_var,
226 .fb_set_par = pvr2fb_set_par,
1da177e4
LT		 227#ifdef CONFIG_SH_DMA
228 .fb_write = pvr2fb_write,
229#endif
230 .fb_fillrect = cfb_fillrect,
231 .fb_copyarea = cfb_copyarea,
232 .fb_imageblit = cfb_imageblit,
1da177e4
LT		 233};
234
235static struct fb_videomode pvr2_modedb[] __initdata = {
236 /*
237 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with
238 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and
239 * NTSC, so it shouldn't be a problem (I hope).
240 */
241
242 {
243 /* 640x480 @ 60Hz interlaced (NTSC) */
244 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26,
245 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP
246 }, {
247 /* 640x240 @ 60Hz (NTSC) */
248 /* XXX: Broken! Don't use... */
249 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22,
250 FB_SYNC_BROADCAST, FB_VMODE_YWRAP
251 }, {
252 /* 640x480 @ 60hz (VGA) */
253 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26,
254 0, FB_VMODE_YWRAP
255 },
256};
257
258#define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb)
259
260#define DEFMODE_NTSC 0
261#define DEFMODE_PAL 0
262#define DEFMODE_VGA 2
263
264static int defmode = DEFMODE_NTSC;
265static char *mode_option __initdata = NULL;
266
267static inline void pvr2fb_set_pal_type(unsigned int type)
268{
269 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par;
270
271 fb_writel(type, par->mmio_base + 0x108);
272}
273
274static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par,
275 unsigned int regno,
276 unsigned int val)
277{
278 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));
279}
280
281static int pvr2fb_blank(int blank, struct fb_info *info)
282{
283 do_blank = blank ? blank : -1;
284 return 0;
285}
286
287static inline unsigned long get_line_length(int xres_virtual, int bpp)
288{
289 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3);
290}
291
292static void set_color_bitfields(struct fb_var_screeninfo *var)
293{
294 switch (var->bits_per_pixel) {
295 case 16: /* RGB 565 */
296 pvr2fb_set_pal_type(PAL_RGB565);
297 var->red.offset = 11; var->red.length = 5;
298 var->green.offset = 5; var->green.length = 6;
299 var->blue.offset = 0; var->blue.length = 5;
300 var->transp.offset = 0; var->transp.length = 0;
301 break;
302 case 24: /* RGB 888 */
303 var->red.offset = 16; var->red.length = 8;
304 var->green.offset = 8; var->green.length = 8;
305 var->blue.offset = 0; var->blue.length = 8;
306 var->transp.offset = 0; var->transp.length = 0;
307 break;
308 case 32: /* ARGB 8888 */
309 pvr2fb_set_pal_type(PAL_ARGB8888);
310 var->red.offset = 16; var->red.length = 8;
311 var->green.offset = 8; var->green.length = 8;
312 var->blue.offset = 0; var->blue.length = 8;
313 var->transp.offset = 24; var->transp.length = 8;
314 break;
315 }
316}
317
318static int pvr2fb_setcolreg(unsigned int regno, unsigned int red,
319 unsigned int green, unsigned int blue,
320 unsigned int transp, struct fb_info *info)
321{
322 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
323 unsigned int tmp;
324
325 if (regno > info->cmap.len)
326 return 1;
327
328 /*
329 * We only support the hardware palette for 16 and 32bpp. It's also
330 * expected that the palette format has been set by the time we get
331 * here, so we don't waste time setting it again.
332 */
333 switch (info->var.bits_per_pixel) {
334 case 16: /* RGB 565 */
335 tmp = (red & 0xf800) |
336 ((green & 0xfc00) >> 5) |
337 ((blue & 0xf800) >> 11);
338
339 pvr2fb_set_pal_entry(par, regno, tmp);
340 ((u16*)(info->pseudo_palette))[regno] = tmp;
341 break;
342 case 24: /* RGB 888 */
343 red >>= 8; green >>= 8; blue >>= 8;
344 ((u32*)(info->pseudo_palette))[regno] = (red << 16) | (green << 8) | blue;
345 break;
346 case 32: /* ARGB 8888 */
347 red >>= 8; green >>= 8; blue >>= 8;
348 tmp = (transp << 24) | (red << 16) | (green << 8) | blue;
349
350 pvr2fb_set_pal_entry(par, regno, tmp);
351 ((u32*)(info->pseudo_palette))[regno] = tmp;
352 break;
353 default:
354 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel);
355 return 1;
356 }
357
358 return 0;
359}
360
361static int pvr2fb_set_par(struct fb_info *info)
362{
363 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
364 struct fb_var_screeninfo *var = &info->var;
365 unsigned long line_length;
366 unsigned int vtotal;
367
368 /*
369 * XXX: It's possible that a user could use a VGA box, change the cable
370 * type in hardware (i.e. switch from VGA<->composite), then change
371 * modes (i.e. switching to another VT). If that happens we should
372 * automagically change the output format to cope, but currently I
373 * don't have a VGA box to make sure this works properly.
374 */
375 cable_type = pvr2_init_cable();
376 if (cable_type == CT_VGA && video_output != VO_VGA)
377 video_output = VO_VGA;
378
379 var->vmode &= FB_VMODE_MASK;
380 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA)
381 par->is_interlaced = 1;
382 /*
383 * XXX: Need to be more creative with this (i.e. allow doublecan for
384 * PAL/NTSC output).
385 */
386 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA)
387 par->is_doublescan = 1;
388
389 par->hsync_total = var->left_margin + var->xres + var->right_margin +
390 var->hsync_len;
391 par->vsync_total = var->upper_margin + var->yres + var->lower_margin +
392 var->vsync_len;
393
394 if (var->sync & FB_SYNC_BROADCAST) {
395 vtotal = par->vsync_total;
396 if (par->is_interlaced)
397 vtotal /= 2;
398 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
399 /* XXX: Check for start values here... */
400 /* XXX: Check hardware for PAL-compatibility */
401 par->borderstart_h = 116;
402 par->borderstart_v = 44;
403 } else {
404 /* NTSC video output */
405 par->borderstart_h = 126;
406 par->borderstart_v = 18;
407 }
408 } else {
409 /* VGA mode */
410 /* XXX: What else needs to be checked? */
411 /*
412 * XXX: We have a little freedom in VGA modes, what ranges
413 * should be here (i.e. hsync/vsync totals, etc.)?
414 */
415 par->borderstart_h = 126;
416 par->borderstart_v = 40;
417 }
418
419 /* Calculate the remainding offsets */
420 par->diwstart_h = par->borderstart_h + var->left_margin;
421 par->diwstart_v = par->borderstart_v + var->upper_margin;
422 par->borderstop_h = par->diwstart_h + var->xres +
423 var->right_margin;
424 par->borderstop_v = par->diwstart_v + var->yres +
425 var->lower_margin;
426
427 if (!par->is_interlaced)
428 par->borderstop_v /= 2;
429 if (info->var.xres < 640)
430 par->is_lowres = 1;
431
432 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
433 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length;
434 info->fix.line_length = line_length;
435 return 0;
436}
437
438static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
439{
440 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
441 unsigned int vtotal, hsync_total;
442 unsigned long line_length;
443
444 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) {
445 pr_debug("Invalid pixclock value %d\n", var->pixclock);
446 return -EINVAL;
447 }
448
449 if (var->xres < 320)
450 var->xres = 320;
451 if (var->yres < 240)
452 var->yres = 240;
453 if (var->xres_virtual < var->xres)
454 var->xres_virtual = var->xres;
455 if (var->yres_virtual < var->yres)
456 var->yres_virtual = var->yres;
457
458 if (var->bits_per_pixel <= 16)
459 var->bits_per_pixel = 16;
460 else if (var->bits_per_pixel <= 24)
461 var->bits_per_pixel = 24;
462 else if (var->bits_per_pixel <= 32)
463 var->bits_per_pixel = 32;
464
465 set_color_bitfields(var);
466
467 if (var->vmode & FB_VMODE_YWRAP) {
468 if (var->xoffset || var->yoffset < 0 ||
469 var->yoffset >= var->yres_virtual) {
470 var->xoffset = var->yoffset = 0;
471 } else {
472 if (var->xoffset > var->xres_virtual - var->xres ||
473 var->yoffset > var->yres_virtual - var->yres ||
474 var->xoffset < 0 || var->yoffset < 0)
475 var->xoffset = var->yoffset = 0;
476 }
477 } else {
478 var->xoffset = var->yoffset = 0;
479 }
480
481 /*
482 * XXX: Need to be more creative with this (i.e. allow doublecan for
483 * PAL/NTSC output).
484 */
485 if (var->yres < 480 && video_output == VO_VGA)
486 var->vmode |= FB_VMODE_DOUBLE;
487
488 if (video_output != VO_VGA) {
489 var->sync |= FB_SYNC_BROADCAST;
490 var->vmode |= FB_VMODE_INTERLACED;
491 } else {
492 var->sync &= ~FB_SYNC_BROADCAST;
493 var->vmode &= ~FB_VMODE_INTERLACED;
494 var->vmode |= pvr2_var.vmode;
495 }
496
497 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) {
498 var->right_margin = par->borderstop_h -
499 (par->diwstart_h + var->xres);
500 var->left_margin = par->diwstart_h - par->borderstart_h;
501 var->hsync_len = par->borderstart_h +
502 (par->hsync_total - par->borderstop_h);
503
504 var->upper_margin = par->diwstart_v - par->borderstart_v;
505 var->lower_margin = par->borderstop_v -
506 (par->diwstart_v + var->yres);
507 var->vsync_len = par->borderstop_v +
508 (par->vsync_total - par->borderstop_v);
509 }
510
511 hsync_total = var->left_margin + var->xres + var->right_margin +
512 var->hsync_len;
513 vtotal = var->upper_margin + var->yres + var->lower_margin +
514 var->vsync_len;
515
516 if (var->sync & FB_SYNC_BROADCAST) {
517 if (var->vmode & FB_VMODE_INTERLACED)
518 vtotal /= 2;
519 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
520 /* PAL video output */
521 /* XXX: Should be using a range here ... ? */
522 if (hsync_total != PAL_HTOTAL) {
523 pr_debug("invalid hsync total for PAL\n");
524 return -EINVAL;
525 }
526 } else {
527 /* NTSC video output */
528 if (hsync_total != NTSC_HTOTAL) {
529 pr_debug("invalid hsync total for NTSC\n");
530 return -EINVAL;
531 }
532 }
533 }
534
535 /* Check memory sizes */
536 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
537 if (line_length * var->yres_virtual > info->fix.smem_len)
538 return -ENOMEM;
539
540 return 0;
541}
542
543static void pvr2_update_display(struct fb_info *info)
544{
545 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
546 struct fb_var_screeninfo *var = &info->var;
547
548 /* Update the start address of the display image */
549 fb_writel(par->disp_start, DISP_DIWADDRL);
550 fb_writel(par->disp_start +
551 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
552 DISP_DIWADDRS);
553}
554
555/*
556 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't
557 * very stable. It's probably due to the fact that a lot of the 2D video
558 * registers are still undocumented.
559 */
560
561static void pvr2_init_display(struct fb_info *info)
562{
563 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
564 struct fb_var_screeninfo *var = &info->var;
565 unsigned int diw_height, diw_width, diw_modulo = 1;
566 unsigned int bytesperpixel = var->bits_per_pixel >> 3;
567
568 /* hsync and vsync totals */
569 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE);
570
571 /* column height, modulo, row width */
572 /* since we're "panning" within vram, we need to offset things based
573 * on the offset from the virtual x start to our real gfx. */
574 if (video_output != VO_VGA && par->is_interlaced)
575 diw_modulo += info->fix.line_length / 4;
576 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres);
577 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4;
578 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width,
579 DISP_DIWSIZE);
580
581 /* display address, long and short fields */
582 fb_writel(par->disp_start, DISP_DIWADDRL);
583 fb_writel(par->disp_start +
584 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
585 DISP_DIWADDRS);
586
587 /* border horizontal, border vertical, border color */
588 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ);
589 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT);
590 fb_writel(0, DISP_BRDRCOLR);
591
592 /* display window start position */
593 fb_writel(par->diwstart_h, DISP_DIWHSTRT);
594 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT);
595
596 /* misc. settings */
597 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF);
598
599 /* clock doubler (for VGA), scan doubler, display enable */
600 fb_writel(((video_output == VO_VGA) << 23) |
601 (par->is_doublescan << 1) | 1, DISP_DIWMODE);
602
603 /* bits per pixel */
604 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE);
605
606 /* video enable, color sync, interlace,
607 * hsync and vsync polarity (currently unused) */
608 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF);
609}
610
611/* Simulate blanking by making the border cover the entire screen */
612
613#define BLANK_BIT (1<<3)
614
615static void pvr2_do_blank(void)
616{
617 struct pvr2fb_par *par = currentpar;
618 unsigned long diwconf;
619
620 diwconf = fb_readl(DISP_DIWCONF);
621 if (do_blank > 0)
622 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF);
623 else
624 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF);
625
626 is_blanked = do_blank > 0 ? do_blank : 0;
627}
628
7d12e780 629static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id)
1da177e4
LT		 630{
631 struct fb_info *info = dev_id;
632
633 if (do_vmode_pan || do_vmode_full)
634 pvr2_update_display(info);
635 if (do_vmode_full)
636 pvr2_init_display(info);
637 if (do_vmode_pan)
638 do_vmode_pan = 0;
639 if (do_vmode_full)
640 do_vmode_full = 0;
641 if (do_blank) {
642 pvr2_do_blank();
643 do_blank = 0;
644 }
645 return IRQ_HANDLED;
646}
647
648/*
649 * Determine the cable type and initialize the cable output format. Don't do
650 * anything if the cable type has been overidden (via "cable:XX").
651 */
652
653#define PCTRA 0xff80002c
654#define PDTRA 0xff800030
655#define VOUTC 0xa0702c00
656
657static int pvr2_init_cable(void)
658{
659 if (cable_type < 0) {
660 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000,
661 PCTRA);
662 cable_type = (fb_readw(PDTRA) >> 8) & 3;
663 }
664
665 /* Now select the output format (either composite or other) */
666 /* XXX: Save the previous val first, as this reg is also AICA
667 related */
668 if (cable_type == CT_COMPOSITE)
669 fb_writel(3 << 8, VOUTC);
670 else
671 fb_writel(0, VOUTC);
672
673 return cable_type;
674}
675
676#ifdef CONFIG_SH_DMA
677static ssize_t pvr2fb_write(struct file *file, const char *buf,
678 size_t count, loff_t *ppos)
679{
680 unsigned long dst, start, end, len;
681 unsigned int nr_pages;
682 struct page **pages;
683 int ret, i;
684
685 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT;
686
687 pages = kmalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
688 if (!pages)
689 return -ENOMEM;
690
691 down_read(&current->mm->mmap_sem);
692 ret = get_user_pages(current, current->mm, (unsigned long)buf,
693 nr_pages, WRITE, 0, pages, NULL);
694 up_read(&current->mm->mmap_sem);
695
696 if (ret < nr_pages) {
697 nr_pages = ret;
698 ret = -EINVAL;
699 goto out_unmap;
700 }
701
702 dma_configure_channel(shdma, 0x12c1);
703
704 dst = (unsigned long)fb_info->screen_base + *ppos;
705 start = (unsigned long)page_address(pages[0]);
706 end = (unsigned long)page_address(pages[nr_pages]);
707 len = nr_pages << PAGE_SHIFT;
708
709 /* Half-assed contig check */
710 if (start + len == end) {
711 /* As we do this in one shot, it's either all or nothing.. */
712 if ((*ppos + len) > fb_info->fix.smem_len) {
713 ret = -ENOSPC;
714 goto out_unmap;
715 }
716
717 dma_write(shdma, start, 0, len);
718 dma_write(pvr2dma, 0, dst, len);
719 dma_wait_for_completion(pvr2dma);
720
721 goto out;
722 }
723
724 /* Not contiguous, writeout per-page instead.. */
725 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) {
726 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) {
727 ret = -ENOSPC;
728 goto out_unmap;
729 }
730
731 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0);
732 dma_write_page(pvr2dma, 0, dst);
733 dma_wait_for_completion(pvr2dma);
734 }
735
736out:
737 *ppos += count;
738 ret = count;
739
740out_unmap:
741 for (i = 0; i < nr_pages; i++)
742 page_cache_release(pages[i]);
743
744 kfree(pages);
745
746 return ret;
747}
748#endif /* CONFIG_SH_DMA */
749
750/**
751 * pvr2fb_common_init
752 *
753 * Common init code for the PVR2 chips.
754 *
755 * This mostly takes care of the common aspects of the fb setup and
756 * registration. It's expected that the board-specific init code has
757 * already setup pvr2_fix with something meaningful at this point.
758 *
759 * Device info reporting is also done here, as well as picking a sane
760 * default from the modedb. For board-specific modelines, simply define
761 * a per-board modedb.
762 *
763 * Also worth noting is that the cable and video output types are likely
764 * always going to be VGA for the PCI-based PVR2 boards, but we leave this
765 * in for flexibility anyways. Who knows, maybe someone has tv-out on a
766 * PCI-based version of these things ;-)
767 */
768static int __init pvr2fb_common_init(void)
769{
770 struct pvr2fb_par *par = currentpar;
771 unsigned long modememused, rev;
772
773 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start,
774 pvr2_fix.smem_len);
775
776 if (!fb_info->screen_base) {
777 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n");
778 goto out_err;
779 }
780
781 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start,
782 pvr2_fix.mmio_len);
783 if (!par->mmio_base) {
784 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n");
785 goto out_err;
786 }
787
d2b06a8b 788 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len);
1da177e4
LT		 789
790 pvr2_fix.ypanstep = nopan ? 0 : 1;
791 pvr2_fix.ywrapstep = nowrap ? 0 : 1;
792
793 fb_info->fbops = &pvr2fb_ops;
794 fb_info->fix = pvr2_fix;
795 fb_info->par = currentpar;
796 fb_info->pseudo_palette = (void *)(fb_info->par + 1);
797 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
798
799 if (video_output == VO_VGA)
800 defmode = DEFMODE_VGA;
801
802 if (!mode_option)
803 mode_option = "640x480@60";
804
805 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb,
806 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16))
807 fb_info->var = pvr2_var;
808
809 fb_alloc_cmap(&fb_info->cmap, 256, 0);
810
811 if (register_framebuffer(fb_info) < 0)
812 goto out_err;
813
814 modememused = get_line_length(fb_info->var.xres_virtual,
815 fb_info->var.bits_per_pixel);
816 modememused *= fb_info->var.yres_virtual;
817
818 rev = fb_readl(par->mmio_base + 0x04);
819
820 printk("fb%d: %s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n",
821 fb_info->node, fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f,
822 modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10));
823 printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",
824 fb_info->node, fb_info->var.xres, fb_info->var.yres,
d2b06a8b 825 fb_info->var.bits_per_pixel,
1da177e4
LT		 826 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),
827 (char *)pvr2_get_param(cables, NULL, cable_type, 3),
828 (char *)pvr2_get_param(outputs, NULL, video_output, 3));
829
830#ifdef CONFIG_SH_STORE_QUEUES
831 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node);
832
833 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
d2b06a8b 834 fb_info->fix.id, pgprot_val(PAGE_SHARED));
1da177e4
LT		 835
836 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n",
d2b06a8b 837 fb_info->node, pvr2fb_map);
1da177e4
LT		 838#endif
839
840 return 0;
841
842out_err:
843 if (fb_info->screen_base)
844 iounmap(fb_info->screen_base);
845 if (par->mmio_base)
846 iounmap((void *)par->mmio_base);
847
848 return -ENXIO;
849}
850
851#ifdef CONFIG_SH_DREAMCAST
852static int __init pvr2fb_dc_init(void)
853{
854 if (!mach_is_dreamcast())
855 return -ENXIO;
856
857 /* Make a guess at the monitor based on the attached cable */
858 if (pvr2_init_cable() == CT_VGA) {
859 fb_info->monspecs.hfmin = 30000;
860 fb_info->monspecs.hfmax = 70000;
861 fb_info->monspecs.vfmin = 60;
862 fb_info->monspecs.vfmax = 60;
863 } else {
864 /* Not VGA, using a TV (taken from acornfb) */
865 fb_info->monspecs.hfmin = 15469;
866 fb_info->monspecs.hfmax = 15781;
867 fb_info->monspecs.vfmin = 49;
868 fb_info->monspecs.vfmax = 51;
869 }
870
871 /*
872 * XXX: This needs to pull default video output via BIOS or other means
873 */
874 if (video_output < 0) {
875 if (cable_type == CT_VGA) {
876 video_output = VO_VGA;
877 } else {
878 video_output = VO_NTSC;
879 }
880 }
881
882 /*
883 * Nothing exciting about the DC PVR2 .. only a measly 8MiB.
884 */
885 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */
886 pvr2_fix.smem_len = 8 << 20;
887
888 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */
889 pvr2_fix.mmio_len = 0x2000;
890
891 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, 0,
892 "pvr2 VBL handler", fb_info)) {
893 return -EBUSY;
894 }
895
896#ifdef CONFIG_SH_DMA
897 if (request_dma(pvr2dma, "pvr2") != 0) {
898 free_irq(HW_EVENT_VSYNC, 0);
899 return -EBUSY;
900 }
901#endif
902
903 return pvr2fb_common_init();
904}
905
906static void pvr2fb_dc_exit(void)
907{
908 free_irq(HW_EVENT_VSYNC, 0);
909#ifdef CONFIG_SH_DMA
910 free_dma(pvr2dma);
911#endif
912}
913#endif /* CONFIG_SH_DREAMCAST */
914
915#ifdef CONFIG_PCI
916static int __devinit pvr2fb_pci_probe(struct pci_dev *pdev,
917 const struct pci_device_id *ent)
918{
919 int ret;
920
921 ret = pci_enable_device(pdev);
922 if (ret) {
923 printk(KERN_ERR "pvr2fb: PCI enable failed\n");
924 return ret;
925 }
926
927 ret = pci_request_regions(pdev, "pvr2fb");
928 if (ret) {
929 printk(KERN_ERR "pvr2fb: PCI request regions failed\n");
930 return ret;
931 }
932
933 /*
934 * Slightly more exciting than the DC PVR2 .. 16MiB!
935 */
936 pvr2_fix.smem_start = pci_resource_start(pdev, 0);
937 pvr2_fix.smem_len = pci_resource_len(pdev, 0);
938
939 pvr2_fix.mmio_start = pci_resource_start(pdev, 1);
940 pvr2_fix.mmio_len = pci_resource_len(pdev, 1);
941
942 fb_info->device = &pdev->dev;
943
944 return pvr2fb_common_init();
945}
946
947static void __devexit pvr2fb_pci_remove(struct pci_dev *pdev)
948{
949 pci_release_regions(pdev);
950}
951
952static struct pci_device_id pvr2fb_pci_tbl[] __devinitdata = {
953 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250,
954 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
955 { 0, },
956};
957
958MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl);
959
960static struct pci_driver pvr2fb_pci_driver = {
961 .name = "pvr2fb",
962 .id_table = pvr2fb_pci_tbl,
963 .probe = pvr2fb_pci_probe,
964 .remove = __devexit_p(pvr2fb_pci_remove),
965};
966
967static int __init pvr2fb_pci_init(void)
968{
969 return pci_register_driver(&pvr2fb_pci_driver);
970}
971
972static void pvr2fb_pci_exit(void)
973{
974 pci_unregister_driver(&pvr2fb_pci_driver);
975}
976#endif /* CONFIG_PCI */
977
978static int __init pvr2_get_param(const struct pvr2_params *p, const char *s,
979 int val, int size)
980{
981 int i;
982
983 for (i = 0 ; i < size ; i++ ) {
984 if (s != NULL) {
985 if (!strnicmp(p[i].name, s, strlen(s)))
986 return p[i].val;
987 } else {
988 if (p[i].val == val)
989 return (int)p[i].name;
990 }
991 }
992 return -1;
993}
994
995/*
996 * Parse command arguments. Supported arguments are:
997 * inverse Use inverse color maps
998 * cable:composite|rgb|vga Override the video cable type
999 * output:NTSC|PAL|VGA Override the video output format
1000 *
1001 * <xres>x<yres>[-<bpp>][@<refresh>] or,
1002 * <name>[-<bpp>][@<refresh>] Startup using this video mode
1003 */
1004
1005#ifndef MODULE
1006int __init pvr2fb_setup(char *options)
1007{
1008 char *this_opt;
1009 char cable_arg[80];
1010 char output_arg[80];
1011
1012 if (!options || !*options)
1013 return 0;
1014
1015 while ((this_opt = strsep(&options, ","))) {
1016 if (!*this_opt)
1017 continue;
1018 if (!strcmp(this_opt, "inverse")) {
1019 fb_invert_cmaps();
1020 } else if (!strncmp(this_opt, "cable:", 6)) {
1021 strcpy(cable_arg, this_opt + 6);
1022 } else if (!strncmp(this_opt, "output:", 7)) {
1023 strcpy(output_arg, this_opt + 7);
1024 } else if (!strncmp(this_opt, "nopan", 5)) {
1025 nopan = 1;
1026 } else if (!strncmp(this_opt, "nowrap", 6)) {
1027 nowrap = 1;
1028 } else {
1029 mode_option = this_opt;
1030 }
1031 }
1032
1033 if (*cable_arg)
1034 cable_type = pvr2_get_param(cables, cable_arg, 0, 3);
1035 if (*output_arg)
1036 video_output = pvr2_get_param(outputs, output_arg, 0, 3);
1037
1038 return 0;
1039}
1040#endif
1041
1042static struct pvr2_board {
1043 int (*init)(void);
1044 void (*exit)(void);
1045 char name[16];
1046} board_list[] = {
1047#ifdef CONFIG_SH_DREAMCAST
1048 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },
1049#endif
1050#ifdef CONFIG_PCI
1051 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" },
1052#endif
1053 { 0, },
1054};
1055
1056int __init pvr2fb_init(void)
1057{
1058 int i, ret = -ENODEV;
1059 int size;
1060
1061#ifndef MODULE
1062 char *option = NULL;
1063
1064 if (fb_get_options("pvr2fb", &option))
1065 return -ENODEV;
1066 pvr2fb_setup(option);
1067#endif
1068 size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32);
1069
1070 fb_info = kmalloc(size, GFP_KERNEL);
1071 if (!fb_info) {
1072 printk(KERN_ERR "Failed to allocate memory for fb_info\n");
1073 return -ENOMEM;
1074 }
1075
1076 memset(fb_info, 0, size);
1077
1078 currentpar = (struct pvr2fb_par *)(fb_info + 1);
1079
1080 for (i = 0; i < ARRAY_SIZE(board_list); i++) {
1081 struct pvr2_board *pvr_board = board_list + i;
1082
1083 if (!pvr_board->init)
1084 continue;
1085
1086 ret = pvr_board->init();
1087
1088 if (ret != 0) {
1089 printk(KERN_ERR "pvr2fb: Failed init of %s device\n",
1090 pvr_board->name);
1091 kfree(fb_info);
1092 break;
1093 }
1094 }
1095
1096 return ret;
1097}
1098
1099static void __exit pvr2fb_exit(void)
1100{
1101 int i;
1102
1103 for (i = 0; i < ARRAY_SIZE(board_list); i++) {
1104 struct pvr2_board *pvr_board = board_list + i;
1105
1106 if (pvr_board->exit)
1107 pvr_board->exit();
1108 }
1109
1110#ifdef CONFIG_SH_STORE_QUEUES
1111 sq_unmap(pvr2fb_map);
1112#endif
1113
1114 unregister_framebuffer(fb_info);
1115 kfree(fb_info);
1116}
1117
1118module_init(pvr2fb_init);
1119module_exit(pvr2fb_exit);
1120
1121MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
1122MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards");
1123MODULE_LICENSE("GPL");
1124
kernel source for telekom puls (alcatel/mediatek)