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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / video / bfin_adv7393fb.c
CommitLineData
cffd9348
MH		 1/*
2 * Frame buffer driver for ADV7393/2 video encoder
3 *
4 * Copyright 2006-2009 Analog Devices Inc.
5 * Licensed under the GPL-2 or late.
6 */
7
8/*
9 * TODO: Remove Globals
10 * TODO: Code Cleanup
11 */
12
13#define pr_fmt(fmt) DRIVER_NAME ": " fmt
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/errno.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/tty.h>
21#include <linux/slab.h>
22#include <linux/delay.h>
23#include <linux/fb.h>
24#include <linux/ioport.h>
25#include <linux/init.h>
26#include <linux/types.h>
27#include <linux/interrupt.h>
28#include <linux/sched.h>
29#include <asm/blackfin.h>
30#include <asm/irq.h>
31#include <asm/dma.h>
32#include <linux/uaccess.h>
33#include <linux/gpio.h>
34#include <asm/portmux.h>
35
36#include <linux/dma-mapping.h>
37#include <linux/proc_fs.h>
38#include <linux/platform_device.h>
cffd9348 39#include <linux/i2c.h>
cffd9348
MH		 40
41#include "bfin_adv7393fb.h"
42
43static int mode = VMODE;
44static int mem = VMEM;
45static int nocursor = 1;
46
47static const unsigned short ppi_pins[] = {
48 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
49 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
50 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
51 P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
52 P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
53 0
54};
55
56/*
57 * card parameters
58 */
59
60static struct bfin_adv7393_fb_par {
ff0c2642 61 /* structure holding blackfin / adv7393 parameters when
cffd9348
MH		 62 screen is blanked */
63 struct {
64 u8 Mode; /* ntsc/pal/? */
65 } vga_state;
66 atomic_t ref_count;
67} bfin_par;
68
69/* --------------------------------------------------------------------- */
70
71static struct fb_var_screeninfo bfin_adv7393_fb_defined = {
72 .xres = 720,
73 .yres = 480,
74 .xres_virtual = 720,
75 .yres_virtual = 480,
76 .bits_per_pixel = 16,
77 .activate = FB_ACTIVATE_TEST,
78 .height = -1,
79 .width = -1,
80 .left_margin = 0,
81 .right_margin = 0,
82 .upper_margin = 0,
83 .lower_margin = 0,
84 .vmode = FB_VMODE_INTERLACED,
85 .red = {11, 5, 0},
86 .green = {5, 6, 0},
87 .blue = {0, 5, 0},
88 .transp = {0, 0, 0},
89};
90
48c68c4f 91static struct fb_fix_screeninfo bfin_adv7393_fb_fix = {
cffd9348
MH		 92 .id = "BFIN ADV7393",
93 .smem_len = 720 * 480 * 2,
94 .type = FB_TYPE_PACKED_PIXELS,
95 .visual = FB_VISUAL_TRUECOLOR,
96 .xpanstep = 0,
97 .ypanstep = 0,
98 .line_length = 720 * 2,
99 .accel = FB_ACCEL_NONE
100};
101
102static struct fb_ops bfin_adv7393_fb_ops = {
103 .owner = THIS_MODULE,
104 .fb_open = bfin_adv7393_fb_open,
105 .fb_release = bfin_adv7393_fb_release,
106 .fb_check_var = bfin_adv7393_fb_check_var,
107 .fb_pan_display = bfin_adv7393_fb_pan_display,
108 .fb_blank = bfin_adv7393_fb_blank,
109 .fb_fillrect = cfb_fillrect,
110 .fb_copyarea = cfb_copyarea,
111 .fb_imageblit = cfb_imageblit,
112 .fb_cursor = bfin_adv7393_fb_cursor,
113 .fb_setcolreg = bfin_adv7393_fb_setcolreg,
114};
115
116static int dma_desc_list(struct adv7393fb_device *fbdev, u16 arg)
117{
118 if (arg == BUILD) { /* Build */
119 fbdev->vb1 = l1_data_sram_zalloc(sizeof(struct dmasg));
120 if (fbdev->vb1 == NULL)
121 goto error;
122
123 fbdev->av1 = l1_data_sram_zalloc(sizeof(struct dmasg));
124 if (fbdev->av1 == NULL)
125 goto error;
126
127 fbdev->vb2 = l1_data_sram_zalloc(sizeof(struct dmasg));
128 if (fbdev->vb2 == NULL)
129 goto error;
130
131 fbdev->av2 = l1_data_sram_zalloc(sizeof(struct dmasg));
132 if (fbdev->av2 == NULL)
133 goto error;
134
135 /* Build linked DMA descriptor list */
136 fbdev->vb1->next_desc_addr = fbdev->av1;
137 fbdev->av1->next_desc_addr = fbdev->vb2;
138 fbdev->vb2->next_desc_addr = fbdev->av2;
139 fbdev->av2->next_desc_addr = fbdev->vb1;
140
141 /* Save list head */
142 fbdev->descriptor_list_head = fbdev->av2;
143
144 /* Vertical Blanking Field 1 */
145 fbdev->vb1->start_addr = VB_DUMMY_MEMORY_SOURCE;
146 fbdev->vb1->cfg = DMA_CFG_VAL;
147
148 fbdev->vb1->x_count =
149 fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
150
151 fbdev->vb1->x_modify = 0;
152 fbdev->vb1->y_count = fbdev->modes[mode].vb1_lines;
153 fbdev->vb1->y_modify = 0;
154
155 /* Active Video Field 1 */
156
157 fbdev->av1->start_addr = (unsigned long)fbdev->fb_mem;
158 fbdev->av1->cfg = DMA_CFG_VAL;
159 fbdev->av1->x_count =
160 fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
161 fbdev->av1->x_modify = fbdev->modes[mode].bpp / 8;
162 fbdev->av1->y_count = fbdev->modes[mode].a_lines;
163 fbdev->av1->y_modify =
164 (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
165 1) * (fbdev->modes[mode].bpp / 8);
166
167 /* Vertical Blanking Field 2 */
168
169 fbdev->vb2->start_addr = VB_DUMMY_MEMORY_SOURCE;
170 fbdev->vb2->cfg = DMA_CFG_VAL;
171 fbdev->vb2->x_count =
172 fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
173
174 fbdev->vb2->x_modify = 0;
175 fbdev->vb2->y_count = fbdev->modes[mode].vb2_lines;
176 fbdev->vb2->y_modify = 0;
177
178 /* Active Video Field 2 */
179
180 fbdev->av2->start_addr =
181 (unsigned long)fbdev->fb_mem + fbdev->line_len;
182
183 fbdev->av2->cfg = DMA_CFG_VAL;
184
185 fbdev->av2->x_count =
186 fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
187
188 fbdev->av2->x_modify = (fbdev->modes[mode].bpp / 8);
189 fbdev->av2->y_count = fbdev->modes[mode].a_lines;
190
191 fbdev->av2->y_modify =
192 (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
193 1) * (fbdev->modes[mode].bpp / 8);
194
195 return 1;
196 }
197
198error:
199 l1_data_sram_free(fbdev->vb1);
200 l1_data_sram_free(fbdev->av1);
201 l1_data_sram_free(fbdev->vb2);
202 l1_data_sram_free(fbdev->av2);
203
204 return 0;
205}
206
207static int bfin_config_dma(struct adv7393fb_device *fbdev)
208{
209 BUG_ON(!(fbdev->fb_mem));
210
211 set_dma_x_count(CH_PPI, fbdev->descriptor_list_head->x_count);
212 set_dma_x_modify(CH_PPI, fbdev->descriptor_list_head->x_modify);
213 set_dma_y_count(CH_PPI, fbdev->descriptor_list_head->y_count);
214 set_dma_y_modify(CH_PPI, fbdev->descriptor_list_head->y_modify);
215 set_dma_start_addr(CH_PPI, fbdev->descriptor_list_head->start_addr);
216 set_dma_next_desc_addr(CH_PPI,
217 fbdev->descriptor_list_head->next_desc_addr);
218 set_dma_config(CH_PPI, fbdev->descriptor_list_head->cfg);
219
220 return 1;
221}
222
223static void bfin_disable_dma(void)
224{
225 bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN);
226}
227
228static void bfin_config_ppi(struct adv7393fb_device *fbdev)
229{
230 if (ANOMALY_05000183) {
231 bfin_write_TIMER2_CONFIG(WDTH_CAP);
232 bfin_write_TIMER_ENABLE(TIMEN2);
233 }
234
235 bfin_write_PPI_CONTROL(0x381E);
236 bfin_write_PPI_FRAME(fbdev->modes[mode].tot_lines);
237 bfin_write_PPI_COUNT(fbdev->modes[mode].xres +
238 fbdev->modes[mode].boeft_blank - 1);
239 bfin_write_PPI_DELAY(fbdev->modes[mode].aoeft_blank - 1);
240}
241
242static void bfin_enable_ppi(void)
243{
244 bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
245}
246
247static void bfin_disable_ppi(void)
248{
249 bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
250}
251
252static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value)
253{
254 return i2c_smbus_write_byte_data(client, reg, value);
255}
256
257static inline int adv7393_read(struct i2c_client *client, u8 reg)
258{
259 return i2c_smbus_read_byte_data(client, reg);
260}
261
262static int
263adv7393_write_block(struct i2c_client *client,
264 const u8 *data, unsigned int len)
265{
266 int ret = -1;
267 u8 reg;
268
269 while (len >= 2) {
270 reg = *data++;
271 ret = adv7393_write(client, reg, *data++);
272 if (ret < 0)
273 break;
274 len -= 2;
275 }
276
277 return ret;
278}
279
280static int adv7393_mode(struct i2c_client *client, u16 mode)
281{
282 switch (mode) {
283 case POWER_ON: /* ADV7393 Sleep mode OFF */
284 adv7393_write(client, 0x00, 0x1E);
285 break;
286 case POWER_DOWN: /* ADV7393 Sleep mode ON */
287 adv7393_write(client, 0x00, 0x1F);
288 break;
289 case BLANK_OFF: /* Pixel Data Valid */
290 adv7393_write(client, 0x82, 0xCB);
291 break;
292 case BLANK_ON: /* Pixel Data Invalid */
293 adv7393_write(client, 0x82, 0x8B);
294 break;
295 default:
296 return -EINVAL;
297 break;
298 }
299 return 0;
300}
301
302static irqreturn_t ppi_irq_error(int irq, void *dev_id)
303{
304
305 struct adv7393fb_device *fbdev = (struct adv7393fb_device *)dev_id;
306
307 u16 status = bfin_read_PPI_STATUS();
308
309 pr_debug("%s: PPI Status = 0x%X\n", __func__, status);
310
311 if (status) {
312 bfin_disable_dma(); /* TODO: Check Sequence */
313 bfin_disable_ppi();
314 bfin_clear_PPI_STATUS();
315 bfin_config_dma(fbdev);
316 bfin_enable_ppi();
317 }
318
319 return IRQ_HANDLED;
320
321}
322
323static int proc_output(char *buf)
324{
325 char *p = buf;
326
327 p += sprintf(p,
328 "Usage:\n"
329 "echo 0x[REG][Value] > adv7393\n"
330 "example: echo 0x1234 >adv7393\n"
331 "writes 0x34 into Register 0x12\n");
332
333 return p - buf;
334}
335
ff9046ac
AV		 336static ssize_t
337adv7393_read_proc(struct file *file, char __user *buf,
338 size_t size, loff_t *ppos)
cffd9348 339{
ff9046ac
AV		 340 static const char message[] = "Usage:\n"
341 "echo 0x[REG][Value] > adv7393\n"
342 "example: echo 0x1234 >adv7393\n"
343 "writes 0x34 into Register 0x12\n";
344 return simple_read_from_buffer(buf, size, ppos, message,
345 sizeof(message));
cffd9348
MH		 346}
347
ff9046ac 348static ssize_t
cffd9348 349adv7393_write_proc(struct file *file, const char __user * buffer,
ff9046ac 350 size_t count, loff_t *ppos)
cffd9348 351{
d9dda78b 352 struct adv7393fb_device *fbdev = PDE_DATA(file_inode(file));
cffd9348
MH		 353 unsigned int val;
354 int ret;
355
5c888aa4 356 ret = kstrtouint_from_user(buffer, count, 0, &val);
cffd9348
MH		 357 if (ret)
358 return -EFAULT;
359
cffd9348
MH		 360 adv7393_write(fbdev->client, val >> 8, val & 0xff);
361
362 return count;
363}
364
ff9046ac
AV		 365static const struct file_operations fops = {
366 .read = adv7393_read_proc,
367 .write = adv7393_write_proc,
368 .llseek = default_llseek,
369};
370
48c68c4f
GKH		 371static int bfin_adv7393_fb_probe(struct i2c_client *client,
372 const struct i2c_device_id *id)
cffd9348
MH		 373{
374 int ret = 0;
375 struct proc_dir_entry *entry;
376 int num_modes = ARRAY_SIZE(known_modes);
377
378 struct adv7393fb_device *fbdev = NULL;
379
380 if (mem > 2) {
381 dev_err(&client->dev, "mem out of allowed range [1;2]\n");
382 return -EINVAL;
383 }
384
385 if (mode > num_modes) {
386 dev_err(&client->dev, "mode %d: not supported", mode);
387 return -EFAULT;
388 }
389
390 fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL);
391 if (!fbdev) {
392 dev_err(&client->dev, "failed to allocate device private record");
393 return -ENOMEM;
394 }
395
396 i2c_set_clientdata(client, fbdev);
397
398 fbdev->modes = known_modes;
399 fbdev->client = client;
400
401 fbdev->fb_len =
402 mem * fbdev->modes[mode].xres * fbdev->modes[mode].xres *
403 (fbdev->modes[mode].bpp / 8);
404
405 fbdev->line_len =
406 fbdev->modes[mode].xres * (fbdev->modes[mode].bpp / 8);
407
408 /* Workaround "PPI Does Not Start Properly In Specific Mode" */
409 if (ANOMALY_05000400) {
f8bd4934
JH		 410 ret = gpio_request_one(P_IDENT(P_PPI0_FS3), GPIOF_OUT_INIT_LOW,
411 "PPI0_FS3")
412 if (ret) {
cffd9348
MH		 413 dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n");
414 ret = -EBUSY;
c895305e 415 goto free_fbdev;
cffd9348 416 }
cffd9348
MH		 417 }
418
419 if (peripheral_request_list(ppi_pins, DRIVER_NAME)) {
420 dev_err(&client->dev, "requesting PPI peripheral failed\n");
421 ret = -EFAULT;
c895305e 422 goto free_gpio;
cffd9348
MH		 423 }
424
425 fbdev->fb_mem =
426 dma_alloc_coherent(NULL, fbdev->fb_len, &fbdev->dma_handle,
427 GFP_KERNEL);
428
429 if (NULL == fbdev->fb_mem) {
430 dev_err(&client->dev, "couldn't allocate dma buffer (%d bytes)\n",
431 (u32) fbdev->fb_len);
432 ret = -ENOMEM;
c895305e 433 goto free_ppi_pins;
cffd9348
MH		 434 }
435
436 fbdev->info.screen_base = (void *)fbdev->fb_mem;
437 bfin_adv7393_fb_fix.smem_start = (int)fbdev->fb_mem;
438
439 bfin_adv7393_fb_fix.smem_len = fbdev->fb_len;
440 bfin_adv7393_fb_fix.line_length = fbdev->line_len;
441
442 if (mem > 1)
443 bfin_adv7393_fb_fix.ypanstep = 1;
444
445 bfin_adv7393_fb_defined.red.length = 5;
446 bfin_adv7393_fb_defined.green.length = 6;
447 bfin_adv7393_fb_defined.blue.length = 5;
448
449 bfin_adv7393_fb_defined.xres = fbdev->modes[mode].xres;
450 bfin_adv7393_fb_defined.yres = fbdev->modes[mode].yres;
451 bfin_adv7393_fb_defined.xres_virtual = fbdev->modes[mode].xres;
452 bfin_adv7393_fb_defined.yres_virtual = mem * fbdev->modes[mode].yres;
453 bfin_adv7393_fb_defined.bits_per_pixel = fbdev->modes[mode].bpp;
454
455 fbdev->info.fbops = &bfin_adv7393_fb_ops;
456 fbdev->info.var = bfin_adv7393_fb_defined;
457 fbdev->info.fix = bfin_adv7393_fb_fix;
458 fbdev->info.par = &bfin_par;
459 fbdev->info.flags = FBINFO_DEFAULT;
460
461 fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL);
462 if (!fbdev->info.pseudo_palette) {
463 dev_err(&client->dev, "failed to allocate pseudo_palette\n");
464 ret = -ENOMEM;
c895305e 465 goto free_fb_mem;
cffd9348
MH		 466 }
467
468 if (fb_alloc_cmap(&fbdev->info.cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
469 dev_err(&client->dev, "failed to allocate colormap (%d entries)\n",
470 BFIN_LCD_NBR_PALETTE_ENTRIES);
471 ret = -EFAULT;
c895305e 472 goto free_palette;
cffd9348
MH		 473 }
474
475 if (request_dma(CH_PPI, "BF5xx_PPI_DMA") < 0) {
476 dev_err(&client->dev, "unable to request PPI DMA\n");
477 ret = -EFAULT;
c895305e 478 goto free_cmap;
cffd9348
MH		 479 }
480
f8798ccb 481 if (request_irq(IRQ_PPI_ERROR, ppi_irq_error, 0,
cffd9348
MH		 482 "PPI ERROR", fbdev) < 0) {
483 dev_err(&client->dev, "unable to request PPI ERROR IRQ\n");
484 ret = -EFAULT;
c895305e 485 goto free_ch_ppi;
cffd9348
MH		 486 }
487
488 fbdev->open = 0;
489
490 ret = adv7393_write_block(client, fbdev->modes[mode].adv7393_i2c_initd,
491 fbdev->modes[mode].adv7393_i2c_initd_len);
492
493 if (ret) {
494 dev_err(&client->dev, "i2c attach: init error\n");
c895305e 495 goto free_irq_ppi;
cffd9348
MH		 496 }
497
498
499 if (register_framebuffer(&fbdev->info) < 0) {
500 dev_err(&client->dev, "unable to register framebuffer\n");
501 ret = -EFAULT;
c895305e 502 goto free_irq_ppi;
cffd9348
MH		 503 }
504
505 dev_info(&client->dev, "fb%d: %s frame buffer device\n",
506 fbdev->info.node, fbdev->info.fix.id);
507 dev_info(&client->dev, "fb memory address : 0x%p\n", fbdev->fb_mem);
508
ff9046ac 509 entry = proc_create_data("driver/adv7393", 0, NULL, &fops, fbdev);
cffd9348
MH		 510 if (!entry) {
511 dev_err(&client->dev, "unable to create /proc entry\n");
512 ret = -EFAULT;
c895305e 513 goto free_fb;
cffd9348 514 }
cffd9348
MH		 515 return 0;
516
c895305e 517free_fb:
cffd9348 518 unregister_framebuffer(&fbdev->info);
c895305e 519free_irq_ppi:
cffd9348 520 free_irq(IRQ_PPI_ERROR, fbdev);
c895305e 521free_ch_ppi:
cffd9348 522 free_dma(CH_PPI);
c895305e 523free_cmap:
cffd9348 524 fb_dealloc_cmap(&fbdev->info.cmap);
c895305e 525free_palette:
cffd9348 526 kfree(fbdev->info.pseudo_palette);
c895305e
EG		 527free_fb_mem:
528 dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem,
529 fbdev->dma_handle);
530free_ppi_pins:
cffd9348 531 peripheral_free_list(ppi_pins);
c895305e
EG		 532free_gpio:
533 if (ANOMALY_05000400)
534 gpio_free(P_IDENT(P_PPI0_FS3));
535free_fbdev:
cffd9348
MH		 536 kfree(fbdev);
537
538 return ret;
539}
540
541static int bfin_adv7393_fb_open(struct fb_info *info, int user)
542{
543 struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
544
545 fbdev->info.screen_base = (void *)fbdev->fb_mem;
546 if (!fbdev->info.screen_base) {
547 dev_err(&fbdev->client->dev, "unable to map device\n");
548 return -ENOMEM;
549 }
550
551 fbdev->open = 1;
552 dma_desc_list(fbdev, BUILD);
553 adv7393_mode(fbdev->client, BLANK_OFF);
554 bfin_config_ppi(fbdev);
555 bfin_config_dma(fbdev);
556 bfin_enable_ppi();
557
558 return 0;
559}
560
561static int bfin_adv7393_fb_release(struct fb_info *info, int user)
562{
563 struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
564
565 adv7393_mode(fbdev->client, BLANK_ON);
566 bfin_disable_dma();
567 bfin_disable_ppi();
568 dma_desc_list(fbdev, DESTRUCT);
569 fbdev->open = 0;
570 return 0;
571}
572
573static int
574bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
575{
576
577 switch (var->bits_per_pixel) {
578 case 16:/* DIRECTCOLOUR, 64k */
579 var->red.offset = info->var.red.offset;
580 var->green.offset = info->var.green.offset;
581 var->blue.offset = info->var.blue.offset;
582 var->red.length = info->var.red.length;
583 var->green.length = info->var.green.length;
584 var->blue.length = info->var.blue.length;
585 var->transp.offset = 0;
586 var->transp.length = 0;
587 var->transp.msb_right = 0;
588 var->red.msb_right = 0;
589 var->green.msb_right = 0;
590 var->blue.msb_right = 0;
591 break;
592 default:
593 pr_debug("%s: depth not supported: %u BPP\n", __func__,
594 var->bits_per_pixel);
595 return -EINVAL;
596 }
597
598 if (info->var.xres != var->xres ||
599 info->var.yres != var->yres ||
600 info->var.xres_virtual != var->xres_virtual ||
601 info->var.yres_virtual != var->yres_virtual) {
602 pr_debug("%s: Resolution not supported: X%u x Y%u\n",
603 __func__, var->xres, var->yres);
604 return -EINVAL;
605 }
606
607 /*
608 * Memory limit
609 */
610
611 if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
612 pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
613 __func__, var->yres_virtual);
614 return -ENOMEM;
615 }
616
617 return 0;
618}
619
620static int
621bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
622{
623 int dy;
624 u32 dmaaddr;
625 struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
626
627 if (!var || !info)
628 return -EINVAL;
629
630 if (var->xoffset - info->var.xoffset) {
631 /* No support for X panning for now! */
632 return -EINVAL;
633 }
634 dy = var->yoffset - info->var.yoffset;
635
636 if (dy) {
637 pr_debug("%s: Panning screen of %d lines\n", __func__, dy);
638
639 dmaaddr = fbdev->av1->start_addr;
640 dmaaddr += (info->fix.line_length * dy);
641 /* TODO: Wait for current frame to finished */
642
643 fbdev->av1->start_addr = (unsigned long)dmaaddr;
644 fbdev->av2->start_addr = (unsigned long)dmaaddr + fbdev->line_len;
645 }
646
647 return 0;
648
649}
650
651/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
652static int bfin_adv7393_fb_blank(int blank, struct fb_info *info)
653{
654 struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
655
656 switch (blank) {
657
658 case VESA_NO_BLANKING:
659 /* Turn on panel */
660 adv7393_mode(fbdev->client, BLANK_OFF);
661 break;
662
663 case VESA_VSYNC_SUSPEND:
664 case VESA_HSYNC_SUSPEND:
665 case VESA_POWERDOWN:
666 /* Turn off panel */
667 adv7393_mode(fbdev->client, BLANK_ON);
668 break;
669
670 default:
671 return -EINVAL;
672 break;
673 }
674 return 0;
675}
676
677int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
678{
679 if (nocursor)
680 return 0;
681 else
682 return -EINVAL; /* just to force soft_cursor() call */
683}
684
685static int bfin_adv7393_fb_setcolreg(u_int regno, u_int red, u_int green,
686 u_int blue, u_int transp,
687 struct fb_info *info)
688{
689 if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
690 return -EINVAL;
691
692 if (info->var.grayscale)
693 /* grayscale = 0.30*R + 0.59*G + 0.11*B */
694 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
695
696 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
697 u32 value;
698 /* Place color in the pseudopalette */
699 if (regno > 16)
700 return -EINVAL;
701
702 red >>= (16 - info->var.red.length);
703 green >>= (16 - info->var.green.length);
704 blue >>= (16 - info->var.blue.length);
705
706 value = (red << info->var.red.offset) |
707 (green << info->var.green.offset)|
708 (blue << info->var.blue.offset);
709 value &= 0xFFFF;
710
711 ((u32 *) (info->pseudo_palette))[regno] = value;
712 }
713
714 return 0;
715}
716
48c68c4f 717static int bfin_adv7393_fb_remove(struct i2c_client *client)
cffd9348
MH		 718{
719 struct adv7393fb_device *fbdev = i2c_get_clientdata(client);
720
721 adv7393_mode(client, POWER_DOWN);
722
723 if (fbdev->fb_mem)
724 dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem, fbdev->dma_handle);
725 free_dma(CH_PPI);
726 free_irq(IRQ_PPI_ERROR, fbdev);
727 unregister_framebuffer(&fbdev->info);
728 remove_proc_entry("driver/adv7393", NULL);
729 fb_dealloc_cmap(&fbdev->info.cmap);
730 kfree(fbdev->info.pseudo_palette);
731
732 if (ANOMALY_05000400)
733 gpio_free(P_IDENT(P_PPI0_FS3)); /* FS3 */
734 peripheral_free_list(ppi_pins);
735 kfree(fbdev);
736
737 return 0;
738}
739
740#ifdef CONFIG_PM
741static int bfin_adv7393_fb_suspend(struct device *dev)
742{
743 struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
744
745 if (fbdev->open) {
746 bfin_disable_dma();
747 bfin_disable_ppi();
748 dma_desc_list(fbdev, DESTRUCT);
749 }
750 adv7393_mode(fbdev->client, POWER_DOWN);
751
752 return 0;
753}
754
755static int bfin_adv7393_fb_resume(struct device *dev)
756{
757 struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
758
759 adv7393_mode(fbdev->client, POWER_ON);
760
761 if (fbdev->open) {
762 dma_desc_list(fbdev, BUILD);
763 bfin_config_ppi(fbdev);
764 bfin_config_dma(fbdev);
765 bfin_enable_ppi();
766 }
767
768 return 0;
769}
770
771static const struct dev_pm_ops bfin_adv7393_dev_pm_ops = {
772 .suspend = bfin_adv7393_fb_suspend,
773 .resume = bfin_adv7393_fb_resume,
774};
775#endif
776
777static const struct i2c_device_id bfin_adv7393_id[] = {
778 {DRIVER_NAME, 0},
779 {}
780};
781
782MODULE_DEVICE_TABLE(i2c, bfin_adv7393_id);
783
784static struct i2c_driver bfin_adv7393_fb_driver = {
785 .driver = {
786 .name = DRIVER_NAME,
787#ifdef CONFIG_PM
788 .pm = &bfin_adv7393_dev_pm_ops,
789#endif
790 },
791 .probe = bfin_adv7393_fb_probe,
48c68c4f 792 .remove = bfin_adv7393_fb_remove,
cffd9348
MH		 793 .id_table = bfin_adv7393_id,
794};
795
796static int __init bfin_adv7393_fb_driver_init(void)
797{
798#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
799 request_module("i2c-bfin-twi");
800#else
801 request_module("i2c-gpio");
802#endif
803
804 return i2c_add_driver(&bfin_adv7393_fb_driver);
805}
806module_init(bfin_adv7393_fb_driver_init);
807
808static void __exit bfin_adv7393_fb_driver_cleanup(void)
809{
810 i2c_del_driver(&bfin_adv7393_fb_driver);
811}
812module_exit(bfin_adv7393_fb_driver_cleanup);
813
814MODULE_LICENSE("GPL");
815MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
816MODULE_DESCRIPTION("Frame buffer driver for ADV7393/2 Video Encoder");
817
818module_param(mode, int, 0);
819MODULE_PARM_DESC(mode,
820 "Video Mode (0=NTSC,1=PAL,2=NTSC 640x480,3=PAL 640x480,4=NTSC YCbCr input,5=PAL YCbCr input)");
821
822module_param(mem, int, 0);
823MODULE_PARM_DESC(mem,
824 "Size of frame buffer memory 1=Single 2=Double Size (allows y-panning / frame stacking)");
825
826module_param(nocursor, int, 0644);
827MODULE_PARM_DESC(nocursor, "cursor enable/disable");
kernel source for telekom puls (alcatel/mediatek)