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Merge branch 'rc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / sl811-hcd.c
CommitLineData
1da177e4
LT		 1/*
2 * SL811HS HCD (Host Controller Driver) for USB.
3 *
4 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
1e9a47b6
DB		 5 * Copyright (C) 2004-2005 David Brownell
6 *
1da177e4
LT		 7 * Periodic scheduling is based on Roman's OHCI code
8 * Copyright (C) 1999 Roman Weissgaerber
9 *
10 * The SL811HS controller handles host side USB (like the SL11H, but with
11 * another register set and SOF generation) as well as peripheral side USB
12 * (like the SL811S). This driver version doesn't implement the Gadget API
13 * for the peripheral role; or OTG (that'd need much external circuitry).
14 *
15 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host"
16 * document (providing significant pieces missing from that spec); plus
17 * the SL811S spec if you want peripheral side info.
1e9a47b6 18 */
1da177e4
LT		 19
20/*
21 * Status: Passed basic stress testing, works with hubs, mice, keyboards,
22 * and usb-storage.
23 *
24 * TODO:
98f541c6 25 * - usb suspend/resume triggered by sl811 (with PM_RUNTIME)
1da177e4
LT		 26 * - various issues noted in the code
27 * - performance work; use both register banks; ...
28 * - use urb->iso_frame_desc[] with ISO transfers
29 */
30
31#undef VERBOSE
32#undef PACKET_TRACE
33
1da177e4
LT		 34#include <linux/module.h>
35#include <linux/moduleparam.h>
36#include <linux/kernel.h>
37#include <linux/delay.h>
38#include <linux/ioport.h>
39#include <linux/sched.h>
40#include <linux/slab.h>
1da177e4
LT		 41#include <linux/errno.h>
42#include <linux/init.h>
43#include <linux/timer.h>
44#include <linux/list.h>
45#include <linux/interrupt.h>
46#include <linux/usb.h>
325a4af6 47#include <linux/usb/sl811.h>
27729aad 48#include <linux/usb/hcd.h>
d052d1be 49#include <linux/platform_device.h>
268bb0ce 50#include <linux/prefetch.h>
1da177e4
LT		 51
52#include <asm/io.h>
53#include <asm/irq.h>
1da177e4 54#include <asm/byteorder.h>
8ca5bfab 55#include <asm/unaligned.h>
1da177e4 56
1da177e4
LT		 57#include "sl811.h"
58
59
60MODULE_DESCRIPTION("SL811HS USB Host Controller Driver");
61MODULE_LICENSE("GPL");
f4fce61d 62MODULE_ALIAS("platform:sl811-hcd");
1da177e4 63
1e9a47b6 64#define DRIVER_VERSION "19 May 2005"
1da177e4
LT		 65
66
67#ifndef DEBUG
68# define STUB_DEBUG_FILE
69#endif
70
71/* for now, use only one transfer register bank */
72#undef USE_B
73
1da177e4
LT		 74// #define QUIRK2
75#define QUIRK3
76
77static const char hcd_name[] = "sl811-hcd";
78
79/*-------------------------------------------------------------------------*/
80
81static void port_power(struct sl811 *sl811, int is_on)
82{
83 struct usb_hcd *hcd = sl811_to_hcd(sl811);
84
85 /* hub is inactive unless the port is powered */
86 if (is_on) {
749da5f8 87 if (sl811->port1 & USB_PORT_STAT_POWER)
1da177e4
LT		 88 return;
89
749da5f8 90 sl811->port1 = USB_PORT_STAT_POWER;
1da177e4 91 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1da177e4
LT		 92 } else {
93 sl811->port1 = 0;
94 sl811->irq_enable = 0;
95 hcd->state = HC_STATE_HALT;
1da177e4
LT		 96 }
97 sl811->ctrl1 = 0;
98 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
99 sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
100
101 if (sl811->board && sl811->board->port_power) {
102 /* switch VBUS, at 500mA unless hub power budget gets set */
103 DBG("power %s\n", is_on ? "on" : "off");
104 sl811->board->port_power(hcd->self.controller, is_on);
105 }
106
107 /* reset as thoroughly as we can */
108 if (sl811->board && sl811->board->reset)
109 sl811->board->reset(hcd->self.controller);
1e9a47b6
DB		 110 else {
111 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
112 mdelay(20);
113 }
1da177e4
LT		 114
115 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
116 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
117 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
118 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
119
120 // if !is_on, put into lowpower mode now
121}
122
123/*-------------------------------------------------------------------------*/
124
125/* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue,
126 * and may start I/O. Endpoint queues are scanned during completion irq
093cf723 127 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation.
1da177e4
LT		 128 *
129 * Using an external DMA engine to copy a packet at a time could work,
130 * though setup/teardown costs may be too big to make it worthwhile.
131 */
132
133/* SETUP starts a new control request. Devices are not allowed to
134 * STALL or NAK these; they must cancel any pending control requests.
135 */
136static void setup_packet(
137 struct sl811 *sl811,
138 struct sl811h_ep *ep,
139 struct urb *urb,
140 u8 bank,
141 u8 control
142)
143{
144 u8 addr;
145 u8 len;
146 void __iomem *data_reg;
147
148 addr = SL811HS_PACKET_BUF(bank == 0);
149 len = sizeof(struct usb_ctrlrequest);
150 data_reg = sl811->data_reg;
151 sl811_write_buf(sl811, addr, urb->setup_packet, len);
152
153 /* autoincrementing */
154 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
155 writeb(len, data_reg);
156 writeb(SL_SETUP /* | ep->epnum */, data_reg);
157 writeb(usb_pipedevice(urb->pipe), data_reg);
158
2edd9686 159 /* always OUT/data0 */
1da177e4
LT		 160 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
161 control | SL11H_HCTLMASK_OUT);
162 ep->length = 0;
163 PACKET("SETUP qh%p\n", ep);
164}
165
166/* STATUS finishes control requests, often after IN or OUT data packets */
167static void status_packet(
168 struct sl811 *sl811,
169 struct sl811h_ep *ep,
170 struct urb *urb,
171 u8 bank,
172 u8 control
173)
174{
175 int do_out;
176 void __iomem *data_reg;
177
178 do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);
179 data_reg = sl811->data_reg;
180
181 /* autoincrementing */
182 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
183 writeb(0, data_reg);
184 writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg);
185 writeb(usb_pipedevice(urb->pipe), data_reg);
186
187 /* always data1; sometimes IN */
188 control |= SL11H_HCTLMASK_TOGGLE;
189 if (do_out)
190 control |= SL11H_HCTLMASK_OUT;
191 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
192 ep->length = 0;
193 PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "",
194 do_out ? "out" : "in", ep);
195}
196
197/* IN packets can be used with any type of endpoint. here we just
198 * start the transfer, data from the peripheral may arrive later.
199 * urb->iso_frame_desc is currently ignored here...
200 */
201static void in_packet(
202 struct sl811 *sl811,
203 struct sl811h_ep *ep,
204 struct urb *urb,
205 u8 bank,
206 u8 control
207)
208{
209 u8 addr;
210 u8 len;
211 void __iomem *data_reg;
212
213 /* avoid losing data on overflow */
214 len = ep->maxpacket;
215 addr = SL811HS_PACKET_BUF(bank == 0);
216 if (!(control & SL11H_HCTLMASK_ISOCH)
217 && usb_gettoggle(urb->dev, ep->epnum, 0))
218 control |= SL11H_HCTLMASK_TOGGLE;
219 data_reg = sl811->data_reg;
220
221 /* autoincrementing */
222 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
223 writeb(len, data_reg);
224 writeb(SL_IN | ep->epnum, data_reg);
225 writeb(usb_pipedevice(urb->pipe), data_reg);
226
227 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
16e2e5f6 228 ep->length = min_t(u32, len,
1da177e4
LT		 229 urb->transfer_buffer_length - urb->actual_length);
230 PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
231 !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len);
232}
233
234/* OUT packets can be used with any type of endpoint.
235 * urb->iso_frame_desc is currently ignored here...
236 */
237static void out_packet(
238 struct sl811 *sl811,
239 struct sl811h_ep *ep,
240 struct urb *urb,
241 u8 bank,
242 u8 control
243)
244{
245 void *buf;
246 u8 addr;
247 u8 len;
248 void __iomem *data_reg;
249
250 buf = urb->transfer_buffer + urb->actual_length;
251 prefetch(buf);
252
16e2e5f6 253 len = min_t(u32, ep->maxpacket,
1da177e4
LT		 254 urb->transfer_buffer_length - urb->actual_length);
255
256 if (!(control & SL11H_HCTLMASK_ISOCH)
257 && usb_gettoggle(urb->dev, ep->epnum, 1))
258 control |= SL11H_HCTLMASK_TOGGLE;
259 addr = SL811HS_PACKET_BUF(bank == 0);
260 data_reg = sl811->data_reg;
261
262 sl811_write_buf(sl811, addr, buf, len);
263
264 /* autoincrementing */
265 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
266 writeb(len, data_reg);
267 writeb(SL_OUT | ep->epnum, data_reg);
268 writeb(usb_pipedevice(urb->pipe), data_reg);
269
270 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
271 control | SL11H_HCTLMASK_OUT);
272 ep->length = len;
273 PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
274 !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len);
275}
276
277/*-------------------------------------------------------------------------*/
278
279/* caller updates on-chip enables later */
280
281static inline void sofirq_on(struct sl811 *sl811)
282{
283 if (sl811->irq_enable & SL11H_INTMASK_SOFINTR)
284 return;
285 VDBG("sof irq on\n");
286 sl811->irq_enable |= SL11H_INTMASK_SOFINTR;
287}
288
289static inline void sofirq_off(struct sl811 *sl811)
290{
291 if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR))
292 return;
293 VDBG("sof irq off\n");
294 sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR;
295}
296
297/*-------------------------------------------------------------------------*/
298
299/* pick the next endpoint for a transaction, and issue it.
300 * frames start with periodic transfers (after whatever is pending
301 * from the previous frame), and the rest of the time is async
302 * transfers, scheduled round-robin.
303 */
304static struct sl811h_ep *start(struct sl811 *sl811, u8 bank)
305{
306 struct sl811h_ep *ep;
307 struct urb *urb;
308 int fclock;
309 u8 control;
310
311 /* use endpoint at schedule head */
312 if (sl811->next_periodic) {
313 ep = sl811->next_periodic;
314 sl811->next_periodic = ep->next;
315 } else {
316 if (sl811->next_async)
317 ep = sl811->next_async;
318 else if (!list_empty(&sl811->async))
319 ep = container_of(sl811->async.next,
320 struct sl811h_ep, schedule);
321 else {
322 /* could set up the first fullspeed periodic
323 * transfer for the next frame ...
324 */
325 return NULL;
326 }
327
328#ifdef USE_B
329 if ((bank && sl811->active_b == ep) || sl811->active_a == ep)
330 return NULL;
331#endif
332
333 if (ep->schedule.next == &sl811->async)
334 sl811->next_async = NULL;
335 else
336 sl811->next_async = container_of(ep->schedule.next,
337 struct sl811h_ep, schedule);
338 }
339
340 if (unlikely(list_empty(&ep->hep->urb_list))) {
341 DBG("empty %p queue?\n", ep);
342 return NULL;
343 }
344
345 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
346 control = ep->defctrl;
347
348 /* if this frame doesn't have enough time left to transfer this
349 * packet, wait till the next frame. too-simple algorithm...
350 */
351 fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6;
352 fclock -= 100; /* setup takes not much time */
353 if (urb->dev->speed == USB_SPEED_LOW) {
354 if (control & SL11H_HCTLMASK_PREAMBLE) {
355 /* also note erratum 1: some hubs won't work */
356 fclock -= 800;
357 }
358 fclock -= ep->maxpacket << 8;
359
360 /* erratum 2: AFTERSOF only works for fullspeed */
361 if (fclock < 0) {
362 if (ep->period)
363 sl811->stat_overrun++;
364 sofirq_on(sl811);
365 return NULL;
366 }
367 } else {
368 fclock -= 12000 / 19; /* 19 64byte packets/msec */
369 if (fclock < 0) {
370 if (ep->period)
371 sl811->stat_overrun++;
372 control |= SL11H_HCTLMASK_AFTERSOF;
373
374 /* throttle bulk/control irq noise */
375 } else if (ep->nak_count)
376 control |= SL11H_HCTLMASK_AFTERSOF;
377 }
378
379
380 switch (ep->nextpid) {
381 case USB_PID_IN:
382 in_packet(sl811, ep, urb, bank, control);
383 break;
384 case USB_PID_OUT:
385 out_packet(sl811, ep, urb, bank, control);
386 break;
387 case USB_PID_SETUP:
388 setup_packet(sl811, ep, urb, bank, control);
389 break;
390 case USB_PID_ACK: /* for control status */
391 status_packet(sl811, ep, urb, bank, control);
392 break;
393 default:
394 DBG("bad ep%p pid %02x\n", ep, ep->nextpid);
395 ep = NULL;
396 }
397 return ep;
398}
399
400#define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2)
401
402static inline void start_transfer(struct sl811 *sl811)
403{
749da5f8 404 if (sl811->port1 & USB_PORT_STAT_SUSPEND)
1da177e4
LT		 405 return;
406 if (sl811->active_a == NULL) {
407 sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF));
408 if (sl811->active_a != NULL)
409 sl811->jiffies_a = jiffies + MIN_JIFFIES;
410 }
411#ifdef USE_B
412 if (sl811->active_b == NULL) {
413 sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF));
414 if (sl811->active_b != NULL)
415 sl811->jiffies_b = jiffies + MIN_JIFFIES;
416 }
417#endif
418}
419
420static void finish_request(
421 struct sl811 *sl811,
422 struct sl811h_ep *ep,
423 struct urb *urb,
1da177e4
LT		 424 int status
425) __releases(sl811->lock) __acquires(sl811->lock)
426{
427 unsigned i;
428
429 if (usb_pipecontrol(urb->pipe))
430 ep->nextpid = USB_PID_SETUP;
431
e9df41c5 432 usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb);
1da177e4 433 spin_unlock(&sl811->lock);
4a00027d 434 usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status);
1da177e4
LT		 435 spin_lock(&sl811->lock);
436
437 /* leave active endpoints in the schedule */
438 if (!list_empty(&ep->hep->urb_list))
439 return;
440
441 /* async deschedule? */
442 if (!list_empty(&ep->schedule)) {
443 list_del_init(&ep->schedule);
444 if (ep == sl811->next_async)
445 sl811->next_async = NULL;
446 return;
447 }
448
449 /* periodic deschedule */
450 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
451 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
452 struct sl811h_ep *temp;
453 struct sl811h_ep **prev = &sl811->periodic[i];
454
455 while (*prev && ((temp = *prev) != ep))
456 prev = &temp->next;
457 if (*prev)
458 *prev = ep->next;
459 sl811->load[i] -= ep->load;
1e9a47b6 460 }
1da177e4
LT		 461 ep->branch = PERIODIC_SIZE;
462 sl811->periodic_count--;
463 sl811_to_hcd(sl811)->self.bandwidth_allocated
464 -= ep->load / ep->period;
465 if (ep == sl811->next_periodic)
466 sl811->next_periodic = ep->next;
467
468 /* we might turn SOFs back on again for the async schedule */
469 if (sl811->periodic_count == 0)
470 sofirq_off(sl811);
471}
472
473static void
7d12e780 474done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank)
1da177e4
LT		 475{
476 u8 status;
477 struct urb *urb;
478 int urbstat = -EINPROGRESS;
479
480 if (unlikely(!ep))
481 return;
482
483 status = sl811_read(sl811, bank + SL11H_PKTSTATREG);
484
485 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
486
487 /* we can safely ignore NAKs */
488 if (status & SL11H_STATMASK_NAK) {
489 // PACKET("...NAK_%02x qh%p\n", bank, ep);
490 if (!ep->period)
491 ep->nak_count++;
492 ep->error_count = 0;
493
494 /* ACK advances transfer, toggle, and maybe queue */
495 } else if (status & SL11H_STATMASK_ACK) {
496 struct usb_device *udev = urb->dev;
497 int len;
498 unsigned char *buf;
499
500 /* urb->iso_frame_desc is currently ignored here... */
501
502 ep->nak_count = ep->error_count = 0;
503 switch (ep->nextpid) {
504 case USB_PID_OUT:
505 // PACKET("...ACK/out_%02x qh%p\n", bank, ep);
506 urb->actual_length += ep->length;
507 usb_dotoggle(udev, ep->epnum, 1);
508 if (urb->actual_length
509 == urb->transfer_buffer_length) {
510 if (usb_pipecontrol(urb->pipe))
511 ep->nextpid = USB_PID_ACK;
512
513 /* some bulk protocols terminate OUT transfers
514 * by a short packet, using ZLPs not padding.
515 */
516 else if (ep->length < ep->maxpacket
517 || !(urb->transfer_flags
518 & URB_ZERO_PACKET))
519 urbstat = 0;
520 }
521 break;
522 case USB_PID_IN:
523 // PACKET("...ACK/in_%02x qh%p\n", bank, ep);
524 buf = urb->transfer_buffer + urb->actual_length;
525 prefetchw(buf);
526 len = ep->maxpacket - sl811_read(sl811,
527 bank + SL11H_XFERCNTREG);
528 if (len > ep->length) {
529 len = ep->length;
65e51098 530 urbstat = -EOVERFLOW;
1da177e4
LT		 531 }
532 urb->actual_length += len;
533 sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0),
534 buf, len);
535 usb_dotoggle(udev, ep->epnum, 0);
65e51098
AS		 536 if (urbstat == -EINPROGRESS &&
537 (len < ep->maxpacket ||
538 urb->actual_length ==
539 urb->transfer_buffer_length)) {
540 if (usb_pipecontrol(urb->pipe))
541 ep->nextpid = USB_PID_ACK;
542 else
543 urbstat = 0;
1da177e4
LT		 544 }
545 break;
546 case USB_PID_SETUP:
547 // PACKET("...ACK/setup_%02x qh%p\n", bank, ep);
548 if (urb->transfer_buffer_length == urb->actual_length)
549 ep->nextpid = USB_PID_ACK;
550 else if (usb_pipeout(urb->pipe)) {
551 usb_settoggle(udev, 0, 1, 1);
552 ep->nextpid = USB_PID_OUT;
553 } else {
554 usb_settoggle(udev, 0, 0, 1);
555 ep->nextpid = USB_PID_IN;
556 }
557 break;
558 case USB_PID_ACK:
559 // PACKET("...ACK/status_%02x qh%p\n", bank, ep);
560 urbstat = 0;
561 break;
562 }
563
564 /* STALL stops all transfers */
565 } else if (status & SL11H_STATMASK_STALL) {
566 PACKET("...STALL_%02x qh%p\n", bank, ep);
567 ep->nak_count = ep->error_count = 0;
568 urbstat = -EPIPE;
569
570 /* error? retry, until "3 strikes" */
571 } else if (++ep->error_count >= 3) {
572 if (status & SL11H_STATMASK_TMOUT)
38e2bfc9 573 urbstat = -ETIME;
1da177e4
LT		 574 else if (status & SL11H_STATMASK_OVF)
575 urbstat = -EOVERFLOW;
576 else
577 urbstat = -EPROTO;
578 ep->error_count = 0;
579 PACKET("...3STRIKES_%02x %02x qh%p stat %d\n",
580 bank, status, ep, urbstat);
581 }
582
65e51098 583 if (urbstat != -EINPROGRESS || urb->unlinked)
7d12e780 584 finish_request(sl811, ep, urb, urbstat);
1da177e4
LT		 585}
586
587static inline u8 checkdone(struct sl811 *sl811)
588{
589 u8 ctl;
590 u8 irqstat = 0;
591
592 if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) {
593 ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG));
594 if (ctl & SL11H_HCTLMASK_ARM)
595 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
596 DBG("%s DONE_A: ctrl %02x sts %02x\n",
597 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
598 ctl,
599 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
600 irqstat |= SL11H_INTMASK_DONE_A;
601 }
602#ifdef USE_B
603 if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) {
604 ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG));
605 if (ctl & SL11H_HCTLMASK_ARM)
606 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
607 DBG("%s DONE_B: ctrl %02x sts %02x\n",
608 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
609 ctl,
610 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
611 irqstat |= SL11H_INTMASK_DONE_A;
612 }
613#endif
614 return irqstat;
615}
616
7d12e780 617static irqreturn_t sl811h_irq(struct usb_hcd *hcd)
1da177e4
LT		 618{
619 struct sl811 *sl811 = hcd_to_sl811(hcd);
620 u8 irqstat;
621 irqreturn_t ret = IRQ_NONE;
622 unsigned retries = 5;
623
624 spin_lock(&sl811->lock);
625
626retry:
627 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP;
628 if (irqstat) {
629 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
630 irqstat &= sl811->irq_enable;
631 }
632
633#ifdef QUIRK2
634 /* this may no longer be necessary ... */
1e9a47b6 635 if (irqstat == 0) {
1da177e4 636 irqstat = checkdone(sl811);
1e9a47b6 637 if (irqstat)
1da177e4
LT		 638 sl811->stat_lost++;
639 }
640#endif
641
642 /* USB packets, not necessarily handled in the order they're
643 * issued ... that's fine if they're different endpoints.
644 */
645 if (irqstat & SL11H_INTMASK_DONE_A) {
7d12e780 646 done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF));
1da177e4
LT		 647 sl811->active_a = NULL;
648 sl811->stat_a++;
649 }
650#ifdef USE_B
651 if (irqstat & SL11H_INTMASK_DONE_B) {
7d12e780 652 done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF));
1da177e4
LT		 653 sl811->active_b = NULL;
654 sl811->stat_b++;
655 }
656#endif
657 if (irqstat & SL11H_INTMASK_SOFINTR) {
658 unsigned index;
659
660 index = sl811->frame++ % (PERIODIC_SIZE - 1);
661 sl811->stat_sof++;
662
663 /* be graceful about almost-inevitable periodic schedule
664 * overruns: continue the previous frame's transfers iff
665 * this one has nothing scheduled.
666 */
667 if (sl811->next_periodic) {
668 // ERR("overrun to slot %d\n", index);
669 sl811->stat_overrun++;
670 }
671 if (sl811->periodic[index])
672 sl811->next_periodic = sl811->periodic[index];
673 }
674
675 /* khubd manages debouncing and wakeup */
676 if (irqstat & SL11H_INTMASK_INSRMV) {
677 sl811->stat_insrmv++;
678
679 /* most stats are reset for each VBUS session */
680 sl811->stat_wake = 0;
681 sl811->stat_sof = 0;
682 sl811->stat_a = 0;
683 sl811->stat_b = 0;
684 sl811->stat_lost = 0;
685
686 sl811->ctrl1 = 0;
687 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
688
689 sl811->irq_enable = SL11H_INTMASK_INSRMV;
690 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
691
692 /* usbcore nukes other pending transactions on disconnect */
693 if (sl811->active_a) {
694 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
695 finish_request(sl811, sl811->active_a,
1e9a47b6
DB		 696 container_of(sl811->active_a
697 ->hep->urb_list.next,
1da177e4 698 struct urb, urb_list),
7d12e780 699 -ESHUTDOWN);
1da177e4
LT		 700 sl811->active_a = NULL;
701 }
702#ifdef USE_B
703 if (sl811->active_b) {
704 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
705 finish_request(sl811, sl811->active_b,
1e9a47b6
DB		 706 container_of(sl811->active_b
707 ->hep->urb_list.next,
1da177e4
LT		 708 struct urb, urb_list),
709 NULL, -ESHUTDOWN);
710 sl811->active_b = NULL;
711 }
712#endif
713
093cf723 714 /* port status seems weird until after reset, so
1da177e4
LT		 715 * force the reset and make khubd clean up later.
716 */
8a3461e2 717 if (irqstat & SL11H_INTMASK_RD)
749da5f8 718 sl811->port1 &= ~USB_PORT_STAT_CONNECTION;
8a3461e2 719 else
749da5f8 720 sl811->port1 |= USB_PORT_STAT_CONNECTION;
eb661bc8 721
749da5f8 722 sl811->port1 |= USB_PORT_STAT_C_CONNECTION << 16;
1da177e4
LT		 723
724 } else if (irqstat & SL11H_INTMASK_RD) {
749da5f8 725 if (sl811->port1 & USB_PORT_STAT_SUSPEND) {
1da177e4 726 DBG("wakeup\n");
749da5f8 727 sl811->port1 |= USB_PORT_STAT_C_SUSPEND << 16;
1da177e4
LT		 728 sl811->stat_wake++;
729 } else
730 irqstat &= ~SL11H_INTMASK_RD;
731 }
732
733 if (irqstat) {
749da5f8 734 if (sl811->port1 & USB_PORT_STAT_ENABLE)
1da177e4
LT		 735 start_transfer(sl811);
736 ret = IRQ_HANDLED;
737 if (retries--)
738 goto retry;
739 }
740
1e9a47b6 741 if (sl811->periodic_count == 0 && list_empty(&sl811->async))
1da177e4
LT		 742 sofirq_off(sl811);
743 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
744
745 spin_unlock(&sl811->lock);
746
747 return ret;
748}
749
750/*-------------------------------------------------------------------------*/
751
752/* usb 1.1 says max 90% of a frame is available for periodic transfers.
753 * this driver doesn't promise that much since it's got to handle an
754 * IRQ per packet; irq handling latencies also use up that time.
4b2e790a
DB		 755 *
756 * NOTE: the periodic schedule is a sparse tree, with the load for
757 * each branch minimized. see fig 3.5 in the OHCI spec for example.
1da177e4
LT		 758 */
759#define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */
760
761static int balance(struct sl811 *sl811, u16 period, u16 load)
762{
763 int i, branch = -ENOSPC;
764
765 /* search for the least loaded schedule branch of that period
766 * which has enough bandwidth left unreserved.
767 */
768 for (i = 0; i < period ; i++) {
769 if (branch < 0 || sl811->load[branch] > sl811->load[i]) {
770 int j;
771
772 for (j = i; j < PERIODIC_SIZE; j += period) {
773 if ((sl811->load[j] + load)
774 > MAX_PERIODIC_LOAD)
775 break;
776 }
777 if (j < PERIODIC_SIZE)
778 continue;
1e9a47b6 779 branch = i;
1da177e4
LT		 780 }
781 }
782 return branch;
783}
784
785/*-------------------------------------------------------------------------*/
786
787static int sl811h_urb_enqueue(
788 struct usb_hcd *hcd,
1da177e4 789 struct urb *urb,
55016f10 790 gfp_t mem_flags
1da177e4
LT		 791) {
792 struct sl811 *sl811 = hcd_to_sl811(hcd);
793 struct usb_device *udev = urb->dev;
794 unsigned int pipe = urb->pipe;
795 int is_out = !usb_pipein(pipe);
796 int type = usb_pipetype(pipe);
797 int epnum = usb_pipeendpoint(pipe);
798 struct sl811h_ep *ep = NULL;
799 unsigned long flags;
800 int i;
e9df41c5
AS		 801 int retval;
802 struct usb_host_endpoint *hep = urb->ep;
1da177e4 803
ad7c56f0 804#ifndef CONFIG_USB_SL811_HCD_ISO
1da177e4
LT		 805 if (type == PIPE_ISOCHRONOUS)
806 return -ENOSPC;
807#endif
808
809 /* avoid all allocations within spinlocks */
76be932a 810 if (!hep->hcpriv) {
7b842b6e 811 ep = kzalloc(sizeof *ep, mem_flags);
76be932a
KV		 812 if (ep == NULL)
813 return -ENOMEM;
814 }
1da177e4
LT		 815
816 spin_lock_irqsave(&sl811->lock, flags);
817
818 /* don't submit to a dead or disabled port */
749da5f8 819 if (!(sl811->port1 & USB_PORT_STAT_ENABLE)
1da177e4
LT		 820 || !HC_IS_RUNNING(hcd->state)) {
821 retval = -ENODEV;
4b2e790a 822 kfree(ep);
e9df41c5
AS		 823 goto fail_not_linked;
824 }
825 retval = usb_hcd_link_urb_to_ep(hcd, urb);
826 if (retval) {
827 kfree(ep);
828 goto fail_not_linked;
1da177e4
LT		 829 }
830
831 if (hep->hcpriv) {
832 kfree(ep);
833 ep = hep->hcpriv;
834 } else if (!ep) {
835 retval = -ENOMEM;
836 goto fail;
837
838 } else {
839 INIT_LIST_HEAD(&ep->schedule);
6a8e87b2 840 ep->udev = udev;
1da177e4
LT		 841 ep->epnum = epnum;
842 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
843 ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE;
844 usb_settoggle(udev, epnum, is_out, 0);
845
846 if (type == PIPE_CONTROL)
847 ep->nextpid = USB_PID_SETUP;
848 else if (is_out)
849 ep->nextpid = USB_PID_OUT;
850 else
851 ep->nextpid = USB_PID_IN;
852
853 if (ep->maxpacket > H_MAXPACKET) {
854 /* iso packets up to 240 bytes could work... */
855 DBG("dev %d ep%d maxpacket %d\n",
856 udev->devnum, epnum, ep->maxpacket);
857 retval = -EINVAL;
2bd15f1f 858 kfree(ep);
1da177e4
LT		 859 goto fail;
860 }
861
862 if (udev->speed == USB_SPEED_LOW) {
863 /* send preamble for external hub? */
864 if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD))
865 ep->defctrl |= SL11H_HCTLMASK_PREAMBLE;
866 }
867 switch (type) {
868 case PIPE_ISOCHRONOUS:
869 case PIPE_INTERRUPT:
870 if (urb->interval > PERIODIC_SIZE)
871 urb->interval = PERIODIC_SIZE;
872 ep->period = urb->interval;
873 ep->branch = PERIODIC_SIZE;
874 if (type == PIPE_ISOCHRONOUS)
875 ep->defctrl |= SL11H_HCTLMASK_ISOCH;
876 ep->load = usb_calc_bus_time(udev->speed, !is_out,
877 (type == PIPE_ISOCHRONOUS),
878 usb_maxpacket(udev, pipe, is_out))
879 / 1000;
880 break;
881 }
882
1e9a47b6 883 ep->hep = hep;
1da177e4
LT		 884 hep->hcpriv = ep;
885 }
886
887 /* maybe put endpoint into schedule */
888 switch (type) {
889 case PIPE_CONTROL:
890 case PIPE_BULK:
891 if (list_empty(&ep->schedule))
892 list_add_tail(&ep->schedule, &sl811->async);
893 break;
894 case PIPE_ISOCHRONOUS:
895 case PIPE_INTERRUPT:
896 urb->interval = ep->period;
4b2e790a
DB		 897 if (ep->branch < PERIODIC_SIZE) {
898 /* NOTE: the phase is correct here, but the value
899 * needs offsetting by the transfer queue depth.
900 * All current drivers ignore start_frame, so this
901 * is unlikely to ever matter...
902 */
903 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
904 + ep->branch;
1da177e4 905 break;
4b2e790a 906 }
1da177e4
LT		 907
908 retval = balance(sl811, ep->period, ep->load);
909 if (retval < 0)
910 goto fail;
911 ep->branch = retval;
912 retval = 0;
913 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
914 + ep->branch;
915
916 /* sort each schedule branch by period (slow before fast)
917 * to share the faster parts of the tree without needing
918 * dummy/placeholder nodes
919 */
920 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
921 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
922 struct sl811h_ep **prev = &sl811->periodic[i];
923 struct sl811h_ep *here = *prev;
924
925 while (here && ep != here) {
926 if (ep->period > here->period)
927 break;
928 prev = &here->next;
929 here = *prev;
930 }
931 if (ep != here) {
932 ep->next = here;
933 *prev = ep;
934 }
935 sl811->load[i] += ep->load;
936 }
937 sl811->periodic_count++;
938 hcd->self.bandwidth_allocated += ep->load / ep->period;
939 sofirq_on(sl811);
940 }
941
1da177e4 942 urb->hcpriv = hep;
1da177e4
LT		 943 start_transfer(sl811);
944 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
945fail:
e9df41c5
AS		 946 if (retval)
947 usb_hcd_unlink_urb_from_ep(hcd, urb);
948fail_not_linked:
1da177e4
LT		 949 spin_unlock_irqrestore(&sl811->lock, flags);
950 return retval;
951}
952
e9df41c5 953static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1da177e4
LT		 954{
955 struct sl811 *sl811 = hcd_to_sl811(hcd);
1e9a47b6 956 struct usb_host_endpoint *hep;
1da177e4
LT		 957 unsigned long flags;
958 struct sl811h_ep *ep;
e9df41c5 959 int retval;
1da177e4 960
1e9a47b6 961 spin_lock_irqsave(&sl811->lock, flags);
e9df41c5
AS		 962 retval = usb_hcd_check_unlink_urb(hcd, urb, status);
963 if (retval)
1e9a47b6 964 goto fail;
1da177e4 965
e9df41c5 966 hep = urb->hcpriv;
1da177e4
LT		 967 ep = hep->hcpriv;
968 if (ep) {
969 /* finish right away if this urb can't be active ...
970 * note that some drivers wrongly expect delays
971 */
972 if (ep->hep->urb_list.next != &urb->urb_list) {
973 /* not front of queue? never active */
974
975 /* for active transfers, we expect an IRQ */
976 } else if (sl811->active_a == ep) {
977 if (time_before_eq(sl811->jiffies_a, jiffies)) {
978 /* happens a lot with lowspeed?? */
979 DBG("giveup on DONE_A: ctrl %02x sts %02x\n",
980 sl811_read(sl811,
981 SL811_EP_A(SL11H_HOSTCTLREG)),
982 sl811_read(sl811,
983 SL811_EP_A(SL11H_PKTSTATREG)));
984 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
985 0);
986 sl811->active_a = NULL;
987 } else
988 urb = NULL;
989#ifdef USE_B
990 } else if (sl811->active_b == ep) {
991 if (time_before_eq(sl811->jiffies_a, jiffies)) {
992 /* happens a lot with lowspeed?? */
993 DBG("giveup on DONE_B: ctrl %02x sts %02x\n",
994 sl811_read(sl811,
995 SL811_EP_B(SL11H_HOSTCTLREG)),
996 sl811_read(sl811,
997 SL811_EP_B(SL11H_PKTSTATREG)));
998 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
999 0);
1000 sl811->active_b = NULL;
1001 } else
1002 urb = NULL;
1003#endif
1004 } else {
1005 /* front of queue for inactive endpoint */
1006 }
1007
1008 if (urb)
7d12e780 1009 finish_request(sl811, ep, urb, 0);
1da177e4
LT		 1010 else
1011 VDBG("dequeue, urb %p active %s; wait4irq\n", urb,
1012 (sl811->active_a == ep) ? "A" : "B");
1013 } else
1014 retval = -EINVAL;
e9df41c5 1015 fail:
1da177e4
LT		 1016 spin_unlock_irqrestore(&sl811->lock, flags);
1017 return retval;
1018}
1019
1020static void
1021sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1022{
1023 struct sl811h_ep *ep = hep->hcpriv;
1024
1025 if (!ep)
1026 return;
1027
1028 /* assume we'd just wait for the irq */
1029 if (!list_empty(&hep->urb_list))
1030 msleep(3);
1031 if (!list_empty(&hep->urb_list))
b6c63937 1032 WARNING("ep %p not empty?\n", ep);
1da177e4 1033
1da177e4
LT		 1034 kfree(ep);
1035 hep->hcpriv = NULL;
1036}
1037
1038static int
1039sl811h_get_frame(struct usb_hcd *hcd)
1040{
1041 struct sl811 *sl811 = hcd_to_sl811(hcd);
1042
1043 /* wrong except while periodic transfers are scheduled;
1044 * never matches the on-the-wire frame;
1045 * subject to overruns.
1046 */
1047 return sl811->frame;
1048}
1049
1050
1051/*-------------------------------------------------------------------------*/
1052
1053/* the virtual root hub timer IRQ checks for hub status */
1054static int
1055sl811h_hub_status_data(struct usb_hcd *hcd, char *buf)
1056{
1057 struct sl811 *sl811 = hcd_to_sl811(hcd);
1058#ifdef QUIRK3
1059 unsigned long flags;
1060
1061 /* non-SMP HACK: use root hub timer as i/o watchdog
1062 * this seems essential when SOF IRQs aren't in use...
1063 */
1064 local_irq_save(flags);
1065 if (!timer_pending(&sl811->timer)) {
7d12e780 1066 if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE)
1da177e4
LT		 1067 sl811->stat_lost++;
1068 }
1069 local_irq_restore(flags);
1070#endif
1071
1072 if (!(sl811->port1 & (0xffff << 16)))
1073 return 0;
1074
1075 /* tell khubd port 1 changed */
1076 *buf = (1 << 1);
1077 return 1;
1078}
1079
1080static void
1081sl811h_hub_descriptor (
1082 struct sl811 *sl811,
1083 struct usb_hub_descriptor *desc
1084) {
1085 u16 temp = 0;
1086
1087 desc->bDescriptorType = 0x29;
1088 desc->bHubContrCurrent = 0;
1089
1090 desc->bNbrPorts = 1;
1091 desc->bDescLength = 9;
1092
1093 /* per-port power switching (gang of one!), or none */
1094 desc->bPwrOn2PwrGood = 0;
1095 if (sl811->board && sl811->board->port_power) {
1096 desc->bPwrOn2PwrGood = sl811->board->potpg;
1097 if (!desc->bPwrOn2PwrGood)
1098 desc->bPwrOn2PwrGood = 10;
1099 temp = 0x0001;
1100 } else
1101 temp = 0x0002;
1102
1103 /* no overcurrent errors detection/handling */
1104 temp |= 0x0010;
1105
fd05e720 1106 desc->wHubCharacteristics = cpu_to_le16(temp);
1da177e4 1107
da13051c 1108 /* ports removable, and legacy PortPwrCtrlMask */
dbe79bbe
JY		 1109 desc->u.hs.DeviceRemovable[0] = 0 << 1;
1110 desc->u.hs.DeviceRemovable[1] = ~0;
1da177e4
LT		 1111}
1112
1113static void
1114sl811h_timer(unsigned long _sl811)
1115{
1116 struct sl811 *sl811 = (void *) _sl811;
1117 unsigned long flags;
1118 u8 irqstat;
1119 u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE;
749da5f8
AS		 1120 const u32 mask = USB_PORT_STAT_CONNECTION
1121 | USB_PORT_STAT_ENABLE
288ead45 1122 | USB_PORT_STAT_LOW_SPEED;
1da177e4
LT		 1123
1124 spin_lock_irqsave(&sl811->lock, flags);
1125
1126 /* stop special signaling */
1127 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE;
1128 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1129 udelay(3);
1130
1131 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS);
1132
1133 switch (signaling) {
1134 case SL11H_CTL1MASK_SE0:
1135 DBG("end reset\n");
749da5f8
AS		 1136 sl811->port1 = (USB_PORT_STAT_C_RESET << 16)
1137 | USB_PORT_STAT_POWER;
1da177e4
LT		 1138 sl811->ctrl1 = 0;
1139 /* don't wrongly ack RD */
1140 if (irqstat & SL11H_INTMASK_INSRMV)
1141 irqstat &= ~SL11H_INTMASK_RD;
1142 break;
1143 case SL11H_CTL1MASK_K:
1144 DBG("end resume\n");
749da5f8 1145 sl811->port1 &= ~USB_PORT_STAT_SUSPEND;
1da177e4
LT		 1146 break;
1147 default:
1148 DBG("odd timer signaling: %02x\n", signaling);
1149 break;
1150 }
1151 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1152
1153 if (irqstat & SL11H_INTMASK_RD) {
1154 /* usbcore nukes all pending transactions on disconnect */
749da5f8
AS		 1155 if (sl811->port1 & USB_PORT_STAT_CONNECTION)
1156 sl811->port1 |= (USB_PORT_STAT_C_CONNECTION << 16)
1157 | (USB_PORT_STAT_C_ENABLE << 16);
1da177e4
LT		 1158 sl811->port1 &= ~mask;
1159 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1160 } else {
1161 sl811->port1 |= mask;
1162 if (irqstat & SL11H_INTMASK_DP)
288ead45 1163 sl811->port1 &= ~USB_PORT_STAT_LOW_SPEED;
1da177e4
LT		 1164 sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD;
1165 }
1166
749da5f8 1167 if (sl811->port1 & USB_PORT_STAT_CONNECTION) {
1da177e4
LT		 1168 u8 ctrl2 = SL811HS_CTL2_INIT;
1169
1170 sl811->irq_enable |= SL11H_INTMASK_DONE_A;
1171#ifdef USE_B
1172 sl811->irq_enable |= SL11H_INTMASK_DONE_B;
1173#endif
288ead45 1174 if (sl811->port1 & USB_PORT_STAT_LOW_SPEED) {
1da177e4
LT		 1175 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD;
1176 ctrl2 |= SL811HS_CTL2MASK_DSWAP;
1177 }
1178
1179 /* start SOFs flowing, kickstarting with A registers */
1180 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA;
1181 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1182 sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1183
1184 /* autoincrementing */
1185 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1186 writeb(SL_SOF, sl811->data_reg);
1187 writeb(0, sl811->data_reg);
1188 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1189 SL11H_HCTLMASK_ARM);
1190
1191 /* khubd provides debounce delay */
1192 } else {
1193 sl811->ctrl1 = 0;
1194 }
1195 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1196
1197 /* reenable irqs */
1198 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1199 spin_unlock_irqrestore(&sl811->lock, flags);
1200}
1201
1202static int
1203sl811h_hub_control(
1204 struct usb_hcd *hcd,
1205 u16 typeReq,
1206 u16 wValue,
1207 u16 wIndex,
1208 char *buf,
1209 u16 wLength
1210) {
1211 struct sl811 *sl811 = hcd_to_sl811(hcd);
1212 int retval = 0;
1213 unsigned long flags;
1214
1215 spin_lock_irqsave(&sl811->lock, flags);
1216
1217 switch (typeReq) {
1218 case ClearHubFeature:
1219 case SetHubFeature:
1220 switch (wValue) {
1221 case C_HUB_OVER_CURRENT:
1222 case C_HUB_LOCAL_POWER:
1223 break;
1224 default:
1225 goto error;
1226 }
1227 break;
1228 case ClearPortFeature:
1229 if (wIndex != 1 || wLength != 0)
1230 goto error;
1231
1232 switch (wValue) {
1233 case USB_PORT_FEAT_ENABLE:
749da5f8 1234 sl811->port1 &= USB_PORT_STAT_POWER;
1da177e4
LT		 1235 sl811->ctrl1 = 0;
1236 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1237 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1238 sl811_write(sl811, SL11H_IRQ_ENABLE,
1239 sl811->irq_enable);
1240 break;
1241 case USB_PORT_FEAT_SUSPEND:
749da5f8 1242 if (!(sl811->port1 & USB_PORT_STAT_SUSPEND))
1da177e4
LT		 1243 break;
1244
1245 /* 20 msec of resume/K signaling, other irqs blocked */
1246 DBG("start resume...\n");
1247 sl811->irq_enable = 0;
1248 sl811_write(sl811, SL11H_IRQ_ENABLE,
1249 sl811->irq_enable);
1250 sl811->ctrl1 |= SL11H_CTL1MASK_K;
1251 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1252
1253 mod_timer(&sl811->timer, jiffies
1254 + msecs_to_jiffies(20));
1255 break;
1256 case USB_PORT_FEAT_POWER:
1257 port_power(sl811, 0);
1258 break;
1259 case USB_PORT_FEAT_C_ENABLE:
1260 case USB_PORT_FEAT_C_SUSPEND:
1261 case USB_PORT_FEAT_C_CONNECTION:
1262 case USB_PORT_FEAT_C_OVER_CURRENT:
1263 case USB_PORT_FEAT_C_RESET:
1264 break;
1265 default:
1266 goto error;
1267 }
1268 sl811->port1 &= ~(1 << wValue);
1269 break;
1270 case GetHubDescriptor:
1271 sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf);
1272 break;
1273 case GetHubStatus:
8ca5bfab 1274 put_unaligned_le32(0, buf);
1da177e4
LT		 1275 break;
1276 case GetPortStatus:
1277 if (wIndex != 1)
1278 goto error;
8ca5bfab 1279 put_unaligned_le32(sl811->port1, buf);
1da177e4
LT		 1280
1281#ifndef VERBOSE
1282 if (*(u16*)(buf+2)) /* only if wPortChange is interesting */
1283#endif
1284 DBG("GetPortStatus %08x\n", sl811->port1);
1285 break;
1286 case SetPortFeature:
1287 if (wIndex != 1 || wLength != 0)
1288 goto error;
1289 switch (wValue) {
1290 case USB_PORT_FEAT_SUSPEND:
749da5f8 1291 if (sl811->port1 & USB_PORT_STAT_RESET)
1da177e4 1292 goto error;
749da5f8 1293 if (!(sl811->port1 & USB_PORT_STAT_ENABLE))
1da177e4
LT		 1294 goto error;
1295
1296 DBG("suspend...\n");
1297 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA;
1298 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1299 break;
1300 case USB_PORT_FEAT_POWER:
1301 port_power(sl811, 1);
1302 break;
1303 case USB_PORT_FEAT_RESET:
749da5f8 1304 if (sl811->port1 & USB_PORT_STAT_SUSPEND)
1da177e4 1305 goto error;
749da5f8 1306 if (!(sl811->port1 & USB_PORT_STAT_POWER))
1da177e4
LT		 1307 break;
1308
1309 /* 50 msec of reset/SE0 signaling, irqs blocked */
1310 sl811->irq_enable = 0;
1311 sl811_write(sl811, SL11H_IRQ_ENABLE,
1312 sl811->irq_enable);
1313 sl811->ctrl1 = SL11H_CTL1MASK_SE0;
1314 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
749da5f8 1315 sl811->port1 |= USB_PORT_STAT_RESET;
1da177e4
LT		 1316 mod_timer(&sl811->timer, jiffies
1317 + msecs_to_jiffies(50));
1318 break;
1319 default:
1320 goto error;
1321 }
1322 sl811->port1 |= 1 << wValue;
1323 break;
1324
1325 default:
1326error:
1327 /* "protocol stall" on error */
1328 retval = -EPIPE;
1329 }
1330
1331 spin_unlock_irqrestore(&sl811->lock, flags);
1332 return retval;
1333}
1334
1335#ifdef CONFIG_PM
1336
1337static int
0c0382e3 1338sl811h_bus_suspend(struct usb_hcd *hcd)
1da177e4
LT		 1339{
1340 // SOFs off
441b62c1 1341 DBG("%s\n", __func__);
1da177e4
LT		 1342 return 0;
1343}
1344
1345static int
0c0382e3 1346sl811h_bus_resume(struct usb_hcd *hcd)
1da177e4
LT		 1347{
1348 // SOFs on
441b62c1 1349 DBG("%s\n", __func__);
1da177e4
LT		 1350 return 0;
1351}
1352
1353#else
1354
0c0382e3
AS		 1355#define sl811h_bus_suspend NULL
1356#define sl811h_bus_resume NULL
1da177e4
LT		 1357
1358#endif
1359
1360
1361/*-------------------------------------------------------------------------*/
1362
1363#ifdef STUB_DEBUG_FILE
1364
1365static inline void create_debug_file(struct sl811 *sl811) { }
1366static inline void remove_debug_file(struct sl811 *sl811) { }
1367
1368#else
1369
1370#include <linux/proc_fs.h>
1371#include <linux/seq_file.h>
1372
1373static void dump_irq(struct seq_file *s, char *label, u8 mask)
1374{
1375 seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask,
1376 (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "",
1377 (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "",
1378 (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "",
1379 (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "",
1380 (mask & SL11H_INTMASK_RD) ? " rd" : "",
1381 (mask & SL11H_INTMASK_DP) ? " dp" : "");
1382}
1383
1384static int proc_sl811h_show(struct seq_file *s, void *unused)
1385{
1386 struct sl811 *sl811 = s->private;
1387 struct sl811h_ep *ep;
1388 unsigned i;
1389
1390 seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n",
1391 sl811_to_hcd(sl811)->product_desc,
1392 hcd_name, DRIVER_VERSION,
1393 sl811->port1);
1394
1395 seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv);
1396 seq_printf(s, "current session: done_a %ld done_b %ld "
1397 "wake %ld sof %ld overrun %ld lost %ld\n\n",
1398 sl811->stat_a, sl811->stat_b,
1399 sl811->stat_wake, sl811->stat_sof,
1400 sl811->stat_overrun, sl811->stat_lost);
1401
1402 spin_lock_irq(&sl811->lock);
1403
1404 if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND)
1405 seq_printf(s, "(suspended)\n\n");
1406 else {
1407 u8 t = sl811_read(sl811, SL11H_CTLREG1);
1408
1409 seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t,
1410 (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "",
1411 ({char *s; switch (t & SL11H_CTL1MASK_FORCE) {
1412 case SL11H_CTL1MASK_NORMAL: s = ""; break;
1413 case SL11H_CTL1MASK_SE0: s = " se0/reset"; break;
1414 case SL11H_CTL1MASK_K: s = " k/resume"; break;
1415 default: s = "j"; break;
1416 }; s; }),
1417 (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "",
1418 (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : "");
1419
1420 dump_irq(s, "irq_enable",
1421 sl811_read(sl811, SL11H_IRQ_ENABLE));
1422 dump_irq(s, "irq_status",
1423 sl811_read(sl811, SL11H_IRQ_STATUS));
1424 seq_printf(s, "frame clocks remaining: %d\n",
1425 sl811_read(sl811, SL11H_SOFTMRREG) << 6);
1426 }
1427
1428 seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a,
1429 sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)),
1430 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
1431 seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b,
1432 sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)),
1433 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
1434 seq_printf(s, "\n");
1435 list_for_each_entry (ep, &sl811->async, schedule) {
1436 struct urb *urb;
1437
1438 seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d"
1439 " nak %d err %d\n",
1440 (ep == sl811->active_a) ? "(A) " : "",
1441 (ep == sl811->active_b) ? "(B) " : "",
1442 ep, ep->epnum,
1443 ({ char *s; switch (ep->nextpid) {
1444 case USB_PID_IN: s = "in"; break;
1445 case USB_PID_OUT: s = "out"; break;
1446 case USB_PID_SETUP: s = "setup"; break;
1447 case USB_PID_ACK: s = "status"; break;
1448 default: s = "?"; break;
1449 }; s;}),
1450 ep->maxpacket,
1451 ep->nak_count, ep->error_count);
1452 list_for_each_entry (urb, &ep->hep->urb_list, urb_list) {
1453 seq_printf(s, " urb%p, %d/%d\n", urb,
1454 urb->actual_length,
1455 urb->transfer_buffer_length);
1456 }
1457 }
1458 if (!list_empty(&sl811->async))
1459 seq_printf(s, "\n");
1460
1461 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1462
1463 for (i = 0; i < PERIODIC_SIZE; i++) {
1464 ep = sl811->periodic[i];
1465 if (!ep)
1466 continue;
1467 seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]);
1468
1469 /* DUMB: prints shared entries multiple times */
1470 do {
1471 seq_printf(s,
1472 " %s%sqh%d/%p (%sdev%d ep%d%s max %d) "
1473 "err %d\n",
1474 (ep == sl811->active_a) ? "(A) " : "",
1475 (ep == sl811->active_b) ? "(B) " : "",
1476 ep->period, ep,
1477 (ep->udev->speed == USB_SPEED_FULL)
1478 ? "" : "ls ",
1479 ep->udev->devnum, ep->epnum,
1480 (ep->epnum == 0) ? ""
1481 : ((ep->nextpid == USB_PID_IN)
1482 ? "in"
1483 : "out"),
1484 ep->maxpacket, ep->error_count);
1485 ep = ep->next;
1486 } while (ep);
1487 }
1488
1489 spin_unlock_irq(&sl811->lock);
1490 seq_printf(s, "\n");
1491
1492 return 0;
1493}
1494
1495static int proc_sl811h_open(struct inode *inode, struct file *file)
1496{
d9dda78b 1497 return single_open(file, proc_sl811h_show, PDE_DATA(inode));
1da177e4
LT		 1498}
1499
066202dd 1500static const struct file_operations proc_ops = {
1da177e4
LT		 1501 .open = proc_sl811h_open,
1502 .read = seq_read,
1503 .llseek = seq_lseek,
1504 .release = single_release,
1505};
1506
1507/* expect just one sl811 per system */
1508static const char proc_filename[] = "driver/sl811h";
1509
1510static void create_debug_file(struct sl811 *sl811)
1511{
cdefa185 1512 sl811->pde = proc_create_data(proc_filename, 0, NULL, &proc_ops, sl811);
1da177e4
LT		 1513}
1514
1515static void remove_debug_file(struct sl811 *sl811)
1516{
1517 if (sl811->pde)
1518 remove_proc_entry(proc_filename, NULL);
1519}
1520
1521#endif
1522
1523/*-------------------------------------------------------------------------*/
1524
1525static void
1526sl811h_stop(struct usb_hcd *hcd)
1527{
1528 struct sl811 *sl811 = hcd_to_sl811(hcd);
1529 unsigned long flags;
1530
1531 del_timer_sync(&hcd->rh_timer);
1532
1533 spin_lock_irqsave(&sl811->lock, flags);
1534 port_power(sl811, 0);
1535 spin_unlock_irqrestore(&sl811->lock, flags);
1536}
1537
1538static int
1539sl811h_start(struct usb_hcd *hcd)
1540{
1541 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1542
1543 /* chip has been reset, VBUS power is off */
1da177e4
LT		 1544 hcd->state = HC_STATE_RUNNING;
1545
bc96c0ad 1546 if (sl811->board) {
0c8624f9
DB		 1547 if (!device_can_wakeup(hcd->self.controller))
1548 device_init_wakeup(hcd->self.controller,
1549 sl811->board->can_wakeup);
bc96c0ad
AS		 1550 hcd->power_budget = sl811->board->power * 2;
1551 }
1da177e4 1552
3a4fa0a2 1553 /* enable power and interrupts */
1e9a47b6
DB		 1554 port_power(sl811, 1);
1555
1da177e4
LT		 1556 return 0;
1557}
1558
1559/*-------------------------------------------------------------------------*/
1560
1561static struct hc_driver sl811h_hc_driver = {
1562 .description = hcd_name,
1563 .hcd_priv_size = sizeof(struct sl811),
1564
1565 /*
1566 * generic hardware linkage
1567 */
1568 .irq = sl811h_irq,
1569 .flags = HCD_USB11 | HCD_MEMORY,
1570
1571 /* Basic lifecycle operations */
1572 .start = sl811h_start,
1573 .stop = sl811h_stop,
1574
1575 /*
1576 * managing i/o requests and associated device resources
1577 */
1578 .urb_enqueue = sl811h_urb_enqueue,
1579 .urb_dequeue = sl811h_urb_dequeue,
1580 .endpoint_disable = sl811h_endpoint_disable,
1581
1582 /*
1583 * periodic schedule support
1584 */
1585 .get_frame_number = sl811h_get_frame,
1586
1587 /*
1588 * root hub support
1589 */
1590 .hub_status_data = sl811h_hub_status_data,
1591 .hub_control = sl811h_hub_control,
0c0382e3
AS		 1592 .bus_suspend = sl811h_bus_suspend,
1593 .bus_resume = sl811h_bus_resume,
1da177e4
LT		 1594};
1595
1596/*-------------------------------------------------------------------------*/
1597
fb4e98ab 1598static int
3ae5eaec 1599sl811h_remove(struct platform_device *dev)
1da177e4 1600{
3ae5eaec 1601 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4 1602 struct sl811 *sl811 = hcd_to_sl811(hcd);
1da177e4
LT		 1603 struct resource *res;
1604
1da177e4
LT		 1605 remove_debug_file(sl811);
1606 usb_remove_hcd(hcd);
1607
1e9a47b6 1608 /* some platforms may use IORESOURCE_IO */
3ae5eaec 1609 res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1610 if (res)
1611 iounmap(sl811->data_reg);
1da177e4 1612
3ae5eaec 1613 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1e9a47b6
DB		 1614 if (res)
1615 iounmap(sl811->addr_reg);
1da177e4
LT		 1616
1617 usb_put_hcd(hcd);
1618 return 0;
1619}
1620
41ac7b3a 1621static int
3ae5eaec 1622sl811h_probe(struct platform_device *dev)
1da177e4
LT		 1623{
1624 struct usb_hcd *hcd;
1625 struct sl811 *sl811;
27140219 1626 struct resource *addr, *data, *ires;
1da177e4
LT		 1627 int irq;
1628 void __iomem *addr_reg;
1629 void __iomem *data_reg;
1630 int retval;
1e9a47b6 1631 u8 tmp, ioaddr = 0;
27140219 1632 unsigned long irqflags;
1da177e4 1633
6ef1a927
TK		 1634 if (usb_disabled())
1635 return -ENODEV;
1636
1da177e4
LT		 1637 /* basic sanity checks first. board-specific init logic should
1638 * have initialized these three resources and probably board
1639 * specific platform_data. we don't probe for IRQs, and do only
1640 * minimal sanity checking.
1641 */
27140219
MZ		 1642 ires = platform_get_resource(dev, IORESOURCE_IRQ, 0);
1643 if (dev->num_resources < 3 || !ires)
1da177e4
LT		 1644 return -ENODEV;
1645
27140219
MZ		 1646 irq = ires->start;
1647 irqflags = ires->flags & IRQF_TRIGGER_MASK;
1648
1da177e4 1649 /* refuse to confuse usbcore */
3ae5eaec 1650 if (dev->dev.dma_mask) {
1da177e4
LT		 1651 DBG("no we won't dma\n");
1652 return -EINVAL;
1653 }
1654
1e9a47b6 1655 /* the chip may be wired for either kind of addressing */
3ae5eaec
RK		 1656 addr = platform_get_resource(dev, IORESOURCE_MEM, 0);
1657 data = platform_get_resource(dev, IORESOURCE_MEM, 1);
1e9a47b6
DB		 1658 retval = -EBUSY;
1659 if (!addr || !data) {
3ae5eaec
RK		 1660 addr = platform_get_resource(dev, IORESOURCE_IO, 0);
1661 data = platform_get_resource(dev, IORESOURCE_IO, 1);
1e9a47b6
DB		 1662 if (!addr || !data)
1663 return -ENODEV;
1664 ioaddr = 1;
2427ddd8
GKH		 1665 /*
1666 * NOTE: 64-bit resource->start is getting truncated
1667 * to avoid compiler warning, assuming that ->start
1668 * is always 32-bit for this case
1669 */
1670 addr_reg = (void __iomem *) (unsigned long) addr->start;
1671 data_reg = (void __iomem *) (unsigned long) data->start;
1e9a47b6
DB		 1672 } else {
1673 addr_reg = ioremap(addr->start, 1);
1674 if (addr_reg == NULL) {
1675 retval = -ENOMEM;
1676 goto err2;
1677 }
1da177e4 1678
1e9a47b6
DB		 1679 data_reg = ioremap(data->start, 1);
1680 if (data_reg == NULL) {
1681 retval = -ENOMEM;
1682 goto err4;
1683 }
1da177e4
LT		 1684 }
1685
1686 /* allocate and initialize hcd */
7071a3ce 1687 hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev_name(&dev->dev));
1da177e4
LT		 1688 if (!hcd) {
1689 retval = -ENOMEM;
1690 goto err5;
1691 }
1692 hcd->rsrc_start = addr->start;
1693 sl811 = hcd_to_sl811(hcd);
1694
1695 spin_lock_init(&sl811->lock);
1696 INIT_LIST_HEAD(&sl811->async);
3ae5eaec 1697 sl811->board = dev->dev.platform_data;
1da177e4
LT		 1698 init_timer(&sl811->timer);
1699 sl811->timer.function = sl811h_timer;
1700 sl811->timer.data = (unsigned long) sl811;
1701 sl811->addr_reg = addr_reg;
1702 sl811->data_reg = data_reg;
1703
1704 spin_lock_irq(&sl811->lock);
1705 port_power(sl811, 0);
1706 spin_unlock_irq(&sl811->lock);
1707 msleep(200);
1708
1709 tmp = sl811_read(sl811, SL11H_HWREVREG);
1710 switch (tmp >> 4) {
1711 case 1:
1712 hcd->product_desc = "SL811HS v1.2";
1713 break;
1714 case 2:
1715 hcd->product_desc = "SL811HS v1.5";
1716 break;
1717 default:
1718 /* reject case 0, SL11S is less functional */
1719 DBG("chiprev %02x\n", tmp);
1720 retval = -ENXIO;
1721 goto err6;
1722 }
1723
1e9a47b6
DB		 1724 /* The chip's IRQ is level triggered, active high. A requirement
1725 * for platform device setup is to cope with things like signal
1726 * inverters (e.g. CF is active low) or working only with edge
1727 * triggers (e.g. most ARM CPUs). Initial driver stress testing
1728 * was on a system with single edge triggering, so most sorts of
1729 * triggering arrangement should work.
27140219
MZ		 1730 *
1731 * Use resource IRQ flags if set by platform device setup.
1e9a47b6 1732 */
27140219 1733 irqflags |= IRQF_SHARED;
b5dd18d8 1734 retval = usb_add_hcd(hcd, irq, irqflags);
1da177e4
LT		 1735 if (retval != 0)
1736 goto err6;
1737
1738 create_debug_file(sl811);
1739 return retval;
1740
1741 err6:
1742 usb_put_hcd(hcd);
1743 err5:
1e9a47b6
DB		 1744 if (!ioaddr)
1745 iounmap(data_reg);
1da177e4 1746 err4:
1e9a47b6
DB		 1747 if (!ioaddr)
1748 iounmap(addr_reg);
1da177e4 1749 err2:
1da177e4
LT		 1750 DBG("init error, %d\n", retval);
1751 return retval;
1752}
1753
1754#ifdef CONFIG_PM
1755
1756/* for this device there's no useful distinction between the controller
1e9a47b6 1757 * and its root hub, except that the root hub only gets direct PM calls
84ebc102 1758 * when CONFIG_PM_RUNTIME is enabled.
1da177e4
LT		 1759 */
1760
1761static int
3ae5eaec 1762sl811h_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 1763{
3ae5eaec 1764 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1765 struct sl811 *sl811 = hcd_to_sl811(hcd);
1766 int retval = 0;
1767
18584999
DB		 1768 switch (state.event) {
1769 case PM_EVENT_FREEZE:
0c0382e3 1770 retval = sl811h_bus_suspend(hcd);
18584999
DB		 1771 break;
1772 case PM_EVENT_SUSPEND:
3a2d5b70 1773 case PM_EVENT_HIBERNATE:
18584999 1774 case PM_EVENT_PRETHAW: /* explicitly discard hw state */
1da177e4 1775 port_power(sl811, 0);
18584999
DB		 1776 break;
1777 }
1da177e4
LT		 1778 return retval;
1779}
1780
1781static int
3ae5eaec 1782sl811h_resume(struct platform_device *dev)
1da177e4 1783{
3ae5eaec 1784 struct usb_hcd *hcd = platform_get_drvdata(dev);
1da177e4
LT		 1785 struct sl811 *sl811 = hcd_to_sl811(hcd);
1786
1da177e4
LT		 1787 /* with no "check to see if VBUS is still powered" board hook,
1788 * let's assume it'd only be powered to enable remote wakeup.
1789 */
70a1c9e0 1790 if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) {
1da177e4
LT		 1791 sl811->port1 = 0;
1792 port_power(sl811, 1);
1c50c317 1793 usb_root_hub_lost_power(hcd->self.root_hub);
1da177e4
LT		 1794 return 0;
1795 }
1796
0c0382e3 1797 return sl811h_bus_resume(hcd);
1da177e4
LT		 1798}
1799
1800#else
1801
1802#define sl811h_suspend NULL
1803#define sl811h_resume NULL
1804
1805#endif
1806
1807
1e9a47b6 1808/* this driver is exported so sl811_cs can depend on it */
3ae5eaec 1809struct platform_driver sl811h_driver = {
1da177e4 1810 .probe = sl811h_probe,
7690417d 1811 .remove = sl811h_remove,
1da177e4
LT		 1812
1813 .suspend = sl811h_suspend,
1814 .resume = sl811h_resume,
3ae5eaec
RK		 1815 .driver = {
1816 .name = (char *) hcd_name,
1817 .owner = THIS_MODULE,
1818 },
1da177e4 1819};
1e9a47b6 1820EXPORT_SYMBOL(sl811h_driver);
1da177e4 1821
6ef1a927 1822module_platform_driver(sl811h_driver);
kernel source for telekom puls (alcatel/mediatek)