[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / usb / host / ohci-pci.c

/*
 * OHCI HCD (Host Controller Driver) for USB.
 *
 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
 *
 * [ Initialisation is based on Linus'  ]
 * [ uhci code and gregs ohci fragments ]
 * [ (C) Copyright 1999 Linus Torvalds  ]
 * [ (C) Copyright 1999 Gregory P. Smith]
 *
 * PCI Bus Glue
 *
 * This file is licenced under the GPL.
 */

#ifndef CONFIG_PCI
#error "This file is PCI bus glue.  CONFIG_PCI must be defined."
#endif

#include <linux/pci.h>
#include <linux/io.h>


/*-------------------------------------------------------------------------*/

static int broken_suspend(struct usb_hcd *hcd)
{
	device_init_wakeup(&hcd->self.root_hub->dev, 0);
	return 0;
}

/* AMD 756, for most chips (early revs), corrupts register
 * values on read ... so enable the vendor workaround.
 */
static int ohci_quirk_amd756(struct usb_hcd *hcd)
{
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);

	ohci->flags = OHCI_QUIRK_AMD756;
	ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");

	/* also erratum 10 (suspend/resume issues) */
	return broken_suspend(hcd);
}

/* Apple's OHCI driver has a lot of bizarre workarounds
 * for this chip.  Evidently control and bulk lists
 * can get confused.  (B&W G3 models, and ...)
 */
static int ohci_quirk_opti(struct usb_hcd *hcd)
{
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);

	ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");

	return 0;
}

/* Check for NSC87560. We have to look at the bridge (fn1) to
 * identify the USB (fn2). This quirk might apply to more or
 * even all NSC stuff.
 */
static int ohci_quirk_ns(struct usb_hcd *hcd)
{
	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
	struct pci_dev	*b;

	b  = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
	if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
	    && b->vendor == PCI_VENDOR_ID_NS) {
		struct ohci_hcd	*ohci = hcd_to_ohci (hcd);

		ohci->flags |= OHCI_QUIRK_SUPERIO;
		ohci_dbg (ohci, "Using NSC SuperIO setup\n");
	}
	pci_dev_put(b);

	return 0;
}

/* Check for Compaq's ZFMicro chipset, which needs short
 * delays before control or bulk queues get re-activated
 * in finish_unlinks()
 */
static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
{
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);

	ohci->flags |= OHCI_QUIRK_ZFMICRO;
	ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");

	return 0;
}

/* Check for Toshiba SCC OHCI which has big endian registers
 * and little endian in memory data structures
 */
static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
{
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);

	/* That chip is only present in the southbridge of some
	 * cell based platforms which are supposed to select
	 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
	 * that was the case though.
	 */
#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
	ohci->flags |= OHCI_QUIRK_BE_MMIO;
	ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
	return 0;
#else
	ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
	return -ENXIO;
#endif
}

/* Check for NEC chip and apply quirk for allegedly lost interrupts.
 */

static void ohci_quirk_nec_worker(struct work_struct *work)
{
	struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
	int status;

	status = ohci_init(ohci);
	if (status != 0) {
		ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
			 "ohci_init", status);
		return;
	}

	status = ohci_restart(ohci);
	if (status != 0)
		ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
			 "ohci_restart", status);
}

static int ohci_quirk_nec(struct usb_hcd *hcd)
{
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);

	ohci->flags |= OHCI_QUIRK_NEC;
	INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
	ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");

	return 0;
}

static int ohci_quirk_amd700(struct usb_hcd *hcd)
{
	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
	struct pci_dev *amd_smbus_dev;
	u8 rev;

	if (usb_amd_find_chipset_info())
		ohci->flags |= OHCI_QUIRK_AMD_PLL;

	amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
			PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
	if (!amd_smbus_dev)
		return 0;

	rev = amd_smbus_dev->revision;

	/* SB800 needs pre-fetch fix */
	if ((rev >= 0x40) && (rev <= 0x4f)) {
		ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
		ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
	}

	pci_dev_put(amd_smbus_dev);
	amd_smbus_dev = NULL;

	ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND;
	return 0;
}

static void sb800_prefetch(struct ohci_hcd *ohci, int on)
{
	struct pci_dev *pdev;
	u16 misc;

	pdev = to_pci_dev(ohci_to_hcd(ohci)->self.controller);
	pci_read_config_word(pdev, 0x50, &misc);
	if (on == 0)
		pci_write_config_word(pdev, 0x50, misc & 0xfcff);
	else
		pci_write_config_word(pdev, 0x50, misc | 0x0300);
}

/* List of quirks for OHCI */
static const struct pci_device_id ohci_pci_quirks[] = {
	{
		PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
		.driver_data = (unsigned long)ohci_quirk_amd756,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
		.driver_data = (unsigned long)ohci_quirk_opti,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
		.driver_data = (unsigned long)ohci_quirk_ns,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
		.driver_data = (unsigned long)ohci_quirk_zfmicro,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
		.driver_data = (unsigned long)ohci_quirk_toshiba_scc,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
		.driver_data = (unsigned long)ohci_quirk_nec,
	},
	{
		/* Toshiba portege 4000 */
		.vendor		= PCI_VENDOR_ID_AL,
		.device		= 0x5237,
		.subvendor	= PCI_VENDOR_ID_TOSHIBA,
		.subdevice	= 0x0004,
		.driver_data	= (unsigned long) broken_suspend,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
		.driver_data = (unsigned long) broken_suspend,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
		.driver_data = (unsigned long)ohci_quirk_amd700,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
		.driver_data = (unsigned long)ohci_quirk_amd700,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
		.driver_data = (unsigned long)ohci_quirk_amd700,
	},

	/* FIXME for some of the early AMD 760 southbridges, OHCI
	 * won't work at all.  blacklist them.
	 */

	{},
};

static int ohci_pci_reset (struct usb_hcd *hcd)
{
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
	int ret = 0;

	if (hcd->self.controller) {
		struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
		const struct pci_device_id *quirk_id;

		quirk_id = pci_match_id(ohci_pci_quirks, pdev);
		if (quirk_id != NULL) {
			int (*quirk)(struct usb_hcd *ohci);
			quirk = (void *)quirk_id->driver_data;
			ret = quirk(hcd);
		}
	}
	if (ret == 0) {
		ohci_hcd_init (ohci);
		return ohci_init (ohci);
	}
	return ret;
}


static int ohci_pci_start (struct usb_hcd *hcd)
{
	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
	int		ret;

#ifdef CONFIG_PM /* avoid warnings about unused pdev */
	if (hcd->self.controller) {
		struct pci_dev *pdev = to_pci_dev(hcd->self.controller);

		/* RWC may not be set for add-in PCI cards, since boot
		 * firmware probably ignored them.  This transfers PCI
		 * PM wakeup capabilities.
		 */
		if (device_can_wakeup(&pdev->dev))
			ohci->hc_control |= OHCI_CTRL_RWC;
	}
#endif /* CONFIG_PM */

	ret = ohci_run (ohci);
	if (ret < 0) {
		ohci_err (ohci, "can't start\n");
		ohci_stop (hcd);
	}
	return ret;
}


/*-------------------------------------------------------------------------*/

static const struct hc_driver ohci_pci_hc_driver = {
	.description =		hcd_name,
	.product_desc =		"OHCI Host Controller",
	.hcd_priv_size =	sizeof(struct ohci_hcd),

	/*
	 * generic hardware linkage
	 */
	.irq =			ohci_irq,
	.flags =		HCD_MEMORY | HCD_USB11,

	/*
	 * basic lifecycle operations
	 */
	.reset =		ohci_pci_reset,
	.start =		ohci_pci_start,
	.stop =			ohci_stop,
	.shutdown =		ohci_shutdown,

#ifdef	CONFIG_PM
	.pci_suspend =		ohci_suspend,
	.pci_resume =		ohci_resume,
#endif

	/*
	 * managing i/o requests and associated device resources
	 */
	.urb_enqueue =		ohci_urb_enqueue,
	.urb_dequeue =		ohci_urb_dequeue,
	.endpoint_disable =	ohci_endpoint_disable,

	/*
	 * scheduling support
	 */
	.get_frame_number =	ohci_get_frame,

	/*
	 * root hub support
	 */
	.hub_status_data =	ohci_hub_status_data,
	.hub_control =		ohci_hub_control,
#ifdef	CONFIG_PM
	.bus_suspend =		ohci_bus_suspend,
	.bus_resume =		ohci_bus_resume,
#endif
	.start_port_reset =	ohci_start_port_reset,
};

/*-------------------------------------------------------------------------*/


static const struct pci_device_id pci_ids [] = { {
	/* handle any USB OHCI controller */
	PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
	.driver_data =	(unsigned long) &ohci_pci_hc_driver,
	}, {
	/* The device in the ConneXT I/O hub has no class reg */
	PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
	.driver_data =	(unsigned long) &ohci_pci_hc_driver,
	}, { /* end: all zeroes */ }
};
MODULE_DEVICE_TABLE (pci, pci_ids);

/* pci driver glue; this is a "new style" PCI driver module */
static struct pci_driver ohci_pci_driver = {
	.name =		(char *) hcd_name,
	.id_table =	pci_ids,

	.probe =	usb_hcd_pci_probe,
	.remove =	usb_hcd_pci_remove,
	.shutdown =	usb_hcd_pci_shutdown,

#ifdef CONFIG_PM
	.driver =	{
		.pm =	&usb_hcd_pci_pm_ops
	},
#endif
};
Commit	Line	Data
1da177e4 LT	1	/*
	2	* OHCI HCD (Host Controller Driver) for USB.
	3	*
	4	* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
	5	* (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
dd9048af	6	*
1da177e4 LT	7	* [ Initialisation is based on Linus' ]
	8	* [ uhci code and gregs ohci fragments ]
	9	* [ (C) Copyright 1999 Linus Torvalds ]
	10	* [ (C) Copyright 1999 Gregory P. Smith]
dd9048af	11	*
1da177e4 LT	12	* PCI Bus Glue
	13	*
	14	* This file is licenced under the GPL.
	15	*/
dd9048af	16
1da177e4 LT	17	#ifndef CONFIG_PCI
	18	#error "This file is PCI bus glue. CONFIG_PCI must be defined."
	19	#endif
	20
ab1666c1 LY	21	#include <linux/pci.h>
	22	#include <linux/io.h>
	23
	24
1da177e4 LT	25	/-------------------------------------------------------------------------/
1da177e4 LT	26
931384fb DB	27	static int broken_suspend(struct usb_hcd *hcd)
	28	{
	29	device_init_wakeup(&hcd->self.root_hub->dev, 0);
	30	return 0;
	31	}
	32
4302a595 BH	33	/* AMD 756, for most chips (early revs), corrupts register
	34	* values on read ... so enable the vendor workaround.
	35	*/
931384fb	36	static int ohci_quirk_amd756(struct usb_hcd *hcd)
1da177e4 LT	37	{
	38	struct ohci_hcd *ohci = hcd_to_ohci (hcd);
	39
4302a595 BH	40	ohci->flags = OHCI_QUIRK_AMD756;
	41	ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
	42
	43	/* also erratum 10 (suspend/resume issues) */
931384fb	44	return broken_suspend(hcd);
1da177e4 LT	45	}
1da177e4 LT	46
4302a595 BH	47	/* Apple's OHCI driver has a lot of bizarre workarounds
	48	* for this chip. Evidently control and bulk lists
	49	* can get confused. (B&W G3 models, and ...)
	50	*/
931384fb	51	static int ohci_quirk_opti(struct usb_hcd *hcd)
1da177e4 LT	52	{
1da177e4 LT	53	struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1da177e4	54
4302a595 BH	55	ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
	56
	57	return 0;
	58	}
	59
	60	/* Check for NSC87560. We have to look at the bridge (fn1) to
	61	* identify the USB (fn2). This quirk might apply to more or
	62	* even all NSC stuff.
	63	*/
931384fb	64	static int ohci_quirk_ns(struct usb_hcd *hcd)
4302a595 BH	65	{
	66	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
	67	struct pci_dev *b;
	68
	69	b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
	70	if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
	71	&& b->vendor == PCI_VENDOR_ID_NS) {
	72	struct ohci_hcd *ohci = hcd_to_ohci (hcd);
	73
	74	ohci->flags \|= OHCI_QUIRK_SUPERIO;
	75	ohci_dbg (ohci, "Using NSC SuperIO setup\n");
	76	}
	77	pci_dev_put(b);
	78
	79	return 0;
	80	}
	81
	82	/* Check for Compaq's ZFMicro chipset, which needs short
	83	* delays before control or bulk queues get re-activated
	84	* in finish_unlinks()
	85	*/
931384fb	86	static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
4302a595 BH	87	{
	88	struct ohci_hcd *ohci = hcd_to_ohci (hcd);
	89
	90	ohci->flags \|= OHCI_QUIRK_ZFMICRO;
89a0fd18	91	ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
4302a595 BH	92
	93	return 0;
	94	}
	95
11d1a4aa BH	96	/* Check for Toshiba SCC OHCI which has big endian registers
	97	* and little endian in memory data structures
	98	*/
931384fb	99	static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
11d1a4aa BH	100	{
	101	struct ohci_hcd *ohci = hcd_to_ohci (hcd);
	102
	103	/* That chip is only present in the southbridge of some
	104	* cell based platforms which are supposed to select
	105	* CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
	106	* that was the case though.
	107	*/
	108	#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
	109	ohci->flags \|= OHCI_QUIRK_BE_MMIO;
	110	ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
	111	return 0;
	112	#else
	113	ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
	114	return -ENXIO;
	115	#endif
	116	}
4302a595	117
d576bb9f MH	118	/* Check for NEC chip and apply quirk for allegedly lost interrupts.
d576bb9f MH	119	*/
89a0fd18 MN	120
	121	static void ohci_quirk_nec_worker(struct work_struct *work)
	122	{
	123	struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
	124	int status;
	125
	126	status = ohci_init(ohci);
	127	if (status != 0) {
	128	ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
	129	"ohci_init", status);
	130	return;
	131	}
	132
	133	status = ohci_restart(ohci);
	134	if (status != 0)
	135	ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
	136	"ohci_restart", status);
	137	}
	138
d576bb9f MH	139	static int ohci_quirk_nec(struct usb_hcd *hcd)
	140	{
	141	struct ohci_hcd *ohci = hcd_to_ohci (hcd);
	142
	143	ohci->flags \|= OHCI_QUIRK_NEC;
89a0fd18	144	INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
d576bb9f MH	145	ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
	146
	147	return 0;
	148	}
	149
ab1666c1 LY	150	static int ohci_quirk_amd700(struct usb_hcd *hcd)
	151	{
	152	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
ad93562b	153	struct pci_dev *amd_smbus_dev;
fa417c36	154	u8 rev;
ab1666c1	155
ad93562b AX	156	if (usb_amd_find_chipset_info())
	157	ohci->flags \|= OHCI_QUIRK_AMD_PLL;
	158
	159	amd_smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI,
	160	PCI_DEVICE_ID_ATI_SBX00_SMBUS, NULL);
ab1666c1 LY	161	if (!amd_smbus_dev)
	162	return 0;
	163
fa417c36	164	rev = amd_smbus_dev->revision;
a1f17a87 LY	165
	166	/* SB800 needs pre-fetch fix */
	167	if ((rev >= 0x40) && (rev <= 0x4f)) {
	168	ohci->flags \|= OHCI_QUIRK_AMD_PREFETCH;
	169	ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
	170	}
	171
ad93562b AX	172	pci_dev_put(amd_smbus_dev);
ad93562b AX	173	amd_smbus_dev = NULL;
ab1666c1	174
dee03770	175	ohci->flags \|= OHCI_QUIRK_GLOBAL_SUSPEND;
ab1666c1 LY	176	return 0;
	177	}
	178
a1f17a87 LY	179	static void sb800_prefetch(struct ohci_hcd *ohci, int on)
	180	{
	181	struct pci_dev *pdev;
	182	u16 misc;
	183
	184	pdev = to_pci_dev(ohci_to_hcd(ohci)->self.controller);
	185	pci_read_config_word(pdev, 0x50, &misc);
	186	if (on == 0)
	187	pci_write_config_word(pdev, 0x50, misc & 0xfcff);
	188	else
	189	pci_write_config_word(pdev, 0x50, misc \| 0x0300);
	190	}
	191
4302a595 BH	192	/* List of quirks for OHCI */
	193	static const struct pci_device_id ohci_pci_quirks[] = {
	194	{
	195	PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
	196	.driver_data = (unsigned long)ohci_quirk_amd756,
	197	},
	198	{
	199	PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
	200	.driver_data = (unsigned long)ohci_quirk_opti,
	201	},
	202	{
	203	PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
	204	.driver_data = (unsigned long)ohci_quirk_ns,
	205	},
	206	{
	207	PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
	208	.driver_data = (unsigned long)ohci_quirk_zfmicro,
	209	},
11d1a4aa BH	210	{
	211	PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
	212	.driver_data = (unsigned long)ohci_quirk_toshiba_scc,
	213	},
d576bb9f MH	214	{
	215	PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
	216	.driver_data = (unsigned long)ohci_quirk_nec,
	217	},
931384fb DB	218	{
	219	/* Toshiba portege 4000 */
	220	.vendor = PCI_VENDOR_ID_AL,
	221	.device = 0x5237,
8ab5e8c0	222	.subvendor = PCI_VENDOR_ID_TOSHIBA,
931384fb DB	223	.subdevice = 0x0004,
	224	.driver_data = (unsigned long) broken_suspend,
	225	},
33f73e56 RA	226	{
	227	PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
	228	.driver_data = (unsigned long) broken_suspend,
	229	},
ab1666c1 LY	230	{
	231	PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
	232	.driver_data = (unsigned long)ohci_quirk_amd700,
	233	},
	234	{
	235	PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
	236	.driver_data = (unsigned long)ohci_quirk_amd700,
	237	},
	238	{
	239	PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
	240	.driver_data = (unsigned long)ohci_quirk_amd700,
	241	},
	242
4302a595 BH	243	/* FIXME for some of the early AMD 760 southbridges, OHCI
4302a595 BH	244	* won't work at all. blacklist them.
6a9062f3	245	*/
11d1a4aa	246
4302a595 BH	247	{},
	248	};
	249
	250	static int ohci_pci_reset (struct usb_hcd *hcd)
	251	{
	252	struct ohci_hcd *ohci = hcd_to_ohci (hcd);
	253	int ret = 0;
	254
6a9062f3	255	if (hcd->self.controller) {
1da177e4	256	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
4302a595	257	const struct pci_device_id *quirk_id;
1da177e4	258
4302a595 BH	259	quirk_id = pci_match_id(ohci_pci_quirks, pdev);
	260	if (quirk_id != NULL) {
	261	int (quirk)(struct usb_hcd ohci);
	262	quirk = (void *)quirk_id->driver_data;
	263	ret = quirk(hcd);
1da177e4	264	}
4302a595 BH	265	}
	266	if (ret == 0) {
	267	ohci_hcd_init (ohci);
	268	return ohci_init (ohci);
	269	}
	270	return ret;
	271	}
1da177e4	272
1da177e4	273
41ac7b3a	274	static int ohci_pci_start (struct usb_hcd *hcd)
4302a595 BH	275	{
	276	struct ohci_hcd *ohci = hcd_to_ohci (hcd);
	277	int ret;
0e498763	278
4302a595 BH	279	#ifdef CONFIG_PM /* avoid warnings about unused pdev */
	280	if (hcd->self.controller) {
	281	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
6a9062f3 DB	282
	283	/* RWC may not be set for add-in PCI cards, since boot
	284	* firmware probably ignored them. This transfers PCI
6fd9086a	285	* PM wakeup capabilities.
6a9062f3	286	*/
6fd9086a	287	if (device_can_wakeup(&pdev->dev))
6a9062f3	288	ohci->hc_control \|= OHCI_CTRL_RWC;
1da177e4	289	}
4302a595	290	#endif /* CONFIG_PM */
1da177e4	291
4302a595 BH	292	ret = ohci_run (ohci);
4302a595 BH	293	if (ret < 0) {
1da177e4 LT	294	ohci_err (ohci, "can't start\n");
1da177e4 LT	295	ohci_stop (hcd);
1da177e4	296	}
4302a595	297	return ret;
1da177e4 LT	298	}
1da177e4 LT	299
1da177e4 LT	300
	301	/-------------------------------------------------------------------------/
	302
	303	static const struct hc_driver ohci_pci_hc_driver = {
	304	.description = hcd_name,
	305	.product_desc = "OHCI Host Controller",
	306	.hcd_priv_size = sizeof(struct ohci_hcd),
	307
	308	/*
	309	* generic hardware linkage
	310	*/
	311	.irq = ohci_irq,
	312	.flags = HCD_MEMORY \| HCD_USB11,
	313
	314	/*
	315	* basic lifecycle operations
	316	*/
	317	.reset = ohci_pci_reset,
	318	.start = ohci_pci_start,
d413984a	319	.stop = ohci_stop,
64a21d02	320	.shutdown = ohci_shutdown,
d413984a	321
1da177e4	322	#ifdef CONFIG_PM
cd1965db FF	323	.pci_suspend = ohci_suspend,
cd1965db FF	324	.pci_resume = ohci_resume,
1da177e4	325	#endif
1da177e4 LT	326
	327	/*
	328	* managing i/o requests and associated device resources
	329	*/
	330	.urb_enqueue = ohci_urb_enqueue,
	331	.urb_dequeue = ohci_urb_dequeue,
	332	.endpoint_disable = ohci_endpoint_disable,
	333
	334	/*
	335	* scheduling support
	336	*/
	337	.get_frame_number = ohci_get_frame,
	338
	339	/*
	340	* root hub support
	341	*/
	342	.hub_status_data = ohci_hub_status_data,
	343	.hub_control = ohci_hub_control,
8ad7fe16	344	#ifdef CONFIG_PM
0c0382e3 AS	345	.bus_suspend = ohci_bus_suspend,
0c0382e3 AS	346	.bus_resume = ohci_bus_resume,
1da177e4 LT	347	#endif
	348	.start_port_reset = ohci_start_port_reset,
	349	};
	350
	351	/-------------------------------------------------------------------------/
	352
	353
	354	static const struct pci_device_id pci_ids [] = { {
	355	/* handle any USB OHCI controller */
c67808ee	356	PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
1da177e4	357	.driver_data = (unsigned long) &ohci_pci_hc_driver,
3a0bac06 AR	358	}, {
	359	/* The device in the ConneXT I/O hub has no class reg */
	360	PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
	361	.driver_data = (unsigned long) &ohci_pci_hc_driver,
1da177e4 LT	362	}, { /* end: all zeroes */ }
	363	};
	364	MODULE_DEVICE_TABLE (pci, pci_ids);
	365
	366	/* pci driver glue; this is a "new style" PCI driver module */
	367	static struct pci_driver ohci_pci_driver = {
	368	.name = (char *) hcd_name,
	369	.id_table = pci_ids,
	370
	371	.probe = usb_hcd_pci_probe,
	372	.remove = usb_hcd_pci_remove,
abb30641	373	.shutdown = usb_hcd_pci_shutdown,
1da177e4	374
ac78ae63	375	#ifdef CONFIG_PM
abb30641 AS	376	.driver = {
	377	.pm = &usb_hcd_pci_pm_ops
	378	},
1da177e4 LT	379	#endif
1da177e4 LT	380	};