[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / tty / serial / timbuart.c

/*
 * timbuart.c timberdale FPGA UART driver
 * Copyright (c) 2009 Intel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

/* Supports:
 * Timberdale FPGA UART
 */

#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/serial_core.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/module.h>

#include "timbuart.h"

struct timbuart_port {
	struct uart_port	port;
	struct tasklet_struct	tasklet;
	int			usedma;
	u32			last_ier;
	struct platform_device  *dev;
};

static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
	921600, 1843200, 3250000};

static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);

static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);

static void timbuart_stop_rx(struct uart_port *port)
{
	/* spin lock held by upper layer, disable all RX interrupts */
	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
	iowrite32(ier, port->membase + TIMBUART_IER);
}

static void timbuart_stop_tx(struct uart_port *port)
{
	/* spinlock held by upper layer, disable TX interrupt */
	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
	iowrite32(ier, port->membase + TIMBUART_IER);
}

static void timbuart_start_tx(struct uart_port *port)
{
	struct timbuart_port *uart =
		container_of(port, struct timbuart_port, port);

	/* do not transfer anything here -> fire off the tasklet */
	tasklet_schedule(&uart->tasklet);
}

static unsigned int timbuart_tx_empty(struct uart_port *port)
{
	u32 isr = ioread32(port->membase + TIMBUART_ISR);

	return (isr & TXBE) ? TIOCSER_TEMT : 0;
}

static void timbuart_flush_buffer(struct uart_port *port)
{
	if (!timbuart_tx_empty(port)) {
		u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
			TIMBUART_CTRL_FLSHTX;

		iowrite8(ctl, port->membase + TIMBUART_CTRL);
		iowrite32(TXBF, port->membase + TIMBUART_ISR);
	}
}

static void timbuart_rx_chars(struct uart_port *port)
{
	struct tty_port *tport = &port->state->port;

	while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
		u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
		port->icount.rx++;
		tty_insert_flip_char(tport, ch, TTY_NORMAL);
	}

	spin_unlock(&port->lock);
	tty_flip_buffer_push(tport);
	spin_lock(&port->lock);

	dev_dbg(port->dev, "%s - total read %d bytes\n",
		__func__, port->icount.rx);
}

static void timbuart_tx_chars(struct uart_port *port)
{
	struct circ_buf *xmit = &port->state->xmit;

	while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
		!uart_circ_empty(xmit)) {
		iowrite8(xmit->buf[xmit->tail],
			port->membase + TIMBUART_TXFIFO);
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
	}

	dev_dbg(port->dev,
		"%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
		 __func__,
		port->icount.tx,
		ioread8(port->membase + TIMBUART_CTRL),
		port->mctrl & TIOCM_RTS,
		ioread8(port->membase + TIMBUART_BAUDRATE));
}

static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
{
	struct timbuart_port *uart =
		container_of(port, struct timbuart_port, port);
	struct circ_buf *xmit = &port->state->xmit;

	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
		return;

	if (port->x_char)
		return;

	if (isr & TXFLAGS) {
		timbuart_tx_chars(port);
		/* clear all TX interrupts */
		iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);

		if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
			uart_write_wakeup(port);
	} else
		/* Re-enable any tx interrupt */
		*ier |= uart->last_ier & TXFLAGS;

	/* enable interrupts if there are chars in the transmit buffer,
	 * Or if we delivered some bytes and want the almost empty interrupt
	 * we wake up the upper layer later when we got the interrupt
	 * to give it some time to go out...
	 */
	if (!uart_circ_empty(xmit))
		*ier |= TXBAE;

	dev_dbg(port->dev, "%s - leaving\n", __func__);
}

void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
{
	if (isr & RXFLAGS) {
		/* Some RX status is set */
		if (isr & RXBF) {
			u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
				TIMBUART_CTRL_FLSHRX;
			iowrite8(ctl, port->membase + TIMBUART_CTRL);
			port->icount.overrun++;
		} else if (isr & (RXDP))
			timbuart_rx_chars(port);

		/* ack all RX interrupts */
		iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
	}

	/* always have the RX interrupts enabled */
	*ier |= RXBAF | RXBF | RXTT;

	dev_dbg(port->dev, "%s - leaving\n", __func__);
}

void timbuart_tasklet(unsigned long arg)
{
	struct timbuart_port *uart = (struct timbuart_port *)arg;
	u32 isr, ier = 0;

	spin_lock(&uart->port.lock);

	isr = ioread32(uart->port.membase + TIMBUART_ISR);
	dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);

	if (!uart->usedma)
		timbuart_handle_tx_port(&uart->port, isr, &ier);

	timbuart_mctrl_check(&uart->port, isr, &ier);

	if (!uart->usedma)
		timbuart_handle_rx_port(&uart->port, isr, &ier);

	iowrite32(ier, uart->port.membase + TIMBUART_IER);

	spin_unlock(&uart->port.lock);
	dev_dbg(uart->port.dev, "%s leaving\n", __func__);
}

static unsigned int timbuart_get_mctrl(struct uart_port *port)
{
	u8 cts = ioread8(port->membase + TIMBUART_CTRL);
	dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);

	if (cts & TIMBUART_CTRL_CTS)
		return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
	else
		return TIOCM_DSR | TIOCM_CAR;
}

static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
	dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);

	if (mctrl & TIOCM_RTS)
		iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
	else
		iowrite8(0, port->membase + TIMBUART_CTRL);
}

static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
{
	unsigned int cts;

	if (isr & CTS_DELTA) {
		/* ack */
		iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
		cts = timbuart_get_mctrl(port);
		uart_handle_cts_change(port, cts & TIOCM_CTS);
		wake_up_interruptible(&port->state->port.delta_msr_wait);
	}

	*ier |= CTS_DELTA;
}

static void timbuart_enable_ms(struct uart_port *port)
{
	/* N/A */
}

static void timbuart_break_ctl(struct uart_port *port, int ctl)
{
	/* N/A */
}

static int timbuart_startup(struct uart_port *port)
{
	struct timbuart_port *uart =
		container_of(port, struct timbuart_port, port);

	dev_dbg(port->dev, "%s\n", __func__);

	iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
	iowrite32(0x1ff, port->membase + TIMBUART_ISR);
	/* Enable all but TX interrupts */
	iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
		port->membase + TIMBUART_IER);

	return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
		"timb-uart", uart);
}

static void timbuart_shutdown(struct uart_port *port)
{
	struct timbuart_port *uart =
		container_of(port, struct timbuart_port, port);
	dev_dbg(port->dev, "%s\n", __func__);
	free_irq(port->irq, uart);
	iowrite32(0, port->membase + TIMBUART_IER);
}

static int get_bindex(int baud)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(baudrates); i++)
		if (baud <= baudrates[i])
			return i;

	return -1;
}

static void timbuart_set_termios(struct uart_port *port,
	struct ktermios *termios,
	struct ktermios *old)
{
	unsigned int baud;
	short bindex;
	unsigned long flags;

	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
	bindex = get_bindex(baud);
	dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);

	if (bindex < 0)
		bindex = 0;
	baud = baudrates[bindex];

	/* The serial layer calls into this once with old = NULL when setting
	   up initially */
	if (old)
		tty_termios_copy_hw(termios, old);
	tty_termios_encode_baud_rate(termios, baud, baud);

	spin_lock_irqsave(&port->lock, flags);
	iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
	uart_update_timeout(port, termios->c_cflag, baud);
	spin_unlock_irqrestore(&port->lock, flags);
}

static const char *timbuart_type(struct uart_port *port)
{
	return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
}

/* We do not request/release mappings of the registers here,
 * currently it's done in the proble function.
 */
static void timbuart_release_port(struct uart_port *port)
{
	struct platform_device *pdev = to_platform_device(port->dev);
	int size =
		resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));

	if (port->flags & UPF_IOREMAP) {
		iounmap(port->membase);
		port->membase = NULL;
	}

	release_mem_region(port->mapbase, size);
}

static int timbuart_request_port(struct uart_port *port)
{
	struct platform_device *pdev = to_platform_device(port->dev);
	int size =
		resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));

	if (!request_mem_region(port->mapbase, size, "timb-uart"))
		return -EBUSY;

	if (port->flags & UPF_IOREMAP) {
		port->membase = ioremap(port->mapbase, size);
		if (port->membase == NULL) {
			release_mem_region(port->mapbase, size);
			return -ENOMEM;
		}
	}

	return 0;
}

static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
{
	struct timbuart_port *uart = (struct timbuart_port *)devid;

	if (ioread8(uart->port.membase + TIMBUART_IPR)) {
		uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);

		/* disable interrupts, the tasklet enables them again */
		iowrite32(0, uart->port.membase + TIMBUART_IER);

		/* fire off bottom half */
		tasklet_schedule(&uart->tasklet);

		return IRQ_HANDLED;
	} else
		return IRQ_NONE;
}

/*
 * Configure/autoconfigure the port.
 */
static void timbuart_config_port(struct uart_port *port, int flags)
{
	if (flags & UART_CONFIG_TYPE) {
		port->type = PORT_TIMBUART;
		timbuart_request_port(port);
	}
}

static int timbuart_verify_port(struct uart_port *port,
	struct serial_struct *ser)
{
	/* we don't want the core code to modify any port params */
	return -EINVAL;
}

static struct uart_ops timbuart_ops = {
	.tx_empty = timbuart_tx_empty,
	.set_mctrl = timbuart_set_mctrl,
	.get_mctrl = timbuart_get_mctrl,
	.stop_tx = timbuart_stop_tx,
	.start_tx = timbuart_start_tx,
	.flush_buffer = timbuart_flush_buffer,
	.stop_rx = timbuart_stop_rx,
	.enable_ms = timbuart_enable_ms,
	.break_ctl = timbuart_break_ctl,
	.startup = timbuart_startup,
	.shutdown = timbuart_shutdown,
	.set_termios = timbuart_set_termios,
	.type = timbuart_type,
	.release_port = timbuart_release_port,
	.request_port = timbuart_request_port,
	.config_port = timbuart_config_port,
	.verify_port = timbuart_verify_port
};

static struct uart_driver timbuart_driver = {
	.owner = THIS_MODULE,
	.driver_name = "timberdale_uart",
	.dev_name = "ttyTU",
	.major = TIMBUART_MAJOR,
	.minor = TIMBUART_MINOR,
	.nr = 1
};

static int timbuart_probe(struct platform_device *dev)
{
	int err, irq;
	struct timbuart_port *uart;
	struct resource *iomem;

	dev_dbg(&dev->dev, "%s\n", __func__);

	uart = kzalloc(sizeof(*uart), GFP_KERNEL);
	if (!uart) {
		err = -EINVAL;
		goto err_mem;
	}

	uart->usedma = 0;

	uart->port.uartclk = 3250000 * 16;
	uart->port.fifosize  = TIMBUART_FIFO_SIZE;
	uart->port.regshift  = 2;
	uart->port.iotype  = UPIO_MEM;
	uart->port.ops = &timbuart_ops;
	uart->port.irq = 0;
	uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
	uart->port.line  = 0;
	uart->port.dev	= &dev->dev;

	iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
	if (!iomem) {
		err = -ENOMEM;
		goto err_register;
	}
	uart->port.mapbase = iomem->start;
	uart->port.membase = NULL;

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		err = -EINVAL;
		goto err_register;
	}
	uart->port.irq = irq;

	tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);

	err = uart_register_driver(&timbuart_driver);
	if (err)
		goto err_register;

	err = uart_add_one_port(&timbuart_driver, &uart->port);
	if (err)
		goto err_add_port;

	platform_set_drvdata(dev, uart);

	return 0;

err_add_port:
	uart_unregister_driver(&timbuart_driver);
err_register:
	kfree(uart);
err_mem:
	printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
		err);

	return err;
}

static int timbuart_remove(struct platform_device *dev)
{
	struct timbuart_port *uart = platform_get_drvdata(dev);

	tasklet_kill(&uart->tasklet);
	uart_remove_one_port(&timbuart_driver, &uart->port);
	uart_unregister_driver(&timbuart_driver);
	kfree(uart);

	return 0;
}

static struct platform_driver timbuart_platform_driver = {
	.driver = {
		.name	= "timb-uart",
		.owner	= THIS_MODULE,
	},
	.probe		= timbuart_probe,
	.remove		= timbuart_remove,
};

module_platform_driver(timbuart_platform_driver);

MODULE_DESCRIPTION("Timberdale UART driver");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:timb-uart");
Commit	Line	Data
34aec591 RR	1	/*
	2	* timbuart.c timberdale FPGA UART driver
	3	* Copyright (c) 2009 Intel Corporation
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	17	*/
	18
	19	/* Supports:
	20	* Timberdale FPGA UART
	21	*/
	22
	23	#include <linux/pci.h>
	24	#include <linux/interrupt.h>
	25	#include <linux/serial_core.h>
ee160a38 JS	26	#include <linux/tty.h>
ee160a38 JS	27	#include <linux/tty_flip.h>
34aec591 RR	28	#include <linux/kernel.h>
	29	#include <linux/platform_device.h>
	30	#include <linux/ioport.h>
5a0e3ad6	31	#include <linux/slab.h>
578b9ce0	32	#include <linux/module.h>
34aec591 RR	33
	34	#include "timbuart.h"
	35
	36	struct timbuart_port {
	37	struct uart_port port;
	38	struct tasklet_struct tasklet;
	39	int usedma;
2421c48b	40	u32 last_ier;
34aec591 RR	41	struct platform_device *dev;
	42	};
	43
	44	static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
	45	921600, 1843200, 3250000};
	46
2421c48b	47	static void timbuart_mctrl_check(struct uart_port port, u32 isr, u32 ier);
34aec591 RR	48
	49	static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
	50
	51	static void timbuart_stop_rx(struct uart_port *port)
	52	{
	53	/* spin lock held by upper layer, disable all RX interrupts */
2421c48b RR	54	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
2421c48b RR	55	iowrite32(ier, port->membase + TIMBUART_IER);
34aec591 RR	56	}
	57
	58	static void timbuart_stop_tx(struct uart_port *port)
	59	{
	60	/* spinlock held by upper layer, disable TX interrupt */
2421c48b RR	61	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
2421c48b RR	62	iowrite32(ier, port->membase + TIMBUART_IER);
34aec591 RR	63	}
	64
	65	static void timbuart_start_tx(struct uart_port *port)
	66	{
	67	struct timbuart_port *uart =
	68	container_of(port, struct timbuart_port, port);
	69
	70	/* do not transfer anything here -> fire off the tasklet */
	71	tasklet_schedule(&uart->tasklet);
	72	}
	73
24cd73a3 RR	74	static unsigned int timbuart_tx_empty(struct uart_port *port)
	75	{
	76	u32 isr = ioread32(port->membase + TIMBUART_ISR);
	77
	78	return (isr & TXBE) ? TIOCSER_TEMT : 0;
	79	}
	80
34aec591 RR	81	static void timbuart_flush_buffer(struct uart_port *port)
34aec591 RR	82	{
24cd73a3 RR	83	if (!timbuart_tx_empty(port)) {
	84	u8 ctl = ioread8(port->membase + TIMBUART_CTRL) \|
	85	TIMBUART_CTRL_FLSHTX;
34aec591	86
24cd73a3 RR	87	iowrite8(ctl, port->membase + TIMBUART_CTRL);
	88	iowrite32(TXBF, port->membase + TIMBUART_ISR);
	89	}
34aec591 RR	90	}
	91
	92	static void timbuart_rx_chars(struct uart_port *port)
	93	{
92a19f9c	94	struct tty_port *tport = &port->state->port;
34aec591	95
2421c48b	96	while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
34aec591 RR	97	u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
34aec591 RR	98	port->icount.rx++;
92a19f9c	99	tty_insert_flip_char(tport, ch, TTY_NORMAL);
34aec591 RR	100	}
	101
	102	spin_unlock(&port->lock);
2e124b4a	103	tty_flip_buffer_push(tport);
34aec591 RR	104	spin_lock(&port->lock);
	105
	106	dev_dbg(port->dev, "%s - total read %d bytes\n",
	107	__func__, port->icount.rx);
	108	}
	109
	110	static void timbuart_tx_chars(struct uart_port *port)
	111	{
ebd2c8f6	112	struct circ_buf *xmit = &port->state->xmit;
34aec591	113
2421c48b	114	while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
34aec591 RR	115	!uart_circ_empty(xmit)) {
	116	iowrite8(xmit->buf[xmit->tail],
	117	port->membase + TIMBUART_TXFIFO);
	118	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
	119	port->icount.tx++;
	120	}
	121
	122	dev_dbg(port->dev,
	123	"%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
	124	__func__,
	125	port->icount.tx,
	126	ioread8(port->membase + TIMBUART_CTRL),
	127	port->mctrl & TIOCM_RTS,
	128	ioread8(port->membase + TIMBUART_BAUDRATE));
	129	}
	130
2421c48b	131	static void timbuart_handle_tx_port(struct uart_port port, u32 isr, u32 ier)
34aec591 RR	132	{
	133	struct timbuart_port *uart =
	134	container_of(port, struct timbuart_port, port);
ebd2c8f6	135	struct circ_buf *xmit = &port->state->xmit;
34aec591 RR	136
	137	if (uart_circ_empty(xmit) \|\| uart_tx_stopped(port))
	138	return;
	139
	140	if (port->x_char)
	141	return;
	142
	143	if (isr & TXFLAGS) {
	144	timbuart_tx_chars(port);
	145	/* clear all TX interrupts */
2421c48b	146	iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
34aec591 RR	147
	148	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	149	uart_write_wakeup(port);
	150	} else
	151	/* Re-enable any tx interrupt */
	152	*ier \|= uart->last_ier & TXFLAGS;
	153
	154	/* enable interrupts if there are chars in the transmit buffer,
	155	* Or if we delivered some bytes and want the almost empty interrupt
	156	* we wake up the upper layer later when we got the interrupt
	157	* to give it some time to go out...
	158	*/
	159	if (!uart_circ_empty(xmit))
	160	*ier \|= TXBAE;
	161
	162	dev_dbg(port->dev, "%s - leaving\n", __func__);
	163	}
	164
2421c48b	165	void timbuart_handle_rx_port(struct uart_port port, u32 isr, u32 ier)
34aec591 RR	166	{
	167	if (isr & RXFLAGS) {
	168	/* Some RX status is set */
	169	if (isr & RXBF) {
	170	u8 ctl = ioread8(port->membase + TIMBUART_CTRL) \|
	171	TIMBUART_CTRL_FLSHRX;
	172	iowrite8(ctl, port->membase + TIMBUART_CTRL);
	173	port->icount.overrun++;
	174	} else if (isr & (RXDP))
	175	timbuart_rx_chars(port);
	176
	177	/* ack all RX interrupts */
2421c48b	178	iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
34aec591 RR	179	}
	180
	181	/* always have the RX interrupts enabled */
	182	*ier \|= RXBAF \| RXBF \| RXTT;
	183
	184	dev_dbg(port->dev, "%s - leaving\n", __func__);
	185	}
	186
	187	void timbuart_tasklet(unsigned long arg)
	188	{
	189	struct timbuart_port uart = (struct timbuart_port )arg;
2421c48b	190	u32 isr, ier = 0;
34aec591 RR	191
	192	spin_lock(&uart->port.lock);
	193
2421c48b	194	isr = ioread32(uart->port.membase + TIMBUART_ISR);
34aec591 RR	195	dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
	196
	197	if (!uart->usedma)
	198	timbuart_handle_tx_port(&uart->port, isr, &ier);
	199
	200	timbuart_mctrl_check(&uart->port, isr, &ier);
	201
	202	if (!uart->usedma)
	203	timbuart_handle_rx_port(&uart->port, isr, &ier);
	204
2421c48b	205	iowrite32(ier, uart->port.membase + TIMBUART_IER);
34aec591 RR	206
	207	spin_unlock(&uart->port.lock);
	208	dev_dbg(uart->port.dev, "%s leaving\n", __func__);
	209	}
	210
34aec591 RR	211	static unsigned int timbuart_get_mctrl(struct uart_port *port)
	212	{
	213	u8 cts = ioread8(port->membase + TIMBUART_CTRL);
	214	dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
	215
	216	if (cts & TIMBUART_CTRL_CTS)
	217	return TIOCM_CTS \| TIOCM_DSR \| TIOCM_CAR;
	218	else
	219	return TIOCM_DSR \| TIOCM_CAR;
	220	}
	221
	222	static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
	223	{
	224	dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
	225
	226	if (mctrl & TIOCM_RTS)
	227	iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
	228	else
44051996	229	iowrite8(0, port->membase + TIMBUART_CTRL);
34aec591 RR	230	}
34aec591 RR	231
2421c48b	232	static void timbuart_mctrl_check(struct uart_port port, u32 isr, u32 ier)
34aec591 RR	233	{
	234	unsigned int cts;
	235
	236	if (isr & CTS_DELTA) {
	237	/* ack */
2421c48b	238	iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
34aec591 RR	239	cts = timbuart_get_mctrl(port);
34aec591 RR	240	uart_handle_cts_change(port, cts & TIOCM_CTS);
bdc04e31	241	wake_up_interruptible(&port->state->port.delta_msr_wait);
34aec591 RR	242	}
	243
	244	*ier \|= CTS_DELTA;
	245	}
	246
	247	static void timbuart_enable_ms(struct uart_port *port)
	248	{
	249	/* N/A */
	250	}
	251
	252	static void timbuart_break_ctl(struct uart_port *port, int ctl)
	253	{
	254	/* N/A */
	255	}
	256
	257	static int timbuart_startup(struct uart_port *port)
	258	{
	259	struct timbuart_port *uart =
	260	container_of(port, struct timbuart_port, port);
	261
	262	dev_dbg(port->dev, "%s\n", __func__);
	263
	264	iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
2421c48b	265	iowrite32(0x1ff, port->membase + TIMBUART_ISR);
34aec591	266	/* Enable all but TX interrupts */
2421c48b	267	iowrite32(RXBAF \| RXBF \| RXTT \| CTS_DELTA,
34aec591 RR	268	port->membase + TIMBUART_IER);
	269
	270	return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
	271	"timb-uart", uart);
	272	}
	273
	274	static void timbuart_shutdown(struct uart_port *port)
	275	{
	276	struct timbuart_port *uart =
	277	container_of(port, struct timbuart_port, port);
	278	dev_dbg(port->dev, "%s\n", __func__);
	279	free_irq(port->irq, uart);
2421c48b	280	iowrite32(0, port->membase + TIMBUART_IER);
34aec591 RR	281	}
	282
	283	static int get_bindex(int baud)
	284	{
	285	int i;
	286
	287	for (i = 0; i < ARRAY_SIZE(baudrates); i++)
7d55deaf	288	if (baud <= baudrates[i])
34aec591 RR	289	return i;
	290
	291	return -1;
	292	}
	293
	294	static void timbuart_set_termios(struct uart_port *port,
	295	struct ktermios *termios,
	296	struct ktermios *old)
	297	{
	298	unsigned int baud;
	299	short bindex;
	300	unsigned long flags;
	301
	302	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
	303	bindex = get_bindex(baud);
	304	dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
	305
7d55deaf AC	306	if (bindex < 0)
	307	bindex = 0;
	308	baud = baudrates[bindex];
	309
	310	/* The serial layer calls into this once with old = NULL when setting
	311	up initially */
	312	if (old)
	313	tty_termios_copy_hw(termios, old);
	314	tty_termios_encode_baud_rate(termios, baud, baud);
	315
	316	spin_lock_irqsave(&port->lock, flags);
	317	iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
	318	uart_update_timeout(port, termios->c_cflag, baud);
	319	spin_unlock_irqrestore(&port->lock, flags);
34aec591 RR	320	}
	321
	322	static const char timbuart_type(struct uart_port port)
	323	{
	324	return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
	325	}
	326
	327	/* We do not request/release mappings of the registers here,
	328	* currently it's done in the proble function.
	329	*/
	330	static void timbuart_release_port(struct uart_port *port)
	331	{
	332	struct platform_device *pdev = to_platform_device(port->dev);
	333	int size =
	334	resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
	335
	336	if (port->flags & UPF_IOREMAP) {
	337	iounmap(port->membase);
	338	port->membase = NULL;
	339	}
	340
	341	release_mem_region(port->mapbase, size);
	342	}
	343
	344	static int timbuart_request_port(struct uart_port *port)
	345	{
	346	struct platform_device *pdev = to_platform_device(port->dev);
	347	int size =
	348	resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
	349
	350	if (!request_mem_region(port->mapbase, size, "timb-uart"))
	351	return -EBUSY;
	352
	353	if (port->flags & UPF_IOREMAP) {
	354	port->membase = ioremap(port->mapbase, size);
	355	if (port->membase == NULL) {
	356	release_mem_region(port->mapbase, size);
	357	return -ENOMEM;
	358	}
	359	}
	360
	361	return 0;
	362	}
	363
	364	static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
	365	{
	366	struct timbuart_port uart = (struct timbuart_port )devid;
	367
	368	if (ioread8(uart->port.membase + TIMBUART_IPR)) {
2421c48b	369	uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
34aec591 RR	370
34aec591 RR	371	/* disable interrupts, the tasklet enables them again */
2421c48b	372	iowrite32(0, uart->port.membase + TIMBUART_IER);
34aec591 RR	373
	374	/* fire off bottom half */
	375	tasklet_schedule(&uart->tasklet);
	376
	377	return IRQ_HANDLED;
	378	} else
	379	return IRQ_NONE;
	380	}
	381
	382	/*
	383	* Configure/autoconfigure the port.
	384	*/
	385	static void timbuart_config_port(struct uart_port *port, int flags)
	386	{
	387	if (flags & UART_CONFIG_TYPE) {
	388	port->type = PORT_TIMBUART;
	389	timbuart_request_port(port);
	390	}
	391	}
	392
	393	static int timbuart_verify_port(struct uart_port *port,
	394	struct serial_struct *ser)
	395	{
	396	/* we don't want the core code to modify any port params */
	397	return -EINVAL;
	398	}
	399
	400	static struct uart_ops timbuart_ops = {
	401	.tx_empty = timbuart_tx_empty,
	402	.set_mctrl = timbuart_set_mctrl,
	403	.get_mctrl = timbuart_get_mctrl,
	404	.stop_tx = timbuart_stop_tx,
	405	.start_tx = timbuart_start_tx,
	406	.flush_buffer = timbuart_flush_buffer,
	407	.stop_rx = timbuart_stop_rx,
	408	.enable_ms = timbuart_enable_ms,
	409	.break_ctl = timbuart_break_ctl,
	410	.startup = timbuart_startup,
	411	.shutdown = timbuart_shutdown,
	412	.set_termios = timbuart_set_termios,
	413	.type = timbuart_type,
	414	.release_port = timbuart_release_port,
	415	.request_port = timbuart_request_port,
	416	.config_port = timbuart_config_port,
	417	.verify_port = timbuart_verify_port
	418	};
	419
	420	static struct uart_driver timbuart_driver = {
	421	.owner = THIS_MODULE,
	422	.driver_name = "timberdale_uart",
	423	.dev_name = "ttyTU",
	424	.major = TIMBUART_MAJOR,
	425	.minor = TIMBUART_MINOR,
	426	.nr = 1
	427	};
	428
9671f099	429	static int timbuart_probe(struct platform_device *dev)
34aec591	430	{
1e091751	431	int err, irq;
34aec591 RR	432	struct timbuart_port *uart;
	433	struct resource *iomem;
	434
	435	dev_dbg(&dev->dev, "%s\n", __func__);
	436
	437	uart = kzalloc(sizeof(*uart), GFP_KERNEL);
	438	if (!uart) {
	439	err = -EINVAL;
	440	goto err_mem;
	441	}
	442
	443	uart->usedma = 0;
	444
	445	uart->port.uartclk = 3250000 * 16;
	446	uart->port.fifosize = TIMBUART_FIFO_SIZE;
	447	uart->port.regshift = 2;
	448	uart->port.iotype = UPIO_MEM;
	449	uart->port.ops = &timbuart_ops;
	450	uart->port.irq = 0;
	451	uart->port.flags = UPF_BOOT_AUTOCONF \| UPF_IOREMAP;
	452	uart->port.line = 0;
	453	uart->port.dev = &dev->dev;
	454
	455	iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
	456	if (!iomem) {
	457	err = -ENOMEM;
	458	goto err_register;
	459	}
	460	uart->port.mapbase = iomem->start;
	461	uart->port.membase = NULL;
	462
1e091751 RK	463	irq = platform_get_irq(dev, 0);
1e091751 RK	464	if (irq < 0) {
34aec591 RR	465	err = -EINVAL;
	466	goto err_register;
	467	}
1e091751	468	uart->port.irq = irq;
34aec591 RR	469
	470	tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
	471
	472	err = uart_register_driver(&timbuart_driver);
	473	if (err)
	474	goto err_register;
	475
	476	err = uart_add_one_port(&timbuart_driver, &uart->port);
	477	if (err)
	478	goto err_add_port;
	479
	480	platform_set_drvdata(dev, uart);
	481
	482	return 0;
	483
	484	err_add_port:
	485	uart_unregister_driver(&timbuart_driver);
	486	err_register:
	487	kfree(uart);
	488	err_mem:
	489	printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
	490	err);
	491
	492	return err;
	493	}
	494
ae8d8a14	495	static int timbuart_remove(struct platform_device *dev)
34aec591 RR	496	{
	497	struct timbuart_port *uart = platform_get_drvdata(dev);
	498
	499	tasklet_kill(&uart->tasklet);
	500	uart_remove_one_port(&timbuart_driver, &uart->port);
	501	uart_unregister_driver(&timbuart_driver);
	502	kfree(uart);
	503
	504	return 0;
	505	}
	506
	507	static struct platform_driver timbuart_platform_driver = {
	508	.driver = {
	509	.name = "timb-uart",
	510	.owner = THIS_MODULE,
	511	},
	512	.probe = timbuart_probe,
2d47b716	513	.remove = timbuart_remove,
34aec591 RR	514	};
34aec591 RR	515
c8381c15	516	module_platform_driver(timbuart_platform_driver);
34aec591 RR	517
	518	MODULE_DESCRIPTION("Timberdale UART driver");
	519	MODULE_LICENSE("GPL v2");
	520	MODULE_ALIAS("platform:timb-uart");
	521