[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / iio / meter / ade7754.c

/*
 * ADE7754 Polyphase Multifunction Energy Metering IC Driver
 *
 * Copyright 2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/list.h>

#include "../iio.h"
#include "../sysfs.h"
#include "meter.h"
#include "ade7754.h"

static int ade7754_spi_write_reg_8(struct device *dev,
		u8 reg_address,
		u8 val)
{
	int ret;
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7754_WRITE_REG(reg_address);
	st->tx[1] = val;

	ret = spi_write(st->us, st->tx, 2);
	mutex_unlock(&st->buf_lock);

	return ret;
}

static int ade7754_spi_write_reg_16(struct device *dev,
		u8 reg_address,
		u16 value)
{
	int ret;
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7754_WRITE_REG(reg_address);
	st->tx[1] = (value >> 8) & 0xFF;
	st->tx[2] = value & 0xFF;
	ret = spi_write(st->us, st->tx, 3);
	mutex_unlock(&st->buf_lock);

	return ret;
}

static int ade7754_spi_read_reg_8(struct device *dev,
		u8 reg_address,
		u8 *val)
{
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	int ret;

	ret = spi_w8r8(st->us, ADE7754_READ_REG(reg_address));
	if (ret < 0) {
		dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
				reg_address);
		return ret;
	}
	*val = ret;

	return 0;
}

static int ade7754_spi_read_reg_16(struct device *dev,
		u8 reg_address,
		u16 *val)
{
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	int ret;

	ret = spi_w8r16(st->us, ADE7754_READ_REG(reg_address));
	if (ret < 0) {
		dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
			reg_address);
		return ret;
	}

	*val = ret;
	*val = be16_to_cpup(val);

	return 0;
}

static int ade7754_spi_read_reg_24(struct device *dev,
		u8 reg_address,
		u32 *val)
{
	struct spi_message msg;
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	int ret;
	struct spi_transfer xfers[] = {
		{
			.tx_buf = st->tx,
			.rx_buf = st->rx,
			.bits_per_word = 8,
			.len = 4,
		},
	};

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7754_READ_REG(reg_address);
	st->tx[1] = 0;
	st->tx[2] = 0;
	st->tx[3] = 0;

	spi_message_init(&msg);
	spi_message_add_tail(xfers, &msg);
	ret = spi_sync(st->us, &msg);
	if (ret) {
		dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
				reg_address);
		goto error_ret;
	}
	*val = (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];

error_ret:
	mutex_unlock(&st->buf_lock);
	return ret;
}

static ssize_t ade7754_read_8bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u8 val = 0;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7754_spi_read_reg_8(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7754_read_16bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u16 val = 0;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7754_spi_read_reg_16(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7754_read_24bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u32 val = 0;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7754_spi_read_reg_24(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val & 0xFFFFFF);
}

static ssize_t ade7754_write_8bit(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	int ret;
	long val;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		goto error_ret;
	ret = ade7754_spi_write_reg_8(dev, this_attr->address, val);

error_ret:
	return ret ? ret : len;
}

static ssize_t ade7754_write_16bit(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	int ret;
	long val;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		goto error_ret;
	ret = ade7754_spi_write_reg_16(dev, this_attr->address, val);

error_ret:
	return ret ? ret : len;
}

static int ade7754_reset(struct device *dev)
{
	u8 val;

	ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
	val |= 1 << 6; /* Software Chip Reset */
	return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
}


static ssize_t ade7754_write_reset(struct device *dev,
		struct device_attribute *attr,
		const char *buf, size_t len)
{
	if (len < 1)
		return -1;
	switch (buf[0]) {
	case '1':
	case 'y':
	case 'Y':
		return ade7754_reset(dev);
	}
	return -1;
}

static IIO_DEV_ATTR_AENERGY(ade7754_read_24bit, ADE7754_AENERGY);
static IIO_DEV_ATTR_LAENERGY(ade7754_read_24bit, ADE7754_LAENERGY);
static IIO_DEV_ATTR_VAENERGY(ade7754_read_24bit, ADE7754_VAENERGY);
static IIO_DEV_ATTR_LVAENERGY(ade7754_read_24bit, ADE7754_LVAENERGY);
static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
		ade7754_read_8bit,
		ade7754_write_8bit,
		ADE7754_VPEAK);
static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
		ade7754_read_8bit,
		ade7754_write_8bit,
		ADE7754_VPEAK);
static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
		ade7754_read_8bit,
		ade7754_write_8bit,
		ADE7754_APHCAL);
static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
		ade7754_read_8bit,
		ade7754_write_8bit,
		ADE7754_BPHCAL);
static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
		ade7754_read_8bit,
		ade7754_write_8bit,
		ADE7754_CPHCAL);
static IIO_DEV_ATTR_AAPOS(S_IWUSR | S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_AAPOS);
static IIO_DEV_ATTR_BAPOS(S_IWUSR | S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_BAPOS);
static IIO_DEV_ATTR_CAPOS(S_IWUSR | S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_CAPOS);
static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
		ade7754_read_8bit,
		ade7754_write_8bit,
		ADE7754_WDIV);
static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
		ade7754_read_8bit,
		ade7754_write_8bit,
		ADE7754_VADIV);
static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_CFNUM);
static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_CFDEN);
static IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(S_IWUSR | S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_AAPGAIN);
static IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(S_IWUSR | S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_BAPGAIN);
static IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(S_IWUSR | S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_CAPGAIN);
static IIO_DEV_ATTR_AIRMS(S_IRUGO,
		ade7754_read_24bit,
		NULL,
		ADE7754_AIRMS);
static IIO_DEV_ATTR_BIRMS(S_IRUGO,
		ade7754_read_24bit,
		NULL,
		ADE7754_BIRMS);
static IIO_DEV_ATTR_CIRMS(S_IRUGO,
		ade7754_read_24bit,
		NULL,
		ADE7754_CIRMS);
static IIO_DEV_ATTR_AVRMS(S_IRUGO,
		ade7754_read_24bit,
		NULL,
		ADE7754_AVRMS);
static IIO_DEV_ATTR_BVRMS(S_IRUGO,
		ade7754_read_24bit,
		NULL,
		ADE7754_BVRMS);
static IIO_DEV_ATTR_CVRMS(S_IRUGO,
		ade7754_read_24bit,
		NULL,
		ADE7754_CVRMS);
static IIO_DEV_ATTR_AIRMSOS(S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_AIRMSOS);
static IIO_DEV_ATTR_BIRMSOS(S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_BIRMSOS);
static IIO_DEV_ATTR_CIRMSOS(S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_CIRMSOS);
static IIO_DEV_ATTR_AVRMSOS(S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_AVRMSOS);
static IIO_DEV_ATTR_BVRMSOS(S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_BVRMSOS);
static IIO_DEV_ATTR_CVRMSOS(S_IRUGO,
		ade7754_read_16bit,
		ade7754_write_16bit,
		ADE7754_CVRMSOS);

static int ade7754_set_irq(struct device *dev, bool enable)
{
	int ret;
	u16 irqen;
	ret = ade7754_spi_read_reg_16(dev, ADE7754_IRQEN, &irqen);
	if (ret)
		goto error_ret;

	if (enable)
		irqen |= 1 << 14; /* Enables an interrupt when a data is
				     present in the waveform register */
	else
		irqen &= ~(1 << 14);

	ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
	if (ret)
		goto error_ret;

error_ret:
	return ret;
}

/* Power down the device */
static int ade7754_stop_device(struct device *dev)
{
	u8 val;

	ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
	val |= 7 << 3;  /* ADE7754 powered down */
	return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
}

static int ade7754_initial_setup(struct ade7754_state *st)
{
	int ret;
	struct device *dev = &st->indio_dev->dev;

	/* use low spi speed for init */
	st->us->mode = SPI_MODE_3;
	spi_setup(st->us);

	/* Disable IRQ */
	ret = ade7754_set_irq(dev, false);
	if (ret) {
		dev_err(dev, "disable irq failed");
		goto err_ret;
	}

	ade7754_reset(dev);
	msleep(ADE7754_STARTUP_DELAY);

err_ret:
	return ret;
}

static ssize_t ade7754_read_frequency(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u8 t;
	int sps;
	ret = ade7754_spi_read_reg_8(dev,
			ADE7754_WAVMODE,
			&t);
	if (ret)
		return ret;

	t = (t >> 3) & 0x3;
	sps = 26000 / (1 + t);

	return sprintf(buf, "%d\n", sps);
}

static ssize_t ade7754_write_frequency(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	unsigned long val;
	int ret;
	u8 reg, t;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		return ret;

	mutex_lock(&indio_dev->mlock);

	t = (26000 / val);
	if (t > 0)
		t--;

	if (t > 1)
		st->us->max_speed_hz = ADE7754_SPI_SLOW;
	else
		st->us->max_speed_hz = ADE7754_SPI_FAST;

	ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, &reg);
	if (ret)
		goto out;

	reg &= ~(3 << 3);
	reg |= t << 3;

	ret = ade7754_spi_write_reg_8(dev, ADE7754_WAVMODE, reg);

out:
	mutex_unlock(&indio_dev->mlock);

	return ret ? ret : len;
}
static IIO_DEV_ATTR_TEMP_RAW(ade7754_read_8bit);
static IIO_CONST_ATTR(temp_offset, "129 C");
static IIO_CONST_ATTR(temp_scale, "4 C");

static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
		ade7754_read_frequency,
		ade7754_write_frequency);

static IIO_DEV_ATTR_RESET(ade7754_write_reset);

static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26000 13000 65000 33000");

static struct attribute *ade7754_attributes[] = {
	&iio_dev_attr_temp_raw.dev_attr.attr,
	&iio_const_attr_temp_offset.dev_attr.attr,
	&iio_const_attr_temp_scale.dev_attr.attr,
	&iio_dev_attr_sampling_frequency.dev_attr.attr,
	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	&iio_dev_attr_reset.dev_attr.attr,
	&iio_dev_attr_aenergy.dev_attr.attr,
	&iio_dev_attr_laenergy.dev_attr.attr,
	&iio_dev_attr_vaenergy.dev_attr.attr,
	&iio_dev_attr_lvaenergy.dev_attr.attr,
	&iio_dev_attr_vpeak.dev_attr.attr,
	&iio_dev_attr_ipeak.dev_attr.attr,
	&iio_dev_attr_aphcal.dev_attr.attr,
	&iio_dev_attr_bphcal.dev_attr.attr,
	&iio_dev_attr_cphcal.dev_attr.attr,
	&iio_dev_attr_aapos.dev_attr.attr,
	&iio_dev_attr_bapos.dev_attr.attr,
	&iio_dev_attr_capos.dev_attr.attr,
	&iio_dev_attr_wdiv.dev_attr.attr,
	&iio_dev_attr_vadiv.dev_attr.attr,
	&iio_dev_attr_cfnum.dev_attr.attr,
	&iio_dev_attr_cfden.dev_attr.attr,
	&iio_dev_attr_active_power_a_gain.dev_attr.attr,
	&iio_dev_attr_active_power_b_gain.dev_attr.attr,
	&iio_dev_attr_active_power_c_gain.dev_attr.attr,
	&iio_dev_attr_airms.dev_attr.attr,
	&iio_dev_attr_birms.dev_attr.attr,
	&iio_dev_attr_cirms.dev_attr.attr,
	&iio_dev_attr_avrms.dev_attr.attr,
	&iio_dev_attr_bvrms.dev_attr.attr,
	&iio_dev_attr_cvrms.dev_attr.attr,
	&iio_dev_attr_airmsos.dev_attr.attr,
	&iio_dev_attr_birmsos.dev_attr.attr,
	&iio_dev_attr_cirmsos.dev_attr.attr,
	&iio_dev_attr_avrmsos.dev_attr.attr,
	&iio_dev_attr_bvrmsos.dev_attr.attr,
	&iio_dev_attr_cvrmsos.dev_attr.attr,
	NULL,
};

static const struct attribute_group ade7754_attribute_group = {
	.attrs = ade7754_attributes,
};

static const struct iio_info ade7754_info = {
	.attrs = &ade7754_attribute_group,
	.driver_module = THIS_MODULE,
};

static int __devinit ade7754_probe(struct spi_device *spi)
{
	int ret, regdone = 0;
	struct ade7754_state *st = kzalloc(sizeof *st, GFP_KERNEL);
	if (!st) {
		ret =  -ENOMEM;
		goto error_ret;
	}
	/* this is only used for removal purposes */
	spi_set_drvdata(spi, st);

	/* Allocate the comms buffers */
	st->rx = kzalloc(sizeof(*st->rx)*ADE7754_MAX_RX, GFP_KERNEL);
	if (st->rx == NULL) {
		ret = -ENOMEM;
		goto error_free_st;
	}
	st->tx = kzalloc(sizeof(*st->tx)*ADE7754_MAX_TX, GFP_KERNEL);
	if (st->tx == NULL) {
		ret = -ENOMEM;
		goto error_free_rx;
	}
	st->us = spi;
	mutex_init(&st->buf_lock);
	/* setup the industrialio driver allocated elements */
	st->indio_dev = iio_allocate_device(0);
	if (st->indio_dev == NULL) {
		ret = -ENOMEM;
		goto error_free_tx;
	}

	st->indio_dev->name = spi->dev.driver->name;
	st->indio_dev->dev.parent = &spi->dev;
	st->indio_dev->info = &ade7754_info;
	st->indio_dev->dev_data = (void *)(st);
	st->indio_dev->modes = INDIO_DIRECT_MODE;

	ret = iio_device_register(st->indio_dev);
	if (ret)
		goto error_free_dev;
	regdone = 1;

	/* Get the device into a sane initial state */
	ret = ade7754_initial_setup(st);
	if (ret)
		goto error_free_dev;
	return 0;

error_free_dev:
	if (regdone)
		iio_device_unregister(st->indio_dev);
	else
		iio_free_device(st->indio_dev);
error_free_tx:
	kfree(st->tx);
error_free_rx:
	kfree(st->rx);
error_free_st:
	kfree(st);
error_ret:
	return ret;
}

/* fixme, confirm ordering in this function */
static int ade7754_remove(struct spi_device *spi)
{
	int ret;
	struct ade7754_state *st = spi_get_drvdata(spi);
	struct iio_dev *indio_dev = st->indio_dev;

	ret = ade7754_stop_device(&(indio_dev->dev));
	if (ret)
		goto err_ret;

	iio_device_unregister(indio_dev);
	kfree(st->tx);
	kfree(st->rx);
	kfree(st);

	return 0;

err_ret:
	return ret;
}

static struct spi_driver ade7754_driver = {
	.driver = {
		.name = "ade7754",
		.owner = THIS_MODULE,
	},
	.probe = ade7754_probe,
	.remove = __devexit_p(ade7754_remove),
};

static __init int ade7754_init(void)
{
	return spi_register_driver(&ade7754_driver);
}
module_init(ade7754_init);

static __exit void ade7754_exit(void)
{
	spi_unregister_driver(&ade7754_driver);
}
module_exit(ade7754_exit);

MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
8d97a587 BS	1	/*
	2	* ADE7754 Polyphase Multifunction Energy Metering IC Driver
	3	*
	4	* Copyright 2010 Analog Devices Inc.
	5	*
	6	* Licensed under the GPL-2 or later.
	7	*/
	8
	9	#include <linux/interrupt.h>
	10	#include <linux/irq.h>
	11	#include <linux/gpio.h>
	12	#include <linux/delay.h>
	13	#include <linux/mutex.h>
	14	#include <linux/device.h>
	15	#include <linux/kernel.h>
	16	#include <linux/spi/spi.h>
	17	#include <linux/slab.h>
	18	#include <linux/sysfs.h>
	19	#include <linux/list.h>
	20
	21	#include "../iio.h"
	22	#include "../sysfs.h"
	23	#include "meter.h"
	24	#include "ade7754.h"
	25
	26	static int ade7754_spi_write_reg_8(struct device *dev,
	27	u8 reg_address,
	28	u8 val)
	29	{
	30	int ret;
	31	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	32	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	33
	34	mutex_lock(&st->buf_lock);
	35	st->tx[0] = ADE7754_WRITE_REG(reg_address);
	36	st->tx[1] = val;
	37
	38	ret = spi_write(st->us, st->tx, 2);
	39	mutex_unlock(&st->buf_lock);
	40
	41	return ret;
	42	}
	43
	44	static int ade7754_spi_write_reg_16(struct device *dev,
	45	u8 reg_address,
	46	u16 value)
	47	{
	48	int ret;
8d97a587 BS	49	struct iio_dev *indio_dev = dev_get_drvdata(dev);
8d97a587 BS	50	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
8d97a587 BS	51
	52	mutex_lock(&st->buf_lock);
	53	st->tx[0] = ADE7754_WRITE_REG(reg_address);
	54	st->tx[1] = (value >> 8) & 0xFF;
	55	st->tx[2] = value & 0xFF;
5a0326d9	56	ret = spi_write(st->us, st->tx, 3);
8d97a587 BS	57	mutex_unlock(&st->buf_lock);
	58
	59	return ret;
	60	}
	61
	62	static int ade7754_spi_read_reg_8(struct device *dev,
	63	u8 reg_address,
	64	u8 *val)
	65	{
8d97a587 BS	66	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	67	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	68	int ret;
8d97a587	69
5a0326d9 JC	70	ret = spi_w8r8(st->us, ADE7754_READ_REG(reg_address));
5a0326d9 JC	71	if (ret < 0) {
8d97a587 BS	72	dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
8d97a587 BS	73	reg_address);
5a0326d9	74	return ret;
8d97a587	75	}
5a0326d9	76	*val = ret;
8d97a587	77
5a0326d9	78	return 0;
8d97a587 BS	79	}
	80
	81	static int ade7754_spi_read_reg_16(struct device *dev,
	82	u8 reg_address,
	83	u16 *val)
	84	{
8d97a587 BS	85	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	86	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	87	int ret;
8d97a587	88
5a0326d9 JC	89	ret = spi_w8r16(st->us, ADE7754_READ_REG(reg_address));
5a0326d9 JC	90	if (ret < 0) {
8d97a587	91	dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
5a0326d9 JC	92	reg_address);
5a0326d9 JC	93	return ret;
8d97a587	94	}
8d97a587	95
5a0326d9 JC	96	*val = ret;
	97	*val = be16_to_cpup(val);
	98
	99	return 0;
8d97a587 BS	100	}
	101
	102	static int ade7754_spi_read_reg_24(struct device *dev,
	103	u8 reg_address,
	104	u32 *val)
	105	{
	106	struct spi_message msg;
	107	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	108	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	109	int ret;
	110	struct spi_transfer xfers[] = {
	111	{
	112	.tx_buf = st->tx,
	113	.rx_buf = st->rx,
	114	.bits_per_word = 8,
	115	.len = 4,
	116	},
	117	};
	118
	119	mutex_lock(&st->buf_lock);
	120	st->tx[0] = ADE7754_READ_REG(reg_address);
	121	st->tx[1] = 0;
	122	st->tx[2] = 0;
	123	st->tx[3] = 0;
	124
	125	spi_message_init(&msg);
	126	spi_message_add_tail(xfers, &msg);
	127	ret = spi_sync(st->us, &msg);
	128	if (ret) {
	129	dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
	130	reg_address);
	131	goto error_ret;
	132	}
	133	*val = (st->rx[1] << 16) \| (st->rx[2] << 8) \| st->rx[3];
	134
	135	error_ret:
	136	mutex_unlock(&st->buf_lock);
	137	return ret;
	138	}
	139
	140	static ssize_t ade7754_read_8bit(struct device *dev,
	141	struct device_attribute *attr,
	142	char *buf)
	143	{
	144	int ret;
	145	u8 val = 0;
	146	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	147
	148	ret = ade7754_spi_read_reg_8(dev, this_attr->address, &val);
	149	if (ret)
	150	return ret;
	151
	152	return sprintf(buf, "%u\n", val);
	153	}
	154
	155	static ssize_t ade7754_read_16bit(struct device *dev,
	156	struct device_attribute *attr,
	157	char *buf)
	158	{
	159	int ret;
	160	u16 val = 0;
	161	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	162
	163	ret = ade7754_spi_read_reg_16(dev, this_attr->address, &val);
164	if (ret)
165	return ret;
166
167	return sprintf(buf, "%u\n", val);
168	}
169
170	static ssize_t ade7754_read_24bit(struct device *dev,
171	struct device_attribute *attr,
172	char *buf)
173	{
174	int ret;
175	u32 val = 0;
176	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
177
178	ret = ade7754_spi_read_reg_24(dev, this_attr->address, &val);
179	if (ret)
180	return ret;
181
182	return sprintf(buf, "%u\n", val & 0xFFFFFF);
183	}
184
185	static ssize_t ade7754_write_8bit(struct device *dev,
186	struct device_attribute *attr,
187	const char *buf,
188	size_t len)
189	{
190	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
191	int ret;
192	long val;
193
194	ret = strict_strtol(buf, 10, &val);
195	if (ret)
196	goto error_ret;
197	ret = ade7754_spi_write_reg_8(dev, this_attr->address, val);
198
199	error_ret:
200	return ret ? ret : len;
201	}
202
203	static ssize_t ade7754_write_16bit(struct device *dev,
204	struct device_attribute *attr,
205	const char *buf,
206	size_t len)
207	{
208	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
209	int ret;
210	long val;
211
212	ret = strict_strtol(buf, 10, &val);
213	if (ret)
214	goto error_ret;
215	ret = ade7754_spi_write_reg_16(dev, this_attr->address, val);
216
217	error_ret:
218	return ret ? ret : len;
219	}
220
221	static int ade7754_reset(struct device *dev)
222	{
8d97a587	223	u8 val;
8d97a587	224
5a0326d9 JC	225	ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
	226	val \|= 1 << 6; /* Software Chip Reset */
	227	return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
8d97a587 BS	228	}
	229
	230
	231	static ssize_t ade7754_write_reset(struct device *dev,
	232	struct device_attribute *attr,
	233	const char *buf, size_t len)
	234	{
	235	if (len < 1)
	236	return -1;
	237	switch (buf[0]) {
	238	case '1':
	239	case 'y':
	240	case 'Y':
	241	return ade7754_reset(dev);
	242	}
	243	return -1;
	244	}
	245
	246	static IIO_DEV_ATTR_AENERGY(ade7754_read_24bit, ADE7754_AENERGY);
	247	static IIO_DEV_ATTR_LAENERGY(ade7754_read_24bit, ADE7754_LAENERGY);
	248	static IIO_DEV_ATTR_VAENERGY(ade7754_read_24bit, ADE7754_VAENERGY);
	249	static IIO_DEV_ATTR_LVAENERGY(ade7754_read_24bit, ADE7754_LVAENERGY);
	250	static IIO_DEV_ATTR_VPEAK(S_IWUSR \| S_IRUGO,
	251	ade7754_read_8bit,
	252	ade7754_write_8bit,
	253	ADE7754_VPEAK);
	254	static IIO_DEV_ATTR_IPEAK(S_IWUSR \| S_IRUGO,
	255	ade7754_read_8bit,
	256	ade7754_write_8bit,
	257	ADE7754_VPEAK);
	258	static IIO_DEV_ATTR_APHCAL(S_IWUSR \| S_IRUGO,
	259	ade7754_read_8bit,
	260	ade7754_write_8bit,
	261	ADE7754_APHCAL);
	262	static IIO_DEV_ATTR_BPHCAL(S_IWUSR \| S_IRUGO,
	263	ade7754_read_8bit,
	264	ade7754_write_8bit,
	265	ADE7754_BPHCAL);
	266	static IIO_DEV_ATTR_CPHCAL(S_IWUSR \| S_IRUGO,
	267	ade7754_read_8bit,
	268	ade7754_write_8bit,
	269	ADE7754_CPHCAL);
	270	static IIO_DEV_ATTR_AAPOS(S_IWUSR \| S_IRUGO,
	271	ade7754_read_16bit,
	272	ade7754_write_16bit,
	273	ADE7754_AAPOS);
	274	static IIO_DEV_ATTR_BAPOS(S_IWUSR \| S_IRUGO,
	275	ade7754_read_16bit,
	276	ade7754_write_16bit,
	277	ADE7754_BAPOS);
	278	static IIO_DEV_ATTR_CAPOS(S_IWUSR \| S_IRUGO,
	279	ade7754_read_16bit,
	280	ade7754_write_16bit,
	281	ADE7754_CAPOS);
	282	static IIO_DEV_ATTR_WDIV(S_IWUSR \| S_IRUGO,
	283	ade7754_read_8bit,
	284	ade7754_write_8bit,
	285	ADE7754_WDIV);
	286	static IIO_DEV_ATTR_VADIV(S_IWUSR \| S_IRUGO,
	287	ade7754_read_8bit,
	288	ade7754_write_8bit,
	289	ADE7754_VADIV);
	290	static IIO_DEV_ATTR_CFNUM(S_IWUSR \| S_IRUGO,
	291	ade7754_read_16bit,
292	ade7754_write_16bit,
293	ADE7754_CFNUM);
294	static IIO_DEV_ATTR_CFDEN(S_IWUSR \| S_IRUGO,
295	ade7754_read_16bit,
296	ade7754_write_16bit,
297	ADE7754_CFDEN);
298	static IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(S_IWUSR \| S_IRUGO,
299	ade7754_read_16bit,
300	ade7754_write_16bit,
301	ADE7754_AAPGAIN);
302	static IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(S_IWUSR \| S_IRUGO,
303	ade7754_read_16bit,
304	ade7754_write_16bit,
305	ADE7754_BAPGAIN);
306	static IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(S_IWUSR \| S_IRUGO,
307	ade7754_read_16bit,
308	ade7754_write_16bit,
309	ADE7754_CAPGAIN);
310	static IIO_DEV_ATTR_AIRMS(S_IRUGO,
311	ade7754_read_24bit,
312	NULL,
313	ADE7754_AIRMS);
314	static IIO_DEV_ATTR_BIRMS(S_IRUGO,
315	ade7754_read_24bit,
316	NULL,
317	ADE7754_BIRMS);
318	static IIO_DEV_ATTR_CIRMS(S_IRUGO,
319	ade7754_read_24bit,
320	NULL,
321	ADE7754_CIRMS);
322	static IIO_DEV_ATTR_AVRMS(S_IRUGO,
323	ade7754_read_24bit,
324	NULL,
325	ADE7754_AVRMS);
326	static IIO_DEV_ATTR_BVRMS(S_IRUGO,
327	ade7754_read_24bit,
328	NULL,
329	ADE7754_BVRMS);
330	static IIO_DEV_ATTR_CVRMS(S_IRUGO,
331	ade7754_read_24bit,
332	NULL,
333	ADE7754_CVRMS);
334	static IIO_DEV_ATTR_AIRMSOS(S_IRUGO,
335	ade7754_read_16bit,
336	ade7754_write_16bit,
337	ADE7754_AIRMSOS);
338	static IIO_DEV_ATTR_BIRMSOS(S_IRUGO,
339	ade7754_read_16bit,
340	ade7754_write_16bit,
341	ADE7754_BIRMSOS);
342	static IIO_DEV_ATTR_CIRMSOS(S_IRUGO,
343	ade7754_read_16bit,
344	ade7754_write_16bit,
345	ADE7754_CIRMSOS);
346	static IIO_DEV_ATTR_AVRMSOS(S_IRUGO,
347	ade7754_read_16bit,
348	ade7754_write_16bit,
349	ADE7754_AVRMSOS);
350	static IIO_DEV_ATTR_BVRMSOS(S_IRUGO,
351	ade7754_read_16bit,
352	ade7754_write_16bit,
353	ADE7754_BVRMSOS);
354	static IIO_DEV_ATTR_CVRMSOS(S_IRUGO,
355	ade7754_read_16bit,
356	ade7754_write_16bit,
357	ADE7754_CVRMSOS);
358
359	static int ade7754_set_irq(struct device *dev, bool enable)
360	{
361	int ret;
362	u16 irqen;
363	ret = ade7754_spi_read_reg_16(dev, ADE7754_IRQEN, &irqen);
364	if (ret)
365	goto error_ret;
366
367	if (enable)
368	irqen \|= 1 << 14; /* Enables an interrupt when a data is
369	present in the waveform register */
370	else
371	irqen &= ~(1 << 14);
372
373	ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
374	if (ret)
375	goto error_ret;
376
377	error_ret:
378	return ret;
379	}
380
381	/* Power down the device */
382	static int ade7754_stop_device(struct device *dev)
383	{
8d97a587	384	u8 val;
8d97a587	385
5a0326d9 JC	386	ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
	387	val \|= 7 << 3; /* ADE7754 powered down */
	388	return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
8d97a587 BS	389	}
	390
	391	static int ade7754_initial_setup(struct ade7754_state *st)
	392	{
	393	int ret;
	394	struct device *dev = &st->indio_dev->dev;
	395
	396	/* use low spi speed for init */
	397	st->us->mode = SPI_MODE_3;
	398	spi_setup(st->us);
	399
	400	/* Disable IRQ */
	401	ret = ade7754_set_irq(dev, false);
	402	if (ret) {
	403	dev_err(dev, "disable irq failed");
	404	goto err_ret;
	405	}
	406
	407	ade7754_reset(dev);
	408	msleep(ADE7754_STARTUP_DELAY);
	409
	410	err_ret:
	411	return ret;
	412	}
	413
	414	static ssize_t ade7754_read_frequency(struct device *dev,
	415	struct device_attribute *attr,
	416	char *buf)
	417	{
5a0326d9	418	int ret;
8d97a587 BS	419	u8 t;
	420	int sps;
	421	ret = ade7754_spi_read_reg_8(dev,
	422	ADE7754_WAVMODE,
	423	&t);
	424	if (ret)
	425	return ret;
	426
	427	t = (t >> 3) & 0x3;
	428	sps = 26000 / (1 + t);
	429
5a0326d9	430	return sprintf(buf, "%d\n", sps);
8d97a587 BS	431	}
	432
	433	static ssize_t ade7754_write_frequency(struct device *dev,
	434	struct device_attribute *attr,
	435	const char *buf,
	436	size_t len)
	437	{
	438	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	439	struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
	440	unsigned long val;
	441	int ret;
	442	u8 reg, t;
	443
	444	ret = strict_strtol(buf, 10, &val);
	445	if (ret)
	446	return ret;
	447
	448	mutex_lock(&indio_dev->mlock);
	449
	450	t = (26000 / val);
	451	if (t > 0)
	452	t--;
	453
	454	if (t > 1)
	455	st->us->max_speed_hz = ADE7754_SPI_SLOW;
	456	else
	457	st->us->max_speed_hz = ADE7754_SPI_FAST;
	458
5a0326d9	459	ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, &reg);
8d97a587 BS	460	if (ret)
	461	goto out;
	462
	463	reg &= ~(3 << 3);
	464	reg \|= t << 3;
	465
5a0326d9	466	ret = ade7754_spi_write_reg_8(dev, ADE7754_WAVMODE, reg);
8d97a587 BS	467
	468	out:
	469	mutex_unlock(&indio_dev->mlock);
	470
	471	return ret ? ret : len;
	472	}
	473	static IIO_DEV_ATTR_TEMP_RAW(ade7754_read_8bit);
	474	static IIO_CONST_ATTR(temp_offset, "129 C");
	475	static IIO_CONST_ATTR(temp_scale, "4 C");
	476
	477	static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR \| S_IRUGO,
	478	ade7754_read_frequency,
	479	ade7754_write_frequency);
	480
	481	static IIO_DEV_ATTR_RESET(ade7754_write_reset);
	482
	483	static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26000 13000 65000 33000");
	484
8d97a587 BS	485	static struct attribute *ade7754_attributes[] = {
	486	&iio_dev_attr_temp_raw.dev_attr.attr,
	487	&iio_const_attr_temp_offset.dev_attr.attr,
	488	&iio_const_attr_temp_scale.dev_attr.attr,
	489	&iio_dev_attr_sampling_frequency.dev_attr.attr,
	490	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	491	&iio_dev_attr_reset.dev_attr.attr,
8d97a587 BS	492	&iio_dev_attr_aenergy.dev_attr.attr,
	493	&iio_dev_attr_laenergy.dev_attr.attr,
	494	&iio_dev_attr_vaenergy.dev_attr.attr,
	495	&iio_dev_attr_lvaenergy.dev_attr.attr,
	496	&iio_dev_attr_vpeak.dev_attr.attr,
	497	&iio_dev_attr_ipeak.dev_attr.attr,
	498	&iio_dev_attr_aphcal.dev_attr.attr,
	499	&iio_dev_attr_bphcal.dev_attr.attr,
	500	&iio_dev_attr_cphcal.dev_attr.attr,
	501	&iio_dev_attr_aapos.dev_attr.attr,
	502	&iio_dev_attr_bapos.dev_attr.attr,
	503	&iio_dev_attr_capos.dev_attr.attr,
	504	&iio_dev_attr_wdiv.dev_attr.attr,
	505	&iio_dev_attr_vadiv.dev_attr.attr,
	506	&iio_dev_attr_cfnum.dev_attr.attr,
	507	&iio_dev_attr_cfden.dev_attr.attr,
	508	&iio_dev_attr_active_power_a_gain.dev_attr.attr,
	509	&iio_dev_attr_active_power_b_gain.dev_attr.attr,
	510	&iio_dev_attr_active_power_c_gain.dev_attr.attr,
	511	&iio_dev_attr_airms.dev_attr.attr,
	512	&iio_dev_attr_birms.dev_attr.attr,
	513	&iio_dev_attr_cirms.dev_attr.attr,
	514	&iio_dev_attr_avrms.dev_attr.attr,
	515	&iio_dev_attr_bvrms.dev_attr.attr,
	516	&iio_dev_attr_cvrms.dev_attr.attr,
	517	&iio_dev_attr_airmsos.dev_attr.attr,
	518	&iio_dev_attr_birmsos.dev_attr.attr,
	519	&iio_dev_attr_cirmsos.dev_attr.attr,
	520	&iio_dev_attr_avrmsos.dev_attr.attr,
	521	&iio_dev_attr_bvrmsos.dev_attr.attr,
	522	&iio_dev_attr_cvrmsos.dev_attr.attr,
	523	NULL,
	524	};
	525
	526	static const struct attribute_group ade7754_attribute_group = {
	527	.attrs = ade7754_attributes,
	528	};
	529
6fe8135f JC	530	static const struct iio_info ade7754_info = {
	531	.attrs = &ade7754_attribute_group,
	532	.driver_module = THIS_MODULE,
	533	};
8d97a587 BS	534
	535	static int __devinit ade7754_probe(struct spi_device *spi)
	536	{
	537	int ret, regdone = 0;
	538	struct ade7754_state st = kzalloc(sizeof st, GFP_KERNEL);
	539	if (!st) {
	540	ret = -ENOMEM;
	541	goto error_ret;
	542	}
	543	/* this is only used for removal purposes */
	544	spi_set_drvdata(spi, st);
	545
	546	/* Allocate the comms buffers */
	547	st->rx = kzalloc(sizeof(st->rx)ADE7754_MAX_RX, GFP_KERNEL);
	548	if (st->rx == NULL) {
	549	ret = -ENOMEM;
	550	goto error_free_st;
	551	}
	552	st->tx = kzalloc(sizeof(st->tx)ADE7754_MAX_TX, GFP_KERNEL);
	553	if (st->tx == NULL) {
	554	ret = -ENOMEM;
	555	goto error_free_rx;
	556	}
	557	st->us = spi;
	558	mutex_init(&st->buf_lock);
	559	/* setup the industrialio driver allocated elements */
6f7c8ee5	560	st->indio_dev = iio_allocate_device(0);
8d97a587 BS	561	if (st->indio_dev == NULL) {
	562	ret = -ENOMEM;
	563	goto error_free_tx;
	564	}
	565
845bd12a	566	st->indio_dev->name = spi->dev.driver->name;
8d97a587	567	st->indio_dev->dev.parent = &spi->dev;
6fe8135f	568	st->indio_dev->info = &ade7754_info;
8d97a587	569	st->indio_dev->dev_data = (void *)(st);
8d97a587 BS	570	st->indio_dev->modes = INDIO_DIRECT_MODE;
8d97a587 BS	571
8d97a587 BS	572	ret = iio_device_register(st->indio_dev);
8d97a587 BS	573	if (ret)
5a0326d9	574	goto error_free_dev;
8d97a587 BS	575	regdone = 1;
8d97a587 BS	576
8d97a587 BS	577	/* Get the device into a sane initial state */
	578	ret = ade7754_initial_setup(st);
	579	if (ret)
5a0326d9	580	goto error_free_dev;
8d97a587 BS	581	return 0;
8d97a587 BS	582
8d97a587 BS	583	error_free_dev:
	584	if (regdone)
	585	iio_device_unregister(st->indio_dev);
	586	else
	587	iio_free_device(st->indio_dev);
	588	error_free_tx:
	589	kfree(st->tx);
	590	error_free_rx:
	591	kfree(st->rx);
	592	error_free_st:
	593	kfree(st);
	594	error_ret:
	595	return ret;
	596	}
	597
	598	/* fixme, confirm ordering in this function */
	599	static int ade7754_remove(struct spi_device *spi)
	600	{
	601	int ret;
	602	struct ade7754_state *st = spi_get_drvdata(spi);
	603	struct iio_dev *indio_dev = st->indio_dev;
	604
	605	ret = ade7754_stop_device(&(indio_dev->dev));
	606	if (ret)
	607	goto err_ret;
	608
8d97a587 BS	609	iio_device_unregister(indio_dev);
	610	kfree(st->tx);
	611	kfree(st->rx);
	612	kfree(st);
	613
	614	return 0;
	615
	616	err_ret:
	617	return ret;
	618	}
	619
	620	static struct spi_driver ade7754_driver = {
	621	.driver = {
	622	.name = "ade7754",
	623	.owner = THIS_MODULE,
	624	},
	625	.probe = ade7754_probe,
	626	.remove = __devexit_p(ade7754_remove),
	627	};
	628
	629	static __init int ade7754_init(void)
	630	{
	631	return spi_register_driver(&ade7754_driver);
	632	}
	633	module_init(ade7754_init);
	634
	635	static __exit void ade7754_exit(void)
	636	{
	637	spi_unregister_driver(&ade7754_driver);
	638	}
	639	module_exit(ade7754_exit);
	640
	641	MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
	642	MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
	643	MODULE_LICENSE("GPL v2");