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iwlwifi: fix typo in 'drivers/net/wireless/iwlwifi/Kconfig'
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ssb / pci.c
CommitLineData
61e115a5
MB		 1/*
2 * Sonics Silicon Backplane PCI-Hostbus related functions.
3 *
4 * Copyright (C) 2005-2006 Michael Buesch <mb@bu3sch.de>
5 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
7 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
8 * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
9 *
10 * Derived from the Broadcom 4400 device driver.
11 * Copyright (C) 2002 David S. Miller (davem@redhat.com)
12 * Fixed by Pekka Pietikainen (pp@ee.oulu.fi)
13 * Copyright (C) 2006 Broadcom Corporation.
14 *
15 * Licensed under the GNU/GPL. See COPYING for details.
16 */
17
18#include <linux/ssb/ssb.h>
19#include <linux/ssb/ssb_regs.h>
20#include <linux/pci.h>
21#include <linux/delay.h>
22
23#include "ssb_private.h"
24
25
26/* Define the following to 1 to enable a printk on each coreswitch. */
27#define SSB_VERBOSE_PCICORESWITCH_DEBUG 0
28
29
30/* Lowlevel coreswitching */
31int ssb_pci_switch_coreidx(struct ssb_bus *bus, u8 coreidx)
32{
33 int err;
34 int attempts = 0;
35 u32 cur_core;
36
37 while (1) {
38 err = pci_write_config_dword(bus->host_pci, SSB_BAR0_WIN,
39 (coreidx * SSB_CORE_SIZE)
40 + SSB_ENUM_BASE);
41 if (err)
42 goto error;
43 err = pci_read_config_dword(bus->host_pci, SSB_BAR0_WIN,
44 &cur_core);
45 if (err)
46 goto error;
47 cur_core = (cur_core - SSB_ENUM_BASE)
48 / SSB_CORE_SIZE;
49 if (cur_core == coreidx)
50 break;
51
52 if (attempts++ > SSB_BAR0_MAX_RETRIES)
53 goto error;
54 udelay(10);
55 }
56 return 0;
57error:
58 ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
59 return -ENODEV;
60}
61
62int ssb_pci_switch_core(struct ssb_bus *bus,
63 struct ssb_device *dev)
64{
65 int err;
66 unsigned long flags;
67
68#if SSB_VERBOSE_PCICORESWITCH_DEBUG
69 ssb_printk(KERN_INFO PFX
70 "Switching to %s core, index %d\n",
71 ssb_core_name(dev->id.coreid),
72 dev->core_index);
73#endif
74
75 spin_lock_irqsave(&bus->bar_lock, flags);
76 err = ssb_pci_switch_coreidx(bus, dev->core_index);
77 if (!err)
78 bus->mapped_device = dev;
79 spin_unlock_irqrestore(&bus->bar_lock, flags);
80
81 return err;
82}
83
84/* Enable/disable the on board crystal oscillator and/or PLL. */
85int ssb_pci_xtal(struct ssb_bus *bus, u32 what, int turn_on)
86{
87 int err;
88 u32 in, out, outenable;
89 u16 pci_status;
90
91 if (bus->bustype != SSB_BUSTYPE_PCI)
92 return 0;
93
94 err = pci_read_config_dword(bus->host_pci, SSB_GPIO_IN, &in);
95 if (err)
96 goto err_pci;
97 err = pci_read_config_dword(bus->host_pci, SSB_GPIO_OUT, &out);
98 if (err)
99 goto err_pci;
100 err = pci_read_config_dword(bus->host_pci, SSB_GPIO_OUT_ENABLE, &outenable);
101 if (err)
102 goto err_pci;
103
104 outenable |= what;
105
106 if (turn_on) {
107 /* Avoid glitching the clock if GPRS is already using it.
108 * We can't actually read the state of the PLLPD so we infer it
109 * by the value of XTAL_PU which *is* readable via gpioin.
110 */
111 if (!(in & SSB_GPIO_XTAL)) {
112 if (what & SSB_GPIO_XTAL) {
113 /* Turn the crystal on */
114 out |= SSB_GPIO_XTAL;
115 if (what & SSB_GPIO_PLL)
116 out |= SSB_GPIO_PLL;
117 err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT, out);
118 if (err)
119 goto err_pci;
120 err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT_ENABLE,
121 outenable);
122 if (err)
123 goto err_pci;
124 msleep(1);
125 }
126 if (what & SSB_GPIO_PLL) {
127 /* Turn the PLL on */
128 out &= ~SSB_GPIO_PLL;
129 err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT, out);
130 if (err)
131 goto err_pci;
132 msleep(5);
133 }
134 }
135
136 err = pci_read_config_word(bus->host_pci, PCI_STATUS, &pci_status);
137 if (err)
138 goto err_pci;
139 pci_status &= ~PCI_STATUS_SIG_TARGET_ABORT;
140 err = pci_write_config_word(bus->host_pci, PCI_STATUS, pci_status);
141 if (err)
142 goto err_pci;
143 } else {
144 if (what & SSB_GPIO_XTAL) {
145 /* Turn the crystal off */
146 out &= ~SSB_GPIO_XTAL;
147 }
148 if (what & SSB_GPIO_PLL) {
149 /* Turn the PLL off */
150 out |= SSB_GPIO_PLL;
151 }
152 err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT, out);
153 if (err)
154 goto err_pci;
155 err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT_ENABLE, outenable);
156 if (err)
157 goto err_pci;
158 }
159
160out:
161 return err;
162
163err_pci:
164 printk(KERN_ERR PFX "Error: ssb_pci_xtal() could not access PCI config space!\n");
165 err = -EBUSY;
166 goto out;
167}
168
169/* Get the word-offset for a SSB_SPROM_XXX define. */
170#define SPOFF(offset) (((offset) - SSB_SPROM_BASE) / sizeof(u16))
171/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
172#define SPEX(_outvar, _offset, _mask, _shift) \
173 out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
174
175static inline u8 ssb_crc8(u8 crc, u8 data)
176{
177 /* Polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1 */
178 static const u8 t[] = {
179 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B,
180 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21,
181 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF,
182 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5,
183 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14,
184 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E,
185 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80,
186 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA,
187 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95,
188 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF,
189 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01,
190 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B,
191 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA,
192 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0,
193 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E,
194 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34,
195 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0,
196 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A,
197 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54,
198 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E,
199 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF,
200 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5,
201 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B,
202 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61,
203 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E,
204 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74,
205 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA,
206 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0,
207 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41,
208 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B,
209 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5,
210 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F,
211 };
212 return t[crc ^ data];
213}
214
c272ef44 215static u8 ssb_sprom_crc(const u16 *sprom, u16 size)
61e115a5
MB		 216{
217 int word;
218 u8 crc = 0xFF;
219
c272ef44 220 for (word = 0; word < size - 1; word++) {
61e115a5
MB		 221 crc = ssb_crc8(crc, sprom[word] & 0x00FF);
222 crc = ssb_crc8(crc, (sprom[word] & 0xFF00) >> 8);
223 }
c272ef44 224 crc = ssb_crc8(crc, sprom[size - 1] & 0x00FF);
61e115a5
MB		 225 crc ^= 0xFF;
226
227 return crc;
228}
229
c272ef44 230static int sprom_check_crc(const u16 *sprom, u16 size)
61e115a5
MB		 231{
232 u8 crc;
233 u8 expected_crc;
234 u16 tmp;
235
c272ef44
LF		 236 crc = ssb_sprom_crc(sprom, size);
237 tmp = sprom[size - 1] & SSB_SPROM_REVISION_CRC;
61e115a5
MB		 238 expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT;
239 if (crc != expected_crc)
240 return -EPROTO;
241
242 return 0;
243}
244
245static void sprom_do_read(struct ssb_bus *bus, u16 *sprom)
246{
247 int i;
248
c272ef44 249 for (i = 0; i < bus->sprom_size; i++)
61e115a5
MB		 250 sprom[i] = readw(bus->mmio + SSB_SPROM_BASE + (i * 2));
251}
252
253static int sprom_do_write(struct ssb_bus *bus, const u16 *sprom)
254{
255 struct pci_dev *pdev = bus->host_pci;
256 int i, err;
257 u32 spromctl;
c272ef44 258 u16 size = bus->sprom_size;
61e115a5
MB		 259
260 ssb_printk(KERN_NOTICE PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");
261 err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);
262 if (err)
263 goto err_ctlreg;
264 spromctl |= SSB_SPROMCTL_WE;
265 err = pci_write_config_dword(pdev, SSB_SPROMCTL, spromctl);
266 if (err)
267 goto err_ctlreg;
268 ssb_printk(KERN_NOTICE PFX "[ 0%%");
269 msleep(500);
c272ef44
LF		 270 for (i = 0; i < size; i++) {
271 if (i == size / 4)
61e115a5 272 ssb_printk("25%%");
c272ef44 273 else if (i == size / 2)
61e115a5 274 ssb_printk("50%%");
c272ef44 275 else if (i == (size * 3) / 4)
61e115a5
MB		 276 ssb_printk("75%%");
277 else if (i % 2)
278 ssb_printk(".");
279 writew(sprom[i], bus->mmio + SSB_SPROM_BASE + (i * 2));
280 mmiowb();
281 msleep(20);
282 }
283 err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);
284 if (err)
285 goto err_ctlreg;
286 spromctl &= ~SSB_SPROMCTL_WE;
287 err = pci_write_config_dword(pdev, SSB_SPROMCTL, spromctl);
288 if (err)
289 goto err_ctlreg;
290 msleep(500);
291 ssb_printk("100%% ]\n");
292 ssb_printk(KERN_NOTICE PFX "SPROM written.\n");
293
294 return 0;
295err_ctlreg:
296 ssb_printk(KERN_ERR PFX "Could not access SPROM control register.\n");
297 return err;
298}
299
c272ef44 300static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
61e115a5
MB		 301{
302 int i;
303 u16 v;
c272ef44 304 u16 loc[3];
61e115a5 305
c272ef44
LF		 306 if (out->revision == 3) { /* rev 3 moved MAC */
307 loc[0] = SSB_SPROM3_IL0MAC;
308 loc[1] = SSB_SPROM3_ET0MAC;
309 loc[2] = SSB_SPROM3_ET1MAC;
310 } else {
311 loc[0] = SSB_SPROM1_IL0MAC;
312 loc[1] = SSB_SPROM1_ET0MAC;
313 loc[2] = SSB_SPROM1_ET1MAC;
314 }
315 for (i = 0; i < 3; i++) {
316 v = in[SPOFF(loc[0]) + i];
317 *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
318 }
319 for (i = 0; i < 3; i++) {
320 v = in[SPOFF(loc[1]) + i];
321 *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
322 }
323 for (i = 0; i < 3; i++) {
324 v = in[SPOFF(loc[2]) + i];
325 *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
61e115a5 326 }
c272ef44
LF		 327 SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
328 SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
329 SSB_SPROM1_ETHPHY_ET1A_SHIFT);
330 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
331 SSB_SPROM1_BINF_CCODE_SHIFT);
332 SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
333 SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
334 SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
335 SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
336 SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
337 SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
338 SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
339 SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
340 SSB_SPROM1_GPIOA_P1_SHIFT);
341 SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
342 SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
343 SSB_SPROM1_GPIOB_P3_SHIFT);
344 SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
345 SSB_SPROM1_MAXPWR_A_SHIFT);
346 SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
347 SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
348 SSB_SPROM1_ITSSI_A_SHIFT);
349 SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
350 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
351 SPEX(antenna_gain_a, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_A, 0);
352 SPEX(antenna_gain_bg, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_BG,
353 SSB_SPROM1_AGAIN_BG_SHIFT);
61e115a5
MB		 354}
355
c272ef44 356static void sprom_extract_r4(struct ssb_sprom *out, const u16 *in)
61e115a5 357{
c272ef44
LF		 358 int i;
359 u16 v;
360
d3c319f9 361 /* extract the equivalent of the r1 variables */
c272ef44
LF		 362 for (i = 0; i < 3; i++) {
363 v = in[SPOFF(SSB_SPROM4_IL0MAC) + i];
364 *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
365 }
366 for (i = 0; i < 3; i++) {
367 v = in[SPOFF(SSB_SPROM4_ET0MAC) + i];
368 *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
369 }
370 for (i = 0; i < 3; i++) {
371 v = in[SPOFF(SSB_SPROM4_ET1MAC) + i];
372 *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
373 }
374 SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
375 SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
376 SSB_SPROM4_ETHPHY_ET1A_SHIFT);
377 SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
378 SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
379 SPEX(antenna_gain_a, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_0, 0);
380 SPEX(antenna_gain_bg, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_1,
381 SSB_SPROM4_AGAIN_1_SHIFT);
d3c319f9
LF		 382 SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
383 SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
384 SSB_SPROM4_ITSSI_BG_SHIFT);
385 SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
386 SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
387 SSB_SPROM4_ITSSI_A_SHIFT);
388 SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
389 SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
390 SSB_SPROM4_GPIOA_P1_SHIFT);
391 SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
392 SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
393 SSB_SPROM4_GPIOB_P3_SHIFT);
c272ef44 394 /* TODO - get remaining rev 4 stuff needed */
61e115a5
MB		 395}
396
c272ef44
LF		 397static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
398 const u16 *in, u16 size)
61e115a5
MB		 399{
400 memset(out, 0, sizeof(*out));
401
c272ef44 402 out->revision = in[size - 1] & 0x00FF;
d3c319f9 403 ssb_printk(KERN_INFO PFX "SPROM revision %d detected.\n", out->revision);
61e115a5
MB		 404 if ((bus->chip_id & 0xFF00) == 0x4400) {
405 /* Workaround: The BCM44XX chip has a stupid revision
406 * number stored in the SPROM.
407 * Always extract r1. */
c272ef44
LF		 408 out->revision = 1;
409 sprom_extract_r123(out, in);
c272ef44
LF		 410 } else if (bus->chip_id == 0x4321) {
411 /* the BCM4328 has a chipid == 0x4321 and a rev 4 SPROM */
412 out->revision = 4;
413 sprom_extract_r4(out, in);
61e115a5
MB		 414 } else {
415 if (out->revision == 0)
416 goto unsupported;
c272ef44
LF		 417 if (out->revision >= 1 && out->revision <= 3) {
418 sprom_extract_r123(out, in);
c272ef44
LF		 419 }
420 if (out->revision == 4)
421 sprom_extract_r4(out, in);
422 if (out->revision >= 5)
61e115a5
MB		 423 goto unsupported;
424 }
425
426 return 0;
427unsupported:
428 ssb_printk(KERN_WARNING PFX "Unsupported SPROM revision %d "
429 "detected. Will extract v1\n", out->revision);
d3c319f9 430 sprom_extract_r123(out, in);
61e115a5
MB		 431 return 0;
432}
433
434static int ssb_pci_sprom_get(struct ssb_bus *bus,
435 struct ssb_sprom *sprom)
436{
437 int err = -ENOMEM;
438 u16 *buf;
439
c272ef44 440 buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
61e115a5
MB		 441 if (!buf)
442 goto out;
c272ef44 443 bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
61e115a5 444 sprom_do_read(bus, buf);
c272ef44 445 err = sprom_check_crc(buf, bus->sprom_size);
61e115a5 446 if (err) {
c272ef44
LF		 447 /* check for rev 4 sprom - has special signature */
448 if (buf [32] == 0x5372) {
449 ssb_printk(KERN_WARNING PFX "Extracting a rev 4"
450 " SPROM\n");
451 kfree(buf);
452 buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
453 GFP_KERNEL);
454 if (!buf)
455 goto out;
456 bus->sprom_size = SSB_SPROMSIZE_WORDS_R4;
457 sprom_do_read(bus, buf);
458 err = sprom_check_crc(buf, bus->sprom_size);
459 }
460 if (err)
461 ssb_printk(KERN_WARNING PFX "WARNING: Invalid"
462 " SPROM CRC (corrupt SPROM)\n");
61e115a5 463 }
c272ef44 464 err = sprom_extract(bus, sprom, buf, bus->sprom_size);
61e115a5
MB		 465
466 kfree(buf);
467out:
468 return err;
469}
470
471static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
472 struct ssb_boardinfo *bi)
473{
474 pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_VENDOR_ID,
475 &bi->vendor);
476 pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_ID,
477 &bi->type);
478 pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
479 &bi->rev);
480}
481
482int ssb_pci_get_invariants(struct ssb_bus *bus,
483 struct ssb_init_invariants *iv)
484{
485 int err;
486
487 err = ssb_pci_sprom_get(bus, &iv->sprom);
488 if (err)
489 goto out;
490 ssb_pci_get_boardinfo(bus, &iv->boardinfo);
491
492out:
493 return err;
494}
495
496#ifdef CONFIG_SSB_DEBUG
497static int ssb_pci_assert_buspower(struct ssb_bus *bus)
498{
499 if (likely(bus->powered_up))
500 return 0;
501
502 printk(KERN_ERR PFX "FATAL ERROR: Bus powered down "
503 "while accessing PCI MMIO space\n");
504 if (bus->power_warn_count <= 10) {
505 bus->power_warn_count++;
506 dump_stack();
507 }
508
509 return -ENODEV;
510}
511#else /* DEBUG */
512static inline int ssb_pci_assert_buspower(struct ssb_bus *bus)
513{
514 return 0;
515}
516#endif /* DEBUG */
517
518static u16 ssb_pci_read16(struct ssb_device *dev, u16 offset)
519{
520 struct ssb_bus *bus = dev->bus;
521
522 if (unlikely(ssb_pci_assert_buspower(bus)))
523 return 0xFFFF;
524 if (unlikely(bus->mapped_device != dev)) {
525 if (unlikely(ssb_pci_switch_core(bus, dev)))
526 return 0xFFFF;
527 }
4b402c65 528 return ioread16(bus->mmio + offset);
61e115a5
MB		 529}
530
531static u32 ssb_pci_read32(struct ssb_device *dev, u16 offset)
532{
533 struct ssb_bus *bus = dev->bus;
534
535 if (unlikely(ssb_pci_assert_buspower(bus)))
536 return 0xFFFFFFFF;
537 if (unlikely(bus->mapped_device != dev)) {
538 if (unlikely(ssb_pci_switch_core(bus, dev)))
539 return 0xFFFFFFFF;
540 }
4b402c65 541 return ioread32(bus->mmio + offset);
61e115a5
MB		 542}
543
544static void ssb_pci_write16(struct ssb_device *dev, u16 offset, u16 value)
545{
546 struct ssb_bus *bus = dev->bus;
547
548 if (unlikely(ssb_pci_assert_buspower(bus)))
549 return;
550 if (unlikely(bus->mapped_device != dev)) {
551 if (unlikely(ssb_pci_switch_core(bus, dev)))
552 return;
553 }
4b402c65 554 iowrite16(value, bus->mmio + offset);
61e115a5
MB		 555}
556
557static void ssb_pci_write32(struct ssb_device *dev, u16 offset, u32 value)
558{
559 struct ssb_bus *bus = dev->bus;
560
561 if (unlikely(ssb_pci_assert_buspower(bus)))
562 return;
563 if (unlikely(bus->mapped_device != dev)) {
564 if (unlikely(ssb_pci_switch_core(bus, dev)))
565 return;
566 }
4b402c65 567 iowrite32(value, bus->mmio + offset);
61e115a5
MB		 568}
569
570/* Not "static", as it's used in main.c */
571const struct ssb_bus_ops ssb_pci_ops = {
572 .read16 = ssb_pci_read16,
573 .read32 = ssb_pci_read32,
574 .write16 = ssb_pci_write16,
575 .write32 = ssb_pci_write32,
576};
577
c272ef44 578static int sprom2hex(const u16 *sprom, char *buf, size_t buf_len, u16 size)
61e115a5
MB		 579{
580 int i, pos = 0;
581
c272ef44 582 for (i = 0; i < size; i++)
61e115a5
MB		 583 pos += snprintf(buf + pos, buf_len - pos - 1,
584 "%04X", swab16(sprom[i]) & 0xFFFF);
61e115a5
MB		 585 pos += snprintf(buf + pos, buf_len - pos - 1, "\n");
586
587 return pos + 1;
588}
589
c272ef44 590static int hex2sprom(u16 *sprom, const char *dump, size_t len, u16 size)
61e115a5
MB		 591{
592 char tmp[5] = { 0 };
593 int cnt = 0;
594 unsigned long parsed;
595
c272ef44 596 if (len < size * 2)
61e115a5
MB		 597 return -EINVAL;
598
c272ef44 599 while (cnt < size) {
61e115a5
MB		 600 memcpy(tmp, dump, 4);
601 dump += 4;
602 parsed = simple_strtoul(tmp, NULL, 16);
603 sprom[cnt++] = swab16((u16)parsed);
604 }
605
606 return 0;
607}
608
609static ssize_t ssb_pci_attr_sprom_show(struct device *pcidev,
610 struct device_attribute *attr,
611 char *buf)
612{
613 struct pci_dev *pdev = container_of(pcidev, struct pci_dev, dev);
614 struct ssb_bus *bus;
615 u16 *sprom;
616 int err = -ENODEV;
617 ssize_t count = 0;
618
619 bus = ssb_pci_dev_to_bus(pdev);
620 if (!bus)
621 goto out;
622 err = -ENOMEM;
c272ef44 623 sprom = kcalloc(bus->sprom_size, sizeof(u16), GFP_KERNEL);
61e115a5
MB		 624 if (!sprom)
625 goto out;
626
627 /* Use interruptible locking, as the SPROM write might
628 * be holding the lock for several seconds. So allow userspace
629 * to cancel operation. */
630 err = -ERESTARTSYS;
631 if (mutex_lock_interruptible(&bus->pci_sprom_mutex))
632 goto out_kfree;
633 sprom_do_read(bus, sprom);
634 mutex_unlock(&bus->pci_sprom_mutex);
635
c272ef44 636 count = sprom2hex(sprom, buf, PAGE_SIZE, bus->sprom_size);
61e115a5
MB		 637 err = 0;
638
639out_kfree:
640 kfree(sprom);
641out:
642 return err ? err : count;
643}
644
645static ssize_t ssb_pci_attr_sprom_store(struct device *pcidev,
646 struct device_attribute *attr,
647 const char *buf, size_t count)
648{
649 struct pci_dev *pdev = container_of(pcidev, struct pci_dev, dev);
650 struct ssb_bus *bus;
651 u16 *sprom;
652 int res = 0, err = -ENODEV;
653
654 bus = ssb_pci_dev_to_bus(pdev);
655 if (!bus)
656 goto out;
657 err = -ENOMEM;
c272ef44 658 sprom = kcalloc(bus->sprom_size, sizeof(u16), GFP_KERNEL);
61e115a5
MB		 659 if (!sprom)
660 goto out;
c272ef44 661 err = hex2sprom(sprom, buf, count, bus->sprom_size);
61e115a5
MB		 662 if (err) {
663 err = -EINVAL;
664 goto out_kfree;
665 }
c272ef44 666 err = sprom_check_crc(sprom, bus->sprom_size);
61e115a5
MB		 667 if (err) {
668 err = -EINVAL;
669 goto out_kfree;
670 }
671
672 /* Use interruptible locking, as the SPROM write might
673 * be holding the lock for several seconds. So allow userspace
674 * to cancel operation. */
675 err = -ERESTARTSYS;
676 if (mutex_lock_interruptible(&bus->pci_sprom_mutex))
677 goto out_kfree;
678 err = ssb_devices_freeze(bus);
679 if (err == -EOPNOTSUPP) {
680 ssb_printk(KERN_ERR PFX "SPROM write: Could not freeze devices. "
681 "No suspend support. Is CONFIG_PM enabled?\n");
682 goto out_unlock;
683 }
684 if (err) {
685 ssb_printk(KERN_ERR PFX "SPROM write: Could not freeze all devices\n");
686 goto out_unlock;
687 }
688 res = sprom_do_write(bus, sprom);
689 err = ssb_devices_thaw(bus);
690 if (err)
691 ssb_printk(KERN_ERR PFX "SPROM write: Could not thaw all devices\n");
692out_unlock:
693 mutex_unlock(&bus->pci_sprom_mutex);
694out_kfree:
695 kfree(sprom);
696out:
697 if (res)
698 return res;
699 return err ? err : count;
700}
701
702static DEVICE_ATTR(ssb_sprom, 0600,
703 ssb_pci_attr_sprom_show,
704 ssb_pci_attr_sprom_store);
705
706void ssb_pci_exit(struct ssb_bus *bus)
707{
708 struct pci_dev *pdev;
709
710 if (bus->bustype != SSB_BUSTYPE_PCI)
711 return;
712
713 pdev = bus->host_pci;
714 device_remove_file(&pdev->dev, &dev_attr_ssb_sprom);
715}
716
717int ssb_pci_init(struct ssb_bus *bus)
718{
719 struct pci_dev *pdev;
720 int err;
721
722 if (bus->bustype != SSB_BUSTYPE_PCI)
723 return 0;
724
725 pdev = bus->host_pci;
726 mutex_init(&bus->pci_sprom_mutex);
727 err = device_create_file(&pdev->dev, &dev_attr_ssb_sprom);
728 if (err)
729 goto out;
730
731out:
732 return err;
733}
kernel source for telekom puls (alcatel/mediatek)