dz: handle special conditions on reception correctly
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / serial / dz.c
CommitLineData
1da177e4 1/*
9399575d 2 * dz.c: Serial port driver for DECstations equipped
1da177e4
LT
3 * with the DZ chipset.
4 *
fd8c5972
RB
5 * Copyright (C) 1998 Olivier A. D. Lebaillif
6 *
1da177e4
LT
7 * Email: olivier.lebaillif@ifrsys.com
8 *
87cff7fb 9 * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
9399575d 10 *
1da177e4
LT
11 * [31-AUG-98] triemer
12 * Changed IRQ to use Harald's dec internals interrupts.h
13 * removed base_addr code - moving address assignment to setup.c
14 * Changed name of dz_init to rs_init to be consistent with tc code
15 * [13-NOV-98] triemer fixed code to receive characters
fd8c5972 16 * after patches by harald to irq code.
1da177e4
LT
17 * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
18 * field from "current" - somewhere between 2.1.121 and 2.1.131
19 Qua Jun 27 15:02:26 BRT 2001
20 * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
fd8c5972
RB
21 *
22 * Parts (C) 1999 David Airlie, airlied@linux.ie
23 * [07-SEP-99] Bugfixes
1da177e4
LT
24 *
25 * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
26 * Converted to new serial core
27 */
28
29#undef DEBUG_DZ
30
9399575d
MR
31#if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
32#define SUPPORT_SYSRQ
33#endif
34
87cff7fb
MR
35#include <linux/bitops.h>
36#include <linux/compiler.h>
37#include <linux/console.h>
9399575d 38#include <linux/delay.h>
87cff7fb 39#include <linux/errno.h>
1da177e4 40#include <linux/init.h>
87cff7fb
MR
41#include <linux/interrupt.h>
42#include <linux/kernel.h>
43#include <linux/major.h>
44#include <linux/module.h>
45#include <linux/serial.h>
46#include <linux/serial_core.h>
9399575d 47#include <linux/sysrq.h>
1da177e4 48#include <linux/tty.h>
1da177e4
LT
49
50#include <asm/bootinfo.h>
87cff7fb
MR
51#include <asm/system.h>
52
1da177e4
LT
53#include <asm/dec/interrupts.h>
54#include <asm/dec/kn01.h>
55#include <asm/dec/kn02.h>
56#include <asm/dec/machtype.h>
57#include <asm/dec/prom.h>
1da177e4 58
1da177e4
LT
59#include "dz.h"
60
1da177e4 61static char *dz_name = "DECstation DZ serial driver version ";
9399575d 62static char *dz_version = "1.03";
1da177e4
LT
63
64struct dz_port {
65 struct uart_port port;
66 unsigned int cflag;
67};
68
69static struct dz_port dz_ports[DZ_NB_PORT];
70
1da177e4
LT
71/*
72 * ------------------------------------------------------------
73 * dz_in () and dz_out ()
74 *
fd8c5972 75 * These routines are used to access the registers of the DZ
1da177e4
LT
76 * chip, hiding relocation differences between implementation.
77 * ------------------------------------------------------------
78 */
79
80static inline unsigned short dz_in(struct dz_port *dport, unsigned offset)
81{
82 volatile unsigned short *addr =
83 (volatile unsigned short *) (dport->port.membase + offset);
9399575d 84
1da177e4
LT
85 return *addr;
86}
87
88static inline void dz_out(struct dz_port *dport, unsigned offset,
89 unsigned short value)
90{
91 volatile unsigned short *addr =
92 (volatile unsigned short *) (dport->port.membase + offset);
9399575d 93
1da177e4
LT
94 *addr = value;
95}
96
97/*
98 * ------------------------------------------------------------
99 * rs_stop () and rs_start ()
100 *
fd8c5972
RB
101 * These routines are called before setting or resetting
102 * tty->stopped. They enable or disable transmitter interrupts,
1da177e4
LT
103 * as necessary.
104 * ------------------------------------------------------------
105 */
106
b129a8cc 107static void dz_stop_tx(struct uart_port *uport)
1da177e4
LT
108{
109 struct dz_port *dport = (struct dz_port *)uport;
110 unsigned short tmp, mask = 1 << dport->port.line;
1da177e4 111
1da177e4
LT
112 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
113 tmp &= ~mask; /* clear the TX flag */
114 dz_out(dport, DZ_TCR, tmp);
1da177e4
LT
115}
116
b129a8cc 117static void dz_start_tx(struct uart_port *uport)
1da177e4
LT
118{
119 struct dz_port *dport = (struct dz_port *)uport;
120 unsigned short tmp, mask = 1 << dport->port.line;
1da177e4 121
1da177e4
LT
122 tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
123 tmp |= mask; /* set the TX flag */
124 dz_out(dport, DZ_TCR, tmp);
1da177e4
LT
125}
126
127static void dz_stop_rx(struct uart_port *uport)
128{
129 struct dz_port *dport = (struct dz_port *)uport;
1da177e4 130
1da177e4 131 dport->cflag &= ~DZ_CREAD;
9399575d 132 dz_out(dport, DZ_LPR, dport->cflag | dport->port.line);
1da177e4
LT
133}
134
135static void dz_enable_ms(struct uart_port *port)
136{
137 /* nothing to do */
138}
139
140/*
141 * ------------------------------------------------------------
1da177e4 142 *
9399575d
MR
143 * Here start the interrupt handling routines. All of the following
144 * subroutines are declared as inline and are folded into
145 * dz_interrupt. They were separated out for readability's sake.
146 *
147 * Note: dz_interrupt() is a "fast" interrupt, which means that it
1da177e4 148 * runs with interrupts turned off. People who may want to modify
9399575d 149 * dz_interrupt() should try to keep the interrupt handler as fast as
1da177e4
LT
150 * possible. After you are done making modifications, it is not a bad
151 * idea to do:
fd8c5972 152 *
1da177e4
LT
153 * make drivers/serial/dz.s
154 *
155 * and look at the resulting assemble code in dz.s.
156 *
157 * ------------------------------------------------------------
158 */
159
160/*
161 * ------------------------------------------------------------
162 * receive_char ()
163 *
164 * This routine deals with inputs from any lines.
165 * ------------------------------------------------------------
166 */
de320199 167static inline void dz_receive_chars(struct dz_port *dport_in)
1da177e4 168{
54c0f37e 169 struct uart_port *uport;
9399575d 170 struct dz_port *dport;
1da177e4
LT
171 struct tty_struct *tty = NULL;
172 struct uart_icount *icount;
9399575d
MR
173 int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
174 unsigned short status;
1da177e4 175 unsigned char ch, flag;
9399575d 176 int i;
1da177e4 177
9399575d
MR
178 while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) {
179 dport = &dz_ports[LINE(status)];
54c0f37e
MR
180 uport = &dport->port;
181 tty = uport->info->tty; /* point to the proper dev */
1da177e4 182
9399575d 183 ch = UCHAR(status); /* grab the char */
54c0f37e 184 flag = TTY_NORMAL;
1da177e4 185
54c0f37e 186 icount = &uport->icount;
1da177e4
LT
187 icount->rx++;
188
54c0f37e
MR
189 if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
190
9399575d 191 /*
54c0f37e
MR
192 * There is no separate BREAK status bit, so treat
193 * null characters with framing errors as BREAKs;
194 * normally, otherwise. For this move the Framing
195 * Error bit to a simulated BREAK bit.
1da177e4 196 */
54c0f37e
MR
197 if (!ch) {
198 status |= (status & DZ_FERR) >>
199 (ffs(DZ_FERR) - ffs(DZ_BREAK));
200 status &= ~DZ_FERR;
201 }
202
203 /* Handle SysRq/SAK & keep track of the statistics. */
204 if (status & DZ_BREAK) {
205 icount->brk++;
206 if (uart_handle_break(uport))
207 continue;
208 } else if (status & DZ_FERR)
209 icount->frame++;
210 else if (status & DZ_PERR)
211 icount->parity++;
212 if (status & DZ_OERR)
213 icount->overrun++;
214
215 status &= uport->read_status_mask;
216 if (status & DZ_BREAK)
9399575d 217 flag = TTY_BREAK;
54c0f37e 218 else if (status & DZ_FERR)
1da177e4 219 flag = TTY_FRAME;
54c0f37e
MR
220 else if (status & DZ_PERR)
221 flag = TTY_PARITY;
222
1da177e4 223 }
1da177e4 224
54c0f37e 225 if (uart_handle_sysrq_char(uport, ch))
9399575d
MR
226 continue;
227
54c0f37e
MR
228 uart_insert_char(uport, status, DZ_OERR, ch, flag);
229 lines_rx[LINE(status)] = 1;
9399575d
MR
230 }
231 for (i = 0; i < DZ_NB_PORT; i++)
232 if (lines_rx[i])
233 tty_flip_buffer_push(dz_ports[i].port.info->tty);
1da177e4
LT
234}
235
236/*
237 * ------------------------------------------------------------
238 * transmit_char ()
239 *
240 * This routine deals with outputs to any lines.
241 * ------------------------------------------------------------
242 */
9399575d 243static inline void dz_transmit_chars(struct dz_port *dport_in)
1da177e4 244{
9399575d
MR
245 struct dz_port *dport;
246 struct circ_buf *xmit;
247 unsigned short status;
1da177e4
LT
248 unsigned char tmp;
249
9399575d
MR
250 status = dz_in(dport_in, DZ_CSR);
251 dport = &dz_ports[LINE(status)];
252 xmit = &dport->port.info->xmit;
253
254 if (dport->port.x_char) { /* XON/XOFF chars */
1da177e4
LT
255 dz_out(dport, DZ_TDR, dport->port.x_char);
256 dport->port.icount.tx++;
257 dport->port.x_char = 0;
258 return;
259 }
9399575d 260 /* If nothing to do or stopped or hardware stopped. */
1da177e4 261 if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
43d46ab1 262 spin_lock(&dport->port.lock);
b129a8cc 263 dz_stop_tx(&dport->port);
43d46ab1 264 spin_unlock(&dport->port.lock);
1da177e4
LT
265 return;
266 }
267
268 /*
9399575d
MR
269 * If something to do... (remember the dz has no output fifo,
270 * so we go one char at a time) :-<
1da177e4
LT
271 */
272 tmp = xmit->buf[xmit->tail];
273 xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
274 dz_out(dport, DZ_TDR, tmp);
275 dport->port.icount.tx++;
276
277 if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
278 uart_write_wakeup(&dport->port);
279
9399575d 280 /* Are we are done. */
43d46ab1
MR
281 if (uart_circ_empty(xmit)) {
282 spin_lock(&dport->port.lock);
b129a8cc 283 dz_stop_tx(&dport->port);
43d46ab1
MR
284 spin_unlock(&dport->port.lock);
285 }
1da177e4
LT
286}
287
288/*
289 * ------------------------------------------------------------
9399575d 290 * check_modem_status()
1da177e4 291 *
9399575d
MR
292 * DS 3100 & 5100: Only valid for the MODEM line, duh!
293 * DS 5000/200: Valid for the MODEM and PRINTER line.
1da177e4
LT
294 * ------------------------------------------------------------
295 */
296static inline void check_modem_status(struct dz_port *dport)
297{
9399575d
MR
298 /*
299 * FIXME:
300 * 1. No status change interrupt; use a timer.
301 * 2. Handle the 3100/5000 as appropriate. --macro
302 */
1da177e4
LT
303 unsigned short status;
304
9399575d 305 /* If not the modem line just return. */
1da177e4
LT
306 if (dport->port.line != DZ_MODEM)
307 return;
308
309 status = dz_in(dport, DZ_MSR);
310
311 /* it's easy, since DSR2 is the only bit in the register */
312 if (status)
313 dport->port.icount.dsr++;
314}
315
316/*
317 * ------------------------------------------------------------
318 * dz_interrupt ()
319 *
320 * this is the main interrupt routine for the DZ chip.
321 * It deals with the multiple ports.
322 * ------------------------------------------------------------
323 */
7d12e780 324static irqreturn_t dz_interrupt(int irq, void *dev)
1da177e4 325{
15aafa2f 326 struct dz_port *dport = dev;
1da177e4
LT
327 unsigned short status;
328
329 /* get the reason why we just got an irq */
9399575d 330 status = dz_in(dport, DZ_CSR);
1da177e4 331
9399575d 332 if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
de320199 333 dz_receive_chars(dport);
1da177e4 334
9399575d 335 if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
1da177e4
LT
336 dz_transmit_chars(dport);
337
1da177e4
LT
338 return IRQ_HANDLED;
339}
340
341/*
342 * -------------------------------------------------------------------
343 * Here ends the DZ interrupt routines.
344 * -------------------------------------------------------------------
345 */
346
347static unsigned int dz_get_mctrl(struct uart_port *uport)
348{
9399575d
MR
349 /*
350 * FIXME: Handle the 3100/5000 as appropriate. --macro
351 */
1da177e4
LT
352 struct dz_port *dport = (struct dz_port *)uport;
353 unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
354
355 if (dport->port.line == DZ_MODEM) {
1da177e4
LT
356 if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
357 mctrl &= ~TIOCM_DSR;
358 }
359
360 return mctrl;
361}
362
363static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
364{
9399575d
MR
365 /*
366 * FIXME: Handle the 3100/5000 as appropriate. --macro
367 */
1da177e4
LT
368 struct dz_port *dport = (struct dz_port *)uport;
369 unsigned short tmp;
370
371 if (dport->port.line == DZ_MODEM) {
372 tmp = dz_in(dport, DZ_TCR);
373 if (mctrl & TIOCM_DTR)
374 tmp &= ~DZ_MODEM_DTR;
375 else
376 tmp |= DZ_MODEM_DTR;
377 dz_out(dport, DZ_TCR, tmp);
378 }
379}
380
381/*
382 * -------------------------------------------------------------------
383 * startup ()
384 *
385 * various initialization tasks
fd8c5972 386 * -------------------------------------------------------------------
1da177e4
LT
387 */
388static int dz_startup(struct uart_port *uport)
389{
390 struct dz_port *dport = (struct dz_port *)uport;
391 unsigned long flags;
392 unsigned short tmp;
393
1da177e4
LT
394 spin_lock_irqsave(&dport->port.lock, flags);
395
396 /* enable the interrupt and the scanning */
397 tmp = dz_in(dport, DZ_CSR);
398 tmp |= DZ_RIE | DZ_TIE | DZ_MSE;
399 dz_out(dport, DZ_CSR, tmp);
400
401 spin_unlock_irqrestore(&dport->port.lock, flags);
402
403 return 0;
404}
405
fd8c5972 406/*
1da177e4
LT
407 * -------------------------------------------------------------------
408 * shutdown ()
409 *
410 * This routine will shutdown a serial port; interrupts are disabled, and
411 * DTR is dropped if the hangup on close termio flag is on.
fd8c5972 412 * -------------------------------------------------------------------
1da177e4
LT
413 */
414static void dz_shutdown(struct uart_port *uport)
415{
43d46ab1
MR
416 struct dz_port *dport = (struct dz_port *)uport;
417 unsigned long flags;
418
419 spin_lock_irqsave(&dport->port.lock, flags);
420 dz_stop_tx(&dport->port);
421 spin_unlock_irqrestore(&dport->port.lock, flags);
1da177e4
LT
422}
423
424/*
9399575d
MR
425 * -------------------------------------------------------------------
426 * dz_tx_empty() -- get the transmitter empty status
1da177e4
LT
427 *
428 * Purpose: Let user call ioctl() to get info when the UART physically
429 * is emptied. On bus types like RS485, the transmitter must
430 * release the bus after transmitting. This must be done when
431 * the transmit shift register is empty, not be done when the
432 * transmit holding register is empty. This functionality
fd8c5972 433 * allows an RS485 driver to be written in user space.
9399575d 434 * -------------------------------------------------------------------
1da177e4
LT
435 */
436static unsigned int dz_tx_empty(struct uart_port *uport)
437{
438 struct dz_port *dport = (struct dz_port *)uport;
9399575d 439 unsigned short tmp, mask = 1 << dport->port.line;
1da177e4 440
9399575d
MR
441 tmp = dz_in(dport, DZ_TCR);
442 tmp &= mask;
443
444 return tmp ? 0 : TIOCSER_TEMT;
1da177e4
LT
445}
446
447static void dz_break_ctl(struct uart_port *uport, int break_state)
448{
9399575d
MR
449 /*
450 * FIXME: Can't access BREAK bits in TDR easily;
451 * reuse the code for polled TX. --macro
452 */
1da177e4
LT
453 struct dz_port *dport = (struct dz_port *)uport;
454 unsigned long flags;
9399575d 455 unsigned short tmp, mask = 1 << dport->port.line;
1da177e4
LT
456
457 spin_lock_irqsave(&uport->lock, flags);
458 tmp = dz_in(dport, DZ_TCR);
459 if (break_state)
460 tmp |= mask;
461 else
462 tmp &= ~mask;
463 dz_out(dport, DZ_TCR, tmp);
464 spin_unlock_irqrestore(&uport->lock, flags);
465}
466
606d099c
AC
467static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
468 struct ktermios *old_termios)
1da177e4
LT
469{
470 struct dz_port *dport = (struct dz_port *)uport;
471 unsigned long flags;
472 unsigned int cflag, baud;
473
474 cflag = dport->port.line;
475
476 switch (termios->c_cflag & CSIZE) {
477 case CS5:
478 cflag |= DZ_CS5;
479 break;
480 case CS6:
481 cflag |= DZ_CS6;
482 break;
483 case CS7:
484 cflag |= DZ_CS7;
485 break;
486 case CS8:
487 default:
488 cflag |= DZ_CS8;
489 }
490
491 if (termios->c_cflag & CSTOPB)
492 cflag |= DZ_CSTOPB;
493 if (termios->c_cflag & PARENB)
494 cflag |= DZ_PARENB;
495 if (termios->c_cflag & PARODD)
496 cflag |= DZ_PARODD;
497
498 baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
499 switch (baud) {
500 case 50:
501 cflag |= DZ_B50;
502 break;
503 case 75:
504 cflag |= DZ_B75;
505 break;
506 case 110:
507 cflag |= DZ_B110;
508 break;
509 case 134:
510 cflag |= DZ_B134;
511 break;
512 case 150:
513 cflag |= DZ_B150;
514 break;
515 case 300:
516 cflag |= DZ_B300;
517 break;
518 case 600:
519 cflag |= DZ_B600;
520 break;
521 case 1200:
522 cflag |= DZ_B1200;
523 break;
524 case 1800:
525 cflag |= DZ_B1800;
526 break;
527 case 2000:
528 cflag |= DZ_B2000;
529 break;
530 case 2400:
531 cflag |= DZ_B2400;
532 break;
533 case 3600:
534 cflag |= DZ_B3600;
535 break;
536 case 4800:
537 cflag |= DZ_B4800;
538 break;
539 case 7200:
540 cflag |= DZ_B7200;
541 break;
542 case 9600:
543 default:
544 cflag |= DZ_B9600;
545 }
546
547 if (termios->c_cflag & CREAD)
548 cflag |= DZ_RXENAB;
549
550 spin_lock_irqsave(&dport->port.lock, flags);
551
9399575d 552 dz_out(dport, DZ_LPR, cflag | dport->port.line);
1da177e4
LT
553 dport->cflag = cflag;
554
555 /* setup accept flag */
556 dport->port.read_status_mask = DZ_OERR;
557 if (termios->c_iflag & INPCK)
558 dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
54c0f37e
MR
559 if (termios->c_iflag & (BRKINT | PARMRK))
560 dport->port.read_status_mask |= DZ_BREAK;
1da177e4
LT
561
562 /* characters to ignore */
563 uport->ignore_status_mask = 0;
54c0f37e
MR
564 if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
565 dport->port.ignore_status_mask |= DZ_OERR;
1da177e4
LT
566 if (termios->c_iflag & IGNPAR)
567 dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
54c0f37e
MR
568 if (termios->c_iflag & IGNBRK)
569 dport->port.ignore_status_mask |= DZ_BREAK;
1da177e4
LT
570
571 spin_unlock_irqrestore(&dport->port.lock, flags);
572}
573
574static const char *dz_type(struct uart_port *port)
575{
576 return "DZ";
577}
578
579static void dz_release_port(struct uart_port *port)
580{
581 /* nothing to do */
582}
583
584static int dz_request_port(struct uart_port *port)
585{
586 return 0;
587}
588
589static void dz_config_port(struct uart_port *port, int flags)
590{
591 if (flags & UART_CONFIG_TYPE)
592 port->type = PORT_DZ;
593}
594
595/*
596 * verify the new serial_struct (for TIOCSSERIAL).
597 */
598static int dz_verify_port(struct uart_port *port, struct serial_struct *ser)
599{
600 int ret = 0;
601 if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
602 ret = -EINVAL;
603 if (ser->irq != port->irq)
604 ret = -EINVAL;
605 return ret;
606}
607
608static struct uart_ops dz_ops = {
609 .tx_empty = dz_tx_empty,
610 .get_mctrl = dz_get_mctrl,
611 .set_mctrl = dz_set_mctrl,
612 .stop_tx = dz_stop_tx,
613 .start_tx = dz_start_tx,
614 .stop_rx = dz_stop_rx,
615 .enable_ms = dz_enable_ms,
616 .break_ctl = dz_break_ctl,
617 .startup = dz_startup,
618 .shutdown = dz_shutdown,
619 .set_termios = dz_set_termios,
620 .type = dz_type,
621 .release_port = dz_release_port,
622 .request_port = dz_request_port,
623 .config_port = dz_config_port,
624 .verify_port = dz_verify_port,
625};
626
627static void __init dz_init_ports(void)
628{
629 static int first = 1;
630 struct dz_port *dport;
631 unsigned long base;
632 int i;
633
634 if (!first)
635 return;
636 first = 0;
637
638 if (mips_machtype == MACH_DS23100 ||
639 mips_machtype == MACH_DS5100)
46677736 640 base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11);
1da177e4 641 else
46677736 642 base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11);
1da177e4
LT
643
644 for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
645 spin_lock_init(&dport->port.lock);
646 dport->port.membase = (char *) base;
9399575d 647 dport->port.iotype = UPIO_MEM;
1da177e4
LT
648 dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
649 dport->port.line = i;
650 dport->port.fifosize = 1;
651 dport->port.ops = &dz_ops;
652 dport->port.flags = UPF_BOOT_AUTOCONF;
653 }
654}
655
656static void dz_reset(struct dz_port *dport)
657{
658 dz_out(dport, DZ_CSR, DZ_CLR);
1da177e4 659 while (dz_in(dport, DZ_CSR) & DZ_CLR);
1da177e4
LT
660 iob();
661
662 /* enable scanning */
663 dz_out(dport, DZ_CSR, DZ_MSE);
664}
665
666#ifdef CONFIG_SERIAL_DZ_CONSOLE
9399575d
MR
667/*
668 * -------------------------------------------------------------------
669 * dz_console_putchar() -- transmit a character
670 *
671 * Polled transmission. This is tricky. We need to mask transmit
672 * interrupts so that they do not interfere, enable the transmitter
673 * for the line requested and then wait till the transmit scanner
674 * requests data for this line. But it may request data for another
675 * line first, in which case we have to disable its transmitter and
676 * repeat waiting till our line pops up. Only then the character may
677 * be transmitted. Finally, the state of the transmitter mask is
678 * restored. Welcome to the world of PDP-11!
679 * -------------------------------------------------------------------
680 */
d608ab99 681static void dz_console_putchar(struct uart_port *uport, int ch)
1da177e4 682{
d358788f 683 struct dz_port *dport = (struct dz_port *)uport;
1da177e4 684 unsigned long flags;
9399575d
MR
685 unsigned short csr, tcr, trdy, mask;
686 int loops = 10000;
1da177e4
LT
687
688 spin_lock_irqsave(&dport->port.lock, flags);
9399575d
MR
689 csr = dz_in(dport, DZ_CSR);
690 dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
691 tcr = dz_in(dport, DZ_TCR);
692 tcr |= 1 << dport->port.line;
693 mask = tcr;
694 dz_out(dport, DZ_TCR, mask);
695 iob();
696 spin_unlock_irqrestore(&dport->port.lock, flags);
1da177e4 697
dbab8128 698 do {
9399575d
MR
699 trdy = dz_in(dport, DZ_CSR);
700 if (!(trdy & DZ_TRDY))
701 continue;
702 trdy = (trdy & DZ_TLINE) >> 8;
703 if (trdy == dport->port.line)
704 break;
705 mask &= ~(1 << trdy);
706 dz_out(dport, DZ_TCR, mask);
707 iob();
708 udelay(2);
dbab8128 709 } while (loops--);
1da177e4 710
9399575d
MR
711 if (loops) /* Cannot send otherwise. */
712 dz_out(dport, DZ_TDR, ch);
1da177e4 713
9399575d
MR
714 dz_out(dport, DZ_TCR, tcr);
715 dz_out(dport, DZ_CSR, csr);
1da177e4 716}
d358788f 717
fd8c5972 718/*
1da177e4
LT
719 * -------------------------------------------------------------------
720 * dz_console_print ()
721 *
722 * dz_console_print is registered for printk.
723 * The console must be locked when we get here.
fd8c5972 724 * -------------------------------------------------------------------
1da177e4 725 */
9399575d 726static void dz_console_print(struct console *co,
1da177e4
LT
727 const char *str,
728 unsigned int count)
729{
9399575d 730 struct dz_port *dport = &dz_ports[co->index];
1da177e4
LT
731#ifdef DEBUG_DZ
732 prom_printf((char *) str);
733#endif
d358788f 734 uart_console_write(&dport->port, str, count, dz_console_putchar);
1da177e4
LT
735}
736
737static int __init dz_console_setup(struct console *co, char *options)
738{
9399575d 739 struct dz_port *dport = &dz_ports[co->index];
1da177e4
LT
740 int baud = 9600;
741 int bits = 8;
742 int parity = 'n';
743 int flow = 'n';
1da177e4
LT
744
745 if (options)
746 uart_parse_options(options, &baud, &parity, &bits, &flow);
747
748 dz_reset(dport);
749
9399575d 750 return uart_set_options(&dport->port, co, baud, parity, bits, flow);
1da177e4
LT
751}
752
9399575d 753static struct uart_driver dz_reg;
6d83c067 754static struct console dz_console = {
1da177e4
LT
755 .name = "ttyS",
756 .write = dz_console_print,
757 .device = uart_console_device,
758 .setup = dz_console_setup,
9399575d
MR
759 .flags = CON_PRINTBUFFER,
760 .index = -1,
761 .data = &dz_reg,
1da177e4
LT
762};
763
9399575d 764static int __init dz_serial_console_init(void)
1da177e4 765{
9399575d
MR
766 if (!IOASIC) {
767 dz_init_ports();
6d83c067 768 register_console(&dz_console);
9399575d
MR
769 return 0;
770 } else
771 return -ENXIO;
1da177e4
LT
772}
773
9399575d
MR
774console_initcall(dz_serial_console_init);
775
6d83c067 776#define SERIAL_DZ_CONSOLE &dz_console
1da177e4
LT
777#else
778#define SERIAL_DZ_CONSOLE NULL
779#endif /* CONFIG_SERIAL_DZ_CONSOLE */
780
781static struct uart_driver dz_reg = {
782 .owner = THIS_MODULE,
783 .driver_name = "serial",
9399575d 784 .dev_name = "ttyS",
1da177e4
LT
785 .major = TTY_MAJOR,
786 .minor = 64,
787 .nr = DZ_NB_PORT,
788 .cons = SERIAL_DZ_CONSOLE,
789};
790
9399575d 791static int __init dz_init(void)
1da177e4 792{
1da177e4
LT
793 int ret, i;
794
9399575d
MR
795 if (IOASIC)
796 return -ENXIO;
797
1da177e4
LT
798 printk("%s%s\n", dz_name, dz_version);
799
800 dz_init_ports();
801
1da177e4
LT
802#ifndef CONFIG_SERIAL_DZ_CONSOLE
803 /* reset the chip */
804 dz_reset(&dz_ports[0]);
805#endif
806
1da177e4
LT
807 ret = uart_register_driver(&dz_reg);
808 if (ret != 0)
0ba137e2
MR
809 goto out;
810
811 ret = request_irq(dz_ports[0].port.irq, dz_interrupt, IRQF_DISABLED,
812 "DZ", &dz_ports[0]);
813 if (ret != 0) {
814 printk(KERN_ERR "dz: Cannot get IRQ %d!\n",
815 dz_ports[0].port.irq);
816 goto out_unregister;
817 }
1da177e4
LT
818
819 for (i = 0; i < DZ_NB_PORT; i++)
820 uart_add_one_port(&dz_reg, &dz_ports[i].port);
821
822 return ret;
0ba137e2
MR
823
824out_unregister:
825 uart_unregister_driver(&dz_reg);
826
827out:
828 return ret;
1da177e4
LT
829}
830
9399575d
MR
831module_init(dz_init);
832
1da177e4
LT
833MODULE_DESCRIPTION("DECstation DZ serial driver");
834MODULE_LICENSE("GPL");