Fix common misspellings
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / sym53c416.c
CommitLineData
1da177e4
LT
1/*
2 * sym53c416.c
3 * Low-level SCSI driver for sym53c416 chip.
4 * Copyright (C) 1998 Lieven Willems (lw_linux@hotmail.com)
5 *
6 * Changes :
7 *
8 * Marcelo Tosatti <marcelo@conectiva.com.br> : Added io_request_lock locking
fa195afe 9 * Alan Cox <alan@lxorguk.ukuu.org.uk> : Cleaned up code formatting
1da177e4
LT
10 * Fixed an irq locking bug
11 * Added ISAPnP support
12 * Bjoern A. Zeeb <bzeeb@zabbadoz.net> : Initial irq locking updates
13 * Added another card with ISAPnP support
14 *
15 * LILO command line usage: sym53c416=<PORTBASE>[,<IRQ>]
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2, or (at your option) any
20 * later version.
21 *
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 * General Public License for more details.
26 *
27 */
28
29#include <linux/module.h>
30#include <linux/kernel.h>
31#include <linux/types.h>
32#include <linux/init.h>
33#include <linux/string.h>
34#include <linux/ioport.h>
1da177e4
LT
35#include <linux/interrupt.h>
36#include <linux/delay.h>
37#include <linux/proc_fs.h>
38#include <linux/spinlock.h>
39#include <asm/dma.h>
40#include <asm/system.h>
41#include <asm/io.h>
42#include <linux/blkdev.h>
43#include <linux/isapnp.h>
44#include "scsi.h"
45#include <scsi/scsi_host.h>
46#include "sym53c416.h"
47
48#define VERSION_STRING "Version 1.0.0-ac"
49
50#define TC_LOW 0x00 /* Transfer counter low */
51#define TC_MID 0x01 /* Transfer counter mid */
52#define SCSI_FIFO 0x02 /* SCSI FIFO register */
53#define COMMAND_REG 0x03 /* Command Register */
54#define STATUS_REG 0x04 /* Status Register (READ) */
55#define DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */
56#define INT_REG 0x05 /* Interrupt Register (READ) */
57#define TOM 0x05 /* Time out multiplier (WRITE) */
58#define STP 0x06 /* Synchronous Transfer period */
59#define SYNC_OFFSET 0x07 /* Synchronous Offset */
60#define CONF_REG_1 0x08 /* Configuration register 1 */
61#define CONF_REG_2 0x0B /* Configuration register 2 */
62#define CONF_REG_3 0x0C /* Configuration register 3 */
63#define CONF_REG_4 0x0D /* Configuration register 4 */
64#define TC_HIGH 0x0E /* Transfer counter high */
65#define PIO_FIFO_1 0x10 /* PIO FIFO register 1 */
66#define PIO_FIFO_2 0x11 /* PIO FIFO register 2 */
67#define PIO_FIFO_3 0x12 /* PIO FIFO register 3 */
68#define PIO_FIFO_4 0x13 /* PIO FIFO register 4 */
69#define PIO_FIFO_CNT 0x14 /* PIO FIFO count */
70#define PIO_INT_REG 0x15 /* PIO interrupt register */
71#define CONF_REG_5 0x16 /* Configuration register 5 */
72#define FEATURE_EN 0x1D /* Feature Enable register */
73
74/* Configuration register 1 entries: */
75/* Bits 2-0: SCSI ID of host adapter */
76#define SCM 0x80 /* Slow Cable Mode */
77#define SRID 0x40 /* SCSI Reset Interrupt Disable */
78#define PTM 0x20 /* Parity Test Mode */
79#define EPC 0x10 /* Enable Parity Checking */
80#define CTME 0x08 /* Special Test Mode */
81
82/* Configuration register 2 entries: */
83#define FE 0x40 /* Features Enable */
84#define SCSI2 0x08 /* SCSI 2 Enable */
85#define TBPA 0x04 /* Target Bad Parity Abort */
86
87/* Configuration register 3 entries: */
88#define IDMRC 0x80 /* ID Message Reserved Check */
89#define QTE 0x40 /* Queue Tag Enable */
90#define CDB10 0x20 /* Command Descriptor Block 10 */
91#define FSCSI 0x10 /* FastSCSI */
92#define FCLK 0x08 /* FastClock */
93
94/* Configuration register 4 entries: */
95#define RBS 0x08 /* Register bank select */
96#define EAN 0x04 /* Enable Active Negotiation */
97
98/* Configuration register 5 entries: */
99#define LPSR 0x80 /* Lower Power SCSI Reset */
100#define IE 0x20 /* Interrupt Enable */
101#define LPM 0x02 /* Low Power Mode */
102#define WSE0 0x01 /* 0WS Enable */
103
104/* Interrupt register entries: */
105#define SRST 0x80 /* SCSI Reset */
106#define ILCMD 0x40 /* Illegal Command */
107#define DIS 0x20 /* Disconnect */
108#define BS 0x10 /* Bus Service */
109#define FC 0x08 /* Function Complete */
110#define RESEL 0x04 /* Reselected */
111#define SI 0x03 /* Selection Interrupt */
112
113/* Status Register Entries: */
114#define SCI 0x80 /* SCSI Core Int */
115#define GE 0x40 /* Gross Error */
116#define PE 0x20 /* Parity Error */
117#define TC 0x10 /* Terminal Count */
118#define VGC 0x08 /* Valid Group Code */
119#define PHBITS 0x07 /* Phase bits */
120
121/* PIO Interrupt Register Entries: */
122#define SCI 0x80 /* SCSI Core Int */
123#define PFI 0x40 /* PIO FIFO Interrupt */
124#define FULL 0x20 /* PIO FIFO Full */
125#define EMPTY 0x10 /* PIO FIFO Empty */
126#define CE 0x08 /* Collision Error */
127#define OUE 0x04 /* Overflow / Underflow error */
128#define FIE 0x02 /* Full Interrupt Enable */
129#define EIE 0x01 /* Empty Interrupt Enable */
130
131/* SYM53C416 SCSI phases (lower 3 bits of SYM53C416_STATUS_REG) */
132#define PHASE_DATA_OUT 0x00
133#define PHASE_DATA_IN 0x01
134#define PHASE_COMMAND 0x02
135#define PHASE_STATUS 0x03
136#define PHASE_RESERVED_1 0x04
137#define PHASE_RESERVED_2 0x05
138#define PHASE_MESSAGE_OUT 0x06
139#define PHASE_MESSAGE_IN 0x07
140
141/* SYM53C416 core commands */
142#define NOOP 0x00
143#define FLUSH_FIFO 0x01
144#define RESET_CHIP 0x02
145#define RESET_SCSI_BUS 0x03
146#define DISABLE_SEL_RESEL 0x45
147#define RESEL_SEQ 0x40
148#define SEL_WITHOUT_ATN_SEQ 0x41
149#define SEL_WITH_ATN_SEQ 0x42
150#define SEL_WITH_ATN_AND_STOP_SEQ 0x43
151#define ENABLE_SEL_RESEL 0x44
152#define SEL_WITH_ATN3_SEQ 0x46
153#define RESEL3_SEQ 0x47
154#define SND_MSG 0x20
155#define SND_STAT 0x21
156#define SND_DATA 0x22
157#define DISCONNECT_SEQ 0x23
158#define TERMINATE_SEQ 0x24
159#define TARGET_COMM_COMPLETE_SEQ 0x25
160#define DISCONN 0x27
161#define RECV_MSG_SEQ 0x28
162#define RECV_CMD 0x29
163#define RECV_DATA 0x2A
164#define RECV_CMD_SEQ 0x2B
165#define TARGET_ABORT_PIO 0x04
166#define TRANSFER_INFORMATION 0x10
167#define INIT_COMM_COMPLETE_SEQ 0x11
168#define MSG_ACCEPTED 0x12
169#define TRANSFER_PAD 0x18
170#define SET_ATN 0x1A
171#define RESET_ATN 0x1B
172#define ILLEGAL 0xFF
173
174#define PIO_MODE 0x80
175
176#define IO_RANGE 0x20 /* 0x00 - 0x1F */
177#define ID "sym53c416" /* Attention: copied to the sym53c416.h */
178#define PIO_SIZE 128 /* Size of PIO fifo is 128 bytes */
179
180#define READ_TIMEOUT 150
181#define WRITE_TIMEOUT 150
182
183#ifdef MODULE
184
185#define sym53c416_base sym53c416
186#define sym53c416_base_1 sym53c416_1
187#define sym53c416_base_2 sym53c416_2
188#define sym53c416_base_3 sym53c416_3
189
c958d767
JB
190static unsigned int sym53c416_base[2];
191static unsigned int sym53c416_base_1[2];
192static unsigned int sym53c416_base_2[2];
193static unsigned int sym53c416_base_3[2];
1da177e4
LT
194
195#endif
196
197#define MAXHOSTS 4
198
45711f1a 199#define SG_ADDRESS(buffer) ((char *) sg_virt((buffer)))
1da177e4
LT
200
201enum phases
202{
203 idle,
204 data_out,
205 data_in,
206 command_ph,
207 status_ph,
208 message_out,
209 message_in
210};
211
212typedef struct
213{
214 int base;
215 int irq;
216 int scsi_id;
217} host;
218
219static host hosts[MAXHOSTS] = {
220 {0, 0, SYM53C416_SCSI_ID},
221 {0, 0, SYM53C416_SCSI_ID},
222 {0, 0, SYM53C416_SCSI_ID},
223 {0, 0, SYM53C416_SCSI_ID}
224 };
225
226static int host_index = 0;
227static char info[120];
228static Scsi_Cmnd *current_command = NULL;
229static int fastpio = 1;
230
231static int probeaddrs[] = {0x200, 0x220, 0x240, 0};
232
233static void sym53c416_set_transfer_counter(int base, unsigned int len)
234{
235 /* Program Transfer Counter */
236 outb(len & 0x0000FF, base + TC_LOW);
237 outb((len & 0x00FF00) >> 8, base + TC_MID);
238 outb((len & 0xFF0000) >> 16, base + TC_HIGH);
239}
240
241static DEFINE_SPINLOCK(sym53c416_lock);
242
243/* Returns the number of bytes read */
244static __inline__ unsigned int sym53c416_read(int base, unsigned char *buffer, unsigned int len)
245{
246 unsigned int orig_len = len;
247 unsigned long flags = 0;
248 unsigned int bytes_left;
249 unsigned long i;
250 int timeout = READ_TIMEOUT;
251
252 /* Do transfer */
253 spin_lock_irqsave(&sym53c416_lock, flags);
254 while(len && timeout)
255 {
256 bytes_left = inb(base + PIO_FIFO_CNT); /* Number of bytes in the PIO FIFO */
257 if(fastpio && bytes_left > 3)
258 {
259 insl(base + PIO_FIFO_1, buffer, bytes_left >> 2);
260 buffer += bytes_left & 0xFC;
261 len -= bytes_left & 0xFC;
262 }
263 else if(bytes_left > 0)
264 {
265 len -= bytes_left;
266 for(; bytes_left > 0; bytes_left--)
267 *(buffer++) = inb(base + PIO_FIFO_1);
268 }
269 else
270 {
271 i = jiffies + timeout;
272 spin_unlock_irqrestore(&sym53c416_lock, flags);
273 while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & EMPTY) && timeout)
274 if(inb(base + PIO_INT_REG) & SCI)
275 timeout = 0;
276 spin_lock_irqsave(&sym53c416_lock, flags);
277 if(inb(base + PIO_INT_REG) & EMPTY)
278 timeout = 0;
279 }
280 }
281 spin_unlock_irqrestore(&sym53c416_lock, flags);
282 return orig_len - len;
283}
284
285/* Returns the number of bytes written */
286static __inline__ unsigned int sym53c416_write(int base, unsigned char *buffer, unsigned int len)
287{
288 unsigned int orig_len = len;
289 unsigned long flags = 0;
290 unsigned int bufferfree;
291 unsigned long i;
292 unsigned int timeout = WRITE_TIMEOUT;
293
294 /* Do transfer */
295 spin_lock_irqsave(&sym53c416_lock, flags);
296 while(len && timeout)
297 {
298 bufferfree = PIO_SIZE - inb(base + PIO_FIFO_CNT);
299 if(bufferfree > len)
300 bufferfree = len;
301 if(fastpio && bufferfree > 3)
302 {
303 outsl(base + PIO_FIFO_1, buffer, bufferfree >> 2);
304 buffer += bufferfree & 0xFC;
305 len -= bufferfree & 0xFC;
306 }
307 else if(bufferfree > 0)
308 {
309 len -= bufferfree;
310 for(; bufferfree > 0; bufferfree--)
311 outb(*(buffer++), base + PIO_FIFO_1);
312 }
313 else
314 {
315 i = jiffies + timeout;
316 spin_unlock_irqrestore(&sym53c416_lock, flags);
317 while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & FULL) && timeout)
318 ;
319 spin_lock_irqsave(&sym53c416_lock, flags);
320 if(inb(base + PIO_INT_REG) & FULL)
321 timeout = 0;
322 }
323 }
324 spin_unlock_irqrestore(&sym53c416_lock, flags);
325 return orig_len - len;
326}
327
7d12e780 328static irqreturn_t sym53c416_intr_handle(int irq, void *dev_id)
1da177e4
LT
329{
330 struct Scsi_Host *dev = dev_id;
736f77de 331 int base = dev->io_port;
1da177e4
LT
332 int i;
333 unsigned long flags = 0;
334 unsigned char status_reg, pio_int_reg, int_reg;
772a5c3f 335 struct scatterlist *sg;
1da177e4
LT
336 unsigned int tot_trans = 0;
337
1da177e4
LT
338 spin_lock_irqsave(dev->host_lock,flags);
339 status_reg = inb(base + STATUS_REG);
340 pio_int_reg = inb(base + PIO_INT_REG);
341 int_reg = inb(base + INT_REG);
342 spin_unlock_irqrestore(dev->host_lock, flags);
343
344 /* First, we handle error conditions */
345 if(int_reg & SCI) /* SCSI Reset */
346 {
347 printk(KERN_DEBUG "sym53c416: Reset received\n");
348 current_command->SCp.phase = idle;
349 current_command->result = DID_RESET << 16;
350 spin_lock_irqsave(dev->host_lock, flags);
351 current_command->scsi_done(current_command);
352 spin_unlock_irqrestore(dev->host_lock, flags);
353 goto out;
354 }
355 if(int_reg & ILCMD) /* Illegal Command */
356 {
357 printk(KERN_WARNING "sym53c416: Illegal Command: 0x%02x.\n", inb(base + COMMAND_REG));
358 current_command->SCp.phase = idle;
359 current_command->result = DID_ERROR << 16;
360 spin_lock_irqsave(dev->host_lock, flags);
361 current_command->scsi_done(current_command);
362 spin_unlock_irqrestore(dev->host_lock, flags);
363 goto out;
364 }
365 if(status_reg & GE) /* Gross Error */
366 {
367 printk(KERN_WARNING "sym53c416: Controller reports gross error.\n");
368 current_command->SCp.phase = idle;
369 current_command->result = DID_ERROR << 16;
370 spin_lock_irqsave(dev->host_lock, flags);
371 current_command->scsi_done(current_command);
372 spin_unlock_irqrestore(dev->host_lock, flags);
373 goto out;
374 }
375 if(status_reg & PE) /* Parity Error */
376 {
377 printk(KERN_WARNING "sym53c416:SCSI parity error.\n");
378 current_command->SCp.phase = idle;
379 current_command->result = DID_PARITY << 16;
380 spin_lock_irqsave(dev->host_lock, flags);
381 current_command->scsi_done(current_command);
382 spin_unlock_irqrestore(dev->host_lock, flags);
383 goto out;
384 }
385 if(pio_int_reg & (CE | OUE))
386 {
387 printk(KERN_WARNING "sym53c416: PIO interrupt error.\n");
388 current_command->SCp.phase = idle;
389 current_command->result = DID_ERROR << 16;
390 spin_lock_irqsave(dev->host_lock, flags);
391 current_command->scsi_done(current_command);
392 spin_unlock_irqrestore(dev->host_lock, flags);
393 goto out;
394 }
395 if(int_reg & DIS) /* Disconnect */
396 {
397 if(current_command->SCp.phase != message_in)
398 current_command->result = DID_NO_CONNECT << 16;
399 else
400 current_command->result = (current_command->SCp.Status & 0xFF) | ((current_command->SCp.Message & 0xFF) << 8) | (DID_OK << 16);
401 current_command->SCp.phase = idle;
402 spin_lock_irqsave(dev->host_lock, flags);
403 current_command->scsi_done(current_command);
404 spin_unlock_irqrestore(dev->host_lock, flags);
405 goto out;
406 }
407 /* Now we handle SCSI phases */
408
409 switch(status_reg & PHBITS) /* Filter SCSI phase out of status reg */
410 {
411 case PHASE_DATA_OUT:
412 {
413 if(int_reg & BS)
414 {
415 current_command->SCp.phase = data_out;
416 outb(FLUSH_FIFO, base + COMMAND_REG);
772a5c3f
FT
417 sym53c416_set_transfer_counter(base,
418 scsi_bufflen(current_command));
1da177e4 419 outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
772a5c3f
FT
420
421 scsi_for_each_sg(current_command,
422 sg, scsi_sg_count(current_command), i) {
423 tot_trans += sym53c416_write(base,
424 SG_ADDRESS(sg),
425 sg->length);
1da177e4
LT
426 }
427 if(tot_trans < current_command->underflow)
428 printk(KERN_WARNING "sym53c416: Underflow, wrote %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
429 }
430 break;
431 }
432
433 case PHASE_DATA_IN:
434 {
435 if(int_reg & BS)
436 {
437 current_command->SCp.phase = data_in;
438 outb(FLUSH_FIFO, base + COMMAND_REG);
772a5c3f
FT
439 sym53c416_set_transfer_counter(base,
440 scsi_bufflen(current_command));
441
1da177e4 442 outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
772a5c3f
FT
443
444 scsi_for_each_sg(current_command,
445 sg, scsi_sg_count(current_command), i) {
446 tot_trans += sym53c416_read(base,
447 SG_ADDRESS(sg),
448 sg->length);
1da177e4
LT
449 }
450 if(tot_trans < current_command->underflow)
451 printk(KERN_WARNING "sym53c416: Underflow, read %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
452 }
453 break;
454 }
455
456 case PHASE_COMMAND:
457 {
458 current_command->SCp.phase = command_ph;
459 printk(KERN_ERR "sym53c416: Unknown interrupt in command phase.\n");
460 break;
461 }
462
463 case PHASE_STATUS:
464 {
465 current_command->SCp.phase = status_ph;
466 outb(FLUSH_FIFO, base + COMMAND_REG);
467 outb(INIT_COMM_COMPLETE_SEQ, base + COMMAND_REG);
468 break;
469 }
470
471 case PHASE_RESERVED_1:
472 case PHASE_RESERVED_2:
473 {
474 printk(KERN_ERR "sym53c416: Reserved phase occurred.\n");
475 break;
476 }
477
478 case PHASE_MESSAGE_OUT:
479 {
480 current_command->SCp.phase = message_out;
481 outb(SET_ATN, base + COMMAND_REG);
482 outb(MSG_ACCEPTED, base + COMMAND_REG);
483 break;
484 }
485
486 case PHASE_MESSAGE_IN:
487 {
488 current_command->SCp.phase = message_in;
489 current_command->SCp.Status = inb(base + SCSI_FIFO);
490 current_command->SCp.Message = inb(base + SCSI_FIFO);
491 if(current_command->SCp.Message == SAVE_POINTERS || current_command->SCp.Message == DISCONNECT)
492 outb(SET_ATN, base + COMMAND_REG);
493 outb(MSG_ACCEPTED, base + COMMAND_REG);
494 break;
495 }
496 }
497out:
498 return IRQ_HANDLED;
499}
500
501static void sym53c416_init(int base, int scsi_id)
502{
503 outb(RESET_CHIP, base + COMMAND_REG);
504 outb(NOOP, base + COMMAND_REG);
505 outb(0x99, base + TOM); /* Time out of 250 ms */
506 outb(0x05, base + STP);
507 outb(0x00, base + SYNC_OFFSET);
508 outb(EPC | scsi_id, base + CONF_REG_1);
509 outb(FE | SCSI2 | TBPA, base + CONF_REG_2);
510 outb(IDMRC | QTE | CDB10 | FSCSI | FCLK, base + CONF_REG_3);
511 outb(0x83 | EAN, base + CONF_REG_4);
512 outb(IE | WSE0, base + CONF_REG_5);
513 outb(0, base + FEATURE_EN);
514}
515
516static int sym53c416_probeirq(int base, int scsi_id)
517{
518 int irq, irqs;
519 unsigned long i;
520
521 /* Clear interrupt register */
522 inb(base + INT_REG);
523 /* Start probing for irq's */
524 irqs = probe_irq_on();
525 /* Reinit chip */
526 sym53c416_init(base, scsi_id);
527 /* Cause interrupt */
528 outb(NOOP, base + COMMAND_REG);
529 outb(ILLEGAL, base + COMMAND_REG);
530 outb(0x07, base + DEST_BUS_ID);
531 outb(0x00, base + DEST_BUS_ID);
532 /* Wait for interrupt to occur */
533 i = jiffies + 20;
534 while(time_before(jiffies, i) && !(inb(base + STATUS_REG) & SCI))
535 barrier();
536 if(time_before_eq(i, jiffies)) /* timed out */
537 return 0;
538 /* Get occurred irq */
539 irq = probe_irq_off(irqs);
540 sym53c416_init(base, scsi_id);
541 return irq;
542}
543
544/* Setup: sym53c416=base,irq */
545void sym53c416_setup(char *str, int *ints)
546{
547 int i;
548
549 if(host_index >= MAXHOSTS)
550 {
551 printk(KERN_WARNING "sym53c416: Too many hosts defined\n");
552 return;
553 }
554 if(ints[0] < 1 || ints[0] > 2)
555 {
556 printk(KERN_ERR "sym53c416: Wrong number of parameters:\n");
557 printk(KERN_ERR "sym53c416: usage: sym53c416=<base>[,<irq>]\n");
558 return;
559 }
560 for(i = 0; i < host_index && i >= 0; i++)
561 if(hosts[i].base == ints[1])
562 i = -2;
563 if(i >= 0)
564 {
565 hosts[host_index].base = ints[1];
566 hosts[host_index].irq = (ints[0] == 2)? ints[2] : 0;
567 host_index++;
568 }
569}
570
571static int sym53c416_test(int base)
572{
573 outb(RESET_CHIP, base + COMMAND_REG);
574 outb(NOOP, base + COMMAND_REG);
575 if(inb(base + COMMAND_REG) != NOOP)
576 return 0;
577 if(!inb(base + TC_HIGH) || inb(base + TC_HIGH) == 0xFF)
578 return 0;
579 if((inb(base + PIO_INT_REG) & (FULL | EMPTY | CE | OUE | FIE | EIE)) != EMPTY)
580 return 0;
581 return 1;
582}
583
584
585static struct isapnp_device_id id_table[] __devinitdata = {
586 { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
587 ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4161), 0 },
588 { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
589 ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4163), 0 },
590 { ISAPNP_DEVICE_SINGLE_END }
591};
592
593MODULE_DEVICE_TABLE(isapnp, id_table);
594
595static void sym53c416_probe(void)
596{
597 int *base = probeaddrs;
598 int ints[2];
599
600 ints[0] = 1;
601 for(; *base; base++) {
602 if (request_region(*base, IO_RANGE, ID)) {
603 if (sym53c416_test(*base)) {
604 ints[1] = *base;
605 sym53c416_setup(NULL, ints);
606 }
607 release_region(*base, IO_RANGE);
608 }
609 }
610}
611
d0be4a7d 612int __init sym53c416_detect(struct scsi_host_template *tpnt)
1da177e4
LT
613{
614 unsigned long flags;
615 struct Scsi_Host * shpnt = NULL;
616 int i;
617 int count;
618 struct pnp_dev *idev = NULL;
619
620#ifdef MODULE
621 int ints[3];
622
623 ints[0] = 2;
c958d767 624 if(sym53c416_base[0])
1da177e4
LT
625 {
626 ints[1] = sym53c416_base[0];
627 ints[2] = sym53c416_base[1];
628 sym53c416_setup(NULL, ints);
629 }
c958d767 630 if(sym53c416_base_1[0])
1da177e4
LT
631 {
632 ints[1] = sym53c416_base_1[0];
633 ints[2] = sym53c416_base_1[1];
634 sym53c416_setup(NULL, ints);
635 }
c958d767 636 if(sym53c416_base_2[0])
1da177e4
LT
637 {
638 ints[1] = sym53c416_base_2[0];
639 ints[2] = sym53c416_base_2[1];
640 sym53c416_setup(NULL, ints);
641 }
c958d767 642 if(sym53c416_base_3[0])
1da177e4
LT
643 {
644 ints[1] = sym53c416_base_3[0];
645 ints[2] = sym53c416_base_3[1];
646 sym53c416_setup(NULL, ints);
647 }
648#endif
649 printk(KERN_INFO "sym53c416.c: %s\n", VERSION_STRING);
650
651 for (i=0; id_table[i].vendor != 0; i++) {
652 while((idev=pnp_find_dev(NULL, id_table[i].vendor,
653 id_table[i].function, idev))!=NULL)
654 {
655 int i[3];
656
657 if(pnp_device_attach(idev)<0)
658 {
659 printk(KERN_WARNING "sym53c416: unable to attach PnP device.\n");
660 continue;
661 }
662 if(pnp_activate_dev(idev) < 0)
663 {
664 printk(KERN_WARNING "sym53c416: unable to activate PnP device.\n");
665 pnp_device_detach(idev);
666 continue;
667
668 }
669
670 i[0] = 2;
671 i[1] = pnp_port_start(idev, 0);
672 i[2] = pnp_irq(idev, 0);
673
674 printk(KERN_INFO "sym53c416: ISAPnP card found and configured at 0x%X, IRQ %d.\n",
675 i[1], i[2]);
676 sym53c416_setup(NULL, i);
677 }
678 }
679 sym53c416_probe();
680
681 /* Now we register and set up each host adapter found... */
682 for(count = 0, i = 0; i < host_index; i++) {
683 if (!request_region(hosts[i].base, IO_RANGE, ID))
684 continue;
685 if (!sym53c416_test(hosts[i].base)) {
686 printk(KERN_WARNING "No sym53c416 found at address 0x%03x\n", hosts[i].base);
687 goto fail_release_region;
688 }
689
690 /* We don't have an irq yet, so we should probe for one */
691 if (!hosts[i].irq)
692 hosts[i].irq = sym53c416_probeirq(hosts[i].base, hosts[i].scsi_id);
693 if (!hosts[i].irq)
694 goto fail_release_region;
695
696 shpnt = scsi_register(tpnt, 0);
697 if (!shpnt)
698 goto fail_release_region;
699 /* Request for specified IRQ */
700 if (request_irq(hosts[i].irq, sym53c416_intr_handle, 0, ID, shpnt))
701 goto fail_free_host;
702
703 spin_lock_irqsave(&sym53c416_lock, flags);
704 shpnt->unique_id = hosts[i].base;
705 shpnt->io_port = hosts[i].base;
706 shpnt->n_io_port = IO_RANGE;
707 shpnt->irq = hosts[i].irq;
708 shpnt->this_id = hosts[i].scsi_id;
709 sym53c416_init(hosts[i].base, hosts[i].scsi_id);
710 count++;
711 spin_unlock_irqrestore(&sym53c416_lock, flags);
712 continue;
713
714 fail_free_host:
715 scsi_unregister(shpnt);
716 fail_release_region:
717 release_region(hosts[i].base, IO_RANGE);
718 }
719 return count;
720}
721
722const char *sym53c416_info(struct Scsi_Host *SChost)
723{
724 int i;
725 int base = SChost->io_port;
726 int irq = SChost->irq;
727 int scsi_id = 0;
728 int rev = inb(base + TC_HIGH);
729
730 for(i = 0; i < host_index; i++)
731 if(hosts[i].base == base)
732 scsi_id = hosts[i].scsi_id;
733 sprintf(info, "Symbios Logic 53c416 (rev. %d) at 0x%03x, irq %d, SCSI-ID %d, %s pio", rev, base, irq, scsi_id, (fastpio)? "fast" : "slow");
734 return info;
735}
736
f281233d 737static int sym53c416_queuecommand_lck(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
1da177e4
LT
738{
739 int base;
740 unsigned long flags = 0;
741 int i;
742
743 /* Store base register as we can have more than one controller in the system */
744 base = SCpnt->device->host->io_port;
745 current_command = SCpnt; /* set current command */
746 current_command->scsi_done = done; /* set ptr to done function */
747 current_command->SCp.phase = command_ph; /* currect phase is the command phase */
748 current_command->SCp.Status = 0;
749 current_command->SCp.Message = 0;
750
751 spin_lock_irqsave(&sym53c416_lock, flags);
422c0d61 752 outb(scmd_id(SCpnt), base + DEST_BUS_ID); /* Set scsi id target */
1da177e4
LT
753 outb(FLUSH_FIFO, base + COMMAND_REG); /* Flush SCSI and PIO FIFO's */
754 /* Write SCSI command into the SCSI fifo */
755 for(i = 0; i < SCpnt->cmd_len; i++)
756 outb(SCpnt->cmnd[i], base + SCSI_FIFO);
757 /* Start selection sequence */
758 outb(SEL_WITHOUT_ATN_SEQ, base + COMMAND_REG);
759 /* Now an interrupt will be generated which we will catch in out interrupt routine */
760 spin_unlock_irqrestore(&sym53c416_lock, flags);
761 return 0;
762}
763
f281233d
JG
764DEF_SCSI_QCMD(sym53c416_queuecommand)
765
1da177e4
LT
766static int sym53c416_host_reset(Scsi_Cmnd *SCpnt)
767{
768 int base;
769 int scsi_id = -1;
770 int i;
df0ae249
JG
771 unsigned long flags;
772
773 spin_lock_irqsave(&sym53c416_lock, flags);
1da177e4
LT
774
775 /* printk("sym53c416_reset\n"); */
776 base = SCpnt->device->host->io_port;
25985edc 777 /* search scsi_id - fixme, we shouldn't need to iterate for this! */
b6f0b0d0 778 for(i = 0; i < host_index && scsi_id == -1; i++)
1da177e4
LT
779 if(hosts[i].base == base)
780 scsi_id = hosts[i].scsi_id;
781 outb(RESET_CHIP, base + COMMAND_REG);
782 outb(NOOP | PIO_MODE, base + COMMAND_REG);
783 outb(RESET_SCSI_BUS, base + COMMAND_REG);
784 sym53c416_init(base, scsi_id);
df0ae249
JG
785
786 spin_unlock_irqrestore(&sym53c416_lock, flags);
1da177e4
LT
787 return SUCCESS;
788}
789
790static int sym53c416_release(struct Scsi_Host *shost)
791{
792 if (shost->irq)
793 free_irq(shost->irq, shost);
794 if (shost->io_port && shost->n_io_port)
795 release_region(shost->io_port, shost->n_io_port);
796 return 0;
797}
798
799static int sym53c416_bios_param(struct scsi_device *sdev,
800 struct block_device *dev,
801 sector_t capacity, int *ip)
802{
803 int size;
804
805 size = capacity;
806 ip[0] = 64; /* heads */
807 ip[1] = 32; /* sectors */
808 if((ip[2] = size >> 11) > 1024) /* cylinders, test for big disk */
809 {
810 ip[0] = 255; /* heads */
811 ip[1] = 63; /* sectors */
812 ip[2] = size / (255 * 63); /* cylinders */
813 }
814 return 0;
815}
816
817/* Loadable module support */
818#ifdef MODULE
819
820MODULE_AUTHOR("Lieven Willems");
821MODULE_LICENSE("GPL");
822
823module_param_array(sym53c416, uint, NULL, 0);
824module_param_array(sym53c416_1, uint, NULL, 0);
825module_param_array(sym53c416_2, uint, NULL, 0);
826module_param_array(sym53c416_3, uint, NULL, 0);
827
828#endif
829
d0be4a7d 830static struct scsi_host_template driver_template = {
1da177e4
LT
831 .proc_name = "sym53c416",
832 .name = "Symbios Logic 53c416",
833 .detect = sym53c416_detect,
834 .info = sym53c416_info,
835 .queuecommand = sym53c416_queuecommand,
1da177e4 836 .eh_host_reset_handler =sym53c416_host_reset,
1da177e4
LT
837 .release = sym53c416_release,
838 .bios_param = sym53c416_bios_param,
839 .can_queue = 1,
840 .this_id = SYM53C416_SCSI_ID,
841 .sg_tablesize = 32,
842 .cmd_per_lun = 1,
843 .unchecked_isa_dma = 1,
844 .use_clustering = ENABLE_CLUSTERING,
845};
846#include "scsi_module.c"