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[PATCH] kfree cleanup: drivers/scsi
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / lpfc / lpfc_init.c
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dea3101e
JB		 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173
JSEC		 3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
dea3101e 6 * www.emulex.com *
c44ce173 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e
JB		 8 * *
9 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea3101e
JB		 20 *******************************************************************/
21
dea3101e
JB		 22#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
27#include <linux/kthread.h>
28#include <linux/pci.h>
29#include <linux/spinlock.h>
30
91886523 31#include <scsi/scsi.h>
dea3101e
JB		 32#include <scsi/scsi_device.h>
33#include <scsi/scsi_host.h>
34#include <scsi/scsi_transport_fc.h>
35
36#include "lpfc_hw.h"
37#include "lpfc_sli.h"
38#include "lpfc_disc.h"
39#include "lpfc_scsi.h"
40#include "lpfc.h"
41#include "lpfc_logmsg.h"
42#include "lpfc_crtn.h"
43#include "lpfc_version.h"
44
45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *);
46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
47static int lpfc_post_rcv_buf(struct lpfc_hba *);
48
49static struct scsi_transport_template *lpfc_transport_template = NULL;
50static DEFINE_IDR(lpfc_hba_index);
51
52/************************************************************************/
53/* */
54/* lpfc_config_port_prep */
55/* This routine will do LPFC initialization prior to the */
56/* CONFIG_PORT mailbox command. This will be initialized */
57/* as a SLI layer callback routine. */
58/* This routine returns 0 on success or -ERESTART if it wants */
59/* the SLI layer to reset the HBA and try again. Any */
60/* other return value indicates an error. */
61/* */
62/************************************************************************/
63int
64lpfc_config_port_prep(struct lpfc_hba * phba)
65{
66 lpfc_vpd_t *vp = &phba->vpd;
67 int i = 0, rc;
68 LPFC_MBOXQ_t *pmb;
69 MAILBOX_t *mb;
70 char *lpfc_vpd_data = NULL;
71 uint16_t offset = 0;
72 static char licensed[56] =
73 "key unlock for use with gnu public licensed code only\0";
74
75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
76 if (!pmb) {
77 phba->hba_state = LPFC_HBA_ERROR;
78 return -ENOMEM;
79 }
80
81 mb = &pmb->mb;
82 phba->hba_state = LPFC_INIT_MBX_CMDS;
83
84 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
85 uint32_t *ptext = (uint32_t *) licensed;
86
87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
88 *ptext = cpu_to_be32(*ptext);
89
90 lpfc_read_nv(phba, pmb);
91 memset((char*)mb->un.varRDnvp.rsvd3, 0,
92 sizeof (mb->un.varRDnvp.rsvd3));
93 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
94 sizeof (licensed));
95
96 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
97
98 if (rc != MBX_SUCCESS) {
99 lpfc_printf_log(phba,
100 KERN_ERR,
101 LOG_MBOX,
102 "%d:0324 Config Port initialization "
103 "error, mbxCmd x%x READ_NVPARM, "
104 "mbxStatus x%x\n",
105 phba->brd_no,
106 mb->mbxCommand, mb->mbxStatus);
107 mempool_free(pmb, phba->mbox_mem_pool);
108 return -ERESTART;
109 }
110 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
111 sizeof (mb->un.varRDnvp.nodename));
112 }
113
114 /* Setup and issue mailbox READ REV command */
115 lpfc_read_rev(phba, pmb);
116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
117 if (rc != MBX_SUCCESS) {
118 lpfc_printf_log(phba,
119 KERN_ERR,
120 LOG_INIT,
121 "%d:0439 Adapter failed to init, mbxCmd x%x "
122 "READ_REV, mbxStatus x%x\n",
123 phba->brd_no,
124 mb->mbxCommand, mb->mbxStatus);
125 mempool_free( pmb, phba->mbox_mem_pool);
126 return -ERESTART;
127 }
128
129 /* The HBA's current state is provided by the ProgType and rr fields.
130 * Read and check the value of these fields before continuing to config
131 * this port.
132 */
133 if (mb->un.varRdRev.rr == 0 || mb->un.varRdRev.un.b.ProgType != 2) {
134 /* Old firmware */
135 vp->rev.rBit = 0;
136 lpfc_printf_log(phba,
137 KERN_ERR,
138 LOG_INIT,
139 "%d:0440 Adapter failed to init, mbxCmd x%x "
140 "READ_REV detected outdated firmware"
141 "Data: x%x\n",
142 phba->brd_no,
143 mb->mbxCommand, 0);
144 mempool_free(pmb, phba->mbox_mem_pool);
145 return -ERESTART;
146 } else {
147 vp->rev.rBit = 1;
148 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
149 memcpy(vp->rev.sli1FwName,
150 (char*)mb->un.varRdRev.sli1FwName, 16);
151 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
152 memcpy(vp->rev.sli2FwName,
153 (char *)mb->un.varRdRev.sli2FwName, 16);
154 }
155
156 /* Save information as VPD data */
157 vp->rev.biuRev = mb->un.varRdRev.biuRev;
158 vp->rev.smRev = mb->un.varRdRev.smRev;
159 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
160 vp->rev.endecRev = mb->un.varRdRev.endecRev;
161 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
162 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
163 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
164 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
165 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
166 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
167
168 if (lpfc_is_LC_HBA(phba->pcidev->device))
169 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
170 sizeof (phba->RandomData));
171
172 /* Get the default values for Model Name and Description */
173 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
174
175 /* Get adapter VPD information */
176 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
177 if (!pmb->context2)
178 goto out_free_mbox;
179 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
180 if (!lpfc_vpd_data)
181 goto out_free_context2;
182
183 do {
184 lpfc_dump_mem(phba, pmb, offset);
185 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
186
187 if (rc != MBX_SUCCESS) {
188 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
189 "%d:0441 VPD not present on adapter, "
190 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
191 phba->brd_no,
192 mb->mbxCommand, mb->mbxStatus);
193 kfree(lpfc_vpd_data);
194 lpfc_vpd_data = NULL;
195 break;
196 }
197
198 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
199 mb->un.varDmp.word_cnt);
200 offset += mb->un.varDmp.word_cnt;
201 } while (mb->un.varDmp.word_cnt);
202 lpfc_parse_vpd(phba, lpfc_vpd_data);
203
204 kfree(lpfc_vpd_data);
205out_free_context2:
206 kfree(pmb->context2);
207out_free_mbox:
208 mempool_free(pmb, phba->mbox_mem_pool);
209 return 0;
210}
211
212/************************************************************************/
213/* */
214/* lpfc_config_port_post */
215/* This routine will do LPFC initialization after the */
216/* CONFIG_PORT mailbox command. This will be initialized */
217/* as a SLI layer callback routine. */
218/* This routine returns 0 on success. Any other return value */
219/* indicates an error. */
220/* */
221/************************************************************************/
222int
223lpfc_config_port_post(struct lpfc_hba * phba)
224{
225 LPFC_MBOXQ_t *pmb;
226 MAILBOX_t *mb;
227 struct lpfc_dmabuf *mp;
228 struct lpfc_sli *psli = &phba->sli;
229 uint32_t status, timeout;
230 int i, j, rc;
231
232 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
233 if (!pmb) {
234 phba->hba_state = LPFC_HBA_ERROR;
235 return -ENOMEM;
236 }
237 mb = &pmb->mb;
238
239 lpfc_config_link(phba, pmb);
240 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
241 if (rc != MBX_SUCCESS) {
242 lpfc_printf_log(phba,
243 KERN_ERR,
244 LOG_INIT,
245 "%d:0447 Adapter failed init, mbxCmd x%x "
246 "CONFIG_LINK mbxStatus x%x\n",
247 phba->brd_no,
248 mb->mbxCommand, mb->mbxStatus);
249 phba->hba_state = LPFC_HBA_ERROR;
250 mempool_free( pmb, phba->mbox_mem_pool);
251 return -EIO;
252 }
253
254 /* Get login parameters for NID. */
255 lpfc_read_sparam(phba, pmb);
256 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
257 lpfc_printf_log(phba,
258 KERN_ERR,
259 LOG_INIT,
260 "%d:0448 Adapter failed init, mbxCmd x%x "
261 "READ_SPARM mbxStatus x%x\n",
262 phba->brd_no,
263 mb->mbxCommand, mb->mbxStatus);
264 phba->hba_state = LPFC_HBA_ERROR;
265 mp = (struct lpfc_dmabuf *) pmb->context1;
266 mempool_free( pmb, phba->mbox_mem_pool);
267 lpfc_mbuf_free(phba, mp->virt, mp->phys);
268 kfree(mp);
269 return -EIO;
270 }
271
272 mp = (struct lpfc_dmabuf *) pmb->context1;
273
274 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
275 lpfc_mbuf_free(phba, mp->virt, mp->phys);
276 kfree(mp);
277 pmb->context1 = NULL;
278
279 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
280 sizeof (struct lpfc_name));
281 memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
282 sizeof (struct lpfc_name));
283 /* If no serial number in VPD data, use low 6 bytes of WWNN */
284 /* This should be consolidated into parse_vpd ? - mr */
285 if (phba->SerialNumber[0] == 0) {
286 uint8_t *outptr;
287
68ce1eb5 288 outptr = &phba->fc_nodename.u.s.IEEE[0];
dea3101e
JB		 289 for (i = 0; i < 12; i++) {
290 status = *outptr++;
291 j = ((status & 0xf0) >> 4);
292 if (j <= 9)
293 phba->SerialNumber[i] =
294 (char)((uint8_t) 0x30 + (uint8_t) j);
295 else
296 phba->SerialNumber[i] =
297 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
298 i++;
299 j = (status & 0xf);
300 if (j <= 9)
301 phba->SerialNumber[i] =
302 (char)((uint8_t) 0x30 + (uint8_t) j);
303 else
304 phba->SerialNumber[i] =
305 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
306 }
307 }
308
309 /* This should turn on DELAYED ABTS for ELS timeouts */
310 lpfc_set_slim(phba, pmb, 0x052198, 0x1);
311 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
312 phba->hba_state = LPFC_HBA_ERROR;
313 mempool_free( pmb, phba->mbox_mem_pool);
314 return -EIO;
315 }
316
317
318 lpfc_read_config(phba, pmb);
319 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
320 lpfc_printf_log(phba,
321 KERN_ERR,
322 LOG_INIT,
323 "%d:0453 Adapter failed to init, mbxCmd x%x "
324 "READ_CONFIG, mbxStatus x%x\n",
325 phba->brd_no,
326 mb->mbxCommand, mb->mbxStatus);
327 phba->hba_state = LPFC_HBA_ERROR;
328 mempool_free( pmb, phba->mbox_mem_pool);
329 return -EIO;
330 }
331
332 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
333 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
334 phba->cfg_hba_queue_depth =
335 mb->un.varRdConfig.max_xri + 1;
336
337 phba->lmt = mb->un.varRdConfig.lmt;
338 /* HBA is not 4GB capable, or HBA is not 2GB capable,
339 don't let link speed ask for it */
340 if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) &&
341 (phba->cfg_link_speed > LINK_SPEED_2G)) ||
342 (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) &&
343 (phba->cfg_link_speed > LINK_SPEED_1G))) {
344 /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */
345 lpfc_printf_log(phba,
346 KERN_WARNING,
347 LOG_LINK_EVENT,
348 "%d:1302 Invalid speed for this board: "
349 "Reset link speed to auto: x%x\n",
350 phba->brd_no,
351 phba->cfg_link_speed);
352 phba->cfg_link_speed = LINK_SPEED_AUTO;
353 }
354
355 phba->hba_state = LPFC_LINK_DOWN;
356
357 /* Only process IOCBs on ring 0 till hba_state is READY */
358 if (psli->ring[psli->ip_ring].cmdringaddr)
359 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT;
360 if (psli->ring[psli->fcp_ring].cmdringaddr)
361 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
362 if (psli->ring[psli->next_ring].cmdringaddr)
363 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
364
365 /* Post receive buffers for desired rings */
366 lpfc_post_rcv_buf(phba);
367
368 /* Enable appropriate host interrupts */
369 spin_lock_irq(phba->host->host_lock);
370 status = readl(phba->HCregaddr);
371 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
372 if (psli->num_rings > 0)
373 status |= HC_R0INT_ENA;
374 if (psli->num_rings > 1)
375 status |= HC_R1INT_ENA;
376 if (psli->num_rings > 2)
377 status |= HC_R2INT_ENA;
378 if (psli->num_rings > 3)
379 status |= HC_R3INT_ENA;
380
381 writel(status, phba->HCregaddr);
382 readl(phba->HCregaddr); /* flush */
383 spin_unlock_irq(phba->host->host_lock);
384
385 /*
386 * Setup the ring 0 (els) timeout handler
387 */
388 timeout = phba->fc_ratov << 1;
389 phba->els_tmofunc.expires = jiffies + HZ * timeout;
390 add_timer(&phba->els_tmofunc);
391
392 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
393 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
394 if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) {
395 lpfc_printf_log(phba,
396 KERN_ERR,
397 LOG_INIT,
398 "%d:0454 Adapter failed to init, mbxCmd x%x "
399 "INIT_LINK, mbxStatus x%x\n",
400 phba->brd_no,
401 mb->mbxCommand, mb->mbxStatus);
402
403 /* Clear all interrupt enable conditions */
404 writel(0, phba->HCregaddr);
405 readl(phba->HCregaddr); /* flush */
406 /* Clear all pending interrupts */
407 writel(0xffffffff, phba->HAregaddr);
408 readl(phba->HAregaddr); /* flush */
409
410 phba->hba_state = LPFC_HBA_ERROR;
411 mempool_free(pmb, phba->mbox_mem_pool);
412 return -EIO;
413 }
414 /* MBOX buffer will be freed in mbox compl */
415
416 i = 0;
417 while ((phba->hba_state != LPFC_HBA_READY) ||
418 (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
419 ((phba->fc_map_cnt == 0) && (i<2)) ||
420 (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
421 /* Check every second for 30 retries. */
422 i++;
423 if (i > 30) {
424 break;
425 }
426 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
427 /* The link is down. Set linkdown timeout */
428 break;
429 }
430
431 /* Delay for 1 second to give discovery time to complete. */
432 msleep(1000);
433
434 }
435
436 /* Since num_disc_nodes keys off of PLOGI, delay a bit to let
437 * any potential PRLIs to flush thru the SLI sub-system.
438 */
439 msleep(50);
440
441 return (0);
442}
443
444/************************************************************************/
445/* */
446/* lpfc_hba_down_prep */
447/* This routine will do LPFC uninitialization before the */
448/* HBA is reset when bringing down the SLI Layer. This will be */
449/* initialized as a SLI layer callback routine. */
450/* This routine returns 0 on success. Any other return value */
451/* indicates an error. */
452/* */
453/************************************************************************/
454int
455lpfc_hba_down_prep(struct lpfc_hba * phba)
456{
457 /* Disable interrupts */
458 writel(0, phba->HCregaddr);
459 readl(phba->HCregaddr); /* flush */
460
461 /* Cleanup potential discovery resources */
462 lpfc_els_flush_rscn(phba);
463 lpfc_els_flush_cmd(phba);
464 lpfc_disc_flush_list(phba);
465
466 return (0);
467}
468
469/************************************************************************/
470/* */
471/* lpfc_handle_eratt */
472/* This routine will handle processing a Host Attention */
473/* Error Status event. This will be initialized */
474/* as a SLI layer callback routine. */
475/* */
476/************************************************************************/
477void
478lpfc_handle_eratt(struct lpfc_hba * phba)
479{
480 struct lpfc_sli *psli = &phba->sli;
481 struct lpfc_sli_ring *pring;
482
483 /*
484 * If a reset is sent to the HBA restore PCI configuration registers.
485 */
486 if ( phba->hba_state == LPFC_INIT_START ) {
487 mdelay(1);
488 readl(phba->HCregaddr); /* flush */
489 writel(0, phba->HCregaddr);
490 readl(phba->HCregaddr); /* flush */
491
492 /* Restore PCI cmd register */
493 pci_write_config_word(phba->pcidev,
494 PCI_COMMAND, phba->pci_cfg_value);
495 }
496
497 if (phba->work_hs & HS_FFER6) {
498 /* Re-establishing Link */
499 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
500 "%d:1301 Re-establishing Link "
501 "Data: x%x x%x x%x\n",
502 phba->brd_no, phba->work_hs,
503 phba->work_status[0], phba->work_status[1]);
504 spin_lock_irq(phba->host->host_lock);
505 phba->fc_flag |= FC_ESTABLISH_LINK;
506 spin_unlock_irq(phba->host->host_lock);
507
508 /*
509 * Firmware stops when it triggled erratt with HS_FFER6.
510 * That could cause the I/Os dropped by the firmware.
511 * Error iocb (I/O) on txcmplq and let the SCSI layer
512 * retry it after re-establishing link.
513 */
514 pring = &psli->ring[psli->fcp_ring];
515 lpfc_sli_abort_iocb_ring(phba, pring);
516
517
518 /*
519 * There was a firmware error. Take the hba offline and then
520 * attempt to restart it.
521 */
522 lpfc_offline(phba);
523 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
524 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
525 return;
526 }
527 } else {
528 /* The if clause above forces this code path when the status
529 * failure is a value other than FFER6. Do not call the offline
530 * twice. This is the adapter hardware error path.
531 */
532 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
533 "%d:0457 Adapter Hardware Error "
534 "Data: x%x x%x x%x\n",
535 phba->brd_no, phba->work_hs,
536 phba->work_status[0], phba->work_status[1]);
537
538 lpfc_offline(phba);
539
dea3101e
JB		 540 }
541}
542
543/************************************************************************/
544/* */
545/* lpfc_handle_latt */
546/* This routine will handle processing a Host Attention */
547/* Link Status event. This will be initialized */
548/* as a SLI layer callback routine. */
549/* */
550/************************************************************************/
551void
552lpfc_handle_latt(struct lpfc_hba * phba)
553{
554 struct lpfc_sli *psli = &phba->sli;
555 LPFC_MBOXQ_t *pmb;
556 volatile uint32_t control;
557 struct lpfc_dmabuf *mp;
558 int rc = -ENOMEM;
559
560 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
561 if (!pmb)
562 goto lpfc_handle_latt_err_exit;
563
564 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
565 if (!mp)
566 goto lpfc_handle_latt_free_pmb;
567
568 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
569 if (!mp->virt)
570 goto lpfc_handle_latt_free_mp;
571
572 rc = -EIO;
573
574
575 psli->slistat.link_event++;
576 lpfc_read_la(phba, pmb, mp);
577 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
578 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
579 if (rc == MBX_NOT_FINISHED)
580 goto lpfc_handle_latt_free_mp;
581
582 /* Clear Link Attention in HA REG */
583 spin_lock_irq(phba->host->host_lock);
584 writel(HA_LATT, phba->HAregaddr);
585 readl(phba->HAregaddr); /* flush */
586 spin_unlock_irq(phba->host->host_lock);
587
588 return;
589
590lpfc_handle_latt_free_mp:
591 kfree(mp);
592lpfc_handle_latt_free_pmb:
593 kfree(pmb);
594lpfc_handle_latt_err_exit:
595 /* Enable Link attention interrupts */
596 spin_lock_irq(phba->host->host_lock);
597 psli->sli_flag |= LPFC_PROCESS_LA;
598 control = readl(phba->HCregaddr);
599 control |= HC_LAINT_ENA;
600 writel(control, phba->HCregaddr);
601 readl(phba->HCregaddr); /* flush */
602
603 /* Clear Link Attention in HA REG */
604 writel(HA_LATT, phba->HAregaddr);
605 readl(phba->HAregaddr); /* flush */
606 spin_unlock_irq(phba->host->host_lock);
607 lpfc_linkdown(phba);
608 phba->hba_state = LPFC_HBA_ERROR;
609
610 /* The other case is an error from issue_mbox */
611 if (rc == -ENOMEM)
612 lpfc_printf_log(phba,
613 KERN_WARNING,
614 LOG_MBOX,
615 "%d:0300 READ_LA: no buffers\n",
616 phba->brd_no);
617
618 return;
619}
620
621/************************************************************************/
622/* */
623/* lpfc_parse_vpd */
624/* This routine will parse the VPD data */
625/* */
626/************************************************************************/
627static int
628lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd)
629{
630 uint8_t lenlo, lenhi;
631 uint32_t Length;
632 int i, j;
633 int finished = 0;
634 int index = 0;
635
636 if (!vpd)
637 return 0;
638
639 /* Vital Product */
640 lpfc_printf_log(phba,
641 KERN_INFO,
642 LOG_INIT,
643 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
644 phba->brd_no,
645 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
646 (uint32_t) vpd[3]);
647 do {
648 switch (vpd[index]) {
649 case 0x82:
650 index += 1;
651 lenlo = vpd[index];
652 index += 1;
653 lenhi = vpd[index];
654 index += 1;
655 i = ((((unsigned short)lenhi) << 8) + lenlo);
656 index += i;
657 break;
658 case 0x90:
659 index += 1;
660 lenlo = vpd[index];
661 index += 1;
662 lenhi = vpd[index];
663 index += 1;
664 Length = ((((unsigned short)lenhi) << 8) + lenlo);
665
666 while (Length > 0) {
667 /* Look for Serial Number */
668 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
669 index += 2;
670 i = vpd[index];
671 index += 1;
672 j = 0;
673 Length -= (3+i);
674 while(i--) {
675 phba->SerialNumber[j++] = vpd[index++];
676 if (j == 31)
677 break;
678 }
679 phba->SerialNumber[j] = 0;
680 continue;
681 }
682 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
683 phba->vpd_flag |= VPD_MODEL_DESC;
684 index += 2;
685 i = vpd[index];
686 index += 1;
687 j = 0;
688 Length -= (3+i);
689 while(i--) {
690 phba->ModelDesc[j++] = vpd[index++];
691 if (j == 255)
692 break;
693 }
694 phba->ModelDesc[j] = 0;
695 continue;
696 }
697 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
698 phba->vpd_flag |= VPD_MODEL_NAME;
699 index += 2;
700 i = vpd[index];
701 index += 1;
702 j = 0;
703 Length -= (3+i);
704 while(i--) {
705 phba->ModelName[j++] = vpd[index++];
706 if (j == 79)
707 break;
708 }
709 phba->ModelName[j] = 0;
710 continue;
711 }
712 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
713 phba->vpd_flag |= VPD_PROGRAM_TYPE;
714 index += 2;
715 i = vpd[index];
716 index += 1;
717 j = 0;
718 Length -= (3+i);
719 while(i--) {
720 phba->ProgramType[j++] = vpd[index++];
721 if (j == 255)
722 break;
723 }
724 phba->ProgramType[j] = 0;
725 continue;
726 }
727 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
728 phba->vpd_flag |= VPD_PORT;
729 index += 2;
730 i = vpd[index];
731 index += 1;
732 j = 0;
733 Length -= (3+i);
734 while(i--) {
735 phba->Port[j++] = vpd[index++];
736 if (j == 19)
737 break;
738 }
739 phba->Port[j] = 0;
740 continue;
741 }
742 else {
743 index += 2;
744 i = vpd[index];
745 index += 1;
746 index += i;
747 Length -= (3 + i);
748 }
749 }
750 finished = 0;
751 break;
752 case 0x78:
753 finished = 1;
754 break;
755 default:
756 index ++;
757 break;
758 }
759 } while (!finished && (index < 108));
760
761 return(1);
762}
763
764static void
765lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
766{
767 lpfc_vpd_t *vp;
768 uint32_t id;
964b77e7 769 uint8_t hdrtype;
dea3101e
JB		 770 char str[16];
771
772 vp = &phba->vpd;
773 pci_read_config_dword(phba->pcidev, PCI_VENDOR_ID, &id);
964b77e7 774 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
dea3101e
JB		 775
776 switch ((id >> 16) & 0xffff) {
06325e74
JSEC		 777 case PCI_DEVICE_ID_FIREFLY:
778 strcpy(str, "LP6000 1");
779 break;
dea3101e
JB		 780 case PCI_DEVICE_ID_SUPERFLY:
781 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
782 strcpy(str, "LP7000 1");
783 else
784 strcpy(str, "LP7000E 1");
785 break;
786 case PCI_DEVICE_ID_DRAGONFLY:
787 strcpy(str, "LP8000 1");
788 break;
789 case PCI_DEVICE_ID_CENTAUR:
790 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
791 strcpy(str, "LP9002 2");
792 else
793 strcpy(str, "LP9000 1");
794 break;
795 case PCI_DEVICE_ID_RFLY:
796 strcpy(str, "LP952 2");
797 break;
798 case PCI_DEVICE_ID_PEGASUS:
799 strcpy(str, "LP9802 2");
800 break;
801 case PCI_DEVICE_ID_THOR:
964b77e7
JSEC		 802 if (hdrtype == 0x80)
803 strcpy(str, "LP10000DC 2");
804 else
805 strcpy(str, "LP10000 2");
dea3101e
JB		 806 break;
807 case PCI_DEVICE_ID_VIPER:
808 strcpy(str, "LPX1000 10");
809 break;
810 case PCI_DEVICE_ID_PFLY:
811 strcpy(str, "LP982 2");
812 break;
813 case PCI_DEVICE_ID_TFLY:
964b77e7
JSEC		 814 if (hdrtype == 0x80)
815 strcpy(str, "LP1050DC 2");
816 else
817 strcpy(str, "LP1050 2");
dea3101e
JB		 818 break;
819 case PCI_DEVICE_ID_HELIOS:
964b77e7
JSEC		 820 if (hdrtype == 0x80)
821 strcpy(str, "LP11002 4");
822 else
823 strcpy(str, "LP11000 4");
dea3101e
JB		 824 break;
825 case PCI_DEVICE_ID_BMID:
826 strcpy(str, "LP1150 4");
827 break;
828 case PCI_DEVICE_ID_BSMB:
829 strcpy(str, "LP111 4");
830 break;
831 case PCI_DEVICE_ID_ZEPHYR:
964b77e7
JSEC		 832 if (hdrtype == 0x80)
833 strcpy(str, "LPe11002 4");
834 else
835 strcpy(str, "LPe11000 4");
dea3101e
JB		 836 break;
837 case PCI_DEVICE_ID_ZMID:
964b77e7 838 strcpy(str, "LPe1150 4");
dea3101e
JB		 839 break;
840 case PCI_DEVICE_ID_ZSMB:
964b77e7 841 strcpy(str, "LPe111 4");
dea3101e
JB		 842 break;
843 case PCI_DEVICE_ID_LP101:
844 strcpy(str, "LP101 2");
845 break;
846 case PCI_DEVICE_ID_LP10000S:
847 strcpy(str, "LP10000-S 2");
848 break;
06325e74
JSEC		 849 default:
850 memset(str, 0, 16);
851 break;
dea3101e
JB		 852 }
853 if (mdp)
854 sscanf(str, "%s", mdp);
855 if (descp)
856 sprintf(descp, "Emulex LightPulse %s Gigabit PCI Fibre "
857 "Channel Adapter", str);
858}
859
860/**************************************************/
861/* lpfc_post_buffer */
862/* */
863/* This routine will post count buffers to the */
864/* ring with the QUE_RING_BUF_CN command. This */
865/* allows 3 buffers / command to be posted. */
866/* Returns the number of buffers NOT posted. */
867/**************************************************/
868int
869lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
870 int type)
871{
872 IOCB_t *icmd;
0bd4ca25 873 struct lpfc_iocbq *iocb;
dea3101e
JB		 874 struct lpfc_dmabuf *mp1, *mp2;
875
876 cnt += pring->missbufcnt;
877
878 /* While there are buffers to post */
879 while (cnt > 0) {
880 /* Allocate buffer for command iocb */
881 spin_lock_irq(phba->host->host_lock);
0bd4ca25 882 iocb = lpfc_sli_get_iocbq(phba);
dea3101e
JB		 883 spin_unlock_irq(phba->host->host_lock);
884 if (iocb == NULL) {
885 pring->missbufcnt = cnt;
886 return cnt;
887 }
dea3101e
JB		 888 icmd = &iocb->iocb;
889
890 /* 2 buffers can be posted per command */
891 /* Allocate buffer to post */
892 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
893 if (mp1)
894 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
895 &mp1->phys);
896 if (mp1 == 0 || mp1->virt == 0) {
c9475cb0 897 kfree(mp1);
dea3101e 898 spin_lock_irq(phba->host->host_lock);
604a3e30 899 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB		 900 spin_unlock_irq(phba->host->host_lock);
901 pring->missbufcnt = cnt;
902 return cnt;
903 }
904
905 INIT_LIST_HEAD(&mp1->list);
906 /* Allocate buffer to post */
907 if (cnt > 1) {
908 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
909 if (mp2)
910 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
911 &mp2->phys);
912 if (mp2 == 0 || mp2->virt == 0) {
c9475cb0 913 kfree(mp2);
dea3101e
JB		 914 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
915 kfree(mp1);
916 spin_lock_irq(phba->host->host_lock);
604a3e30 917 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB		 918 spin_unlock_irq(phba->host->host_lock);
919 pring->missbufcnt = cnt;
920 return cnt;
921 }
922
923 INIT_LIST_HEAD(&mp2->list);
924 } else {
925 mp2 = NULL;
926 }
927
928 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
929 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
930 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
931 icmd->ulpBdeCount = 1;
932 cnt--;
933 if (mp2) {
934 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
935 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
936 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
937 cnt--;
938 icmd->ulpBdeCount = 2;
939 }
940
941 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
942 icmd->ulpLe = 1;
943
944 spin_lock_irq(phba->host->host_lock);
945 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
946 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
947 kfree(mp1);
948 cnt++;
949 if (mp2) {
950 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
951 kfree(mp2);
952 cnt++;
953 }
604a3e30 954 lpfc_sli_release_iocbq(phba, iocb);
dea3101e
JB		 955 pring->missbufcnt = cnt;
956 spin_unlock_irq(phba->host->host_lock);
957 return cnt;
958 }
959 spin_unlock_irq(phba->host->host_lock);
960 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
961 if (mp2) {
962 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
963 }
964 }
965 pring->missbufcnt = 0;
966 return 0;
967}
968
969/************************************************************************/
970/* */
971/* lpfc_post_rcv_buf */
972/* This routine post initial rcv buffers to the configured rings */
973/* */
974/************************************************************************/
975static int
976lpfc_post_rcv_buf(struct lpfc_hba * phba)
977{
978 struct lpfc_sli *psli = &phba->sli;
979
980 /* Ring 0, ELS / CT buffers */
981 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
982 /* Ring 2 - FCP no buffers needed */
983
984 return 0;
985}
986
987#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
988
989/************************************************************************/
990/* */
991/* lpfc_sha_init */
992/* */
993/************************************************************************/
994static void
995lpfc_sha_init(uint32_t * HashResultPointer)
996{
997 HashResultPointer[0] = 0x67452301;
998 HashResultPointer[1] = 0xEFCDAB89;
999 HashResultPointer[2] = 0x98BADCFE;
1000 HashResultPointer[3] = 0x10325476;
1001 HashResultPointer[4] = 0xC3D2E1F0;
1002}
1003
1004/************************************************************************/
1005/* */
1006/* lpfc_sha_iterate */
1007/* */
1008/************************************************************************/
1009static void
1010lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
1011{
1012 int t;
1013 uint32_t TEMP;
1014 uint32_t A, B, C, D, E;
1015 t = 16;
1016 do {
1017 HashWorkingPointer[t] =
1018 S(1,
1019 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
1020 8] ^
1021 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
1022 } while (++t <= 79);
1023 t = 0;
1024 A = HashResultPointer[0];
1025 B = HashResultPointer[1];
1026 C = HashResultPointer[2];
1027 D = HashResultPointer[3];
1028 E = HashResultPointer[4];
1029
1030 do {
1031 if (t < 20) {
1032 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
1033 } else if (t < 40) {
1034 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
1035 } else if (t < 60) {
1036 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
1037 } else {
1038 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
1039 }
1040 TEMP += S(5, A) + E + HashWorkingPointer[t];
1041 E = D;
1042 D = C;
1043 C = S(30, B);
1044 B = A;
1045 A = TEMP;
1046 } while (++t <= 79);
1047
1048 HashResultPointer[0] += A;
1049 HashResultPointer[1] += B;
1050 HashResultPointer[2] += C;
1051 HashResultPointer[3] += D;
1052 HashResultPointer[4] += E;
1053
1054}
1055
1056/************************************************************************/
1057/* */
1058/* lpfc_challenge_key */
1059/* */
1060/************************************************************************/
1061static void
1062lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
1063{
1064 *HashWorking = (*RandomChallenge ^ *HashWorking);
1065}
1066
1067/************************************************************************/
1068/* */
1069/* lpfc_hba_init */
1070/* */
1071/************************************************************************/
1072void
1073lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
1074{
1075 int t;
1076 uint32_t *HashWorking;
1077 uint32_t *pwwnn = phba->wwnn;
1078
1079 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
1080 if (!HashWorking)
1081 return;
1082
1083 memset(HashWorking, 0, (80 * sizeof(uint32_t)));
1084 HashWorking[0] = HashWorking[78] = *pwwnn++;
1085 HashWorking[1] = HashWorking[79] = *pwwnn;
1086
1087 for (t = 0; t < 7; t++)
1088 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
1089
1090 lpfc_sha_init(hbainit);
1091 lpfc_sha_iterate(hbainit, HashWorking);
1092 kfree(HashWorking);
1093}
1094
1095static void
1096lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind)
1097{
1098 struct lpfc_nodelist *ndlp, *next_ndlp;
1099
1100 /* clean up phba - lpfc specific */
1101 lpfc_can_disctmo(phba);
1102 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
1103 nlp_listp) {
1104 lpfc_nlp_remove(phba, ndlp);
1105 }
1106
1107 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
1108 nlp_listp) {
1109 lpfc_nlp_remove(phba, ndlp);
1110 }
1111
1112 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
1113 nlp_listp) {
1114 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
1115 }
1116
1117 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
1118 nlp_listp) {
1119 lpfc_nlp_remove(phba, ndlp);
1120 }
1121
1122 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
1123 nlp_listp) {
1124 lpfc_nlp_remove(phba, ndlp);
1125 }
1126
1127 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
1128 nlp_listp) {
1129 lpfc_nlp_remove(phba, ndlp);
1130 }
1131
1132 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
1133 nlp_listp) {
1134 lpfc_nlp_remove(phba, ndlp);
1135 }
1136
1137 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
1138 nlp_listp) {
1139 lpfc_nlp_remove(phba, ndlp);
1140 }
1141
1142 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1143 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1144 INIT_LIST_HEAD(&phba->fc_unused_list);
1145 INIT_LIST_HEAD(&phba->fc_plogi_list);
1146 INIT_LIST_HEAD(&phba->fc_adisc_list);
1147 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1148 INIT_LIST_HEAD(&phba->fc_prli_list);
1149 INIT_LIST_HEAD(&phba->fc_npr_list);
1150
1151 phba->fc_map_cnt = 0;
1152 phba->fc_unmap_cnt = 0;
1153 phba->fc_plogi_cnt = 0;
1154 phba->fc_adisc_cnt = 0;
1155 phba->fc_reglogin_cnt = 0;
1156 phba->fc_prli_cnt = 0;
1157 phba->fc_npr_cnt = 0;
1158 phba->fc_unused_cnt= 0;
1159 return;
1160}
1161
1162static void
1163lpfc_establish_link_tmo(unsigned long ptr)
1164{
1165 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
1166 unsigned long iflag;
1167
1168
1169 /* Re-establishing Link, timer expired */
1170 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
1171 "%d:1300 Re-establishing Link, timer expired "
1172 "Data: x%x x%x\n",
1173 phba->brd_no, phba->fc_flag, phba->hba_state);
1174 spin_lock_irqsave(phba->host->host_lock, iflag);
1175 phba->fc_flag &= ~FC_ESTABLISH_LINK;
1176 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1177}
1178
1179static int
1180lpfc_stop_timer(struct lpfc_hba * phba)
1181{
1182 struct lpfc_sli *psli = &phba->sli;
1183
1184 /* Instead of a timer, this has been converted to a
1185 * deferred procedding list.
1186 */
1187 while (!list_empty(&phba->freebufList)) {
1188
1189 struct lpfc_dmabuf *mp = NULL;
1190
1191 list_remove_head((&phba->freebufList), mp,
1192 struct lpfc_dmabuf, list);
1193 if (mp) {
1194 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1195 kfree(mp);
1196 }
1197 }
1198
1199 del_timer_sync(&phba->fc_estabtmo);
1200 del_timer_sync(&phba->fc_disctmo);
1201 del_timer_sync(&phba->fc_fdmitmo);
1202 del_timer_sync(&phba->els_tmofunc);
1203 psli = &phba->sli;
1204 del_timer_sync(&psli->mbox_tmo);
1205 return(1);
1206}
1207
1208int
1209lpfc_online(struct lpfc_hba * phba)
1210{
1211 if (!phba)
1212 return 0;
1213
1214 if (!(phba->fc_flag & FC_OFFLINE_MODE))
1215 return 0;
1216
1217 lpfc_printf_log(phba,
1218 KERN_WARNING,
1219 LOG_INIT,
1220 "%d:0458 Bring Adapter online\n",
1221 phba->brd_no);
1222
1223 if (!lpfc_sli_queue_setup(phba))
1224 return 1;
1225
1226 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */
1227 return 1;
1228
1229 spin_lock_irq(phba->host->host_lock);
1230 phba->fc_flag &= ~FC_OFFLINE_MODE;
1231 spin_unlock_irq(phba->host->host_lock);
1232
dea3101e
JB		 1233 return 0;
1234}
1235
1236int
1237lpfc_offline(struct lpfc_hba * phba)
1238{
1239 struct lpfc_sli_ring *pring;
1240 struct lpfc_sli *psli;
1241 unsigned long iflag;
1242 int i = 0;
1243
1244 if (!phba)
1245 return 0;
1246
1247 if (phba->fc_flag & FC_OFFLINE_MODE)
1248 return 0;
1249
dea3101e
JB		 1250 psli = &phba->sli;
1251 pring = &psli->ring[psli->fcp_ring];
1252
1253 lpfc_linkdown(phba);
1254
1255 /* The linkdown event takes 30 seconds to timeout. */
1256 while (pring->txcmplq_cnt) {
1257 mdelay(10);
1258 if (i++ > 3000)
1259 break;
1260 }
1261
1262 /* stop all timers associated with this hba */
1263 lpfc_stop_timer(phba);
1264 phba->work_hba_events = 0;
1265
1266 lpfc_printf_log(phba,
1267 KERN_WARNING,
1268 LOG_INIT,
1269 "%d:0460 Bring Adapter offline\n",
1270 phba->brd_no);
1271
1272 /* Bring down the SLI Layer and cleanup. The HBA is offline
1273 now. */
1274 lpfc_sli_hba_down(phba);
1275 lpfc_cleanup(phba, 1);
1276 spin_lock_irqsave(phba->host->host_lock, iflag);
1277 phba->fc_flag |= FC_OFFLINE_MODE;
1278 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1279 return 0;
1280}
1281
1282/******************************************************************************
1283* Function name: lpfc_scsi_free
1284*
1285* Description: Called from lpfc_pci_remove_one free internal driver resources
1286*
1287******************************************************************************/
1288static int
1289lpfc_scsi_free(struct lpfc_hba * phba)
1290{
1291 struct lpfc_scsi_buf *sb, *sb_next;
1292 struct lpfc_iocbq *io, *io_next;
1293
1294 spin_lock_irq(phba->host->host_lock);
1295 /* Release all the lpfc_scsi_bufs maintained by this host. */
1296 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
1297 list_del(&sb->list);
1298 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
1299 sb->dma_handle);
1300 kfree(sb);
1301 phba->total_scsi_bufs--;
1302 }
1303
1304 /* Release all the lpfc_iocbq entries maintained by this host. */
1305 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
1306 list_del(&io->list);
1307 kfree(io);
1308 phba->total_iocbq_bufs--;
1309 }
1310
1311 spin_unlock_irq(phba->host->host_lock);
1312
1313 return 0;
1314}
1315
1316
1317static int __devinit
1318lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1319{
1320 struct Scsi_Host *host;
1321 struct lpfc_hba *phba;
1322 struct lpfc_sli *psli;
1323 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
1324 unsigned long bar0map_len, bar2map_len;
1325 int error = -ENODEV, retval;
1326 int i;
604a3e30 1327 uint16_t iotag;
dea3101e
JB		 1328
1329 if (pci_enable_device(pdev))
1330 goto out;
1331 if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
1332 goto out_disable_device;
1333
f888ba3c 1334 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
dea3101e
JB		 1335 if (!host)
1336 goto out_release_regions;
1337
1338 phba = (struct lpfc_hba*)host->hostdata;
1339 memset(phba, 0, sizeof (struct lpfc_hba));
dea3101e
JB		 1340 phba->host = host;
1341
1342 phba->fc_flag |= FC_LOADING;
1343 phba->pcidev = pdev;
1344
1345 /* Assign an unused board number */
1346 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
1347 goto out_put_host;
1348
1349 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
1350 if (error)
1351 goto out_put_host;
1352
1353 host->unique_id = phba->brd_no;
1354
1355 INIT_LIST_HEAD(&phba->ctrspbuflist);
1356 INIT_LIST_HEAD(&phba->rnidrspbuflist);
1357 INIT_LIST_HEAD(&phba->freebufList);
1358
1359 /* Initialize timers used by driver */
1360 init_timer(&phba->fc_estabtmo);
1361 phba->fc_estabtmo.function = lpfc_establish_link_tmo;
1362 phba->fc_estabtmo.data = (unsigned long)phba;
1363 init_timer(&phba->fc_disctmo);
1364 phba->fc_disctmo.function = lpfc_disc_timeout;
1365 phba->fc_disctmo.data = (unsigned long)phba;
1366
1367 init_timer(&phba->fc_fdmitmo);
1368 phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
1369 phba->fc_fdmitmo.data = (unsigned long)phba;
1370 init_timer(&phba->els_tmofunc);
1371 phba->els_tmofunc.function = lpfc_els_timeout;
1372 phba->els_tmofunc.data = (unsigned long)phba;
1373 psli = &phba->sli;
1374 init_timer(&psli->mbox_tmo);
1375 psli->mbox_tmo.function = lpfc_mbox_timeout;
1376 psli->mbox_tmo.data = (unsigned long)phba;
1377
1378 /*
1379 * Get all the module params for configuring this host and then
1380 * establish the host parameters.
1381 */
1382 lpfc_get_cfgparam(phba);
1383
1384 host->max_id = LPFC_MAX_TARGET;
1385 host->max_lun = phba->cfg_max_luns;
1386 host->this_id = -1;
1387
1388 /* Initialize all internally managed lists. */
1389 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1390 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1391 INIT_LIST_HEAD(&phba->fc_unused_list);
1392 INIT_LIST_HEAD(&phba->fc_plogi_list);
1393 INIT_LIST_HEAD(&phba->fc_adisc_list);
1394 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1395 INIT_LIST_HEAD(&phba->fc_prli_list);
1396 INIT_LIST_HEAD(&phba->fc_npr_list);
1397
1398
1399 pci_set_master(pdev);
1400 retval = pci_set_mwi(pdev);
1401 if (retval)
1402 dev_printk(KERN_WARNING, &pdev->dev,
1403 "Warning: pci_set_mwi returned %d\n", retval);
1404
1405 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
1406 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
1407 goto out_idr_remove;
1408
1409 /*
1410 * Get the bus address of Bar0 and Bar2 and the number of bytes
1411 * required by each mapping.
1412 */
1413 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
1414 bar0map_len = pci_resource_len(phba->pcidev, 0);
1415
1416 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
1417 bar2map_len = pci_resource_len(phba->pcidev, 2);
1418
1419 /* Map HBA SLIM and Control Registers to a kernel virtual address. */
1420 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
1421 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
1422
1423 /* Allocate memory for SLI-2 structures */
1424 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
1425 &phba->slim2p_mapping, GFP_KERNEL);
1426 if (!phba->slim2p)
1427 goto out_iounmap;
1428
f91b392c 1429 memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
dea3101e
JB		 1430
1431 /* Initialize the SLI Layer to run with lpfc HBAs. */
1432 lpfc_sli_setup(phba);
1433 lpfc_sli_queue_setup(phba);
1434
1435 error = lpfc_mem_alloc(phba);
1436 if (error)
1437 goto out_free_slim;
1438
1439 /* Initialize and populate the iocb list per host. */
1440 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
1441 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
1442 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
1443 if (iocbq_entry == NULL) {
1444 printk(KERN_ERR "%s: only allocated %d iocbs of "
1445 "expected %d count. Unloading driver.\n",
1446 __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
1447 error = -ENOMEM;
1448 goto out_free_iocbq;
1449 }
1450
1451 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
604a3e30
JB		 1452 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
1453 if (iotag == 0) {
1454 kfree (iocbq_entry);
1455 printk(KERN_ERR "%s: failed to allocate IOTAG. "
1456 "Unloading driver.\n",
1457 __FUNCTION__);
1458 error = -ENOMEM;
1459 goto out_free_iocbq;
1460 }
dea3101e
JB		 1461 spin_lock_irq(phba->host->host_lock);
1462 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
1463 phba->total_iocbq_bufs++;
1464 spin_unlock_irq(phba->host->host_lock);
1465 }
1466
1467 /* Initialize HBA structure */
1468 phba->fc_edtov = FF_DEF_EDTOV;
1469 phba->fc_ratov = FF_DEF_RATOV;
1470 phba->fc_altov = FF_DEF_ALTOV;
1471 phba->fc_arbtov = FF_DEF_ARBTOV;
1472
1473 INIT_LIST_HEAD(&phba->work_list);
1474 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
1475 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
1476
1477 /* Startup the kernel thread for this host adapter. */
1478 phba->worker_thread = kthread_run(lpfc_do_work, phba,
1479 "lpfc_worker_%d", phba->brd_no);
1480 if (IS_ERR(phba->worker_thread)) {
1481 error = PTR_ERR(phba->worker_thread);
1482 goto out_free_iocbq;
1483 }
1484
1485 /* We can rely on a queue depth attribute only after SLI HBA setup */
1486 host->can_queue = phba->cfg_hba_queue_depth - 10;
1487
1488 /* Tell the midlayer we support 16 byte commands */
1489 host->max_cmd_len = 16;
1490
1491 /* Initialize the list of scsi buffers used by driver for scsi IO. */
1492 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
1493
1494 host->transportt = lpfc_transport_template;
1495 host->hostdata[0] = (unsigned long)phba;
1496 pci_set_drvdata(pdev, host);
1497 error = scsi_add_host(host, &pdev->dev);
1498 if (error)
1499 goto out_kthread_stop;
1500
1501 error = lpfc_alloc_sysfs_attr(phba);
1502 if (error)
1503 goto out_kthread_stop;
1504
1505 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ,
1506 LPFC_DRIVER_NAME, phba);
1507 if (error) {
1508 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1509 "%d:0451 Enable interrupt handler failed\n",
1510 phba->brd_no);
1511 goto out_free_sysfs_attr;
1512 }
1513 phba->MBslimaddr = phba->slim_memmap_p;
1514 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
1515 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
1516 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
1517 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
1518
1519 error = lpfc_sli_hba_setup(phba);
1520 if (error)
1521 goto out_free_irq;
1522
1523 /*
1524 * set fixed host attributes
1525 * Must done after lpfc_sli_hba_setup()
1526 */
1527
68ce1eb5
AM		 1528 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
1529 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
dea3101e
JB		 1530 fc_host_supported_classes(host) = FC_COS_CLASS3;
1531
1532 memset(fc_host_supported_fc4s(host), 0,
1533 sizeof(fc_host_supported_fc4s(host)));
1534 fc_host_supported_fc4s(host)[2] = 1;
1535 fc_host_supported_fc4s(host)[7] = 1;
1536
1537 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
1538
1539 fc_host_supported_speeds(host) = 0;
1540 switch (FC_JEDEC_ID(phba->vpd.rev.biuRev)) {
1541 case VIPER_JEDEC_ID:
1542 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
1543 break;
1544 case HELIOS_JEDEC_ID:
1545 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
1546 /* Fall through */
1547 case CENTAUR_2G_JEDEC_ID:
1548 case PEGASUS_JEDEC_ID:
1549 case THOR_JEDEC_ID:
1550 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
1551 /* Fall through */
1552 default:
1553 fc_host_supported_speeds(host) = FC_PORTSPEED_1GBIT;
1554 }
1555
1556 fc_host_maxframe_size(host) =
1557 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
1558 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
1559
1560 /* This value is also unchanging */
1561 memset(fc_host_active_fc4s(host), 0,
1562 sizeof(fc_host_active_fc4s(host)));
1563 fc_host_active_fc4s(host)[2] = 1;
1564 fc_host_active_fc4s(host)[7] = 1;
1565
1566 spin_lock_irq(phba->host->host_lock);
1567 phba->fc_flag &= ~FC_LOADING;
1568 spin_unlock_irq(phba->host->host_lock);
1569 return 0;
1570
1571out_free_irq:
1572 lpfc_stop_timer(phba);
1573 phba->work_hba_events = 0;
1574 free_irq(phba->pcidev->irq, phba);
1575out_free_sysfs_attr:
1576 lpfc_free_sysfs_attr(phba);
1577out_kthread_stop:
1578 kthread_stop(phba->worker_thread);
1579out_free_iocbq:
1580 list_for_each_entry_safe(iocbq_entry, iocbq_next,
1581 &phba->lpfc_iocb_list, list) {
1582 spin_lock_irq(phba->host->host_lock);
1583 kfree(iocbq_entry);
1584 phba->total_iocbq_bufs--;
1585 spin_unlock_irq(phba->host->host_lock);
1586 }
1587 lpfc_mem_free(phba);
1588out_free_slim:
1589 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
1590 phba->slim2p_mapping);
1591out_iounmap:
1592 iounmap(phba->ctrl_regs_memmap_p);
1593 iounmap(phba->slim_memmap_p);
1594out_idr_remove:
1595 idr_remove(&lpfc_hba_index, phba->brd_no);
1596out_put_host:
1597 scsi_host_put(host);
1598out_release_regions:
1599 pci_release_regions(pdev);
1600out_disable_device:
1601 pci_disable_device(pdev);
1602out:
1603 return error;
1604}
1605
1606static void __devexit
1607lpfc_pci_remove_one(struct pci_dev *pdev)
1608{
1609 struct Scsi_Host *host = pci_get_drvdata(pdev);
1610 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata[0];
1611 unsigned long iflag;
1612
1613 lpfc_free_sysfs_attr(phba);
1614
1615 spin_lock_irqsave(phba->host->host_lock, iflag);
1616 phba->fc_flag |= FC_UNLOADING;
1617
1618 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1619
1620 fc_remove_host(phba->host);
1621 scsi_remove_host(phba->host);
1622
1623 kthread_stop(phba->worker_thread);
1624
1625 /*
1626 * Bring down the SLI Layer. This step disable all interrupts,
1627 * clears the rings, discards all mailbox commands, and resets
1628 * the HBA.
1629 */
1630 lpfc_sli_hba_down(phba);
1631
1632 /* Release the irq reservation */
1633 free_irq(phba->pcidev->irq, phba);
1634
1635 lpfc_cleanup(phba, 0);
1636 lpfc_stop_timer(phba);
1637 phba->work_hba_events = 0;
1638
1639 /*
1640 * Call scsi_free before mem_free since scsi bufs are released to their
1641 * corresponding pools here.
1642 */
1643 lpfc_scsi_free(phba);
1644 lpfc_mem_free(phba);
1645
1646 /* Free resources associated with SLI2 interface */
1647 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
1648 phba->slim2p, phba->slim2p_mapping);
1649
1650 /* unmap adapter SLIM and Control Registers */
1651 iounmap(phba->ctrl_regs_memmap_p);
1652 iounmap(phba->slim_memmap_p);
1653
1654 pci_release_regions(phba->pcidev);
1655 pci_disable_device(phba->pcidev);
1656
1657 idr_remove(&lpfc_hba_index, phba->brd_no);
1658 scsi_host_put(phba->host);
1659
1660 pci_set_drvdata(pdev, NULL);
1661}
1662
1663static struct pci_device_id lpfc_id_table[] = {
1664 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
1665 PCI_ANY_ID, PCI_ANY_ID, },
06325e74
JSEC		 1666 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
1667 PCI_ANY_ID, PCI_ANY_ID, },
dea3101e
JB		 1668 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
1669 PCI_ANY_ID, PCI_ANY_ID, },
1670 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
1671 PCI_ANY_ID, PCI_ANY_ID, },
1672 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
1673 PCI_ANY_ID, PCI_ANY_ID, },
1674 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
1675 PCI_ANY_ID, PCI_ANY_ID, },
1676 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
1677 PCI_ANY_ID, PCI_ANY_ID, },
1678 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
1679 PCI_ANY_ID, PCI_ANY_ID, },
1680 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
1681 PCI_ANY_ID, PCI_ANY_ID, },
1682 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
1683 PCI_ANY_ID, PCI_ANY_ID, },
1684 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
1685 PCI_ANY_ID, PCI_ANY_ID, },
1686 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
1687 PCI_ANY_ID, PCI_ANY_ID, },
1688 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
1689 PCI_ANY_ID, PCI_ANY_ID, },
1690 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
1691 PCI_ANY_ID, PCI_ANY_ID, },
1692 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
1693 PCI_ANY_ID, PCI_ANY_ID, },
1694 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
1695 PCI_ANY_ID, PCI_ANY_ID, },
1696 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
1697 PCI_ANY_ID, PCI_ANY_ID, },
1698 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
1699 PCI_ANY_ID, PCI_ANY_ID, },
1700 { 0 }
1701};
1702
1703MODULE_DEVICE_TABLE(pci, lpfc_id_table);
1704
1705static struct pci_driver lpfc_driver = {
1706 .name = LPFC_DRIVER_NAME,
73797e31 1707 .owner = THIS_MODULE,
dea3101e
JB		 1708 .id_table = lpfc_id_table,
1709 .probe = lpfc_pci_probe_one,
1710 .remove = __devexit_p(lpfc_pci_remove_one),
1711};
1712
1713static int __init
1714lpfc_init(void)
1715{
1716 int error = 0;
1717
1718 printk(LPFC_MODULE_DESC "\n");
c44ce173 1719 printk(LPFC_COPYRIGHT "\n");
dea3101e
JB		 1720
1721 lpfc_transport_template =
1722 fc_attach_transport(&lpfc_transport_functions);
1723 if (!lpfc_transport_template)
1724 return -ENOMEM;
1725 error = pci_register_driver(&lpfc_driver);
1726 if (error)
1727 fc_release_transport(lpfc_transport_template);
1728
1729 return error;
1730}
1731
1732static void __exit
1733lpfc_exit(void)
1734{
1735 pci_unregister_driver(&lpfc_driver);
1736 fc_release_transport(lpfc_transport_template);
1737}
1738
1739module_init(lpfc_init);
1740module_exit(lpfc_exit);
1741MODULE_LICENSE("GPL");
1742MODULE_DESCRIPTION(LPFC_MODULE_DESC);
1743MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
1744MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
kernel source for telekom puls (alcatel/mediatek)