[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / rtc / rtc-stmp3xxx.c

/*
 * Freescale STMP37XX/STMP378X Real Time Clock driver
 *
 * Copyright (c) 2007 Sigmatel, Inc.
 * Peter Hartley, <peter.hartley@sigmatel.com>
 *
 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
 * Copyright 2011 Wolfram Sang, Pengutronix e.K.
 */

/*
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <linux/slab.h>
#include <linux/of_device.h>
#include <linux/of.h>
#include <linux/stmp_device.h>
#include <linux/stmp3xxx_rtc_wdt.h>

#define STMP3XXX_RTC_CTRL			0x0
#define STMP3XXX_RTC_CTRL_SET			0x4
#define STMP3XXX_RTC_CTRL_CLR			0x8
#define STMP3XXX_RTC_CTRL_ALARM_IRQ_EN		0x00000001
#define STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN	0x00000002
#define STMP3XXX_RTC_CTRL_ALARM_IRQ		0x00000004
#define STMP3XXX_RTC_CTRL_WATCHDOGEN		0x00000010

#define STMP3XXX_RTC_STAT			0x10
#define STMP3XXX_RTC_STAT_STALE_SHIFT		16
#define STMP3XXX_RTC_STAT_RTC_PRESENT		0x80000000

#define STMP3XXX_RTC_SECONDS			0x30

#define STMP3XXX_RTC_ALARM			0x40

#define STMP3XXX_RTC_WATCHDOG			0x50

#define STMP3XXX_RTC_PERSISTENT0		0x60
#define STMP3XXX_RTC_PERSISTENT0_SET		0x64
#define STMP3XXX_RTC_PERSISTENT0_CLR		0x68
#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN	0x00000002
#define STMP3XXX_RTC_PERSISTENT0_ALARM_EN	0x00000004
#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE	0x00000080

#define STMP3XXX_RTC_PERSISTENT1		0x70
/* missing bitmask in headers */
#define STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER	0x80000000

struct stmp3xxx_rtc_data {
	struct rtc_device *rtc;
	void __iomem *io;
	int irq_alarm;
};

#if IS_ENABLED(CONFIG_STMP3XXX_RTC_WATCHDOG)
/**
 * stmp3xxx_wdt_set_timeout - configure the watchdog inside the STMP3xxx RTC
 * @dev: the parent device of the watchdog (= the RTC)
 * @timeout: the desired value for the timeout register of the watchdog.
 *           0 disables the watchdog
 *
 * The watchdog needs one register and two bits which are in the RTC domain.
 * To handle the resource conflict, the RTC driver will create another
 * platform_device for the watchdog driver as a child of the RTC device.
 * The watchdog driver is passed the below accessor function via platform_data
 * to configure the watchdog. Locking is not needed because accessing SET/CLR
 * registers is atomic.
 */

static void stmp3xxx_wdt_set_timeout(struct device *dev, u32 timeout)
{
	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);

	if (timeout) {
		writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG);
		writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
		       rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);
		writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
		       rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET);
	} else {
		writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
		       rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
		writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
		       rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_CLR);
	}
}

static struct stmp3xxx_wdt_pdata wdt_pdata = {
	.wdt_set_timeout = stmp3xxx_wdt_set_timeout,
};

static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
{
	struct platform_device *wdt_pdev =
		platform_device_alloc("stmp3xxx_rtc_wdt", rtc_pdev->id);

	if (wdt_pdev) {
		wdt_pdev->dev.parent = &rtc_pdev->dev;
		wdt_pdev->dev.platform_data = &wdt_pdata;
		platform_device_add(wdt_pdev);
	}
}
#else
static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
{
}
#endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */

static void stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
{
	/*
	 * The datasheet doesn't say which way round the
	 * NEW_REGS/STALE_REGS bitfields go. In fact it's 0x1=P0,
	 * 0x2=P1, .., 0x20=P5, 0x40=ALARM, 0x80=SECONDS
	 */
	while (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
			(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT))
		cpu_relax();
}

/* Time read/write */
static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
{
	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);

	stmp3xxx_wait_time(rtc_data);
	rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
	return 0;
}

static int stmp3xxx_rtc_set_mmss(struct device *dev, unsigned long t)
{
	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);

	writel(t, rtc_data->io + STMP3XXX_RTC_SECONDS);
	stmp3xxx_wait_time(rtc_data);
	return 0;
}

/* interrupt(s) handler */
static irqreturn_t stmp3xxx_rtc_interrupt(int irq, void *dev_id)
{
	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev_id);
	u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL);

	if (status & STMP3XXX_RTC_CTRL_ALARM_IRQ) {
		writel(STMP3XXX_RTC_CTRL_ALARM_IRQ,
				rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
		rtc_update_irq(rtc_data->rtc, 1, RTC_AF | RTC_IRQF);
		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static int stmp3xxx_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);

	if (enabled) {
		writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
				STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
				rtc_data->io + STMP3XXX_RTC_PERSISTENT0_SET);
		writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
				rtc_data->io + STMP3XXX_RTC_CTRL_SET);
	} else {
		writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
				STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
				rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
		writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
				rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
	}
	return 0;
}

static int stmp3xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);

	rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time);
	return 0;
}

static int stmp3xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	unsigned long t;
	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);

	rtc_tm_to_time(&alm->time, &t);
	writel(t, rtc_data->io + STMP3XXX_RTC_ALARM);

	stmp3xxx_alarm_irq_enable(dev, alm->enabled);

	return 0;
}

static struct rtc_class_ops stmp3xxx_rtc_ops = {
	.alarm_irq_enable =
			  stmp3xxx_alarm_irq_enable,
	.read_time	= stmp3xxx_rtc_gettime,
	.set_mmss	= stmp3xxx_rtc_set_mmss,
	.read_alarm	= stmp3xxx_rtc_read_alarm,
	.set_alarm	= stmp3xxx_rtc_set_alarm,
};

static int stmp3xxx_rtc_remove(struct platform_device *pdev)
{
	struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(pdev);

	if (!rtc_data)
		return 0;

	writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
			rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
	platform_set_drvdata(pdev, NULL);

	return 0;
}

static int stmp3xxx_rtc_probe(struct platform_device *pdev)
{
	struct stmp3xxx_rtc_data *rtc_data;
	struct resource *r;
	int err;

	rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);
	if (!rtc_data)
		return -ENOMEM;

	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!r) {
		dev_err(&pdev->dev, "failed to get resource\n");
		return -ENXIO;
	}

	rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r));
	if (!rtc_data->io) {
		dev_err(&pdev->dev, "ioremap failed\n");
		return -EIO;
	}

	rtc_data->irq_alarm = platform_get_irq(pdev, 0);

	if (!(readl(STMP3XXX_RTC_STAT + rtc_data->io) &
			STMP3XXX_RTC_STAT_RTC_PRESENT)) {
		dev_err(&pdev->dev, "no device onboard\n");
		return -ENODEV;
	}

	platform_set_drvdata(pdev, rtc_data);

	stmp_reset_block(rtc_data->io);
	writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
			STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
			STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
			rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);

	writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN |
			STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
			rtc_data->io + STMP3XXX_RTC_CTRL_CLR);

	rtc_data->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
				&stmp3xxx_rtc_ops, THIS_MODULE);
	if (IS_ERR(rtc_data->rtc)) {
		err = PTR_ERR(rtc_data->rtc);
		goto out;
	}

	err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm,
			stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev);
	if (err) {
		dev_err(&pdev->dev, "Cannot claim IRQ%d\n",
			rtc_data->irq_alarm);
		goto out;
	}

	stmp3xxx_wdt_register(pdev);
	return 0;

out:
	platform_set_drvdata(pdev, NULL);
	return err;
}

#ifdef CONFIG_PM_SLEEP
static int stmp3xxx_rtc_suspend(struct device *dev)
{
	return 0;
}

static int stmp3xxx_rtc_resume(struct device *dev)
{
	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);

	stmp_reset_block(rtc_data->io);
	writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
			STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
			STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
			rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(stmp3xxx_rtc_pm_ops, stmp3xxx_rtc_suspend,
			stmp3xxx_rtc_resume);

static const struct of_device_id rtc_dt_ids[] = {
	{ .compatible = "fsl,stmp3xxx-rtc", },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, rtc_dt_ids);

static struct platform_driver stmp3xxx_rtcdrv = {
	.probe		= stmp3xxx_rtc_probe,
	.remove		= stmp3xxx_rtc_remove,
	.driver		= {
		.name	= "stmp3xxx-rtc",
		.owner	= THIS_MODULE,
		.pm	= &stmp3xxx_rtc_pm_ops,
		.of_match_table = of_match_ptr(rtc_dt_ids),
	},
};

module_platform_driver(stmp3xxx_rtcdrv);

MODULE_DESCRIPTION("STMP3xxx RTC Driver");
MODULE_AUTHOR("dmitry pervushin <dpervushin@embeddedalley.com> and "
		"Wolfram Sang <w.sang@pengutronix.de>");
MODULE_LICENSE("GPL");
Commit	Line	Data
df17f631	1	/*
	2	* Freescale STMP37XX/STMP378X Real Time Clock driver
	3	*
	4	* Copyright (c) 2007 Sigmatel, Inc.
	5	* Peter Hartley, <peter.hartley@sigmatel.com>
	6	*
	7	* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
	8	* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
7e794cb7	9	* Copyright 2011 Wolfram Sang, Pengutronix e.K.
df17f631	10	*/
	11
	12	/*
	13	* The code contained herein is licensed under the GNU General Public
	14	* License. You may obtain a copy of the GNU General Public License
	15	* Version 2 or later at the following locations:
	16	*
	17	* http://www.opensource.org/licenses/gpl-license.html
	18	* http://www.gnu.org/copyleft/gpl.html
	19	*/
	20	#include <linux/kernel.h>
	21	#include <linux/module.h>
b5167159	22	#include <linux/io.h>
df17f631	23	#include <linux/init.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/interrupt.h>
	26	#include <linux/rtc.h>
5a0e3ad6	27	#include <linux/slab.h>
dd8d20a3	28	#include <linux/of_device.h>
c8a6046e	29	#include <linux/of.h>
1a71fb84 WS	30	#include <linux/stmp_device.h>
1a71fb84 WS	31	#include <linux/stmp3xxx_rtc_wdt.h>
df17f631	32
47eac337	33	#define STMP3XXX_RTC_CTRL 0x0
b5167159 WS	34	#define STMP3XXX_RTC_CTRL_SET 0x4
b5167159 WS	35	#define STMP3XXX_RTC_CTRL_CLR 0x8
47eac337 WS	36	#define STMP3XXX_RTC_CTRL_ALARM_IRQ_EN 0x00000001
	37	#define STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN 0x00000002
	38	#define STMP3XXX_RTC_CTRL_ALARM_IRQ 0x00000004
1a71fb84	39	#define STMP3XXX_RTC_CTRL_WATCHDOGEN 0x00000010
47eac337 WS	40
	41	#define STMP3XXX_RTC_STAT 0x10
	42	#define STMP3XXX_RTC_STAT_STALE_SHIFT 16
	43	#define STMP3XXX_RTC_STAT_RTC_PRESENT 0x80000000
	44
	45	#define STMP3XXX_RTC_SECONDS 0x30
	46
	47	#define STMP3XXX_RTC_ALARM 0x40
	48
1a71fb84 WS	49	#define STMP3XXX_RTC_WATCHDOG 0x50
1a71fb84 WS	50
47eac337	51	#define STMP3XXX_RTC_PERSISTENT0 0x60
b5167159 WS	52	#define STMP3XXX_RTC_PERSISTENT0_SET 0x64
b5167159 WS	53	#define STMP3XXX_RTC_PERSISTENT0_CLR 0x68
47eac337 WS	54	#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN 0x00000002
	55	#define STMP3XXX_RTC_PERSISTENT0_ALARM_EN 0x00000004
	56	#define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE 0x00000080
df17f631	57
1a71fb84 WS	58	#define STMP3XXX_RTC_PERSISTENT1 0x70
	59	/* missing bitmask in headers */
	60	#define STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER 0x80000000
	61
df17f631	62	struct stmp3xxx_rtc_data {
df17f631	63	struct rtc_device *rtc;
df17f631	64	void __iomem *io;
7e794cb7	65	int irq_alarm;
df17f631	66	};
df17f631	67
1a71fb84 WS	68	#if IS_ENABLED(CONFIG_STMP3XXX_RTC_WATCHDOG)
	69	/**
	70	* stmp3xxx_wdt_set_timeout - configure the watchdog inside the STMP3xxx RTC
	71	* @dev: the parent device of the watchdog (= the RTC)
	72	* @timeout: the desired value for the timeout register of the watchdog.
	73	* 0 disables the watchdog
	74	*
	75	* The watchdog needs one register and two bits which are in the RTC domain.
	76	* To handle the resource conflict, the RTC driver will create another
	77	* platform_device for the watchdog driver as a child of the RTC device.
	78	* The watchdog driver is passed the below accessor function via platform_data
	79	* to configure the watchdog. Locking is not needed because accessing SET/CLR
	80	* registers is atomic.
	81	*/
	82
	83	static void stmp3xxx_wdt_set_timeout(struct device *dev, u32 timeout)
	84	{
	85	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
	86
	87	if (timeout) {
	88	writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG);
	89	writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
	90	rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);
	91	writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
	92	rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET);
	93	} else {
	94	writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
	95	rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
	96	writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
	97	rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_CLR);
	98	}
	99	}
	100
	101	static struct stmp3xxx_wdt_pdata wdt_pdata = {
	102	.wdt_set_timeout = stmp3xxx_wdt_set_timeout,
	103	};
	104
	105	static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
	106	{
	107	struct platform_device *wdt_pdev =
	108	platform_device_alloc("stmp3xxx_rtc_wdt", rtc_pdev->id);
	109
	110	if (wdt_pdev) {
	111	wdt_pdev->dev.parent = &rtc_pdev->dev;
	112	wdt_pdev->dev.platform_data = &wdt_pdata;
	113	platform_device_add(wdt_pdev);
	114	}
	115	}
	116	#else
	117	static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
	118	{
	119	}
	120	#endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */
	121
df17f631	122	static void stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
	123	{
	124	/*
	125	* The datasheet doesn't say which way round the
	126	* NEW_REGS/STALE_REGS bitfields go. In fact it's 0x1=P0,
	127	* 0x2=P1, .., 0x20=P5, 0x40=ALARM, 0x80=SECONDS
	128	*/
b5167159	129	while (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
47eac337	130	(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT))
df17f631	131	cpu_relax();
	132	}
	133
	134	/* Time read/write */
	135	static int stmp3xxx_rtc_gettime(struct device dev, struct rtc_time rtc_tm)
	136	{
	137	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
	138
	139	stmp3xxx_wait_time(rtc_data);
b5167159	140	rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
df17f631	141	return 0;
	142	}
	143
	144	static int stmp3xxx_rtc_set_mmss(struct device *dev, unsigned long t)
	145	{
	146	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
	147
b5167159	148	writel(t, rtc_data->io + STMP3XXX_RTC_SECONDS);
df17f631	149	stmp3xxx_wait_time(rtc_data);
	150	return 0;
	151	}
	152
	153	/* interrupt(s) handler */
	154	static irqreturn_t stmp3xxx_rtc_interrupt(int irq, void *dev_id)
	155	{
	156	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev_id);
7e794cb7	157	u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL);
df17f631	158
47eac337	159	if (status & STMP3XXX_RTC_CTRL_ALARM_IRQ) {
b5167159 WS	160	writel(STMP3XXX_RTC_CTRL_ALARM_IRQ,
b5167159 WS	161	rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
7e794cb7 WS	162	rtc_update_irq(rtc_data->rtc, 1, RTC_AF \| RTC_IRQF);
7e794cb7 WS	163	return IRQ_HANDLED;
df17f631	164	}
df17f631	165
7e794cb7	166	return IRQ_NONE;
df17f631	167	}
	168
	169	static int stmp3xxx_alarm_irq_enable(struct device *dev, unsigned int enabled)
	170	{
	171	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
df17f631	172
df17f631	173	if (enabled) {
b5167159 WS	174	writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN \|
	175	STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
	176	rtc_data->io + STMP3XXX_RTC_PERSISTENT0_SET);
	177	writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
	178	rtc_data->io + STMP3XXX_RTC_CTRL_SET);
df17f631	179	} else {
b5167159 WS	180	writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN \|
	181	STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
	182	rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
	183	writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
	184	rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
df17f631	185	}
	186	return 0;
	187	}
	188
df17f631	189	static int stmp3xxx_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
	190	{
	191	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
	192
b5167159	193	rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time);
df17f631	194	return 0;
	195	}
	196
	197	static int stmp3xxx_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
	198	{
	199	unsigned long t;
	200	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
	201
	202	rtc_tm_to_time(&alm->time, &t);
b5167159	203	writel(t, rtc_data->io + STMP3XXX_RTC_ALARM);
7e794cb7 WS	204
	205	stmp3xxx_alarm_irq_enable(dev, alm->enabled);
	206
df17f631	207	return 0;
	208	}
	209
	210	static struct rtc_class_ops stmp3xxx_rtc_ops = {
	211	.alarm_irq_enable =
	212	stmp3xxx_alarm_irq_enable,
df17f631	213	.read_time = stmp3xxx_rtc_gettime,
	214	.set_mmss = stmp3xxx_rtc_set_mmss,
	215	.read_alarm = stmp3xxx_rtc_read_alarm,
	216	.set_alarm = stmp3xxx_rtc_set_alarm,
	217	};
	218
	219	static int stmp3xxx_rtc_remove(struct platform_device *pdev)
	220	{
	221	struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(pdev);
	222
	223	if (!rtc_data)
	224	return 0;
	225
7e794cb7	226	writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
b5167159	227	rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
a91d2bab	228	platform_set_drvdata(pdev, NULL);
df17f631	229
	230	return 0;
	231	}
	232
	233	static int stmp3xxx_rtc_probe(struct platform_device *pdev)
	234	{
	235	struct stmp3xxx_rtc_data *rtc_data;
	236	struct resource *r;
	237	int err;
	238
87a81420	239	rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);
df17f631	240	if (!rtc_data)
	241	return -ENOMEM;
	242
	243	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	244	if (!r) {
	245	dev_err(&pdev->dev, "failed to get resource\n");
87a81420	246	return -ENXIO;
df17f631	247	}
df17f631	248
87a81420	249	rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r));
df17f631	250	if (!rtc_data->io) {
df17f631	251	dev_err(&pdev->dev, "ioremap failed\n");
87a81420	252	return -EIO;
df17f631	253	}
	254
	255	rtc_data->irq_alarm = platform_get_irq(pdev, 0);
df17f631	256
b5167159	257	if (!(readl(STMP3XXX_RTC_STAT + rtc_data->io) &
47eac337	258	STMP3XXX_RTC_STAT_RTC_PRESENT)) {
df17f631	259	dev_err(&pdev->dev, "no device onboard\n");
87a81420	260	return -ENODEV;
df17f631	261	}
df17f631	262
a91d2bab WS	263	platform_set_drvdata(pdev, rtc_data);
a91d2bab WS	264
36d1da1d	265	stmp_reset_block(rtc_data->io);
b5167159	266	writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN \|
47eac337 WS	267	STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN \|
47eac337 WS	268	STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
b5167159	269	rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
a91d2bab	270
7e794cb7 WS	271	writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN \|
	272	STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
	273	rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
	274
87a81420	275	rtc_data->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
df17f631	276	&stmp3xxx_rtc_ops, THIS_MODULE);
	277	if (IS_ERR(rtc_data->rtc)) {
	278	err = PTR_ERR(rtc_data->rtc);
87a81420	279	goto out;
df17f631	280	}
df17f631	281
87a81420 JH	282	err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm,
87a81420 JH	283	stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev);
df17f631	284	if (err) {
	285	dev_err(&pdev->dev, "Cannot claim IRQ%d\n",
	286	rtc_data->irq_alarm);
87a81420	287	goto out;
df17f631	288	}
df17f631	289
1a71fb84	290	stmp3xxx_wdt_register(pdev);
df17f631	291	return 0;
df17f631	292
87a81420	293	out:
a91d2bab	294	platform_set_drvdata(pdev, NULL);
df17f631	295	return err;
	296	}
	297
ef69a7f0 JH	298	#ifdef CONFIG_PM_SLEEP
ef69a7f0 JH	299	static int stmp3xxx_rtc_suspend(struct device *dev)
df17f631	300	{
	301	return 0;
	302	}
	303
ef69a7f0	304	static int stmp3xxx_rtc_resume(struct device *dev)
df17f631	305	{
ef69a7f0	306	struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
df17f631	307
36d1da1d	308	stmp_reset_block(rtc_data->io);
b5167159	309	writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN \|
47eac337 WS	310	STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN \|
47eac337 WS	311	STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
b5167159	312	rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
df17f631	313	return 0;
df17f631	314	}
df17f631	315	#endif
df17f631	316
ef69a7f0 JH	317	static SIMPLE_DEV_PM_OPS(stmp3xxx_rtc_pm_ops, stmp3xxx_rtc_suspend,
	318	stmp3xxx_rtc_resume);
	319
dd8d20a3 MV	320	static const struct of_device_id rtc_dt_ids[] = {
	321	{ .compatible = "fsl,stmp3xxx-rtc", },
	322	{ /* sentinel */ }
	323	};
	324	MODULE_DEVICE_TABLE(of, rtc_dt_ids);
	325
df17f631	326	static struct platform_driver stmp3xxx_rtcdrv = {
	327	.probe = stmp3xxx_rtc_probe,
	328	.remove = stmp3xxx_rtc_remove,
df17f631	329	.driver = {
	330	.name = "stmp3xxx-rtc",
	331	.owner = THIS_MODULE,
ef69a7f0	332	.pm = &stmp3xxx_rtc_pm_ops,
c8a6046e	333	.of_match_table = of_match_ptr(rtc_dt_ids),
df17f631	334	},
	335	};
	336
0c4eae66	337	module_platform_driver(stmp3xxx_rtcdrv);
df17f631	338
df17f631	339	MODULE_DESCRIPTION("STMP3xxx RTC Driver");
7e794cb7 WS	340	MODULE_AUTHOR("dmitry pervushin <dpervushin@embeddedalley.com> and "
7e794cb7 WS	341	"Wolfram Sang <w.sang@pengutronix.de>");
df17f631	342	MODULE_LICENSE("GPL");