[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / rtc / rtc-ds1511.c

/*
 * An rtc driver for the Dallas DS1511
 *
 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Real time clock driver for the Dallas 1511 chip, which also
 * contains a watchdog timer.  There is a tiny amount of code that
 * platform code could use to mess with the watchdog device a little
 * bit, but not a full watchdog driver.
 */

#include <linux/bcd.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gfp.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/module.h>

#define DRV_VERSION "0.6"

enum ds1511reg {
	DS1511_SEC = 0x0,
	DS1511_MIN = 0x1,
	DS1511_HOUR = 0x2,
	DS1511_DOW = 0x3,
	DS1511_DOM = 0x4,
	DS1511_MONTH = 0x5,
	DS1511_YEAR = 0x6,
	DS1511_CENTURY = 0x7,
	DS1511_AM1_SEC = 0x8,
	DS1511_AM2_MIN = 0x9,
	DS1511_AM3_HOUR = 0xa,
	DS1511_AM4_DATE = 0xb,
	DS1511_WD_MSEC = 0xc,
	DS1511_WD_SEC = 0xd,
	DS1511_CONTROL_A = 0xe,
	DS1511_CONTROL_B = 0xf,
	DS1511_RAMADDR_LSB = 0x10,
	DS1511_RAMDATA = 0x13
};

#define DS1511_BLF1	0x80
#define DS1511_BLF2	0x40
#define DS1511_PRS	0x20
#define DS1511_PAB	0x10
#define DS1511_TDF	0x08
#define DS1511_KSF	0x04
#define DS1511_WDF	0x02
#define DS1511_IRQF	0x01
#define DS1511_TE	0x80
#define DS1511_CS	0x40
#define DS1511_BME	0x20
#define DS1511_TPE	0x10
#define DS1511_TIE	0x08
#define DS1511_KIE	0x04
#define DS1511_WDE	0x02
#define DS1511_WDS	0x01
#define DS1511_RAM_MAX	0xff

#define RTC_CMD		DS1511_CONTROL_B
#define RTC_CMD1	DS1511_CONTROL_A

#define RTC_ALARM_SEC	DS1511_AM1_SEC
#define RTC_ALARM_MIN	DS1511_AM2_MIN
#define RTC_ALARM_HOUR	DS1511_AM3_HOUR
#define RTC_ALARM_DATE	DS1511_AM4_DATE

#define RTC_SEC		DS1511_SEC
#define RTC_MIN		DS1511_MIN
#define RTC_HOUR	DS1511_HOUR
#define RTC_DOW		DS1511_DOW
#define RTC_DOM		DS1511_DOM
#define RTC_MON		DS1511_MONTH
#define RTC_YEAR	DS1511_YEAR
#define RTC_CENTURY	DS1511_CENTURY

#define RTC_TIE	DS1511_TIE
#define RTC_TE	DS1511_TE

struct rtc_plat_data {
	struct rtc_device *rtc;
	void __iomem *ioaddr;		/* virtual base address */
	int size;				/* amount of memory mapped */
	int irq;
	unsigned int irqen;
	int alrm_sec;
	int alrm_min;
	int alrm_hour;
	int alrm_mday;
	spinlock_t lock;
};

static DEFINE_SPINLOCK(ds1511_lock);

static __iomem char *ds1511_base;
static u32 reg_spacing = 1;

 static noinline void
rtc_write(uint8_t val, uint32_t reg)
{
	writeb(val, ds1511_base + (reg * reg_spacing));
}

 static inline void
rtc_write_alarm(uint8_t val, enum ds1511reg reg)
{
	rtc_write((val | 0x80), reg);
}

 static noinline uint8_t
rtc_read(enum ds1511reg reg)
{
	return readb(ds1511_base + (reg * reg_spacing));
}

 static inline void
rtc_disable_update(void)
{
	rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
}

 static void
rtc_enable_update(void)
{
	rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
}

/*
 * #define DS1511_WDOG_RESET_SUPPORT
 *
 * Uncomment this if you want to use these routines in
 * some platform code.
 */
#ifdef DS1511_WDOG_RESET_SUPPORT
/*
 * just enough code to set the watchdog timer so that it
 * will reboot the system
 */
 void
ds1511_wdog_set(unsigned long deciseconds)
{
	/*
	 * the wdog timer can take 99.99 seconds
	 */
	deciseconds %= 10000;
	/*
	 * set the wdog values in the wdog registers
	 */
	rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
	rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
	/*
	 * set wdog enable and wdog 'steering' bit to issue a reset
	 */
	rtc_write(DS1511_WDE | DS1511_WDS, RTC_CMD);
}

 void
ds1511_wdog_disable(void)
{
	/*
	 * clear wdog enable and wdog 'steering' bits
	 */
	rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
	/*
	 * clear the wdog counter
	 */
	rtc_write(0, DS1511_WD_MSEC);
	rtc_write(0, DS1511_WD_SEC);
}
#endif

/*
 * set the rtc chip's idea of the time.
 * stupidly, some callers call with year unmolested;
 * and some call with  year = year - 1900.  thanks.
 */
static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
{
	u8 mon, day, dow, hrs, min, sec, yrs, cen;
	unsigned long flags;

	/*
	 * won't have to change this for a while
	 */
	if (rtc_tm->tm_year < 1900) {
		rtc_tm->tm_year += 1900;
	}

	if (rtc_tm->tm_year < 1970) {
		return -EINVAL;
	}
	yrs = rtc_tm->tm_year % 100;
	cen = rtc_tm->tm_year / 100;
	mon = rtc_tm->tm_mon + 1;   /* tm_mon starts at zero */
	day = rtc_tm->tm_mday;
	dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
	hrs = rtc_tm->tm_hour;
	min = rtc_tm->tm_min;
	sec = rtc_tm->tm_sec;

	if ((mon > 12) || (day == 0)) {
		return -EINVAL;
	}

	if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year)) {
		return -EINVAL;
	}

	if ((hrs >= 24) || (min >= 60) || (sec >= 60)) {
		return -EINVAL;
	}

	/*
	 * each register is a different number of valid bits
	 */
	sec = bin2bcd(sec) & 0x7f;
	min = bin2bcd(min) & 0x7f;
	hrs = bin2bcd(hrs) & 0x3f;
	day = bin2bcd(day) & 0x3f;
	mon = bin2bcd(mon) & 0x1f;
	yrs = bin2bcd(yrs) & 0xff;
	cen = bin2bcd(cen) & 0xff;

	spin_lock_irqsave(&ds1511_lock, flags);
	rtc_disable_update();
	rtc_write(cen, RTC_CENTURY);
	rtc_write(yrs, RTC_YEAR);
	rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
	rtc_write(day, RTC_DOM);
	rtc_write(hrs, RTC_HOUR);
	rtc_write(min, RTC_MIN);
	rtc_write(sec, RTC_SEC);
	rtc_write(dow, RTC_DOW);
	rtc_enable_update();
	spin_unlock_irqrestore(&ds1511_lock, flags);

	return 0;
}

static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
{
	unsigned int century;
	unsigned long flags;

	spin_lock_irqsave(&ds1511_lock, flags);
	rtc_disable_update();

	rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
	rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
	rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
	rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
	rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
	rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
	rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
	century = rtc_read(RTC_CENTURY);

	rtc_enable_update();
	spin_unlock_irqrestore(&ds1511_lock, flags);

	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
	century = bcd2bin(century) * 100;

	/*
	 * Account for differences between how the RTC uses the values
	 * and how they are defined in a struct rtc_time;
	 */
	century += rtc_tm->tm_year;
	rtc_tm->tm_year = century - 1900;

	rtc_tm->tm_mon--;

	if (rtc_valid_tm(rtc_tm) < 0) {
		dev_err(dev, "retrieved date/time is not valid.\n");
		rtc_time_to_tm(0, rtc_tm);
	}
	return 0;
}

/*
 * write the alarm register settings
 *
 * we only have the use to interrupt every second, otherwise
 * known as the update interrupt, or the interrupt if the whole
 * date/hours/mins/secs matches.  the ds1511 has many more
 * permutations, but the kernel doesn't.
 */
 static void
ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
{
	unsigned long flags;

	spin_lock_irqsave(&pdata->lock, flags);
	rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
	       0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
	       RTC_ALARM_DATE);
	rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
	       0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
	       RTC_ALARM_HOUR);
	rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
	       0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
	       RTC_ALARM_MIN);
	rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
	       0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
	       RTC_ALARM_SEC);
	rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
	rtc_read(RTC_CMD1);	/* clear interrupts */
	spin_unlock_irqrestore(&pdata->lock, flags);
}

 static int
ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);

	if (pdata->irq <= 0)
		return -EINVAL;

	pdata->alrm_mday = alrm->time.tm_mday;
	pdata->alrm_hour = alrm->time.tm_hour;
	pdata->alrm_min = alrm->time.tm_min;
	pdata->alrm_sec = alrm->time.tm_sec;
	if (alrm->enabled) {
		pdata->irqen |= RTC_AF;
	}
	ds1511_rtc_update_alarm(pdata);
	return 0;
}

 static int
ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);

	if (pdata->irq <= 0)
		return -EINVAL;

	alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
	alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
	alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
	alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
	alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
	return 0;
}

 static irqreturn_t
ds1511_interrupt(int irq, void *dev_id)
{
	struct platform_device *pdev = dev_id;
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	unsigned long events = 0;

	spin_lock(&pdata->lock);
	/*
	 * read and clear interrupt
	 */
	if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
		events = RTC_IRQF;
		if (rtc_read(RTC_ALARM_SEC) & 0x80)
			events |= RTC_UF;
		else
			events |= RTC_AF;
		if (likely(pdata->rtc))
			rtc_update_irq(pdata->rtc, 1, events);
	}
	spin_unlock(&pdata->lock);
	return events ? IRQ_HANDLED : IRQ_NONE;
}

static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);

	if (pdata->irq <= 0)
		return -EINVAL;
	if (enabled)
		pdata->irqen |= RTC_AF;
	else
		pdata->irqen &= ~RTC_AF;
	ds1511_rtc_update_alarm(pdata);
	return 0;
}

static const struct rtc_class_ops ds1511_rtc_ops = {
	.read_time		= ds1511_rtc_read_time,
	.set_time		= ds1511_rtc_set_time,
	.read_alarm		= ds1511_rtc_read_alarm,
	.set_alarm		= ds1511_rtc_set_alarm,
	.alarm_irq_enable	= ds1511_rtc_alarm_irq_enable,
};

 static ssize_t
ds1511_nvram_read(struct file *filp, struct kobject *kobj,
		  struct bin_attribute *ba,
		  char *buf, loff_t pos, size_t size)
{
	ssize_t count;

	/*
	 * if count is more than one, turn on "burst" mode
	 * turn it off when you're done
	 */
	if (size > 1) {
		rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
	}
	if (pos > DS1511_RAM_MAX) {
		pos = DS1511_RAM_MAX;
	}
	if (size + pos > DS1511_RAM_MAX + 1) {
		size = DS1511_RAM_MAX - pos + 1;
	}
	rtc_write(pos, DS1511_RAMADDR_LSB);
	for (count = 0; size > 0; count++, size--) {
		*buf++ = rtc_read(DS1511_RAMDATA);
	}
	if (count > 1) {
		rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
	}
	return count;
}

 static ssize_t
ds1511_nvram_write(struct file *filp, struct kobject *kobj,
		   struct bin_attribute *bin_attr,
		   char *buf, loff_t pos, size_t size)
{
	ssize_t count;

	/*
	 * if count is more than one, turn on "burst" mode
	 * turn it off when you're done
	 */
	if (size > 1) {
		rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
	}
	if (pos > DS1511_RAM_MAX) {
		pos = DS1511_RAM_MAX;
	}
	if (size + pos > DS1511_RAM_MAX + 1) {
		size = DS1511_RAM_MAX - pos + 1;
	}
	rtc_write(pos, DS1511_RAMADDR_LSB);
	for (count = 0; size > 0; count++, size--) {
		rtc_write(*buf++, DS1511_RAMDATA);
	}
	if (count > 1) {
		rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
	}
	return count;
}

static struct bin_attribute ds1511_nvram_attr = {
	.attr = {
		.name = "nvram",
		.mode = S_IRUGO | S_IWUSR,
	},
	.size = DS1511_RAM_MAX,
	.read = ds1511_nvram_read,
	.write = ds1511_nvram_write,
};

static int ds1511_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	struct resource *res;
	struct rtc_plat_data *pdata;
	int ret = 0;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		return -ENODEV;
	}
	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return -ENOMEM;
	pdata->size = resource_size(res);
	if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size,
			pdev->name))
		return -EBUSY;
	ds1511_base = devm_ioremap(&pdev->dev, res->start, pdata->size);
	if (!ds1511_base)
		return -ENOMEM;
	pdata->ioaddr = ds1511_base;
	pdata->irq = platform_get_irq(pdev, 0);

	/*
	 * turn on the clock and the crystal, etc.
	 */
	rtc_write(0, RTC_CMD);
	rtc_write(0, RTC_CMD1);
	/*
	 * clear the wdog counter
	 */
	rtc_write(0, DS1511_WD_MSEC);
	rtc_write(0, DS1511_WD_SEC);
	/*
	 * start the clock
	 */
	rtc_enable_update();

	/*
	 * check for a dying bat-tree
	 */
	if (rtc_read(RTC_CMD1) & DS1511_BLF1) {
		dev_warn(&pdev->dev, "voltage-low detected.\n");
	}

	spin_lock_init(&pdata->lock);
	platform_set_drvdata(pdev, pdata);
	/*
	 * if the platform has an interrupt in mind for this device,
	 * then by all means, set it
	 */
	if (pdata->irq > 0) {
		rtc_read(RTC_CMD1);
		if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
			IRQF_SHARED, pdev->name, pdev) < 0) {

			dev_warn(&pdev->dev, "interrupt not available.\n");
			pdata->irq = 0;
		}
	}

	rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &ds1511_rtc_ops,
					THIS_MODULE);
	if (IS_ERR(rtc))
		return PTR_ERR(rtc);
	pdata->rtc = rtc;

	ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);

	return ret;
}

static int ds1511_rtc_remove(struct platform_device *pdev)
{
	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);

	sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
	if (pdata->irq > 0) {
		/*
		 * disable the alarm interrupt
		 */
		rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
		rtc_read(RTC_CMD1);
	}
	return 0;
}

/* work with hotplug and coldplug */
MODULE_ALIAS("platform:ds1511");

static struct platform_driver ds1511_rtc_driver = {
	.probe		= ds1511_rtc_probe,
	.remove		= ds1511_rtc_remove,
	.driver		= {
		.name	= "ds1511",
		.owner	= THIS_MODULE,
	},
};

module_platform_driver(ds1511_rtc_driver);

MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
8f26795a AS	1	/*
	2	* An rtc driver for the Dallas DS1511
	3	*
	4	* Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
5b73a41c	5	* Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
8f26795a AS	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* Real time clock driver for the Dallas 1511 chip, which also
	12	* contains a watchdog timer. There is a tiny amount of code that
	13	* platform code could use to mess with the watchdog device a little
	14	* bit, but not a full watchdog driver.
	15	*/
	16
	17	#include <linux/bcd.h>
	18	#include <linux/init.h>
	19	#include <linux/kernel.h>
5a0e3ad6	20	#include <linux/gfp.h>
8f26795a AS	21	#include <linux/delay.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/rtc.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/io.h>
2113852b	26	#include <linux/module.h>
8f26795a AS	27
	28	#define DRV_VERSION "0.6"
	29
	30	enum ds1511reg {
	31	DS1511_SEC = 0x0,
	32	DS1511_MIN = 0x1,
	33	DS1511_HOUR = 0x2,
	34	DS1511_DOW = 0x3,
	35	DS1511_DOM = 0x4,
	36	DS1511_MONTH = 0x5,
	37	DS1511_YEAR = 0x6,
	38	DS1511_CENTURY = 0x7,
	39	DS1511_AM1_SEC = 0x8,
	40	DS1511_AM2_MIN = 0x9,
	41	DS1511_AM3_HOUR = 0xa,
	42	DS1511_AM4_DATE = 0xb,
	43	DS1511_WD_MSEC = 0xc,
	44	DS1511_WD_SEC = 0xd,
	45	DS1511_CONTROL_A = 0xe,
	46	DS1511_CONTROL_B = 0xf,
	47	DS1511_RAMADDR_LSB = 0x10,
	48	DS1511_RAMDATA = 0x13
	49	};
	50
	51	#define DS1511_BLF1 0x80
	52	#define DS1511_BLF2 0x40
	53	#define DS1511_PRS 0x20
	54	#define DS1511_PAB 0x10
	55	#define DS1511_TDF 0x08
	56	#define DS1511_KSF 0x04
	57	#define DS1511_WDF 0x02
	58	#define DS1511_IRQF 0x01
	59	#define DS1511_TE 0x80
	60	#define DS1511_CS 0x40
	61	#define DS1511_BME 0x20
	62	#define DS1511_TPE 0x10
	63	#define DS1511_TIE 0x08
	64	#define DS1511_KIE 0x04
	65	#define DS1511_WDE 0x02
	66	#define DS1511_WDS 0x01
	67	#define DS1511_RAM_MAX 0xff
	68
	69	#define RTC_CMD DS1511_CONTROL_B
	70	#define RTC_CMD1 DS1511_CONTROL_A
	71
	72	#define RTC_ALARM_SEC DS1511_AM1_SEC
	73	#define RTC_ALARM_MIN DS1511_AM2_MIN
	74	#define RTC_ALARM_HOUR DS1511_AM3_HOUR
	75	#define RTC_ALARM_DATE DS1511_AM4_DATE
	76
	77	#define RTC_SEC DS1511_SEC
	78	#define RTC_MIN DS1511_MIN
	79	#define RTC_HOUR DS1511_HOUR
	80	#define RTC_DOW DS1511_DOW
	81	#define RTC_DOM DS1511_DOM
	82	#define RTC_MON DS1511_MONTH
	83	#define RTC_YEAR DS1511_YEAR
	84	#define RTC_CENTURY DS1511_CENTURY
	85
	86	#define RTC_TIE DS1511_TIE
	87	#define RTC_TE DS1511_TE
	88
	89	struct rtc_plat_data {
	90	struct rtc_device *rtc;
91	void __iomem ioaddr; / virtual base address */
8f26795a AS	92	int size; /* amount of memory mapped */
	93	int irq;
	94	unsigned int irqen;
	95	int alrm_sec;
	96	int alrm_min;
	97	int alrm_hour;
	98	int alrm_mday;
ba4f3e47	99	spinlock_t lock;
8f26795a AS	100	};
	101
	102	static DEFINE_SPINLOCK(ds1511_lock);
	103
	104	static __iomem char *ds1511_base;
	105	static u32 reg_spacing = 1;
	106
	107	static noinline void
	108	rtc_write(uint8_t val, uint32_t reg)
	109	{
	110	writeb(val, ds1511_base + (reg * reg_spacing));
	111	}
	112
	113	static inline void
	114	rtc_write_alarm(uint8_t val, enum ds1511reg reg)
	115	{
	116	rtc_write((val \| 0x80), reg);
	117	}
	118
	119	static noinline uint8_t
	120	rtc_read(enum ds1511reg reg)
	121	{
	122	return readb(ds1511_base + (reg * reg_spacing));
	123	}
	124
	125	static inline void
	126	rtc_disable_update(void)
	127	{
	128	rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
	129	}
	130
	131	static void
	132	rtc_enable_update(void)
	133	{
	134	rtc_write((rtc_read(RTC_CMD) \| RTC_TE), RTC_CMD);
	135	}
	136
	137	/*
	138	* #define DS1511_WDOG_RESET_SUPPORT
	139	*
	140	* Uncomment this if you want to use these routines in
	141	* some platform code.
	142	*/
	143	#ifdef DS1511_WDOG_RESET_SUPPORT
	144	/*
	145	* just enough code to set the watchdog timer so that it
	146	* will reboot the system
	147	*/
	148	void
	149	ds1511_wdog_set(unsigned long deciseconds)
	150	{
	151	/*
	152	* the wdog timer can take 99.99 seconds
	153	*/
	154	deciseconds %= 10000;
	155	/*
	156	* set the wdog values in the wdog registers
	157	*/
fe20ba70 AB	158	rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
fe20ba70 AB	159	rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
8f26795a AS	160	/*
	161	* set wdog enable and wdog 'steering' bit to issue a reset
	162	*/
	163	rtc_write(DS1511_WDE \| DS1511_WDS, RTC_CMD);
	164	}
	165
	166	void
	167	ds1511_wdog_disable(void)
	168	{
	169	/*
	170	* clear wdog enable and wdog 'steering' bits
	171	*/
	172	rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE \| DS1511_WDS), RTC_CMD);
	173	/*
	174	* clear the wdog counter
	175	*/
	176	rtc_write(0, DS1511_WD_MSEC);
	177	rtc_write(0, DS1511_WD_SEC);
	178	}
	179	#endif
	180
	181	/*
	182	* set the rtc chip's idea of the time.
	183	* stupidly, some callers call with year unmolested;
	184	* and some call with year = year - 1900. thanks.
	185	*/
a3ed107e	186	static int ds1511_rtc_set_time(struct device dev, struct rtc_time rtc_tm)
8f26795a AS	187	{
8f26795a AS	188	u8 mon, day, dow, hrs, min, sec, yrs, cen;
9a0f4aea	189	unsigned long flags;
8f26795a AS	190
	191	/*
	192	* won't have to change this for a while
	193	*/
	194	if (rtc_tm->tm_year < 1900) {
	195	rtc_tm->tm_year += 1900;
	196	}
	197
	198	if (rtc_tm->tm_year < 1970) {
	199	return -EINVAL;
	200	}
	201	yrs = rtc_tm->tm_year % 100;
	202	cen = rtc_tm->tm_year / 100;
	203	mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
	204	day = rtc_tm->tm_mday;
	205	dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
	206	hrs = rtc_tm->tm_hour;
	207	min = rtc_tm->tm_min;
	208	sec = rtc_tm->tm_sec;
	209
	210	if ((mon > 12) \|\| (day == 0)) {
	211	return -EINVAL;
	212	}
	213
	214	if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year)) {
	215	return -EINVAL;
	216	}
	217
	218	if ((hrs >= 24) \|\| (min >= 60) \|\| (sec >= 60)) {
	219	return -EINVAL;
	220	}
	221
	222	/*
	223	* each register is a different number of valid bits
	224	*/
fe20ba70 AB	225	sec = bin2bcd(sec) & 0x7f;
	226	min = bin2bcd(min) & 0x7f;
	227	hrs = bin2bcd(hrs) & 0x3f;
	228	day = bin2bcd(day) & 0x3f;
	229	mon = bin2bcd(mon) & 0x1f;
	230	yrs = bin2bcd(yrs) & 0xff;
	231	cen = bin2bcd(cen) & 0xff;
8f26795a AS	232
	233	spin_lock_irqsave(&ds1511_lock, flags);
	234	rtc_disable_update();
	235	rtc_write(cen, RTC_CENTURY);
	236	rtc_write(yrs, RTC_YEAR);
	237	rtc_write((rtc_read(RTC_MON) & 0xe0) \| mon, RTC_MON);
	238	rtc_write(day, RTC_DOM);
	239	rtc_write(hrs, RTC_HOUR);
	240	rtc_write(min, RTC_MIN);
	241	rtc_write(sec, RTC_SEC);
	242	rtc_write(dow, RTC_DOW);
	243	rtc_enable_update();
	244	spin_unlock_irqrestore(&ds1511_lock, flags);
	245
	246	return 0;
	247	}
	248
a3ed107e	249	static int ds1511_rtc_read_time(struct device dev, struct rtc_time rtc_tm)
8f26795a AS	250	{
8f26795a AS	251	unsigned int century;
9a0f4aea	252	unsigned long flags;
8f26795a AS	253
	254	spin_lock_irqsave(&ds1511_lock, flags);
	255	rtc_disable_update();
	256
	257	rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
	258	rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
	259	rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
	260	rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
	261	rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
	262	rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
	263	rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
	264	century = rtc_read(RTC_CENTURY);
	265
	266	rtc_enable_update();
	267	spin_unlock_irqrestore(&ds1511_lock, flags);
	268
fe20ba70 AB	269	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
	270	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
	271	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
	272	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
	273	rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
	274	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
	275	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
	276	century = bcd2bin(century) * 100;
8f26795a AS	277
	278	/*
	279	* Account for differences between how the RTC uses the values
	280	* and how they are defined in a struct rtc_time;
	281	*/
	282	century += rtc_tm->tm_year;
	283	rtc_tm->tm_year = century - 1900;
	284
	285	rtc_tm->tm_mon--;
	286
	287	if (rtc_valid_tm(rtc_tm) < 0) {
	288	dev_err(dev, "retrieved date/time is not valid.\n");
	289	rtc_time_to_tm(0, rtc_tm);
	290	}
	291	return 0;
	292	}
	293
	294	/*
	295	* write the alarm register settings
	296	*
	297	* we only have the use to interrupt every second, otherwise
	298	* known as the update interrupt, or the interrupt if the whole
	299	* date/hours/mins/secs matches. the ds1511 has many more
	300	* permutations, but the kernel doesn't.
	301	*/
	302	static void
	303	ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
	304	{
	305	unsigned long flags;
	306
ba4f3e47	307	spin_lock_irqsave(&pdata->lock, flags);
8f26795a	308	rtc_write(pdata->alrm_mday < 0 \|\| (pdata->irqen & RTC_UF) ?
fe20ba70	309	0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
8f26795a AS	310	RTC_ALARM_DATE);
8f26795a AS	311	rtc_write(pdata->alrm_hour < 0 \|\| (pdata->irqen & RTC_UF) ?
fe20ba70	312	0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
8f26795a AS	313	RTC_ALARM_HOUR);
8f26795a AS	314	rtc_write(pdata->alrm_min < 0 \|\| (pdata->irqen & RTC_UF) ?
fe20ba70	315	0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
8f26795a AS	316	RTC_ALARM_MIN);
8f26795a AS	317	rtc_write(pdata->alrm_sec < 0 \|\| (pdata->irqen & RTC_UF) ?
fe20ba70	318	0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
8f26795a AS	319	RTC_ALARM_SEC);
	320	rtc_write(rtc_read(RTC_CMD) \| (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
	321	rtc_read(RTC_CMD1); /* clear interrupts */
ba4f3e47	322	spin_unlock_irqrestore(&pdata->lock, flags);
8f26795a AS	323	}
	324
	325	static int
	326	ds1511_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	327	{
	328	struct platform_device *pdev = to_platform_device(dev);
	329	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	330
2fac6674	331	if (pdata->irq <= 0)
8f26795a	332	return -EINVAL;
2fac6674	333
8f26795a AS	334	pdata->alrm_mday = alrm->time.tm_mday;
	335	pdata->alrm_hour = alrm->time.tm_hour;
	336	pdata->alrm_min = alrm->time.tm_min;
	337	pdata->alrm_sec = alrm->time.tm_sec;
	338	if (alrm->enabled) {
	339	pdata->irqen \|= RTC_AF;
	340	}
	341	ds1511_rtc_update_alarm(pdata);
	342	return 0;
	343	}
	344
	345	static int
	346	ds1511_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	347	{
	348	struct platform_device *pdev = to_platform_device(dev);
	349	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	350
2fac6674	351	if (pdata->irq <= 0)
8f26795a	352	return -EINVAL;
2fac6674	353
8f26795a AS	354	alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
	355	alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
	356	alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
	357	alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
	358	alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
	359	return 0;
	360	}
	361
	362	static irqreturn_t
	363	ds1511_interrupt(int irq, void *dev_id)
	364	{
	365	struct platform_device *pdev = dev_id;
	366	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
ba4f3e47	367	unsigned long events = 0;
8f26795a	368
ba4f3e47	369	spin_lock(&pdata->lock);
8f26795a AS	370	/*
	371	* read and clear interrupt
	372	*/
ba4f3e47 AN	373	if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
	374	events = RTC_IRQF;
	375	if (rtc_read(RTC_ALARM_SEC) & 0x80)
	376	events \|= RTC_UF;
	377	else
	378	events \|= RTC_AF;
	379	if (likely(pdata->rtc))
	380	rtc_update_irq(pdata->rtc, 1, events);
	381	}
	382	spin_unlock(&pdata->lock);
	383	return events ? IRQ_HANDLED : IRQ_NONE;
8f26795a AS	384	}
8f26795a AS	385
ba4f3e47	386	static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
8f26795a AS	387	{
	388	struct platform_device *pdev = to_platform_device(dev);
	389	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	390
ba4f3e47 AN	391	if (pdata->irq <= 0)
	392	return -EINVAL;
	393	if (enabled)
8f26795a	394	pdata->irqen \|= RTC_AF;
ba4f3e47 AN	395	else
	396	pdata->irqen &= ~RTC_AF;
	397	ds1511_rtc_update_alarm(pdata);
	398	return 0;
	399	}
	400
8f26795a	401	static const struct rtc_class_ops ds1511_rtc_ops = {
ba4f3e47 AN	402	.read_time = ds1511_rtc_read_time,
	403	.set_time = ds1511_rtc_set_time,
	404	.read_alarm = ds1511_rtc_read_alarm,
	405	.set_alarm = ds1511_rtc_set_alarm,
	406	.alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
8f26795a AS	407	};
	408
	409	static ssize_t
2c3c8bea CW	410	ds1511_nvram_read(struct file filp, struct kobject kobj,
	411	struct bin_attribute *ba,
	412	char *buf, loff_t pos, size_t size)
8f26795a AS	413	{
	414	ssize_t count;
	415
	416	/*
	417	* if count is more than one, turn on "burst" mode
	418	* turn it off when you're done
	419	*/
	420	if (size > 1) {
	421	rtc_write((rtc_read(RTC_CMD) \| DS1511_BME), RTC_CMD);
	422	}
	423	if (pos > DS1511_RAM_MAX) {
	424	pos = DS1511_RAM_MAX;
	425	}
	426	if (size + pos > DS1511_RAM_MAX + 1) {
	427	size = DS1511_RAM_MAX - pos + 1;
	428	}
	429	rtc_write(pos, DS1511_RAMADDR_LSB);
	430	for (count = 0; size > 0; count++, size--) {
	431	*buf++ = rtc_read(DS1511_RAMDATA);
	432	}
	433	if (count > 1) {
	434	rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
	435	}
	436	return count;
	437	}
	438
	439	static ssize_t
2c3c8bea CW	440	ds1511_nvram_write(struct file filp, struct kobject kobj,
	441	struct bin_attribute *bin_attr,
	442	char *buf, loff_t pos, size_t size)
8f26795a AS	443	{
	444	ssize_t count;
	445
	446	/*
	447	* if count is more than one, turn on "burst" mode
	448	* turn it off when you're done
	449	*/
	450	if (size > 1) {
	451	rtc_write((rtc_read(RTC_CMD) \| DS1511_BME), RTC_CMD);
	452	}
	453	if (pos > DS1511_RAM_MAX) {
	454	pos = DS1511_RAM_MAX;
	455	}
	456	if (size + pos > DS1511_RAM_MAX + 1) {
	457	size = DS1511_RAM_MAX - pos + 1;
	458	}
	459	rtc_write(pos, DS1511_RAMADDR_LSB);
	460	for (count = 0; size > 0; count++, size--) {
	461	rtc_write(*buf++, DS1511_RAMDATA);
	462	}
	463	if (count > 1) {
	464	rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
	465	}
	466	return count;
	467	}
	468
	469	static struct bin_attribute ds1511_nvram_attr = {
	470	.attr = {
	471	.name = "nvram",
49d50fb1	472	.mode = S_IRUGO \| S_IWUSR,
8f26795a AS	473	},
	474	.size = DS1511_RAM_MAX,
	475	.read = ds1511_nvram_read,
	476	.write = ds1511_nvram_write,
	477	};
	478
5a167f45	479	static int ds1511_rtc_probe(struct platform_device *pdev)
8f26795a AS	480	{
	481	struct rtc_device *rtc;
	482	struct resource *res;
ba4f3e47	483	struct rtc_plat_data *pdata;
8f26795a AS	484	int ret = 0;
	485
	486	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	487	if (!res) {
	488	return -ENODEV;
	489	}
ba4f3e47 AN	490	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
ba4f3e47 AN	491	if (!pdata)
8f26795a	492	return -ENOMEM;
28f65c11	493	pdata->size = resource_size(res);
ba4f3e47 AN	494	if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size,
	495	pdev->name))
	496	return -EBUSY;
	497	ds1511_base = devm_ioremap(&pdev->dev, res->start, pdata->size);
	498	if (!ds1511_base)
	499	return -ENOMEM;
8f26795a AS	500	pdata->ioaddr = ds1511_base;
	501	pdata->irq = platform_get_irq(pdev, 0);
	502
	503	/*
	504	* turn on the clock and the crystal, etc.
	505	*/
	506	rtc_write(0, RTC_CMD);
	507	rtc_write(0, RTC_CMD1);
	508	/*
	509	* clear the wdog counter
	510	*/
	511	rtc_write(0, DS1511_WD_MSEC);
	512	rtc_write(0, DS1511_WD_SEC);
	513	/*
	514	* start the clock
	515	*/
	516	rtc_enable_update();
	517
	518	/*
	519	* check for a dying bat-tree
	520	*/
	521	if (rtc_read(RTC_CMD1) & DS1511_BLF1) {
	522	dev_warn(&pdev->dev, "voltage-low detected.\n");
	523	}
	524
ba4f3e47 AN	525	spin_lock_init(&pdata->lock);
ba4f3e47 AN	526	platform_set_drvdata(pdev, pdata);
8f26795a AS	527	/*
	528	* if the platform has an interrupt in mind for this device,
	529	* then by all means, set it
	530	*/
2fac6674	531	if (pdata->irq > 0) {
8f26795a	532	rtc_read(RTC_CMD1);
ba4f3e47	533	if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
2f6e5f94	534	IRQF_SHARED, pdev->name, pdev) < 0) {
8f26795a AS	535
8f26795a AS	536	dev_warn(&pdev->dev, "interrupt not available.\n");
2fac6674	537	pdata->irq = 0;
8f26795a AS	538	}
	539	}
	540
f650e657 JH	541	rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &ds1511_rtc_ops,
f650e657 JH	542	THIS_MODULE);
ba4f3e47 AN	543	if (IS_ERR(rtc))
ba4f3e47 AN	544	return PTR_ERR(rtc);
8f26795a	545	pdata->rtc = rtc;
ba4f3e47	546
8f26795a	547	ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
f650e657	548
8f26795a AS	549	return ret;
	550	}
	551
5a167f45	552	static int ds1511_rtc_remove(struct platform_device *pdev)
8f26795a AS	553	{
	554	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
	555
	556	sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
2fac6674	557	if (pdata->irq > 0) {
8f26795a AS	558	/*
	559	* disable the alarm interrupt
	560	*/
	561	rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
	562	rtc_read(RTC_CMD1);
8f26795a	563	}
8f26795a AS	564	return 0;
	565	}
	566
ad28a07b KS	567	/* work with hotplug and coldplug */
	568	MODULE_ALIAS("platform:ds1511");
	569
8f26795a AS	570	static struct platform_driver ds1511_rtc_driver = {
8f26795a AS	571	.probe = ds1511_rtc_probe,
5a167f45	572	.remove = ds1511_rtc_remove,
8f26795a AS	573	.driver = {
	574	.name = "ds1511",
	575	.owner = THIS_MODULE,
	576	},
	577	};
	578
0c4eae66	579	module_platform_driver(ds1511_rtc_driver);
8f26795a	580
5b73a41c	581	MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
8f26795a AS	582	MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
	583	MODULE_LICENSE("GPL");
	584	MODULE_VERSION(DRV_VERSION);