Merge tag 'v3.10.101' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / tps51632-regulator.c
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1/*
2 * tps51632-regulator.c -- TI TPS51632
3 *
4 * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless
5 * Controller with serial VID control and DVFS.
6 *
7 * Copyright (c) 2012, NVIDIA Corporation.
8 *
9 * Author: Laxman Dewangan <ldewangan@nvidia.com>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation version 2.
14 *
15 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
16 * whether express or implied; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
23 * 02111-1307, USA
24 */
25
26#include <linux/err.h>
27#include <linux/i2c.h>
28#include <linux/init.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
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31#include <linux/of.h>
32#include <linux/of_device.h>
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33#include <linux/platform_device.h>
34#include <linux/regmap.h>
35#include <linux/regulator/driver.h>
36#include <linux/regulator/machine.h>
c51ce403 37#include <linux/regulator/of_regulator.h>
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38#include <linux/regulator/tps51632-regulator.h>
39#include <linux/slab.h>
40
41/* Register definitions */
42#define TPS51632_VOLTAGE_SELECT_REG 0x0
43#define TPS51632_VOLTAGE_BASE_REG 0x1
44#define TPS51632_OFFSET_REG 0x2
45#define TPS51632_IMON_REG 0x3
46#define TPS51632_VMAX_REG 0x4
47#define TPS51632_DVFS_CONTROL_REG 0x5
48#define TPS51632_POWER_STATE_REG 0x6
49#define TPS51632_SLEW_REGS 0x7
50#define TPS51632_FAULT_REG 0x14
51
52#define TPS51632_MAX_REG 0x15
53
54#define TPS51632_VOUT_MASK 0x7F
55#define TPS51632_VOUT_OFFSET_MASK 0x1F
56#define TPS51632_VMAX_MASK 0x7F
57#define TPS51632_VMAX_LOCK 0x80
58
59/* TPS51632_DVFS_CONTROL_REG */
60#define TPS51632_DVFS_PWMEN 0x1
61#define TPS51632_DVFS_STEP_20 0x2
62#define TPS51632_DVFS_VMAX_PG 0x4
63#define TPS51632_DVFS_PWMRST 0x8
64#define TPS51632_DVFS_OCA_EN 0x10
65#define TPS51632_DVFS_FCCM 0x20
66
67/* TPS51632_POWER_STATE_REG */
68#define TPS51632_POWER_STATE_MASK 0x03
69#define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x0
70#define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1
71#define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2
72
73#define TPS51632_MIN_VOLATGE 500000
74#define TPS51632_MAX_VOLATGE 1520000
75#define TPS51632_VOLATGE_STEP_10mV 10000
76#define TPS51632_VOLATGE_STEP_20mV 20000
77#define TPS51632_MAX_VSEL 0x7F
78#define TPS51632_MIN_VSEL 0x19
79#define TPS51632_DEFAULT_RAMP_DELAY 6000
80#define TPS51632_VOLT_VSEL(uV) \
81 (DIV_ROUND_UP(uV - TPS51632_MIN_VOLATGE, \
82 TPS51632_VOLATGE_STEP_10mV) + \
83 TPS51632_MIN_VSEL)
84
85/* TPS51632 chip information */
86struct tps51632_chip {
87 struct device *dev;
88 struct regulator_desc desc;
89 struct regulator_dev *rdev;
90 struct regmap *regmap;
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91};
92
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93static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,
94 int ramp_delay)
95{
96 struct tps51632_chip *tps = rdev_get_drvdata(rdev);
97 int bit = ramp_delay/6000;
98 int ret;
99
100 if (bit)
101 bit--;
102 ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
103 if (ret < 0)
104 dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);
105 return ret;
106}
107
108static struct regulator_ops tps51632_dcdc_ops = {
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109 .get_voltage_sel = regulator_get_voltage_sel_regmap,
110 .set_voltage_sel = regulator_set_voltage_sel_regmap,
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111 .list_voltage = regulator_list_voltage_linear,
112 .set_voltage_time_sel = regulator_set_voltage_time_sel,
113 .set_ramp_delay = tps51632_dcdc_set_ramp_delay,
114};
115
a5023574 116static int tps51632_init_dcdc(struct tps51632_chip *tps,
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117 struct tps51632_regulator_platform_data *pdata)
118{
119 int ret;
120 uint8_t control = 0;
121 int vsel;
122
123 if (!pdata->enable_pwm_dvfs)
124 goto skip_pwm_config;
125
126 control |= TPS51632_DVFS_PWMEN;
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127 vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV);
128 ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel);
129 if (ret < 0) {
130 dev_err(tps->dev, "BASE reg write failed, err %d\n", ret);
131 return ret;
132 }
133
134 if (pdata->dvfs_step_20mV)
135 control |= TPS51632_DVFS_STEP_20;
136
137 if (pdata->max_voltage_uV) {
138 unsigned int vmax;
139 /**
140 * TPS51632 hw behavior: VMAX register can be write only
141 * once as it get locked after first write. The lock get
142 * reset only when device is power-reset.
143 * Write register only when lock bit is not enabled.
144 */
145 ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax);
146 if (ret < 0) {
147 dev_err(tps->dev, "VMAX read failed, err %d\n", ret);
148 return ret;
149 }
150 if (!(vmax & TPS51632_VMAX_LOCK)) {
151 vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV);
152 ret = regmap_write(tps->regmap, TPS51632_VMAX_REG,
153 vsel);
154 if (ret < 0) {
155 dev_err(tps->dev,
156 "VMAX write failed, err %d\n", ret);
157 return ret;
158 }
159 }
160 }
161
162skip_pwm_config:
163 ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control);
164 if (ret < 0)
165 dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret);
166 return ret;
167}
168
faa3b2d5 169static bool is_volatile_reg(struct device *dev, unsigned int reg)
0c570674 170{
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171 switch (reg) {
172 case TPS51632_OFFSET_REG:
173 case TPS51632_FAULT_REG:
174 case TPS51632_IMON_REG:
175 return true;
176 default:
0c570674 177 return false;
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178 }
179}
180
181static bool is_read_reg(struct device *dev, unsigned int reg)
182{
183 switch (reg) {
184 case 0x08 ... 0x0F:
185 return false;
186 default:
187 return true;
188 }
189}
190
191static bool is_write_reg(struct device *dev, unsigned int reg)
192{
193 switch (reg) {
194 case TPS51632_VOLTAGE_SELECT_REG:
195 case TPS51632_VOLTAGE_BASE_REG:
196 case TPS51632_VMAX_REG:
197 case TPS51632_DVFS_CONTROL_REG:
198 case TPS51632_POWER_STATE_REG:
199 case TPS51632_SLEW_REGS:
200 return true;
201 default:
202 return false;
203 }
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204}
205
206static const struct regmap_config tps51632_regmap_config = {
207 .reg_bits = 8,
208 .val_bits = 8,
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209 .writeable_reg = is_write_reg,
210 .readable_reg = is_read_reg,
211 .volatile_reg = is_volatile_reg,
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212 .max_register = TPS51632_MAX_REG - 1,
213 .cache_type = REGCACHE_RBTREE,
214};
215
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216#if defined(CONFIG_OF)
217static const struct of_device_id tps51632_of_match[] = {
218 { .compatible = "ti,tps51632",},
219 {},
220};
221MODULE_DEVICE_TABLE(of, tps51632_of_match);
222
223static struct tps51632_regulator_platform_data *
224 of_get_tps51632_platform_data(struct device *dev)
225{
226 struct tps51632_regulator_platform_data *pdata;
227 struct device_node *np = dev->of_node;
228
229 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
230 if (!pdata) {
231 dev_err(dev, "Memory alloc failed for platform data\n");
232 return NULL;
233 }
234
235 pdata->reg_init_data = of_get_regulator_init_data(dev, dev->of_node);
236 if (!pdata->reg_init_data) {
237 dev_err(dev, "Not able to get OF regulator init data\n");
238 return NULL;
239 }
240
241 pdata->enable_pwm_dvfs =
242 of_property_read_bool(np, "ti,enable-pwm-dvfs");
243 pdata->dvfs_step_20mV = of_property_read_bool(np, "ti,dvfs-step-20mV");
244
245 pdata->base_voltage_uV = pdata->reg_init_data->constraints.min_uV ? :
246 TPS51632_MIN_VOLATGE;
247 pdata->max_voltage_uV = pdata->reg_init_data->constraints.max_uV ? :
248 TPS51632_MAX_VOLATGE;
249 return pdata;
250}
251#else
252static struct tps51632_regulator_platform_data *
253 of_get_tps51632_platform_data(struct device *dev)
254{
255 return NULL;
256}
257#endif
258
a5023574 259static int tps51632_probe(struct i2c_client *client,
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260 const struct i2c_device_id *id)
261{
262 struct tps51632_regulator_platform_data *pdata;
263 struct regulator_dev *rdev;
264 struct tps51632_chip *tps;
265 int ret;
266 struct regulator_config config = { };
267
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268 if (client->dev.of_node) {
269 const struct of_device_id *match;
270 match = of_match_device(of_match_ptr(tps51632_of_match),
271 &client->dev);
272 if (!match) {
273 dev_err(&client->dev, "Error: No device match found\n");
274 return -ENODEV;
275 }
276 }
277
0c570674 278 pdata = client->dev.platform_data;
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279 if (!pdata && client->dev.of_node)
280 pdata = of_get_tps51632_platform_data(&client->dev);
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281 if (!pdata) {
282 dev_err(&client->dev, "No Platform data\n");
283 return -EINVAL;
284 }
285
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286 if (pdata->enable_pwm_dvfs) {
287 if ((pdata->base_voltage_uV < TPS51632_MIN_VOLATGE) ||
288 (pdata->base_voltage_uV > TPS51632_MAX_VOLATGE)) {
289 dev_err(&client->dev, "Invalid base_voltage_uV setting\n");
290 return -EINVAL;
291 }
292
293 if ((pdata->max_voltage_uV) &&
294 ((pdata->max_voltage_uV < TPS51632_MIN_VOLATGE) ||
295 (pdata->max_voltage_uV > TPS51632_MAX_VOLATGE))) {
296 dev_err(&client->dev, "Invalid max_voltage_uV setting\n");
297 return -EINVAL;
298 }
299 }
300
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301 tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
302 if (!tps) {
303 dev_err(&client->dev, "Memory allocation failed\n");
304 return -ENOMEM;
305 }
306
307 tps->dev = &client->dev;
308 tps->desc.name = id->name;
309 tps->desc.id = 0;
310 tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY;
311 tps->desc.min_uV = TPS51632_MIN_VOLATGE;
312 tps->desc.uV_step = TPS51632_VOLATGE_STEP_10mV;
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313 tps->desc.linear_min_sel = TPS51632_MIN_VSEL;
314 tps->desc.n_voltages = TPS51632_MAX_VSEL + 1;
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315 tps->desc.ops = &tps51632_dcdc_ops;
316 tps->desc.type = REGULATOR_VOLTAGE;
317 tps->desc.owner = THIS_MODULE;
318
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319 if (pdata->enable_pwm_dvfs)
320 tps->desc.vsel_reg = TPS51632_VOLTAGE_BASE_REG;
321 else
322 tps->desc.vsel_reg = TPS51632_VOLTAGE_SELECT_REG;
323 tps->desc.vsel_mask = TPS51632_VOUT_MASK;
324
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325 tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config);
326 if (IS_ERR(tps->regmap)) {
327 ret = PTR_ERR(tps->regmap);
328 dev_err(&client->dev, "regmap init failed, err %d\n", ret);
329 return ret;
330 }
331 i2c_set_clientdata(client, tps);
332
333 ret = tps51632_init_dcdc(tps, pdata);
334 if (ret < 0) {
335 dev_err(tps->dev, "Init failed, err = %d\n", ret);
336 return ret;
337 }
338
339 /* Register the regulators */
340 config.dev = &client->dev;
341 config.init_data = pdata->reg_init_data;
342 config.driver_data = tps;
343 config.regmap = tps->regmap;
344 config.of_node = client->dev.of_node;
345
346 rdev = regulator_register(&tps->desc, &config);
347 if (IS_ERR(rdev)) {
348 dev_err(tps->dev, "regulator register failed\n");
349 return PTR_ERR(rdev);
350 }
351
352 tps->rdev = rdev;
353 return 0;
354}
355
8dc995f5 356static int tps51632_remove(struct i2c_client *client)
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357{
358 struct tps51632_chip *tps = i2c_get_clientdata(client);
359
360 regulator_unregister(tps->rdev);
361 return 0;
362}
363
364static const struct i2c_device_id tps51632_id[] = {
365 {.name = "tps51632",},
366 {},
367};
368
369MODULE_DEVICE_TABLE(i2c, tps51632_id);
370
371static struct i2c_driver tps51632_i2c_driver = {
372 .driver = {
373 .name = "tps51632",
374 .owner = THIS_MODULE,
c51ce403 375 .of_match_table = of_match_ptr(tps51632_of_match),
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376 },
377 .probe = tps51632_probe,
5eb9f2b9 378 .remove = tps51632_remove,
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379 .id_table = tps51632_id,
380};
381
382static int __init tps51632_init(void)
383{
384 return i2c_add_driver(&tps51632_i2c_driver);
385}
386subsys_initcall(tps51632_init);
387
388static void __exit tps51632_cleanup(void)
389{
390 i2c_del_driver(&tps51632_i2c_driver);
391}
392module_exit(tps51632_cleanup);
393
394MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
395MODULE_DESCRIPTION("TPS51632 voltage regulator driver");
396MODULE_LICENSE("GPL v2");