[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / lp3972.c

/*
 * Regulator driver for National Semiconductors LP3972 PMIC chip
 *
 * Based on lp3971.c
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/bug.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/lp3972.h>
#include <linux/slab.h>

struct lp3972 {
	struct device *dev;
	struct mutex io_lock;
	struct i2c_client *i2c;
	int num_regulators;
	struct regulator_dev **rdev;
};

/* LP3972 Control Registers */
#define LP3972_SCR_REG		0x07
#define LP3972_OVER1_REG	0x10
#define LP3972_OVSR1_REG	0x11
#define LP3972_OVER2_REG	0x12
#define LP3972_OVSR2_REG	0x13
#define LP3972_VCC1_REG		0x20
#define LP3972_ADTV1_REG	0x23
#define LP3972_ADTV2_REG	0x24
#define LP3972_AVRC_REG		0x25
#define LP3972_CDTC1_REG	0x26
#define LP3972_CDTC2_REG	0x27
#define LP3972_SDTV1_REG	0x29
#define LP3972_SDTV2_REG	0x2A
#define LP3972_MDTV1_REG	0x32
#define LP3972_MDTV2_REG	0x33
#define LP3972_L2VCR_REG	0x39
#define LP3972_L34VCR_REG	0x3A
#define LP3972_SCR1_REG		0x80
#define LP3972_SCR2_REG		0x81
#define LP3972_OEN3_REG		0x82
#define LP3972_OSR3_REG		0x83
#define LP3972_LOER4_REG	0x84
#define LP3972_B2TV_REG		0x85
#define LP3972_B3TV_REG		0x86
#define LP3972_B32RC_REG	0x87
#define LP3972_ISRA_REG		0x88
#define LP3972_BCCR_REG		0x89
#define LP3972_II1RR_REG	0x8E
#define LP3972_II2RR_REG	0x8F

#define LP3972_SYS_CONTROL1_REG		LP3972_SCR1_REG
/* System control register 1 initial value,
 * bits 5, 6 and 7 are EPROM programmable */
#define SYS_CONTROL1_INIT_VAL		0x02
#define SYS_CONTROL1_INIT_MASK		0x1F

#define LP3972_VOL_CHANGE_REG		LP3972_VCC1_REG
#define LP3972_VOL_CHANGE_FLAG_GO	0x01
#define LP3972_VOL_CHANGE_FLAG_MASK	0x03

/* LDO output enable mask */
#define LP3972_OEN3_L1EN	BIT(0)
#define LP3972_OVER2_LDO2_EN	BIT(2)
#define LP3972_OVER2_LDO3_EN	BIT(3)
#define LP3972_OVER2_LDO4_EN	BIT(4)
#define LP3972_OVER1_S_EN	BIT(2)

static const unsigned int ldo1_voltage_map[] = {
	1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
	1900000, 1925000, 1950000, 1975000, 2000000,
};

static const unsigned int ldo23_voltage_map[] = {
	1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
	2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
};

static const unsigned int ldo4_voltage_map[] = {
	1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
	1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
};

static const unsigned int ldo5_voltage_map[] = {
	      0,       0,       0,       0,       0,  850000,  875000,  900000,
	 925000,  950000,  975000, 1000000, 1025000, 1050000, 1075000, 1100000,
	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
};

static const unsigned int buck1_voltage_map[] = {
	 725000,  750000,  775000,  800000,  825000,  850000,  875000,  900000,
	 925000,  950000,  975000, 1000000, 1025000, 1050000, 1075000, 1100000,
	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
};

static const unsigned int buck23_voltage_map[] = {
	      0,  800000,  850000,  900000,  950000, 1000000, 1050000, 1100000,
	1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
	1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
	3000000, 3300000,
};

static const int ldo_output_enable_mask[] = {
	LP3972_OEN3_L1EN,
	LP3972_OVER2_LDO2_EN,
	LP3972_OVER2_LDO3_EN,
	LP3972_OVER2_LDO4_EN,
	LP3972_OVER1_S_EN,
};

static const int ldo_output_enable_addr[] = {
	LP3972_OEN3_REG,
	LP3972_OVER2_REG,
	LP3972_OVER2_REG,
	LP3972_OVER2_REG,
	LP3972_OVER1_REG,
};

static const int ldo_vol_ctl_addr[] = {
	LP3972_MDTV1_REG,
	LP3972_L2VCR_REG,
	LP3972_L34VCR_REG,
	LP3972_L34VCR_REG,
	LP3972_SDTV1_REG,
};

static const int buck_vol_enable_addr[] = {
	LP3972_OVER1_REG,
	LP3972_OEN3_REG,
	LP3972_OEN3_REG,
};

static const int buck_base_addr[] = {
	LP3972_ADTV1_REG,
	LP3972_B2TV_REG,
	LP3972_B3TV_REG,
};

#define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
#define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])

/*	LDO voltage control registers shift:
	LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
	LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
	LP3972_LDO5 -> 0
*/
#define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
#define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
#define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)

#define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
#define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
#define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)

#define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
#define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
#define LP3972_BUCK_VOL_MASK 0x1f

static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
	u16 *dest)
{
	int ret;

	if (count != 1)
		return -EIO;
	ret = i2c_smbus_read_byte_data(i2c, reg);
	if (ret < 0)
		return ret;

	*dest = ret;
	return 0;
}

static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
	const u16 *src)
{
	if (count != 1)
		return -EIO;
	return i2c_smbus_write_byte_data(i2c, reg, *src);
}

static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
{
	u16 val = 0;

	mutex_lock(&lp3972->io_lock);

	lp3972_i2c_read(lp3972->i2c, reg, 1, &val);

	dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
		(unsigned)val & 0xff);

	mutex_unlock(&lp3972->io_lock);

	return val & 0xff;
}

static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
{
	u16 tmp;
	int ret;

	mutex_lock(&lp3972->io_lock);

	ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
	tmp = (tmp & ~mask) | val;
	if (ret == 0) {
		ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
		dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
			(unsigned)val & 0xff);
	}
	mutex_unlock(&lp3972->io_lock);

	return ret;
}

static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
	u16 val;

	val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
	return !!(val & mask);
}

static int lp3972_ldo_enable(struct regulator_dev *dev)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);

	return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
				mask, mask);
}

static int lp3972_ldo_disable(struct regulator_dev *dev)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);

	return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
				mask, 0);
}

static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	u16 mask = LP3972_LDO_VOL_MASK(ldo);
	u16 val, reg;

	reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
	val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;

	return val;
}

static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,
				      unsigned int selector)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	int shift, ret;

	shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
	ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
		LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);

	if (ret)
		return ret;

	/*
	 * LDO1 and LDO5 support voltage control by either target voltage1
	 * or target voltage2 register.
	 * We use target voltage1 register for LDO1 and LDO5 in this driver.
	 * We need to update voltage change control register(0x20) to enable
	 * LDO1 and LDO5 to change to their programmed target values.
	 */
	switch (ldo) {
	case LP3972_LDO1:
	case LP3972_LDO5:
		shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
		ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
			LP3972_VOL_CHANGE_FLAG_MASK << shift,
			LP3972_VOL_CHANGE_FLAG_GO << shift);
		if (ret)
			return ret;

		ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
			LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
		break;
	}

	return ret;
}

static struct regulator_ops lp3972_ldo_ops = {
	.list_voltage = regulator_list_voltage_table,
	.map_voltage = regulator_map_voltage_ascend,
	.is_enabled = lp3972_ldo_is_enabled,
	.enable = lp3972_ldo_enable,
	.disable = lp3972_ldo_disable,
	.get_voltage_sel = lp3972_ldo_get_voltage_sel,
	.set_voltage_sel = lp3972_ldo_set_voltage_sel,
};

static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	u16 mask = 1 << (buck * 2);
	u16 val;

	val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
	return !!(val & mask);
}

static int lp3972_dcdc_enable(struct regulator_dev *dev)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	u16 mask = 1 << (buck * 2);
	u16 val;

	val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
				mask, mask);
	return val;
}

static int lp3972_dcdc_disable(struct regulator_dev *dev)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	u16 mask = 1 << (buck * 2);
	u16 val;

	val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
				mask, 0);
	return val;
}

static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	u16 reg;

	reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
	reg &= LP3972_BUCK_VOL_MASK;

	return reg;
}

static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,
				       unsigned int selector)
{
	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	int ret;

	ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
				LP3972_BUCK_VOL_MASK, selector);
	if (ret)
		return ret;

	if (buck != 0)
		return ret;

	ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
		LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
	if (ret)
		return ret;

	return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
				LP3972_VOL_CHANGE_FLAG_MASK, 0);
}

static struct regulator_ops lp3972_dcdc_ops = {
	.list_voltage = regulator_list_voltage_table,
	.map_voltage = regulator_map_voltage_ascend,
	.is_enabled = lp3972_dcdc_is_enabled,
	.enable = lp3972_dcdc_enable,
	.disable = lp3972_dcdc_disable,
	.get_voltage_sel = lp3972_dcdc_get_voltage_sel,
	.set_voltage_sel = lp3972_dcdc_set_voltage_sel,
};

static const struct regulator_desc regulators[] = {
	{
		.name = "LDO1",
		.id = LP3972_LDO1,
		.ops = &lp3972_ldo_ops,
		.n_voltages = ARRAY_SIZE(ldo1_voltage_map),
		.volt_table = ldo1_voltage_map,
		.type = REGULATOR_VOLTAGE,
		.owner = THIS_MODULE,
	},
	{
		.name = "LDO2",
		.id = LP3972_LDO2,
		.ops = &lp3972_ldo_ops,
		.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
		.volt_table = ldo23_voltage_map,
		.type = REGULATOR_VOLTAGE,
		.owner = THIS_MODULE,
	},
	{
		.name = "LDO3",
		.id = LP3972_LDO3,
		.ops = &lp3972_ldo_ops,
		.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
		.volt_table = ldo23_voltage_map,
		.type = REGULATOR_VOLTAGE,
		.owner = THIS_MODULE,
	},
	{
		.name = "LDO4",
		.id = LP3972_LDO4,
		.ops = &lp3972_ldo_ops,
		.n_voltages = ARRAY_SIZE(ldo4_voltage_map),
		.volt_table = ldo4_voltage_map,
		.type = REGULATOR_VOLTAGE,
		.owner = THIS_MODULE,
	},
	{
		.name = "LDO5",
		.id = LP3972_LDO5,
		.ops = &lp3972_ldo_ops,
		.n_voltages = ARRAY_SIZE(ldo5_voltage_map),
		.volt_table = ldo5_voltage_map,
		.type = REGULATOR_VOLTAGE,
		.owner = THIS_MODULE,
	},
	{
		.name = "DCDC1",
		.id = LP3972_DCDC1,
		.ops = &lp3972_dcdc_ops,
		.n_voltages = ARRAY_SIZE(buck1_voltage_map),
		.volt_table = buck1_voltage_map,
		.type = REGULATOR_VOLTAGE,
		.owner = THIS_MODULE,
	},
	{
		.name = "DCDC2",
		.id = LP3972_DCDC2,
		.ops = &lp3972_dcdc_ops,
		.n_voltages = ARRAY_SIZE(buck23_voltage_map),
		.volt_table = buck23_voltage_map,
		.type = REGULATOR_VOLTAGE,
		.owner = THIS_MODULE,
	},
	{
		.name = "DCDC3",
		.id = LP3972_DCDC3,
		.ops = &lp3972_dcdc_ops,
		.n_voltages = ARRAY_SIZE(buck23_voltage_map),
		.volt_table = buck23_voltage_map,
		.type = REGULATOR_VOLTAGE,
		.owner = THIS_MODULE,
	},
};

static int setup_regulators(struct lp3972 *lp3972,
	struct lp3972_platform_data *pdata)
{
	int i, err;

	lp3972->num_regulators = pdata->num_regulators;
	lp3972->rdev = kcalloc(pdata->num_regulators,
				sizeof(struct regulator_dev *), GFP_KERNEL);
	if (!lp3972->rdev) {
		err = -ENOMEM;
		goto err_nomem;
	}

	/* Instantiate the regulators */
	for (i = 0; i < pdata->num_regulators; i++) {
		struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
		struct regulator_config config = { };

		config.dev = lp3972->dev;
		config.init_data = reg->initdata;
		config.driver_data = lp3972;

		lp3972->rdev[i] = regulator_register(&regulators[reg->id],
						     &config);
		if (IS_ERR(lp3972->rdev[i])) {
			err = PTR_ERR(lp3972->rdev[i]);
			dev_err(lp3972->dev, "regulator init failed: %d\n",
				err);
			goto error;
		}
	}

	return 0;
error:
	while (--i >= 0)
		regulator_unregister(lp3972->rdev[i]);
	kfree(lp3972->rdev);
	lp3972->rdev = NULL;
err_nomem:
	return err;
}

static int lp3972_i2c_probe(struct i2c_client *i2c,
			    const struct i2c_device_id *id)
{
	struct lp3972 *lp3972;
	struct lp3972_platform_data *pdata = i2c->dev.platform_data;
	int ret;
	u16 val;

	if (!pdata) {
		dev_dbg(&i2c->dev, "No platform init data supplied\n");
		return -ENODEV;
	}

	lp3972 = kzalloc(sizeof(struct lp3972), GFP_KERNEL);
	if (!lp3972)
		return -ENOMEM;

	lp3972->i2c = i2c;
	lp3972->dev = &i2c->dev;

	mutex_init(&lp3972->io_lock);

	/* Detect LP3972 */
	ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
	if (ret == 0 &&
		(val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
		ret = -ENODEV;
		dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
	}
	if (ret < 0) {
		dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
		goto err_detect;
	}

	ret = setup_regulators(lp3972, pdata);
	if (ret < 0)
		goto err_detect;

	i2c_set_clientdata(i2c, lp3972);
	return 0;

err_detect:
	kfree(lp3972);
	return ret;
}

static int lp3972_i2c_remove(struct i2c_client *i2c)
{
	struct lp3972 *lp3972 = i2c_get_clientdata(i2c);
	int i;

	for (i = 0; i < lp3972->num_regulators; i++)
		regulator_unregister(lp3972->rdev[i]);
	kfree(lp3972->rdev);
	kfree(lp3972);

	return 0;
}

static const struct i2c_device_id lp3972_i2c_id[] = {
	{ "lp3972", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);

static struct i2c_driver lp3972_i2c_driver = {
	.driver = {
		.name = "lp3972",
		.owner = THIS_MODULE,
	},
	.probe    = lp3972_i2c_probe,
	.remove   = lp3972_i2c_remove,
	.id_table = lp3972_i2c_id,
};

static int __init lp3972_module_init(void)
{
	return i2c_add_driver(&lp3972_i2c_driver);
}
subsys_initcall(lp3972_module_init);

static void __exit lp3972_module_exit(void)
{
	i2c_del_driver(&lp3972_i2c_driver);
}
module_exit(lp3972_module_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
MODULE_DESCRIPTION("LP3972 PMIC driver");
Commit	Line	Data
5976f095 AL	1	/*
	2	* Regulator driver for National Semiconductors LP3972 PMIC chip
	3	*
	4	* Based on lp3971.c
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11
	12	#include <linux/bug.h>
	13	#include <linux/err.h>
	14	#include <linux/i2c.h>
65602c32	15	#include <linux/module.h>
5976f095 AL	16	#include <linux/kernel.h>
	17	#include <linux/regulator/driver.h>
	18	#include <linux/regulator/lp3972.h>
	19	#include <linux/slab.h>
	20
	21	struct lp3972 {
	22	struct device *dev;
	23	struct mutex io_lock;
	24	struct i2c_client *i2c;
	25	int num_regulators;
	26	struct regulator_dev **rdev;
	27	};
	28
	29	/* LP3972 Control Registers */
	30	#define LP3972_SCR_REG 0x07
	31	#define LP3972_OVER1_REG 0x10
	32	#define LP3972_OVSR1_REG 0x11
	33	#define LP3972_OVER2_REG 0x12
	34	#define LP3972_OVSR2_REG 0x13
	35	#define LP3972_VCC1_REG 0x20
	36	#define LP3972_ADTV1_REG 0x23
	37	#define LP3972_ADTV2_REG 0x24
	38	#define LP3972_AVRC_REG 0x25
	39	#define LP3972_CDTC1_REG 0x26
	40	#define LP3972_CDTC2_REG 0x27
	41	#define LP3972_SDTV1_REG 0x29
	42	#define LP3972_SDTV2_REG 0x2A
	43	#define LP3972_MDTV1_REG 0x32
	44	#define LP3972_MDTV2_REG 0x33
	45	#define LP3972_L2VCR_REG 0x39
	46	#define LP3972_L34VCR_REG 0x3A
	47	#define LP3972_SCR1_REG 0x80
	48	#define LP3972_SCR2_REG 0x81
	49	#define LP3972_OEN3_REG 0x82
	50	#define LP3972_OSR3_REG 0x83
	51	#define LP3972_LOER4_REG 0x84
	52	#define LP3972_B2TV_REG 0x85
	53	#define LP3972_B3TV_REG 0x86
	54	#define LP3972_B32RC_REG 0x87
	55	#define LP3972_ISRA_REG 0x88
	56	#define LP3972_BCCR_REG 0x89
	57	#define LP3972_II1RR_REG 0x8E
	58	#define LP3972_II2RR_REG 0x8F
	59
	60	#define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG
	61	/* System control register 1 initial value,
	62	* bits 5, 6 and 7 are EPROM programmable */
	63	#define SYS_CONTROL1_INIT_VAL 0x02
	64	#define SYS_CONTROL1_INIT_MASK 0x1F
	65
	66	#define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG
	67	#define LP3972_VOL_CHANGE_FLAG_GO 0x01
	68	#define LP3972_VOL_CHANGE_FLAG_MASK 0x03
	69
	70	/* LDO output enable mask */
	71	#define LP3972_OEN3_L1EN BIT(0)
	72	#define LP3972_OVER2_LDO2_EN BIT(2)
	73	#define LP3972_OVER2_LDO3_EN BIT(3)
	74	#define LP3972_OVER2_LDO4_EN BIT(4)
	75	#define LP3972_OVER1_S_EN BIT(2)
	76
4f73ccad AL	77	static const unsigned int ldo1_voltage_map[] = {
	78	1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
	79	1900000, 1925000, 1950000, 1975000, 2000000,
5976f095 AL	80	};
5976f095 AL	81
4f73ccad AL	82	static const unsigned int ldo23_voltage_map[] = {
	83	1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
	84	2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
5976f095 AL	85	};
5976f095 AL	86
4f73ccad AL	87	static const unsigned int ldo4_voltage_map[] = {
	88	1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
	89	1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
5976f095 AL	90	};
5976f095 AL	91
4f73ccad AL	92	static const unsigned int ldo5_voltage_map[] = {
	93	0, 0, 0, 0, 0, 850000, 875000, 900000,
	94	925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
	95	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
	96	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
5976f095 AL	97	};
5976f095 AL	98
4f73ccad AL	99	static const unsigned int buck1_voltage_map[] = {
	100	725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000,
	101	925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
	102	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
	103	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
5976f095 AL	104	};
5976f095 AL	105
4f73ccad AL	106	static const unsigned int buck23_voltage_map[] = {
	107	0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000,
	108	1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
	109	1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
	110	3000000, 3300000,
5976f095 AL	111	};
	112
	113	static const int ldo_output_enable_mask[] = {
	114	LP3972_OEN3_L1EN,
	115	LP3972_OVER2_LDO2_EN,
	116	LP3972_OVER2_LDO3_EN,
	117	LP3972_OVER2_LDO4_EN,
	118	LP3972_OVER1_S_EN,
	119	};
	120
	121	static const int ldo_output_enable_addr[] = {
	122	LP3972_OEN3_REG,
	123	LP3972_OVER2_REG,
	124	LP3972_OVER2_REG,
	125	LP3972_OVER2_REG,
	126	LP3972_OVER1_REG,
	127	};
	128
	129	static const int ldo_vol_ctl_addr[] = {
	130	LP3972_MDTV1_REG,
	131	LP3972_L2VCR_REG,
	132	LP3972_L34VCR_REG,
	133	LP3972_L34VCR_REG,
	134	LP3972_SDTV1_REG,
	135	};
	136
	137	static const int buck_vol_enable_addr[] = {
	138	LP3972_OVER1_REG,
	139	LP3972_OEN3_REG,
	140	LP3972_OEN3_REG,
	141	};
	142
	143	static const int buck_base_addr[] = {
	144	LP3972_ADTV1_REG,
	145	LP3972_B2TV_REG,
	146	LP3972_B3TV_REG,
	147	};
	148
5976f095 AL	149	#define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
	150	#define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
	151
	152	/* LDO voltage control registers shift:
	153	LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
	154	LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
	155	LP3972_LDO5 -> 0
	156	*/
	157	#define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
	158	#define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
	159	#define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
	160
	161	#define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
	162	#define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
	163	#define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
	164
5976f095 AL	165	#define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
	166	#define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
	167	#define LP3972_BUCK_VOL_MASK 0x1f
5976f095 AL	168
	169	static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
	170	u16 *dest)
	171	{
	172	int ret;
	173
	174	if (count != 1)
	175	return -EIO;
	176	ret = i2c_smbus_read_byte_data(i2c, reg);
	177	if (ret < 0)
993af7c0	178	return ret;
5976f095 AL	179
	180	*dest = ret;
	181	return 0;
	182	}
	183
	184	static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
	185	const u16 *src)
	186	{
	187	if (count != 1)
	188	return -EIO;
	189	return i2c_smbus_write_byte_data(i2c, reg, *src);
	190	}
	191
	192	static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
	193	{
	194	u16 val = 0;
	195
	196	mutex_lock(&lp3972->io_lock);
	197
	198	lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
	199
	200	dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
993af7c0	201	(unsigned)val & 0xff);
5976f095 AL	202
	203	mutex_unlock(&lp3972->io_lock);
	204
	205	return val & 0xff;
	206	}
	207
	208	static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
	209	{
	210	u16 tmp;
	211	int ret;
	212
	213	mutex_lock(&lp3972->io_lock);
	214
	215	ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
	216	tmp = (tmp & ~mask) \| val;
	217	if (ret == 0) {
	218	ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
	219	dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
993af7c0	220	(unsigned)val & 0xff);
5976f095 AL	221	}
	222	mutex_unlock(&lp3972->io_lock);
	223
	224	return ret;
	225	}
	226
5976f095 AL	227	static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
	228	{
	229	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	230	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	231	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
	232	u16 val;
	233
	234	val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
	235	return !!(val & mask);
	236	}
	237
	238	static int lp3972_ldo_enable(struct regulator_dev *dev)
	239	{
	240	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	241	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	242	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
	243
	244	return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
	245	mask, mask);
	246	}
	247
	248	static int lp3972_ldo_disable(struct regulator_dev *dev)
	249	{
	250	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	251	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	252	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
	253
	254	return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
	255	mask, 0);
	256	}
	257
c8c14a39	258	static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev)
5976f095 AL	259	{
	260	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	261	int ldo = rdev_get_id(dev) - LP3972_LDO1;
	262	u16 mask = LP3972_LDO_VOL_MASK(ldo);
	263	u16 val, reg;
	264
	265	reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
	266	val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
	267
c8c14a39	268	return val;
5976f095 AL	269	}
5976f095 AL	270
24c896f5 AL	271	static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,
24c896f5 AL	272	unsigned int selector)
5976f095 AL	273	{
	274	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	275	int ldo = rdev_get_id(dev) - LP3972_LDO1;
5976f095 AL	276	int shift, ret;
5976f095 AL	277
5976f095 AL	278	shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
5976f095 AL	279	ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
24c896f5	280	LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);
5976f095 AL	281
	282	if (ret)
	283	return ret;
	284
993af7c0 AL	285	/*
	286	* LDO1 and LDO5 support voltage control by either target voltage1
	287	* or target voltage2 register.
	288	* We use target voltage1 register for LDO1 and LDO5 in this driver.
	289	* We need to update voltage change control register(0x20) to enable
	290	* LDO1 and LDO5 to change to their programmed target values.
	291	*/
5976f095 AL	292	switch (ldo) {
	293	case LP3972_LDO1:
	294	case LP3972_LDO5:
	295	shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
	296	ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
	297	LP3972_VOL_CHANGE_FLAG_MASK << shift,
	298	LP3972_VOL_CHANGE_FLAG_GO << shift);
	299	if (ret)
	300	return ret;
	301
	302	ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
	303	LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
	304	break;
	305	}
	306
	307	return ret;
	308	}
	309
	310	static struct regulator_ops lp3972_ldo_ops = {
4f73ccad	311	.list_voltage = regulator_list_voltage_table,
b50003b6	312	.map_voltage = regulator_map_voltage_ascend,
5976f095 AL	313	.is_enabled = lp3972_ldo_is_enabled,
	314	.enable = lp3972_ldo_enable,
	315	.disable = lp3972_ldo_disable,
c8c14a39	316	.get_voltage_sel = lp3972_ldo_get_voltage_sel,
24c896f5	317	.set_voltage_sel = lp3972_ldo_set_voltage_sel,
5976f095 AL	318	};
5976f095 AL	319
5976f095 AL	320	static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
	321	{
	322	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	323	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	324	u16 mask = 1 << (buck * 2);
	325	u16 val;
	326
	327	val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
	328	return !!(val & mask);
	329	}
	330
	331	static int lp3972_dcdc_enable(struct regulator_dev *dev)
	332	{
	333	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	334	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	335	u16 mask = 1 << (buck * 2);
	336	u16 val;
	337
	338	val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
	339	mask, mask);
	340	return val;
	341	}
	342
	343	static int lp3972_dcdc_disable(struct regulator_dev *dev)
	344	{
	345	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	346	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	347	u16 mask = 1 << (buck * 2);
	348	u16 val;
	349
	350	val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
	351	mask, 0);
	352	return val;
	353	}
	354
c8c14a39	355	static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev)
5976f095 AL	356	{
	357	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	358	int buck = rdev_get_id(dev) - LP3972_DCDC1;
	359	u16 reg;
5976f095 AL	360
	361	reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
	362	reg &= LP3972_BUCK_VOL_MASK;
5976f095	363
c8c14a39	364	return reg;
5976f095 AL	365	}
5976f095 AL	366
24c896f5 AL	367	static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,
24c896f5 AL	368	unsigned int selector)
5976f095 AL	369	{
	370	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
	371	int buck = rdev_get_id(dev) - LP3972_DCDC1;
5976f095 AL	372	int ret;
5976f095 AL	373
5976f095	374	ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
24c896f5	375	LP3972_BUCK_VOL_MASK, selector);
5976f095 AL	376	if (ret)
	377	return ret;
	378
	379	if (buck != 0)
	380	return ret;
	381
	382	ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
	383	LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
	384	if (ret)
	385	return ret;
	386
	387	return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
	388	LP3972_VOL_CHANGE_FLAG_MASK, 0);
	389	}
	390
	391	static struct regulator_ops lp3972_dcdc_ops = {
4f73ccad	392	.list_voltage = regulator_list_voltage_table,
b50003b6	393	.map_voltage = regulator_map_voltage_ascend,
5976f095 AL	394	.is_enabled = lp3972_dcdc_is_enabled,
	395	.enable = lp3972_dcdc_enable,
	396	.disable = lp3972_dcdc_disable,
c8c14a39	397	.get_voltage_sel = lp3972_dcdc_get_voltage_sel,
24c896f5	398	.set_voltage_sel = lp3972_dcdc_set_voltage_sel,
5976f095 AL	399	};
5976f095 AL	400
1bdcf110	401	static const struct regulator_desc regulators[] = {
5976f095 AL	402	{
	403	.name = "LDO1",
	404	.id = LP3972_LDO1,
	405	.ops = &lp3972_ldo_ops,
	406	.n_voltages = ARRAY_SIZE(ldo1_voltage_map),
4f73ccad	407	.volt_table = ldo1_voltage_map,
5976f095 AL	408	.type = REGULATOR_VOLTAGE,
	409	.owner = THIS_MODULE,
	410	},
	411	{
	412	.name = "LDO2",
	413	.id = LP3972_LDO2,
	414	.ops = &lp3972_ldo_ops,
	415	.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
4f73ccad	416	.volt_table = ldo23_voltage_map,
5976f095 AL	417	.type = REGULATOR_VOLTAGE,
	418	.owner = THIS_MODULE,
	419	},
	420	{
	421	.name = "LDO3",
	422	.id = LP3972_LDO3,
	423	.ops = &lp3972_ldo_ops,
	424	.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
4f73ccad	425	.volt_table = ldo23_voltage_map,
5976f095 AL	426	.type = REGULATOR_VOLTAGE,
	427	.owner = THIS_MODULE,
	428	},
	429	{
	430	.name = "LDO4",
	431	.id = LP3972_LDO4,
	432	.ops = &lp3972_ldo_ops,
	433	.n_voltages = ARRAY_SIZE(ldo4_voltage_map),
4f73ccad	434	.volt_table = ldo4_voltage_map,
5976f095 AL	435	.type = REGULATOR_VOLTAGE,
	436	.owner = THIS_MODULE,
	437	},
	438	{
	439	.name = "LDO5",
	440	.id = LP3972_LDO5,
	441	.ops = &lp3972_ldo_ops,
	442	.n_voltages = ARRAY_SIZE(ldo5_voltage_map),
4f73ccad	443	.volt_table = ldo5_voltage_map,
5976f095 AL	444	.type = REGULATOR_VOLTAGE,
	445	.owner = THIS_MODULE,
	446	},
	447	{
	448	.name = "DCDC1",
	449	.id = LP3972_DCDC1,
	450	.ops = &lp3972_dcdc_ops,
	451	.n_voltages = ARRAY_SIZE(buck1_voltage_map),
4f73ccad	452	.volt_table = buck1_voltage_map,
5976f095 AL	453	.type = REGULATOR_VOLTAGE,
	454	.owner = THIS_MODULE,
	455	},
	456	{
	457	.name = "DCDC2",
	458	.id = LP3972_DCDC2,
	459	.ops = &lp3972_dcdc_ops,
	460	.n_voltages = ARRAY_SIZE(buck23_voltage_map),
4f73ccad	461	.volt_table = buck23_voltage_map,
5976f095 AL	462	.type = REGULATOR_VOLTAGE,
	463	.owner = THIS_MODULE,
	464	},
	465	{
	466	.name = "DCDC3",
	467	.id = LP3972_DCDC3,
	468	.ops = &lp3972_dcdc_ops,
	469	.n_voltages = ARRAY_SIZE(buck23_voltage_map),
4f73ccad	470	.volt_table = buck23_voltage_map,
5976f095 AL	471	.type = REGULATOR_VOLTAGE,
	472	.owner = THIS_MODULE,
	473	},
	474	};
	475
a5023574	476	static int setup_regulators(struct lp3972 *lp3972,
5976f095 AL	477	struct lp3972_platform_data *pdata)
	478	{
	479	int i, err;
	480
	481	lp3972->num_regulators = pdata->num_regulators;
	482	lp3972->rdev = kcalloc(pdata->num_regulators,
	483	sizeof(struct regulator_dev *), GFP_KERNEL);
	484	if (!lp3972->rdev) {
	485	err = -ENOMEM;
	486	goto err_nomem;
	487	}
	488
	489	/* Instantiate the regulators */
	490	for (i = 0; i < pdata->num_regulators; i++) {
	491	struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
c172708d MB	492	struct regulator_config config = { };
	493
	494	config.dev = lp3972->dev;
	495	config.init_data = reg->initdata;
	496	config.driver_data = lp3972;
5976f095	497
c172708d MB	498	lp3972->rdev[i] = regulator_register(&regulators[reg->id],
c172708d MB	499	&config);
5976f095 AL	500	if (IS_ERR(lp3972->rdev[i])) {
	501	err = PTR_ERR(lp3972->rdev[i]);
	502	dev_err(lp3972->dev, "regulator init failed: %d\n",
	503	err);
	504	goto error;
	505	}
	506	}
	507
	508	return 0;
	509	error:
	510	while (--i >= 0)
	511	regulator_unregister(lp3972->rdev[i]);
	512	kfree(lp3972->rdev);
	513	lp3972->rdev = NULL;
	514	err_nomem:
	515	return err;
	516	}
	517
a5023574	518	static int lp3972_i2c_probe(struct i2c_client *i2c,
5976f095 AL	519	const struct i2c_device_id *id)
	520	{
	521	struct lp3972 *lp3972;
	522	struct lp3972_platform_data *pdata = i2c->dev.platform_data;
	523	int ret;
	524	u16 val;
	525
	526	if (!pdata) {
	527	dev_dbg(&i2c->dev, "No platform init data supplied\n");
	528	return -ENODEV;
	529	}
	530
	531	lp3972 = kzalloc(sizeof(struct lp3972), GFP_KERNEL);
	532	if (!lp3972)
	533	return -ENOMEM;
	534
	535	lp3972->i2c = i2c;
	536	lp3972->dev = &i2c->dev;
	537
	538	mutex_init(&lp3972->io_lock);
	539
	540	/* Detect LP3972 */
	541	ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
993af7c0 AL	542	if (ret == 0 &&
993af7c0 AL	543	(val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
5976f095	544	ret = -ENODEV;
993af7c0 AL	545	dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
993af7c0 AL	546	}
5976f095	547	if (ret < 0) {
993af7c0	548	dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
5976f095 AL	549	goto err_detect;
	550	}
	551
	552	ret = setup_regulators(lp3972, pdata);
	553	if (ret < 0)
	554	goto err_detect;
	555
	556	i2c_set_clientdata(i2c, lp3972);
	557	return 0;
	558
	559	err_detect:
	560	kfree(lp3972);
	561	return ret;
	562	}
	563
8dc995f5	564	static int lp3972_i2c_remove(struct i2c_client *i2c)
5976f095 AL	565	{
	566	struct lp3972 *lp3972 = i2c_get_clientdata(i2c);
	567	int i;
	568
	569	for (i = 0; i < lp3972->num_regulators; i++)
	570	regulator_unregister(lp3972->rdev[i]);
	571	kfree(lp3972->rdev);
	572	kfree(lp3972);
	573
	574	return 0;
	575	}
	576
	577	static const struct i2c_device_id lp3972_i2c_id[] = {
	578	{ "lp3972", 0 },
	579	{ }
	580	};
	581	MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
	582
	583	static struct i2c_driver lp3972_i2c_driver = {
	584	.driver = {
	585	.name = "lp3972",
	586	.owner = THIS_MODULE,
	587	},
	588	.probe = lp3972_i2c_probe,
5eb9f2b9	589	.remove = lp3972_i2c_remove,
5976f095 AL	590	.id_table = lp3972_i2c_id,
	591	};
	592
	593	static int __init lp3972_module_init(void)
	594	{
	595	return i2c_add_driver(&lp3972_i2c_driver);
	596	}
	597	subsys_initcall(lp3972_module_init);
	598
	599	static void __exit lp3972_module_exit(void)
	600	{
	601	i2c_del_driver(&lp3972_i2c_driver);
	602	}
	603	module_exit(lp3972_module_exit);
	604
	605	MODULE_LICENSE("GPL");
	606	MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
	607	MODULE_DESCRIPTION("LP3972 PMIC driver");