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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pinctrl / pinctrl-samsung.c
CommitLineData
30574f0d
TA		 1/*
2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
8 *
9 * Author: Thomas Abraham <thomas.ab@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This driver implements the Samsung pinctrl driver. It supports setting up of
17 * pinmux and pinconf configurations. The gpiolib interface is also included.
18 * External interrupt (gpio and wakeup) support are not included in this driver
19 * but provides extensions to which platform specific implementation of the gpio
20 * and wakeup interrupts can be hooked to.
21 */
22
23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/slab.h>
27#include <linux/err.h>
28#include <linux/gpio.h>
a19fe2d4 29#include <linux/irqdomain.h>
19846950 30#include <linux/spinlock.h>
d9f99863 31#include <linux/syscore_ops.h>
30574f0d
TA		 32
33#include "core.h"
34#include "pinctrl-samsung.h"
35
36#define GROUP_SUFFIX "-grp"
37#define GSUFFIX_LEN sizeof(GROUP_SUFFIX)
38#define FUNCTION_SUFFIX "-mux"
39#define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX)
40
41/* list of all possible config options supported */
d5fd5da2 42static struct pin_config {
30574f0d
TA		 43 char *prop_cfg;
44 unsigned int cfg_type;
45} pcfgs[] = {
46 { "samsung,pin-pud", PINCFG_TYPE_PUD },
47 { "samsung,pin-drv", PINCFG_TYPE_DRV },
48 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
49 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
50};
51
d9f99863
DA		 52/* Global list of devices (struct samsung_pinctrl_drv_data) */
53LIST_HEAD(drvdata_list);
54
6fb6f1ba 55static unsigned int pin_base;
40ba6227 56
d3a7b9e3
TF		 57static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc)
58{
59 return container_of(gc, struct samsung_pin_bank, gpio_chip);
60}
61
30574f0d
TA		 62/* check if the selector is a valid pin group selector */
63static int samsung_get_group_count(struct pinctrl_dev *pctldev)
64{
65 struct samsung_pinctrl_drv_data *drvdata;
66
67 drvdata = pinctrl_dev_get_drvdata(pctldev);
68 return drvdata->nr_groups;
69}
70
71/* return the name of the group selected by the group selector */
72static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
73 unsigned selector)
74{
75 struct samsung_pinctrl_drv_data *drvdata;
76
77 drvdata = pinctrl_dev_get_drvdata(pctldev);
78 return drvdata->pin_groups[selector].name;
79}
80
81/* return the pin numbers associated with the specified group */
82static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
83 unsigned selector, const unsigned **pins, unsigned *num_pins)
84{
85 struct samsung_pinctrl_drv_data *drvdata;
86
87 drvdata = pinctrl_dev_get_drvdata(pctldev);
88 *pins = drvdata->pin_groups[selector].pins;
89 *num_pins = drvdata->pin_groups[selector].num_pins;
90 return 0;
91}
92
93/* create pinctrl_map entries by parsing device tree nodes */
94static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
95 struct device_node *np, struct pinctrl_map **maps,
96 unsigned *nmaps)
97{
98 struct device *dev = pctldev->dev;
99 struct pinctrl_map *map;
100 unsigned long *cfg = NULL;
101 char *gname, *fname;
102 int cfg_cnt = 0, map_cnt = 0, idx = 0;
103
104 /* count the number of config options specfied in the node */
105 for (idx = 0; idx < ARRAY_SIZE(pcfgs); idx++) {
106 if (of_find_property(np, pcfgs[idx].prop_cfg, NULL))
107 cfg_cnt++;
108 }
109
110 /*
111 * Find out the number of map entries to create. All the config options
112 * can be accomadated into a single config map entry.
113 */
114 if (cfg_cnt)
115 map_cnt = 1;
116 if (of_find_property(np, "samsung,pin-function", NULL))
117 map_cnt++;
118 if (!map_cnt) {
119 dev_err(dev, "node %s does not have either config or function "
120 "configurations\n", np->name);
121 return -EINVAL;
122 }
123
124 /* Allocate memory for pin-map entries */
125 map = kzalloc(sizeof(*map) * map_cnt, GFP_KERNEL);
126 if (!map) {
127 dev_err(dev, "could not alloc memory for pin-maps\n");
128 return -ENOMEM;
129 }
130 *nmaps = 0;
131
132 /*
133 * Allocate memory for pin group name. The pin group name is derived
134 * from the node name from which these map entries are be created.
135 */
136 gname = kzalloc(strlen(np->name) + GSUFFIX_LEN, GFP_KERNEL);
137 if (!gname) {
138 dev_err(dev, "failed to alloc memory for group name\n");
139 goto free_map;
140 }
141 sprintf(gname, "%s%s", np->name, GROUP_SUFFIX);
142
143 /*
144 * don't have config options? then skip over to creating function
145 * map entries.
146 */
147 if (!cfg_cnt)
148 goto skip_cfgs;
149
150 /* Allocate memory for config entries */
151 cfg = kzalloc(sizeof(*cfg) * cfg_cnt, GFP_KERNEL);
152 if (!cfg) {
153 dev_err(dev, "failed to alloc memory for configs\n");
154 goto free_gname;
155 }
156
157 /* Prepare a list of config settings */
158 for (idx = 0, cfg_cnt = 0; idx < ARRAY_SIZE(pcfgs); idx++) {
159 u32 value;
160 if (!of_property_read_u32(np, pcfgs[idx].prop_cfg, &value))
161 cfg[cfg_cnt++] =
162 PINCFG_PACK(pcfgs[idx].cfg_type, value);
163 }
164
165 /* create the config map entry */
166 map[*nmaps].data.configs.group_or_pin = gname;
167 map[*nmaps].data.configs.configs = cfg;
168 map[*nmaps].data.configs.num_configs = cfg_cnt;
169 map[*nmaps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
170 *nmaps += 1;
171
172skip_cfgs:
173 /* create the function map entry */
174 if (of_find_property(np, "samsung,pin-function", NULL)) {
175 fname = kzalloc(strlen(np->name) + FSUFFIX_LEN, GFP_KERNEL);
176 if (!fname) {
177 dev_err(dev, "failed to alloc memory for func name\n");
178 goto free_cfg;
179 }
180 sprintf(fname, "%s%s", np->name, FUNCTION_SUFFIX);
181
182 map[*nmaps].data.mux.group = gname;
183 map[*nmaps].data.mux.function = fname;
184 map[*nmaps].type = PIN_MAP_TYPE_MUX_GROUP;
185 *nmaps += 1;
186 }
187
188 *maps = map;
189 return 0;
190
191free_cfg:
192 kfree(cfg);
193free_gname:
194 kfree(gname);
195free_map:
196 kfree(map);
197 return -ENOMEM;
198}
199
200/* free the memory allocated to hold the pin-map table */
201static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
202 struct pinctrl_map *map, unsigned num_maps)
203{
204 int idx;
205
206 for (idx = 0; idx < num_maps; idx++) {
207 if (map[idx].type == PIN_MAP_TYPE_MUX_GROUP) {
208 kfree(map[idx].data.mux.function);
209 if (!idx)
210 kfree(map[idx].data.mux.group);
211 } else if (map->type == PIN_MAP_TYPE_CONFIGS_GROUP) {
212 kfree(map[idx].data.configs.configs);
213 if (!idx)
214 kfree(map[idx].data.configs.group_or_pin);
215 }
216 };
217
218 kfree(map);
219}
220
221/* list of pinctrl callbacks for the pinctrl core */
022ab148 222static const struct pinctrl_ops samsung_pctrl_ops = {
30574f0d
TA		 223 .get_groups_count = samsung_get_group_count,
224 .get_group_name = samsung_get_group_name,
225 .get_group_pins = samsung_get_group_pins,
226 .dt_node_to_map = samsung_dt_node_to_map,
227 .dt_free_map = samsung_dt_free_map,
228};
229
230/* check if the selector is a valid pin function selector */
231static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
232{
233 struct samsung_pinctrl_drv_data *drvdata;
234
235 drvdata = pinctrl_dev_get_drvdata(pctldev);
236 return drvdata->nr_functions;
237}
238
239/* return the name of the pin function specified */
240static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
241 unsigned selector)
242{
243 struct samsung_pinctrl_drv_data *drvdata;
244
245 drvdata = pinctrl_dev_get_drvdata(pctldev);
246 return drvdata->pmx_functions[selector].name;
247}
248
249/* return the groups associated for the specified function selector */
250static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
251 unsigned selector, const char * const **groups,
252 unsigned * const num_groups)
253{
254 struct samsung_pinctrl_drv_data *drvdata;
255
256 drvdata = pinctrl_dev_get_drvdata(pctldev);
257 *groups = drvdata->pmx_functions[selector].groups;
258 *num_groups = drvdata->pmx_functions[selector].num_groups;
259 return 0;
260}
261
262/*
263 * given a pin number that is local to a pin controller, find out the pin bank
264 * and the register base of the pin bank.
265 */
62f14c0e
TF		 266static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
267 unsigned pin, void __iomem **reg, u32 *offset,
30574f0d
TA		 268 struct samsung_pin_bank **bank)
269{
30574f0d
TA		 270 struct samsung_pin_bank *b;
271
30574f0d
TA		 272 b = drvdata->ctrl->pin_banks;
273
274 while ((pin >= b->pin_base) &&
275 ((b->pin_base + b->nr_pins - 1) < pin))
276 b++;
277
278 *reg = drvdata->virt_base + b->pctl_offset;
279 *offset = pin - b->pin_base;
280 if (bank)
281 *bank = b;
30574f0d
TA		 282}
283
284/* enable or disable a pinmux function */
285static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
286 unsigned group, bool enable)
287{
288 struct samsung_pinctrl_drv_data *drvdata;
289 const unsigned int *pins;
290 struct samsung_pin_bank *bank;
291 void __iomem *reg;
292 u32 mask, shift, data, pin_offset, cnt;
19846950 293 unsigned long flags;
30574f0d
TA		 294
295 drvdata = pinctrl_dev_get_drvdata(pctldev);
296 pins = drvdata->pin_groups[group].pins;
297
298 /*
299 * for each pin in the pin group selected, program the correspoding pin
300 * pin function number in the config register.
301 */
302 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) {
499147c9
TF		 303 struct samsung_pin_bank_type *type;
304
62f14c0e 305 pin_to_reg_bank(drvdata, pins[cnt] - drvdata->ctrl->base,
30574f0d 306 &reg, &pin_offset, &bank);
499147c9
TF		 307 type = bank->type;
308 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
309 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
c16150d8
TF		 310 if (shift >= 32) {
311 /* Some banks have two config registers */
312 shift -= 32;
313 reg += 4;
314 }
30574f0d 315
19846950
TF		 316 spin_lock_irqsave(&bank->slock, flags);
317
43fc9e7f 318 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
30574f0d
TA		 319 data &= ~(mask << shift);
320 if (enable)
321 data |= drvdata->pin_groups[group].func << shift;
43fc9e7f 322 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
19846950
TF		 323
324 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA		 325 }
326}
327
328/* enable a specified pinmux by writing to registers */
329static int samsung_pinmux_enable(struct pinctrl_dev *pctldev, unsigned selector,
330 unsigned group)
331{
332 samsung_pinmux_setup(pctldev, selector, group, true);
333 return 0;
334}
335
336/* disable a specified pinmux by writing to registers */
337static void samsung_pinmux_disable(struct pinctrl_dev *pctldev,
338 unsigned selector, unsigned group)
339{
340 samsung_pinmux_setup(pctldev, selector, group, false);
341}
342
343/*
344 * The calls to gpio_direction_output() and gpio_direction_input()
345 * leads to this function call (via the pinctrl_gpio_direction_{input|output}()
346 * function called from the gpiolib interface).
347 */
348static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
349 struct pinctrl_gpio_range *range, unsigned offset, bool input)
350{
499147c9 351 struct samsung_pin_bank_type *type;
30574f0d 352 struct samsung_pin_bank *bank;
62f14c0e 353 struct samsung_pinctrl_drv_data *drvdata;
30574f0d
TA		 354 void __iomem *reg;
355 u32 data, pin_offset, mask, shift;
19846950 356 unsigned long flags;
30574f0d 357
d3a7b9e3 358 bank = gc_to_pin_bank(range->gc);
499147c9 359 type = bank->type;
62f14c0e
TF		 360 drvdata = pinctrl_dev_get_drvdata(pctldev);
361
d3a7b9e3 362 pin_offset = offset - bank->pin_base;
43fc9e7f
TF		 363 reg = drvdata->virt_base + bank->pctl_offset +
364 type->reg_offset[PINCFG_TYPE_FUNC];
d3a7b9e3 365
499147c9
TF		 366 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
367 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
c16150d8
TF		 368 if (shift >= 32) {
369 /* Some banks have two config registers */
370 shift -= 32;
371 reg += 4;
372 }
30574f0d 373
19846950
TF		 374 spin_lock_irqsave(&bank->slock, flags);
375
30574f0d
TA		 376 data = readl(reg);
377 data &= ~(mask << shift);
378 if (!input)
379 data |= FUNC_OUTPUT << shift;
380 writel(data, reg);
19846950
TF		 381
382 spin_unlock_irqrestore(&bank->slock, flags);
383
30574f0d
TA		 384 return 0;
385}
386
387/* list of pinmux callbacks for the pinmux vertical in pinctrl core */
022ab148 388static const struct pinmux_ops samsung_pinmux_ops = {
30574f0d
TA		 389 .get_functions_count = samsung_get_functions_count,
390 .get_function_name = samsung_pinmux_get_fname,
391 .get_function_groups = samsung_pinmux_get_groups,
392 .enable = samsung_pinmux_enable,
393 .disable = samsung_pinmux_disable,
394 .gpio_set_direction = samsung_pinmux_gpio_set_direction,
395};
396
397/* set or get the pin config settings for a specified pin */
398static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
399 unsigned long *config, bool set)
400{
401 struct samsung_pinctrl_drv_data *drvdata;
499147c9 402 struct samsung_pin_bank_type *type;
30574f0d
TA		 403 struct samsung_pin_bank *bank;
404 void __iomem *reg_base;
405 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
406 u32 data, width, pin_offset, mask, shift;
407 u32 cfg_value, cfg_reg;
19846950 408 unsigned long flags;
30574f0d
TA		 409
410 drvdata = pinctrl_dev_get_drvdata(pctldev);
62f14c0e 411 pin_to_reg_bank(drvdata, pin - drvdata->ctrl->base, &reg_base,
30574f0d 412 &pin_offset, &bank);
499147c9 413 type = bank->type;
30574f0d 414
499147c9 415 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
7c367d3d
TF		 416 return -EINVAL;
417
499147c9 418 width = type->fld_width[cfg_type];
43fc9e7f 419 cfg_reg = type->reg_offset[cfg_type];
499147c9 420
19846950
TF		 421 spin_lock_irqsave(&bank->slock, flags);
422
30574f0d
TA		 423 mask = (1 << width) - 1;
424 shift = pin_offset * width;
425 data = readl(reg_base + cfg_reg);
426
427 if (set) {
428 cfg_value = PINCFG_UNPACK_VALUE(*config);
429 data &= ~(mask << shift);
430 data |= (cfg_value << shift);
431 writel(data, reg_base + cfg_reg);
432 } else {
433 data >>= shift;
434 data &= mask;
435 *config = PINCFG_PACK(cfg_type, data);
436 }
19846950
TF		 437
438 spin_unlock_irqrestore(&bank->slock, flags);
439
30574f0d
TA		 440 return 0;
441}
442
443/* set the pin config settings for a specified pin */
444static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
445 unsigned long config)
446{
447 return samsung_pinconf_rw(pctldev, pin, &config, true);
448}
449
450/* get the pin config settings for a specified pin */
451static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
452 unsigned long *config)
453{
454 return samsung_pinconf_rw(pctldev, pin, config, false);
455}
456
457/* set the pin config settings for a specified pin group */
458static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
459 unsigned group, unsigned long config)
460{
461 struct samsung_pinctrl_drv_data *drvdata;
462 const unsigned int *pins;
463 unsigned int cnt;
464
465 drvdata = pinctrl_dev_get_drvdata(pctldev);
466 pins = drvdata->pin_groups[group].pins;
467
468 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
469 samsung_pinconf_set(pctldev, pins[cnt], config);
470
471 return 0;
472}
473
474/* get the pin config settings for a specified pin group */
475static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
476 unsigned int group, unsigned long *config)
477{
478 struct samsung_pinctrl_drv_data *drvdata;
479 const unsigned int *pins;
480
481 drvdata = pinctrl_dev_get_drvdata(pctldev);
482 pins = drvdata->pin_groups[group].pins;
483 samsung_pinconf_get(pctldev, pins[0], config);
484 return 0;
485}
486
487/* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
022ab148 488static const struct pinconf_ops samsung_pinconf_ops = {
30574f0d
TA		 489 .pin_config_get = samsung_pinconf_get,
490 .pin_config_set = samsung_pinconf_set,
491 .pin_config_group_get = samsung_pinconf_group_get,
492 .pin_config_group_set = samsung_pinconf_group_set,
493};
494
495/* gpiolib gpio_set callback function */
496static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
497{
d3a7b9e3 498 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
499147c9 499 struct samsung_pin_bank_type *type = bank->type;
19846950 500 unsigned long flags;
30574f0d 501 void __iomem *reg;
d3a7b9e3 502 u32 data;
30574f0d 503
d3a7b9e3 504 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 505
19846950
TF		 506 spin_lock_irqsave(&bank->slock, flags);
507
43fc9e7f 508 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 509 data &= ~(1 << offset);
30574f0d 510 if (value)
d3a7b9e3 511 data |= 1 << offset;
43fc9e7f 512 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
19846950
TF		 513
514 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA		 515}
516
517/* gpiolib gpio_get callback function */
518static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
519{
520 void __iomem *reg;
d3a7b9e3
TF		 521 u32 data;
522 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
43fc9e7f 523 struct samsung_pin_bank_type *type = bank->type;
62f14c0e 524
d3a7b9e3 525 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 526
43fc9e7f 527 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 528 data >>= offset;
30574f0d
TA		 529 data &= 1;
530 return data;
531}
532
533/*
534 * gpiolib gpio_direction_input callback function. The setting of the pin
535 * mux function as 'gpio input' will be handled by the pinctrl susbsystem
536 * interface.
537 */
538static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
539{
540 return pinctrl_gpio_direction_input(gc->base + offset);
541}
542
543/*
544 * gpiolib gpio_direction_output callback function. The setting of the pin
545 * mux function as 'gpio output' will be handled by the pinctrl susbsystem
546 * interface.
547 */
548static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
549 int value)
550{
551 samsung_gpio_set(gc, offset, value);
552 return pinctrl_gpio_direction_output(gc->base + offset);
553}
554
a19fe2d4
TF		 555/*
556 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
557 * and a virtual IRQ, if not already present.
558 */
559static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
560{
561 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
562 unsigned int virq;
563
564 if (!bank->irq_domain)
565 return -ENXIO;
566
567 virq = irq_create_mapping(bank->irq_domain, offset);
568
569 return (virq) ? : -ENXIO;
570}
571
30574f0d
TA		 572/*
573 * Parse the pin names listed in the 'samsung,pins' property and convert it
574 * into a list of gpio numbers are create a pin group from it.
575 */
150632b0
GKH		 576static int samsung_pinctrl_parse_dt_pins(struct platform_device *pdev,
577 struct device_node *cfg_np,
578 struct pinctrl_desc *pctl,
579 unsigned int **pin_list,
580 unsigned int *npins)
30574f0d
TA		 581{
582 struct device *dev = &pdev->dev;
583 struct property *prop;
584 struct pinctrl_pin_desc const *pdesc = pctl->pins;
585 unsigned int idx = 0, cnt;
586 const char *pin_name;
587
588 *npins = of_property_count_strings(cfg_np, "samsung,pins");
4a991b41 589 if (IS_ERR_VALUE(*npins)) {
30574f0d
TA		 590 dev_err(dev, "invalid pin list in %s node", cfg_np->name);
591 return -EINVAL;
592 }
593
594 *pin_list = devm_kzalloc(dev, *npins * sizeof(**pin_list), GFP_KERNEL);
595 if (!*pin_list) {
596 dev_err(dev, "failed to allocate memory for pin list\n");
597 return -ENOMEM;
598 }
599
600 of_property_for_each_string(cfg_np, "samsung,pins", prop, pin_name) {
601 for (cnt = 0; cnt < pctl->npins; cnt++) {
602 if (pdesc[cnt].name) {
603 if (!strcmp(pin_name, pdesc[cnt].name)) {
604 (*pin_list)[idx++] = pdesc[cnt].number;
605 break;
606 }
607 }
608 }
609 if (cnt == pctl->npins) {
610 dev_err(dev, "pin %s not valid in %s node\n",
611 pin_name, cfg_np->name);
612 devm_kfree(dev, *pin_list);
613 return -EINVAL;
614 }
615 }
616
617 return 0;
618}
619
620/*
621 * Parse the information about all the available pin groups and pin functions
622 * from device node of the pin-controller. A pin group is formed with all
623 * the pins listed in the "samsung,pins" property.
624 */
150632b0
GKH		 625static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
626 struct samsung_pinctrl_drv_data *drvdata)
30574f0d
TA		 627{
628 struct device *dev = &pdev->dev;
629 struct device_node *dev_np = dev->of_node;
630 struct device_node *cfg_np;
631 struct samsung_pin_group *groups, *grp;
632 struct samsung_pmx_func *functions, *func;
633 unsigned *pin_list;
634 unsigned int npins, grp_cnt, func_idx = 0;
635 char *gname, *fname;
636 int ret;
637
638 grp_cnt = of_get_child_count(dev_np);
639 if (!grp_cnt)
640 return -EINVAL;
641
642 groups = devm_kzalloc(dev, grp_cnt * sizeof(*groups), GFP_KERNEL);
643 if (!groups) {
644 dev_err(dev, "failed allocate memory for ping group list\n");
645 return -EINVAL;
646 }
647 grp = groups;
648
649 functions = devm_kzalloc(dev, grp_cnt * sizeof(*functions), GFP_KERNEL);
650 if (!functions) {
651 dev_err(dev, "failed to allocate memory for function list\n");
652 return -EINVAL;
653 }
654 func = functions;
655
656 /*
657 * Iterate over all the child nodes of the pin controller node
658 * and create pin groups and pin function lists.
659 */
660 for_each_child_of_node(dev_np, cfg_np) {
661 u32 function;
724e56a4 662 if (!of_find_property(cfg_np, "samsung,pins", NULL))
30574f0d
TA		 663 continue;
664
665 ret = samsung_pinctrl_parse_dt_pins(pdev, cfg_np,
666 &drvdata->pctl, &pin_list, &npins);
667 if (ret)
668 return ret;
669
670 /* derive pin group name from the node name */
671 gname = devm_kzalloc(dev, strlen(cfg_np->name) + GSUFFIX_LEN,
672 GFP_KERNEL);
673 if (!gname) {
674 dev_err(dev, "failed to alloc memory for group name\n");
675 return -ENOMEM;
676 }
677 sprintf(gname, "%s%s", cfg_np->name, GROUP_SUFFIX);
678
679 grp->name = gname;
680 grp->pins = pin_list;
681 grp->num_pins = npins;
682 of_property_read_u32(cfg_np, "samsung,pin-function", &function);
683 grp->func = function;
684 grp++;
685
686 if (!of_find_property(cfg_np, "samsung,pin-function", NULL))
687 continue;
688
689 /* derive function name from the node name */
690 fname = devm_kzalloc(dev, strlen(cfg_np->name) + FSUFFIX_LEN,
691 GFP_KERNEL);
692 if (!fname) {
693 dev_err(dev, "failed to alloc memory for func name\n");
694 return -ENOMEM;
695 }
696 sprintf(fname, "%s%s", cfg_np->name, FUNCTION_SUFFIX);
697
698 func->name = fname;
699 func->groups = devm_kzalloc(dev, sizeof(char *), GFP_KERNEL);
700 if (!func->groups) {
701 dev_err(dev, "failed to alloc memory for group list "
702 "in pin function");
703 return -ENOMEM;
704 }
705 func->groups[0] = gname;
706 func->num_groups = 1;
707 func++;
708 func_idx++;
709 }
710
711 drvdata->pin_groups = groups;
712 drvdata->nr_groups = grp_cnt;
713 drvdata->pmx_functions = functions;
714 drvdata->nr_functions = func_idx;
715
716 return 0;
717}
718
719/* register the pinctrl interface with the pinctrl subsystem */
150632b0
GKH		 720static int samsung_pinctrl_register(struct platform_device *pdev,
721 struct samsung_pinctrl_drv_data *drvdata)
30574f0d
TA		 722{
723 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
724 struct pinctrl_pin_desc *pindesc, *pdesc;
725 struct samsung_pin_bank *pin_bank;
726 char *pin_names;
727 int pin, bank, ret;
728
729 ctrldesc->name = "samsung-pinctrl";
730 ctrldesc->owner = THIS_MODULE;
731 ctrldesc->pctlops = &samsung_pctrl_ops;
732 ctrldesc->pmxops = &samsung_pinmux_ops;
733 ctrldesc->confops = &samsung_pinconf_ops;
734
735 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
736 drvdata->ctrl->nr_pins, GFP_KERNEL);
737 if (!pindesc) {
738 dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
739 return -ENOMEM;
740 }
741 ctrldesc->pins = pindesc;
742 ctrldesc->npins = drvdata->ctrl->nr_pins;
30574f0d
TA		 743
744 /* dynamically populate the pin number and pin name for pindesc */
745 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
746 pdesc->number = pin + drvdata->ctrl->base;
747
748 /*
749 * allocate space for storing the dynamically generated names for all
750 * the pins which belong to this pin-controller.
751 */
752 pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
753 drvdata->ctrl->nr_pins, GFP_KERNEL);
754 if (!pin_names) {
755 dev_err(&pdev->dev, "mem alloc for pin names failed\n");
756 return -ENOMEM;
757 }
758
759 /* for each pin, the name of the pin is pin-bank name + pin number */
760 for (bank = 0; bank < drvdata->ctrl->nr_banks; bank++) {
761 pin_bank = &drvdata->ctrl->pin_banks[bank];
762 for (pin = 0; pin < pin_bank->nr_pins; pin++) {
763 sprintf(pin_names, "%s-%d", pin_bank->name, pin);
764 pdesc = pindesc + pin_bank->pin_base + pin;
765 pdesc->name = pin_names;
766 pin_names += PIN_NAME_LENGTH;
767 }
768 }
769
770 drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata);
771 if (!drvdata->pctl_dev) {
772 dev_err(&pdev->dev, "could not register pinctrl driver\n");
773 return -EINVAL;
774 }
775
d3a7b9e3
TF		 776 for (bank = 0; bank < drvdata->ctrl->nr_banks; ++bank) {
777 pin_bank = &drvdata->ctrl->pin_banks[bank];
778 pin_bank->grange.name = pin_bank->name;
779 pin_bank->grange.id = bank;
780 pin_bank->grange.pin_base = pin_bank->pin_base;
781 pin_bank->grange.base = pin_bank->gpio_chip.base;
782 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
783 pin_bank->grange.gc = &pin_bank->gpio_chip;
784 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
785 }
30574f0d
TA		 786
787 ret = samsung_pinctrl_parse_dt(pdev, drvdata);
788 if (ret) {
789 pinctrl_unregister(drvdata->pctl_dev);
790 return ret;
791 }
792
793 return 0;
794}
795
d3a7b9e3
TF		 796static const struct gpio_chip samsung_gpiolib_chip = {
797 .set = samsung_gpio_set,
798 .get = samsung_gpio_get,
799 .direction_input = samsung_gpio_direction_input,
800 .direction_output = samsung_gpio_direction_output,
a19fe2d4 801 .to_irq = samsung_gpio_to_irq,
d3a7b9e3
TF		 802 .owner = THIS_MODULE,
803};
804
30574f0d 805/* register the gpiolib interface with the gpiolib subsystem */
150632b0
GKH		 806static int samsung_gpiolib_register(struct platform_device *pdev,
807 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 808{
d3a7b9e3
TF		 809 struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
810 struct samsung_pin_bank *bank = ctrl->pin_banks;
30574f0d
TA		 811 struct gpio_chip *gc;
812 int ret;
d3a7b9e3
TF		 813 int i;
814
815 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
816 bank->gpio_chip = samsung_gpiolib_chip;
817
818 gc = &bank->gpio_chip;
819 gc->base = ctrl->base + bank->pin_base;
820 gc->ngpio = bank->nr_pins;
821 gc->dev = &pdev->dev;
822 gc->of_node = bank->of_node;
823 gc->label = bank->name;
824
825 ret = gpiochip_add(gc);
826 if (ret) {
827 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
828 gc->label, ret);
829 goto fail;
830 }
30574f0d
TA		 831 }
832
833 return 0;
d3a7b9e3
TF		 834
835fail:
836 for (--i, --bank; i >= 0; --i, --bank)
837 if (gpiochip_remove(&bank->gpio_chip))
838 dev_err(&pdev->dev, "gpio chip %s remove failed\n",
839 bank->gpio_chip.label);
840 return ret;
30574f0d
TA		 841}
842
843/* unregister the gpiolib interface with the gpiolib subsystem */
150632b0
GKH		 844static int samsung_gpiolib_unregister(struct platform_device *pdev,
845 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 846{
d3a7b9e3
TF		 847 struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
848 struct samsung_pin_bank *bank = ctrl->pin_banks;
849 int ret = 0;
850 int i;
851
852 for (i = 0; !ret && i < ctrl->nr_banks; ++i, ++bank)
853 ret = gpiochip_remove(&bank->gpio_chip);
854
855 if (ret)
30574f0d 856 dev_err(&pdev->dev, "gpio chip remove failed\n");
d3a7b9e3
TF		 857
858 return ret;
30574f0d
TA		 859}
860
861static const struct of_device_id samsung_pinctrl_dt_match[];
862
863/* retrieve the soc specific data */
2f0253ff 864static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data(
6defe9a0 865 struct samsung_pinctrl_drv_data *d,
30574f0d
TA		 866 struct platform_device *pdev)
867{
868 int id;
869 const struct of_device_id *match;
6defe9a0 870 struct device_node *node = pdev->dev.of_node;
ab663789 871 struct device_node *np;
40ba6227
TF		 872 struct samsung_pin_ctrl *ctrl;
873 struct samsung_pin_bank *bank;
874 int i;
30574f0d 875
6defe9a0 876 id = of_alias_get_id(node, "pinctrl");
30574f0d
TA		 877 if (id < 0) {
878 dev_err(&pdev->dev, "failed to get alias id\n");
879 return NULL;
880 }
881 match = of_match_node(samsung_pinctrl_dt_match, node);
40ba6227
TF		 882 ctrl = (struct samsung_pin_ctrl *)match->data + id;
883
884 bank = ctrl->pin_banks;
885 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
19846950 886 spin_lock_init(&bank->slock);
6defe9a0 887 bank->drvdata = d;
40ba6227
TF		 888 bank->pin_base = ctrl->nr_pins;
889 ctrl->nr_pins += bank->nr_pins;
40ba6227
TF		 890 }
891
ab663789
TF		 892 for_each_child_of_node(node, np) {
893 if (!of_find_property(np, "gpio-controller", NULL))
894 continue;
895 bank = ctrl->pin_banks;
896 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
897 if (!strcmp(bank->name, np->name)) {
898 bank->of_node = np;
899 break;
900 }
901 }
902 }
903
40ba6227
TF		 904 ctrl->base = pin_base;
905 pin_base += ctrl->nr_pins;
906
907 return ctrl;
30574f0d
TA		 908}
909
150632b0 910static int samsung_pinctrl_probe(struct platform_device *pdev)
30574f0d
TA		 911{
912 struct samsung_pinctrl_drv_data *drvdata;
913 struct device *dev = &pdev->dev;
914 struct samsung_pin_ctrl *ctrl;
915 struct resource *res;
916 int ret;
917
918 if (!dev->of_node) {
919 dev_err(dev, "device tree node not found\n");
920 return -ENODEV;
921 }
922
30574f0d
TA		 923 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
924 if (!drvdata) {
925 dev_err(dev, "failed to allocate memory for driver's "
926 "private data\n");
927 return -ENOMEM;
928 }
6defe9a0
TF		 929
930 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
931 if (!ctrl) {
932 dev_err(&pdev->dev, "driver data not available\n");
933 return -EINVAL;
934 }
30574f0d
TA		 935 drvdata->ctrl = ctrl;
936 drvdata->dev = dev;
937
938 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
9e0c1fb2
TR		 939 drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
940 if (IS_ERR(drvdata->virt_base))
941 return PTR_ERR(drvdata->virt_base);
30574f0d
TA		 942
943 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
944 if (res)
945 drvdata->irq = res->start;
946
947 ret = samsung_gpiolib_register(pdev, drvdata);
948 if (ret)
949 return ret;
950
951 ret = samsung_pinctrl_register(pdev, drvdata);
952 if (ret) {
953 samsung_gpiolib_unregister(pdev, drvdata);
954 return ret;
955 }
956
957 if (ctrl->eint_gpio_init)
958 ctrl->eint_gpio_init(drvdata);
959 if (ctrl->eint_wkup_init)
960 ctrl->eint_wkup_init(drvdata);
961
962 platform_set_drvdata(pdev, drvdata);
d9f99863
DA		 963
964 /* Add to the global list */
965 list_add_tail(&drvdata->node, &drvdata_list);
966
30574f0d
TA		 967 return 0;
968}
969
d9f99863
DA		 970#ifdef CONFIG_PM
971
972/**
973 * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device
974 *
975 * Save data for all banks handled by this device.
976 */
977static void samsung_pinctrl_suspend_dev(
978 struct samsung_pinctrl_drv_data *drvdata)
979{
980 struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
981 void __iomem *virt_base = drvdata->virt_base;
982 int i;
983
984 for (i = 0; i < ctrl->nr_banks; i++) {
985 struct samsung_pin_bank *bank = &ctrl->pin_banks[i];
986 void __iomem *reg = virt_base + bank->pctl_offset;
987
988 u8 *offs = bank->type->reg_offset;
989 u8 *widths = bank->type->fld_width;
990 enum pincfg_type type;
991
992 /* Registers without a powerdown config aren't lost */
993 if (!widths[PINCFG_TYPE_CON_PDN])
994 continue;
995
996 for (type = 0; type < PINCFG_TYPE_NUM; type++)
997 if (widths[type])
998 bank->pm_save[type] = readl(reg + offs[type]);
999
1000 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1001 /* Some banks have two config registers */
1002 bank->pm_save[PINCFG_TYPE_NUM] =
1003 readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
1004 pr_debug("Save %s @ %p (con %#010x %08x)\n",
1005 bank->name, reg,
1006 bank->pm_save[PINCFG_TYPE_FUNC],
1007 bank->pm_save[PINCFG_TYPE_NUM]);
1008 } else {
1009 pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
1010 reg, bank->pm_save[PINCFG_TYPE_FUNC]);
1011 }
1012 }
21c21993
TF		 1013
1014 if (ctrl->suspend)
1015 ctrl->suspend(drvdata);
d9f99863
DA		 1016}
1017
1018/**
1019 * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device
1020 *
1021 * Restore one of the banks that was saved during suspend.
1022 *
1023 * We don't bother doing anything complicated to avoid glitching lines since
1024 * we're called before pad retention is turned off.
1025 */
1026static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
1027{
1028 struct samsung_pin_ctrl *ctrl = drvdata->ctrl;
1029 void __iomem *virt_base = drvdata->virt_base;
1030 int i;
1031
21c21993
TF		 1032 if (ctrl->resume)
1033 ctrl->resume(drvdata);
1034
d9f99863
DA		 1035 for (i = 0; i < ctrl->nr_banks; i++) {
1036 struct samsung_pin_bank *bank = &ctrl->pin_banks[i];
1037 void __iomem *reg = virt_base + bank->pctl_offset;
1038
1039 u8 *offs = bank->type->reg_offset;
1040 u8 *widths = bank->type->fld_width;
1041 enum pincfg_type type;
1042
1043 /* Registers without a powerdown config aren't lost */
1044 if (!widths[PINCFG_TYPE_CON_PDN])
1045 continue;
1046
1047 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1048 /* Some banks have two config registers */
1049 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
1050 bank->name, reg,
1051 readl(reg + offs[PINCFG_TYPE_FUNC]),
1052 readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
1053 bank->pm_save[PINCFG_TYPE_FUNC],
1054 bank->pm_save[PINCFG_TYPE_NUM]);
1055 writel(bank->pm_save[PINCFG_TYPE_NUM],
1056 reg + offs[PINCFG_TYPE_FUNC] + 4);
1057 } else {
1058 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
1059 reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
1060 bank->pm_save[PINCFG_TYPE_FUNC]);
1061 }
1062 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1063 if (widths[type])
1064 writel(bank->pm_save[type], reg + offs[type]);
1065 }
1066}
1067
1068/**
1069 * samsung_pinctrl_suspend - save pinctrl state for suspend
1070 *
1071 * Save data for all banks across all devices.
1072 */
1073static int samsung_pinctrl_suspend(void)
1074{
1075 struct samsung_pinctrl_drv_data *drvdata;
1076
1077 list_for_each_entry(drvdata, &drvdata_list, node) {
1078 samsung_pinctrl_suspend_dev(drvdata);
1079 }
1080
1081 return 0;
1082}
1083
1084/**
1085 * samsung_pinctrl_resume - restore pinctrl state for suspend
1086 *
1087 * Restore data for all banks across all devices.
1088 */
1089static void samsung_pinctrl_resume(void)
1090{
1091 struct samsung_pinctrl_drv_data *drvdata;
1092
1093 list_for_each_entry_reverse(drvdata, &drvdata_list, node) {
1094 samsung_pinctrl_resume_dev(drvdata);
1095 }
1096}
1097
1098#else
1099#define samsung_pinctrl_suspend NULL
1100#define samsung_pinctrl_resume NULL
1101#endif
1102
1103static struct syscore_ops samsung_pinctrl_syscore_ops = {
1104 .suspend = samsung_pinctrl_suspend,
1105 .resume = samsung_pinctrl_resume,
1106};
1107
30574f0d 1108static const struct of_device_id samsung_pinctrl_dt_match[] = {
d5517bec 1109#ifdef CONFIG_PINCTRL_EXYNOS
b533c868 1110 { .compatible = "samsung,exynos4210-pinctrl",
30574f0d 1111 .data = (void *)exynos4210_pin_ctrl },
b533c868 1112 { .compatible = "samsung,exynos4x12-pinctrl",
6edc794a 1113 .data = (void *)exynos4x12_pin_ctrl },
f67faf48
TA		 1114 { .compatible = "samsung,exynos5250-pinctrl",
1115 .data = (void *)exynos5250_pin_ctrl },
61dd7261
TF		 1116#endif
1117#ifdef CONFIG_PINCTRL_S3C64XX
1118 { .compatible = "samsung,s3c64xx-pinctrl",
1119 .data = s3c64xx_pin_ctrl },
d5517bec 1120#endif
30574f0d
TA		 1121 {},
1122};
1123MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
1124
1125static struct platform_driver samsung_pinctrl_driver = {
1126 .probe = samsung_pinctrl_probe,
1127 .driver = {
1128 .name = "samsung-pinctrl",
1129 .owner = THIS_MODULE,
1130 .of_match_table = of_match_ptr(samsung_pinctrl_dt_match),
1131 },
1132};
1133
1134static int __init samsung_pinctrl_drv_register(void)
1135{
d9f99863
DA		 1136 /*
1137 * Register syscore ops for save/restore of registers across suspend.
1138 * It's important to ensure that this driver is running at an earlier
1139 * initcall level than any arch-specific init calls that install syscore
1140 * ops that turn off pad retention (like exynos_pm_resume).
1141 */
1142 register_syscore_ops(&samsung_pinctrl_syscore_ops);
1143
30574f0d
TA		 1144 return platform_driver_register(&samsung_pinctrl_driver);
1145}
1146postcore_initcall(samsung_pinctrl_drv_register);
1147
1148static void __exit samsung_pinctrl_drv_unregister(void)
1149{
1150 platform_driver_unregister(&samsung_pinctrl_driver);
1151}
1152module_exit(samsung_pinctrl_drv_unregister);
1153
1154MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
1155MODULE_DESCRIPTION("Samsung pinctrl driver");
1156MODULE_LICENSE("GPL v2");
kernel source for telekom puls (alcatel/mediatek)