[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pinctrl / pinctrl-exynos.h

/*
 * Exynos specific definitions for Samsung pinctrl and gpiolib driver.
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 * Copyright (c) 2012 Linaro Ltd
 *		http://www.linaro.org
 *
 * This file contains the Exynos specific definitions for the Samsung
 * pinctrl/gpiolib interface drivers.
 *
 * Author: Thomas Abraham <thomas.ab@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

/* External GPIO and wakeup interrupt related definitions */
#define EXYNOS_GPIO_ECON_OFFSET		0x700
#define EXYNOS_GPIO_EFLTCON_OFFSET	0x800
#define EXYNOS_GPIO_EMASK_OFFSET	0x900
#define EXYNOS_GPIO_EPEND_OFFSET	0xA00
#define EXYNOS_WKUP_ECON_OFFSET		0xE00
#define EXYNOS_WKUP_EMASK_OFFSET	0xF00
#define EXYNOS_WKUP_EPEND_OFFSET	0xF40
#define EXYNOS_SVC_OFFSET		0xB08
#define EXYNOS_EINT_FUNC		0xF

/* helpers to access interrupt service register */
#define EXYNOS_SVC_GROUP_SHIFT		3
#define EXYNOS_SVC_GROUP_MASK		0x1f
#define EXYNOS_SVC_NUM_MASK		7
#define EXYNOS_SVC_GROUP(x)		((x >> EXYNOS_SVC_GROUP_SHIFT) & \
						EXYNOS_SVC_GROUP_MASK)

/* Exynos specific external interrupt trigger types */
#define EXYNOS_EINT_LEVEL_LOW		0
#define EXYNOS_EINT_LEVEL_HIGH		1
#define EXYNOS_EINT_EDGE_FALLING	2
#define EXYNOS_EINT_EDGE_RISING		3
#define EXYNOS_EINT_EDGE_BOTH		4
#define EXYNOS_EINT_CON_MASK		0xF
#define EXYNOS_EINT_CON_LEN		4

#define EXYNOS_EINT_MAX_PER_BANK	8
#define EXYNOS_EINT_NR_WKUP_EINT

#define EXYNOS_PIN_BANK_EINTN(pins, reg, id)		\
	{						\
		.type		= &bank_type_off,	\
		.pctl_offset	= reg,			\
		.nr_pins	= pins,			\
		.eint_type	= EINT_TYPE_NONE,	\
		.name		= id			\
	}

#define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs)	\
	{						\
		.type		= &bank_type_off,	\
		.pctl_offset	= reg,			\
		.nr_pins	= pins,			\
		.eint_type	= EINT_TYPE_GPIO,	\
		.eint_offset	= offs,			\
		.name		= id			\
	}

#define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs)	\
	{						\
		.type		= &bank_type_alive,	\
		.pctl_offset	= reg,			\
		.nr_pins	= pins,			\
		.eint_type	= EINT_TYPE_WKUP,	\
		.eint_offset	= offs,			\
		.name		= id			\
	}

/**
 * struct exynos_weint_data: irq specific data for all the wakeup interrupts
 * generated by the external wakeup interrupt controller.
 * @irq: interrupt number within the domain.
 * @bank: bank responsible for this interrupt
 */
struct exynos_weint_data {
	unsigned int irq;
	struct samsung_pin_bank *bank;
};

/**
 * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts
 * generated by the external wakeup interrupt controller.
 * @nr_banks: count of banks being part of the mux
 * @banks: array of banks being part of the mux
 */
struct exynos_muxed_weint_data {
	unsigned int nr_banks;
	struct samsung_pin_bank *banks[];
};
Commit	Line	Data
43b169db TA	1	/*
	2	* Exynos specific definitions for Samsung pinctrl and gpiolib driver.
	3	*
	4	* Copyright (c) 2012 Samsung Electronics Co., Ltd.
	5	* http://www.samsung.com
	6	* Copyright (c) 2012 Linaro Ltd
	7	* http://www.linaro.org
	8	*
	9	* This file contains the Exynos specific definitions for the Samsung
	10	* pinctrl/gpiolib interface drivers.
	11	*
	12	* Author: Thomas Abraham <thomas.ab@samsung.com>
	13	*
	14	* This program is free software; you can redistribute it and/or modify
	15	* it under the terms of the GNU General Public License as published by
	16	* the Free Software Foundation; either version 2 of the License, or
	17	* (at your option) any later version.
	18	*/
	19
43b169db TA	20	/* External GPIO and wakeup interrupt related definitions */
43b169db TA	21	#define EXYNOS_GPIO_ECON_OFFSET 0x700
7ccbc60c	22	#define EXYNOS_GPIO_EFLTCON_OFFSET 0x800
43b169db TA	23	#define EXYNOS_GPIO_EMASK_OFFSET 0x900
	24	#define EXYNOS_GPIO_EPEND_OFFSET 0xA00
	25	#define EXYNOS_WKUP_ECON_OFFSET 0xE00
	26	#define EXYNOS_WKUP_EMASK_OFFSET 0xF00
	27	#define EXYNOS_WKUP_EPEND_OFFSET 0xF40
	28	#define EXYNOS_SVC_OFFSET 0xB08
ee2f573c	29	#define EXYNOS_EINT_FUNC 0xF
43b169db TA	30
	31	/* helpers to access interrupt service register */
	32	#define EXYNOS_SVC_GROUP_SHIFT 3
	33	#define EXYNOS_SVC_GROUP_MASK 0x1f
	34	#define EXYNOS_SVC_NUM_MASK 7
	35	#define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \
	36	EXYNOS_SVC_GROUP_MASK)
	37
	38	/* Exynos specific external interrupt trigger types */
	39	#define EXYNOS_EINT_LEVEL_LOW 0
	40	#define EXYNOS_EINT_LEVEL_HIGH 1
	41	#define EXYNOS_EINT_EDGE_FALLING 2
	42	#define EXYNOS_EINT_EDGE_RISING 3
	43	#define EXYNOS_EINT_EDGE_BOTH 4
	44	#define EXYNOS_EINT_CON_MASK 0xF
	45	#define EXYNOS_EINT_CON_LEN 4
	46
	47	#define EXYNOS_EINT_MAX_PER_BANK 8
	48	#define EXYNOS_EINT_NR_WKUP_EINT
	49
40ba6227	50	#define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \
43b169db	51	{ \
499147c9	52	.type = &bank_type_off, \
43b169db	53	.pctl_offset = reg, \
40ba6227	54	.nr_pins = pins, \
43b169db TA	55	.eint_type = EINT_TYPE_NONE, \
	56	.name = id \
	57	}
	58
1b6056d6	59	#define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \
43b169db	60	{ \
499147c9	61	.type = &bank_type_off, \
43b169db	62	.pctl_offset = reg, \
40ba6227	63	.nr_pins = pins, \
43b169db	64	.eint_type = EINT_TYPE_GPIO, \
1b6056d6	65	.eint_offset = offs, \
43b169db TA	66	.name = id \
	67	}
	68
a04b07c0 TF	69	#define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \
a04b07c0 TF	70	{ \
499147c9	71	.type = &bank_type_alive, \
a04b07c0 TF	72	.pctl_offset = reg, \
a04b07c0 TF	73	.nr_pins = pins, \
a04b07c0 TF	74	.eint_type = EINT_TYPE_WKUP, \
	75	.eint_offset = offs, \
	76	.name = id \
	77	}
	78
43b169db TA	79	/**
	80	* struct exynos_weint_data: irq specific data for all the wakeup interrupts
	81	* generated by the external wakeup interrupt controller.
43b169db	82	* @irq: interrupt number within the domain.
a04b07c0	83	* @bank: bank responsible for this interrupt
43b169db TA	84	*/
43b169db TA	85	struct exynos_weint_data {
a04b07c0 TF	86	unsigned int irq;
	87	struct samsung_pin_bank *bank;
	88	};
	89
	90	/**
	91	* struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts
	92	* generated by the external wakeup interrupt controller.
	93	* @nr_banks: count of banks being part of the mux
	94	* @banks: array of banks being part of the mux
	95	*/
	96	struct exynos_muxed_weint_data {
	97	unsigned int nr_banks;
	98	struct samsung_pin_bank *banks[];
43b169db	99	};