[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pcmcia / sa1111_neponset.c

/*
 * linux/drivers/pcmcia/sa1100_neponset.c
 *
 * Neponset PCMCIA specific routines
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/init.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <mach/neponset.h>
#include <asm/hardware/sa1111.h>

#include "sa1111_generic.h"

/*
 * Neponset uses the Maxim MAX1600, with the following connections:
 *
 *   MAX1600      Neponset
 *
 *    A0VCC        SA-1111 GPIO A<1>
 *    A1VCC        SA-1111 GPIO A<0>
 *    A0VPP        CPLD NCR A0VPP
 *    A1VPP        CPLD NCR A1VPP
 *    B0VCC        SA-1111 GPIO A<2>
 *    B1VCC        SA-1111 GPIO A<3>
 *    B0VPP        ground (slot B is CF)
 *    B1VPP        ground (slot B is CF)
 *
 *     VX          VCC (5V)
 *     VY          VCC3_3 (3.3V)
 *     12INA       12V
 *     12INB       ground (slot B is CF)
 *
 * The MAX1600 CODE pin is tied to ground, placing the device in 
 * "Standard Intel code" mode. Refer to the Maxim data sheet for
 * the corresponding truth table.
 */

static int
neponset_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state)
{
	struct sa1111_pcmcia_socket *s = to_skt(skt);
	unsigned int ncr_mask, ncr_set, pa_dwr_mask, pa_dwr_set;
	int ret;

	switch (skt->nr) {
	case 0:
		pa_dwr_mask = GPIO_A0 | GPIO_A1;
		ncr_mask = NCR_A0VPP | NCR_A1VPP;

		if (state->Vpp == 0)
			ncr_set = 0;
		else if (state->Vpp == 120)
			ncr_set = NCR_A1VPP;
		else if (state->Vpp == state->Vcc)
			ncr_set = NCR_A0VPP;
		else {
			printk(KERN_ERR "%s(): unrecognized VPP %u\n",
			       __func__, state->Vpp);
			return -1;
		}
		break;

	case 1:
		pa_dwr_mask = GPIO_A2 | GPIO_A3;
		ncr_mask = 0;
		ncr_set = 0;

		if (state->Vpp != state->Vcc && state->Vpp != 0) {
			printk(KERN_ERR "%s(): CF slot cannot support VPP %u\n",
			       __func__, state->Vpp);
			return -1;
		}
		break;

	default:
		return -1;
	}

	/*
	 * pa_dwr_set is the mask for selecting Vcc on both sockets.
	 * pa_dwr_mask selects which bits (and therefore socket) we change.
	 */
	switch (state->Vcc) {
	default:
	case 0:  pa_dwr_set = 0;		break;
	case 33: pa_dwr_set = GPIO_A1|GPIO_A2;	break;
	case 50: pa_dwr_set = GPIO_A0|GPIO_A3;	break;
	}

	ret = sa1111_pcmcia_configure_socket(skt, state);
	if (ret == 0) {
		neponset_ncr_frob(ncr_mask, ncr_set);
		sa1111_set_io(s->dev, pa_dwr_mask, pa_dwr_set);
	}

	return ret;
}

static struct pcmcia_low_level neponset_pcmcia_ops = {
	.owner			= THIS_MODULE,
	.configure_socket	= neponset_pcmcia_configure_socket,
	.first			= 0,
	.nr			= 2,
};

int pcmcia_neponset_init(struct sa1111_dev *sadev)
{
	int ret = -ENODEV;

	if (machine_is_assabet()) {
		/*
		 * Set GPIO_A<3:0> to be outputs for the MAX1600,
		 * and switch to standby mode.
		 */
		sa1111_set_io_dir(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0, 0);
		sa1111_set_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
		sa1111_set_sleep_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
		sa11xx_drv_pcmcia_ops(&neponset_pcmcia_ops);
		ret = sa1111_pcmcia_add(sadev, &neponset_pcmcia_ops,
				sa11xx_drv_pcmcia_add_one);
	}

	return ret;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/pcmcia/sa1100_neponset.c
	3	*
	4	* Neponset PCMCIA specific routines
	5	*/
	6	#include <linux/module.h>
	7	#include <linux/kernel.h>
1da177e4 LT	8	#include <linux/device.h>
	9	#include <linux/errno.h>
	10	#include <linux/init.h>
	11
a09e64fb	12	#include <mach/hardware.h>
1da177e4	13	#include <asm/mach-types.h>
a09e64fb	14	#include <mach/neponset.h>
1da177e4 LT	15	#include <asm/hardware/sa1111.h>
	16
	17	#include "sa1111_generic.h"
	18
	19	/*
	20	* Neponset uses the Maxim MAX1600, with the following connections:
	21	*
	22	* MAX1600 Neponset
	23	*
	24	* A0VCC SA-1111 GPIO A<1>
	25	* A1VCC SA-1111 GPIO A<0>
	26	* A0VPP CPLD NCR A0VPP
	27	* A1VPP CPLD NCR A1VPP
	28	* B0VCC SA-1111 GPIO A<2>
	29	* B1VCC SA-1111 GPIO A<3>
	30	* B0VPP ground (slot B is CF)
	31	* B1VPP ground (slot B is CF)
	32	*
	33	* VX VCC (5V)
	34	* VY VCC3_3 (3.3V)
	35	* 12INA 12V
	36	* 12INB ground (slot B is CF)
	37	*
	38	* The MAX1600 CODE pin is tied to ground, placing the device in
	39	* "Standard Intel code" mode. Refer to the Maxim data sheet for
	40	* the corresponding truth table.
	41	*/
	42
	43	static int
	44	neponset_pcmcia_configure_socket(struct soc_pcmcia_socket skt, const socket_state_t state)
	45	{
701a5dc0	46	struct sa1111_pcmcia_socket *s = to_skt(skt);
1da177e4 LT	47	unsigned int ncr_mask, ncr_set, pa_dwr_mask, pa_dwr_set;
	48	int ret;
	49
	50	switch (skt->nr) {
	51	case 0:
	52	pa_dwr_mask = GPIO_A0 \| GPIO_A1;
	53	ncr_mask = NCR_A0VPP \| NCR_A1VPP;
	54
	55	if (state->Vpp == 0)
	56	ncr_set = 0;
	57	else if (state->Vpp == 120)
	58	ncr_set = NCR_A1VPP;
	59	else if (state->Vpp == state->Vcc)
	60	ncr_set = NCR_A0VPP;
	61	else {
	62	printk(KERN_ERR "%s(): unrecognized VPP %u\n",
2e11cb4c	63	__func__, state->Vpp);
1da177e4 LT	64	return -1;
	65	}
	66	break;
	67
	68	case 1:
	69	pa_dwr_mask = GPIO_A2 \| GPIO_A3;
	70	ncr_mask = 0;
	71	ncr_set = 0;
	72
	73	if (state->Vpp != state->Vcc && state->Vpp != 0) {
	74	printk(KERN_ERR "%s(): CF slot cannot support VPP %u\n",
2e11cb4c	75	__func__, state->Vpp);
1da177e4 LT	76	return -1;
	77	}
	78	break;
	79
	80	default:
	81	return -1;
	82	}
	83
	84	/*
	85	* pa_dwr_set is the mask for selecting Vcc on both sockets.
	86	* pa_dwr_mask selects which bits (and therefore socket) we change.
	87	*/
	88	switch (state->Vcc) {
	89	default:
	90	case 0: pa_dwr_set = 0; break;
	91	case 33: pa_dwr_set = GPIO_A1\|GPIO_A2; break;
	92	case 50: pa_dwr_set = GPIO_A0\|GPIO_A3; break;
	93	}
	94
	95	ret = sa1111_pcmcia_configure_socket(skt, state);
	96	if (ret == 0) {
6ad1b614	97	neponset_ncr_frob(ncr_mask, ncr_set);
701a5dc0	98	sa1111_set_io(s->dev, pa_dwr_mask, pa_dwr_set);
1da177e4 LT	99	}
1da177e4 LT	100
65c77dca	101	return ret;
1da177e4 LT	102	}
1da177e4 LT	103
1da177e4 LT	104	static struct pcmcia_low_level neponset_pcmcia_ops = {
1da177e4 LT	105	.owner = THIS_MODULE,
1da177e4	106	.configure_socket = neponset_pcmcia_configure_socket,
701a5dc0 RKAL	107	.first = 0,
701a5dc0 RKAL	108	.nr = 2,
1da177e4 LT	109	};
1da177e4 LT	110
b29cf62c	111	int pcmcia_neponset_init(struct sa1111_dev *sadev)
1da177e4 LT	112	{
	113	int ret = -ENODEV;
	114
	115	if (machine_is_assabet()) {
	116	/*
	117	* Set GPIO_A<3:0> to be outputs for the MAX1600,
	118	* and switch to standby mode.
	119	*/
	120	sa1111_set_io_dir(sadev, GPIO_A0\|GPIO_A1\|GPIO_A2\|GPIO_A3, 0, 0);
	121	sa1111_set_io(sadev, GPIO_A0\|GPIO_A1\|GPIO_A2\|GPIO_A3, 0);
	122	sa1111_set_sleep_io(sadev, GPIO_A0\|GPIO_A1\|GPIO_A2\|GPIO_A3, 0);
701a5dc0 RKAL	123	sa11xx_drv_pcmcia_ops(&neponset_pcmcia_ops);
	124	ret = sa1111_pcmcia_add(sadev, &neponset_pcmcia_ops,
	125	sa11xx_drv_pcmcia_add_one);
1da177e4 LT	126	}
	127
	128	return ret;
	129	}