[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pcmcia / at91_cf.c

/*
 * at91_cf.c -- AT91 CompactFlash controller driver
 *
 * Copyright (C) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/gpio.h>
#include <linux/platform_data/atmel.h>

#include <pcmcia/ss.h>

#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/sizes.h>

#include <mach/at91rm9200_mc.h>
#include <mach/at91_ramc.h>


/*
 * A0..A10 work in each range; A23 indicates I/O space;  A25 is CFRNW;
 * some other bit in {A24,A22..A11} is nREG to flag memory access
 * (vs attributes).  So more than 2KB/region would just be waste.
 * Note: These are offsets from the physical base address.
 */
#define	CF_ATTR_PHYS	(0)
#define	CF_IO_PHYS	(1 << 23)
#define	CF_MEM_PHYS	(0x017ff800)

/*--------------------------------------------------------------------------*/

static const char driver_name[] = "at91_cf";

struct at91_cf_socket {
	struct pcmcia_socket	socket;

	unsigned		present:1;

	struct platform_device	*pdev;
	struct at91_cf_data	*board;

	unsigned long		phys_baseaddr;
};

static inline int at91_cf_present(struct at91_cf_socket *cf)
{
	return !gpio_get_value(cf->board->det_pin);
}

/*--------------------------------------------------------------------------*/

static int at91_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

static irqreturn_t at91_cf_irq(int irq, void *_cf)
{
	struct at91_cf_socket *cf = _cf;

	if (irq == gpio_to_irq(cf->board->det_pin)) {
		unsigned present = at91_cf_present(cf);

		/* kick pccard as needed */
		if (present != cf->present) {
			cf->present = present;
			pr_debug("%s: card %s\n", driver_name,
					present ? "present" : "gone");
			pcmcia_parse_events(&cf->socket, SS_DETECT);
		}
	}

	return IRQ_HANDLED;
}

static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	struct at91_cf_socket	*cf;

	if (!sp)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	/* NOTE: CF is always 3VCARD */
	if (at91_cf_present(cf)) {
		int rdy	= gpio_is_valid(cf->board->irq_pin);	/* RDY/nIRQ */
		int vcc	= gpio_is_valid(cf->board->vcc_pin);

		*sp = SS_DETECT | SS_3VCARD;
		if (!rdy || gpio_get_value(rdy))
			*sp |= SS_READY;
		if (!vcc || gpio_get_value(vcc))
			*sp |= SS_POWERON;
	} else
		*sp = 0;

	return 0;
}

static int
at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	struct at91_cf_socket	*cf;

	cf = container_of(sock, struct at91_cf_socket, socket);

	/* switch Vcc if needed and possible */
	if (gpio_is_valid(cf->board->vcc_pin)) {
		switch (s->Vcc) {
			case 0:
				gpio_set_value(cf->board->vcc_pin, 0);
				break;
			case 33:
				gpio_set_value(cf->board->vcc_pin, 1);
				break;
			default:
				return -EINVAL;
		}
	}

	/* toggle reset if needed */
	gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);

	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
		driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int at91_cf_ss_suspend(struct pcmcia_socket *s)
{
	return at91_cf_set_socket(s, &dead_socket);
}

/* we already mapped the I/O region */
static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct at91_cf_socket	*cf;
	u32			csr;

	cf = container_of(s, struct at91_cf_socket, socket);
	io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ);

	/*
	 * Use 16 bit accesses unless/until we need 8-bit i/o space.
	 */
	csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;

	/*
	 * NOTE: this CF controller ignores IOIS16, so we can't really do
	 * MAP_AUTOSZ.  The 16bit mode allows single byte access on either
	 * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	 * purposes (and handles ide-cs).
	 *
	 * The 8bit mode is needed for odd byte access on D0-D7.  It seems
	 * some cards only like that way to get at the odd byte, despite
	 * CF 3.0 spec table 35 also giving the D8-D15 option.
	 */
	if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
		csr |= AT91_SMC_DBW_8;
		pr_debug("%s: 8bit i/o bus\n", driver_name);
	} else {
		csr |= AT91_SMC_DBW_16;
		pr_debug("%s: 16bit i/o bus\n", driver_name);
	}
	at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);

	io->start = cf->socket.io_offset;
	io->stop = io->start + SZ_2K - 1;

	return 0;
}

/* pcmcia layer maps/unmaps mem regions */
static int
at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct at91_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT);
	if (map->flags & MAP_ATTRIB)
		map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
	else
		map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;

	return 0;
}

static struct pccard_operations at91_cf_ops = {
	.init			= at91_cf_ss_init,
	.suspend		= at91_cf_ss_suspend,
	.get_status		= at91_cf_get_status,
	.set_socket		= at91_cf_set_socket,
	.set_io_map		= at91_cf_set_io_map,
	.set_mem_map		= at91_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

static int __init at91_cf_probe(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf;
	struct at91_cf_data	*board = pdev->dev.platform_data;
	struct resource		*io;
	int			status;

	if (!board || !gpio_is_valid(board->det_pin) || !gpio_is_valid(board->rst_pin))
		return -ENODEV;

	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!io)
		return -ENODEV;

	cf = kzalloc(sizeof *cf, GFP_KERNEL);
	if (!cf)
		return -ENOMEM;

	cf->board = board;
	cf->pdev = pdev;
	cf->phys_baseaddr = io->start;
	platform_set_drvdata(pdev, cf);

	/* must be a GPIO; ergo must trigger on both edges */
	status = gpio_request(board->det_pin, "cf_det");
	if (status < 0)
		goto fail0;
	status = request_irq(gpio_to_irq(board->det_pin), at91_cf_irq, 0, driver_name, cf);
	if (status < 0)
		goto fail00;
	device_init_wakeup(&pdev->dev, 1);

	status = gpio_request(board->rst_pin, "cf_rst");
	if (status < 0)
		goto fail0a;

	if (gpio_is_valid(board->vcc_pin)) {
		status = gpio_request(board->vcc_pin, "cf_vcc");
		if (status < 0)
			goto fail0b;
	}

	/*
	 * The card driver will request this irq later as needed.
	 * but it causes lots of "irqNN: nobody cared" messages
	 * unless we report that we handle everything (sigh).
	 * (Note:  DK board doesn't wire the IRQ pin...)
	 */
	if (gpio_is_valid(board->irq_pin)) {
		status = gpio_request(board->irq_pin, "cf_irq");
		if (status < 0)
			goto fail0c;
		status = request_irq(gpio_to_irq(board->irq_pin), at91_cf_irq,
				IRQF_SHARED, driver_name, cf);
		if (status < 0)
			goto fail0d;
		cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
	} else
		cf->socket.pci_irq = nr_irqs + 1;

	/* pcmcia layer only remaps "real" memory not iospace */
	cf->socket.io_offset = (unsigned long)
			ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
	if (!cf->socket.io_offset) {
		status = -ENXIO;
		goto fail1;
	}

	/* reserve chip-select regions */
	if (!request_mem_region(io->start, resource_size(io), driver_name)) {
		status = -ENXIO;
		goto fail1;
	}

	pr_info("%s: irqs det #%d, io #%d\n", driver_name,
		gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.parent = &pdev->dev;
	cf->socket.ops = &at91_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = io;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail2;

	return 0;

fail2:
	release_mem_region(io->start, resource_size(io));
fail1:
	if (cf->socket.io_offset)
		iounmap((void __iomem *) cf->socket.io_offset);
	if (gpio_is_valid(board->irq_pin)) {
		free_irq(gpio_to_irq(board->irq_pin), cf);
fail0d:
		gpio_free(board->irq_pin);
	}
fail0c:
	if (gpio_is_valid(board->vcc_pin))
		gpio_free(board->vcc_pin);
fail0b:
	gpio_free(board->rst_pin);
fail0a:
	device_init_wakeup(&pdev->dev, 0);
	free_irq(gpio_to_irq(board->det_pin), cf);
fail00:
	gpio_free(board->det_pin);
fail0:
	kfree(cf);
	return status;
}

static int __exit at91_cf_remove(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;
	struct resource		*io = cf->socket.io[0].res;

	pcmcia_unregister_socket(&cf->socket);
	release_mem_region(io->start, resource_size(io));
	iounmap((void __iomem *) cf->socket.io_offset);
	if (gpio_is_valid(board->irq_pin)) {
		free_irq(gpio_to_irq(board->irq_pin), cf);
		gpio_free(board->irq_pin);
	}
	if (gpio_is_valid(board->vcc_pin))
		gpio_free(board->vcc_pin);
	gpio_free(board->rst_pin);
	device_init_wakeup(&pdev->dev, 0);
	free_irq(gpio_to_irq(board->det_pin), cf);
	gpio_free(board->det_pin);
	kfree(cf);
	return 0;
}

#ifdef	CONFIG_PM

static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (device_may_wakeup(&pdev->dev)) {
		enable_irq_wake(gpio_to_irq(board->det_pin));
		if (gpio_is_valid(board->irq_pin))
			enable_irq_wake(gpio_to_irq(board->irq_pin));
	}
	return 0;
}

static int at91_cf_resume(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (device_may_wakeup(&pdev->dev)) {
		disable_irq_wake(gpio_to_irq(board->det_pin));
		if (gpio_is_valid(board->irq_pin))
			disable_irq_wake(gpio_to_irq(board->irq_pin));
	}

	return 0;
}

#else
#define	at91_cf_suspend		NULL
#define	at91_cf_resume		NULL
#endif

static struct platform_driver at91_cf_driver = {
	.driver = {
		.name		= (char *) driver_name,
		.owner		= THIS_MODULE,
	},
	.remove		= __exit_p(at91_cf_remove),
	.suspend	= at91_cf_suspend,
	.resume		= at91_cf_resume,
};

/*--------------------------------------------------------------------------*/

static int __init at91_cf_init(void)
{
	return platform_driver_probe(&at91_cf_driver, at91_cf_probe);
}
module_init(at91_cf_init);

static void __exit at91_cf_exit(void)
{
	platform_driver_unregister(&at91_cf_driver);
}
module_exit(at91_cf_exit);

MODULE_DESCRIPTION("AT91 Compact Flash Driver");
MODULE_AUTHOR("David Brownell");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:at91_cf");
Commit	Line	Data
2c1f3b7a AV	1	/*
	2	* at91_cf.c -- AT91 CompactFlash controller driver
	3	*
	4	* Copyright (C) 2005 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
2c1f3b7a AV	14	#include <linux/platform_device.h>
	15	#include <linux/errno.h>
	16	#include <linux/init.h>
	17	#include <linux/interrupt.h>
5a0e3ad6	18	#include <linux/slab.h>
80af9e6d	19	#include <linux/gpio.h>
bcd2360c	20	#include <linux/platform_data/atmel.h>
2c1f3b7a AV	21
	22	#include <pcmcia/ss.h>
	23
a09e64fb	24	#include <mach/hardware.h>
2c1f3b7a AV	25	#include <asm/io.h>
	26	#include <asm/sizes.h>
	27
a09e64fb	28	#include <mach/at91rm9200_mc.h>
f363c407	29	#include <mach/at91_ramc.h>
2c1f3b7a AV	30
2c1f3b7a AV	31
2c1f3b7a AV	32	/*
	33	* A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW;
	34	* some other bit in {A24,A22..A11} is nREG to flag memory access
	35	* (vs attributes). So more than 2KB/region would just be waste.
ebe5cfb3	36	* Note: These are offsets from the physical base address.
2c1f3b7a	37	*/
ebe5cfb3 AV	38	#define CF_ATTR_PHYS (0)
	39	#define CF_IO_PHYS (1 << 23)
	40	#define CF_MEM_PHYS (0x017ff800)
2c1f3b7a AV	41
	42	/--------------------------------------------------------------------------/
	43
	44	static const char driver_name[] = "at91_cf";
	45
	46	struct at91_cf_socket {
	47	struct pcmcia_socket socket;
	48
	49	unsigned present:1;
	50
	51	struct platform_device *pdev;
	52	struct at91_cf_data *board;
ebe5cfb3 AV	53
ebe5cfb3 AV	54	unsigned long phys_baseaddr;
2c1f3b7a AV	55	};
2c1f3b7a AV	56
2c1f3b7a AV	57	static inline int at91_cf_present(struct at91_cf_socket *cf)
2c1f3b7a AV	58	{
4c1fc445	59	return !gpio_get_value(cf->board->det_pin);
2c1f3b7a AV	60	}
	61
	62	/--------------------------------------------------------------------------/
	63
	64	static int at91_cf_ss_init(struct pcmcia_socket *s)
	65	{
	66	return 0;
	67	}
	68
7d12e780	69	static irqreturn_t at91_cf_irq(int irq, void *_cf)
2c1f3b7a	70	{
c7bec5ab	71	struct at91_cf_socket *cf = _cf;
2c1f3b7a	72
80af9e6d	73	if (irq == gpio_to_irq(cf->board->det_pin)) {
2c1f3b7a AV	74	unsigned present = at91_cf_present(cf);
	75
	76	/* kick pccard as needed */
	77	if (present != cf->present) {
	78	cf->present = present;
2c536200 DB	79	pr_debug("%s: card %s\n", driver_name,
2c536200 DB	80	present ? "present" : "gone");
2c1f3b7a AV	81	pcmcia_parse_events(&cf->socket, SS_DETECT);
	82	}
	83	}
	84
	85	return IRQ_HANDLED;
	86	}
	87
	88	static int at91_cf_get_status(struct pcmcia_socket s, u_int sp)
	89	{
	90	struct at91_cf_socket *cf;
	91
	92	if (!sp)
	93	return -EINVAL;
	94
	95	cf = container_of(s, struct at91_cf_socket, socket);
	96
2c536200	97	/* NOTE: CF is always 3VCARD */
2c1f3b7a	98	if (at91_cf_present(cf)) {
80af9e6d JE	99	int rdy = gpio_is_valid(cf->board->irq_pin); /* RDY/nIRQ */
80af9e6d JE	100	int vcc = gpio_is_valid(cf->board->vcc_pin);
2c1f3b7a AV	101
2c1f3b7a AV	102	*sp = SS_DETECT \| SS_3VCARD;
4c1fc445	103	if (!rdy \|\| gpio_get_value(rdy))
2c1f3b7a	104	*sp \|= SS_READY;
4c1fc445	105	if (!vcc \|\| gpio_get_value(vcc))
2c1f3b7a AV	106	*sp \|= SS_POWERON;
	107	} else
	108	*sp = 0;
	109
	110	return 0;
	111	}
	112
2c536200 DB	113	static int
2c536200 DB	114	at91_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
2c1f3b7a AV	115	{
	116	struct at91_cf_socket *cf;
	117
	118	cf = container_of(sock, struct at91_cf_socket, socket);
	119
	120	/* switch Vcc if needed and possible */
80af9e6d	121	if (gpio_is_valid(cf->board->vcc_pin)) {
2c1f3b7a AV	122	switch (s->Vcc) {
2c1f3b7a AV	123	case 0:
4c1fc445	124	gpio_set_value(cf->board->vcc_pin, 0);
2c1f3b7a AV	125	break;
2c1f3b7a AV	126	case 33:
4c1fc445	127	gpio_set_value(cf->board->vcc_pin, 1);
2c1f3b7a AV	128	break;
	129	default:
	130	return -EINVAL;
	131	}
	132	}
	133
	134	/* toggle reset if needed */
4c1fc445	135	gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);
2c1f3b7a AV	136
	137	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
	138	driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
	139
	140	return 0;
	141	}
	142
	143	static int at91_cf_ss_suspend(struct pcmcia_socket *s)
	144	{
	145	return at91_cf_set_socket(s, &dead_socket);
	146	}
	147
	148	/* we already mapped the I/O region */
	149	static int at91_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	150	{
	151	struct at91_cf_socket *cf;
	152	u32 csr;
	153
	154	cf = container_of(s, struct at91_cf_socket, socket);
	155	io->flags &= (MAP_ACTIVE \| MAP_16BIT \| MAP_AUTOSZ);
	156
	157	/*
	158	* Use 16 bit accesses unless/until we need 8-bit i/o space.
2c1f3b7a	159	*/
f363c407	160	csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
2c1f3b7a AV	161
	162	/*
	163	* NOTE: this CF controller ignores IOIS16, so we can't really do
	164	* MAP_AUTOSZ. The 16bit mode allows single byte access on either
	165	* D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	166	* purposes (and handles ide-cs).
	167	*
	168	* The 8bit mode is needed for odd byte access on D0-D7. It seems
	169	* some cards only like that way to get at the odd byte, despite
	170	* CF 3.0 spec table 35 also giving the D8-D15 option.
	171	*/
ebe5cfb3	172	if (!(io->flags & (MAP_16BIT \| MAP_AUTOSZ))) {
2c1f3b7a AV	173	csr \|= AT91_SMC_DBW_8;
	174	pr_debug("%s: 8bit i/o bus\n", driver_name);
	175	} else {
	176	csr \|= AT91_SMC_DBW_16;
	177	pr_debug("%s: 16bit i/o bus\n", driver_name);
	178	}
f363c407	179	at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
2c1f3b7a AV	180
	181	io->start = cf->socket.io_offset;
	182	io->stop = io->start + SZ_2K - 1;
	183
	184	return 0;
	185	}
	186
	187	/* pcmcia layer maps/unmaps mem regions */
2c536200 DB	188	static int
2c536200 DB	189	at91_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
2c1f3b7a AV	190	{
	191	struct at91_cf_socket *cf;
	192
	193	if (map->card_start)
	194	return -EINVAL;
	195
	196	cf = container_of(s, struct at91_cf_socket, socket);
	197
ebe5cfb3	198	map->flags &= (MAP_ACTIVE \| MAP_ATTRIB \| MAP_16BIT);
2c1f3b7a	199	if (map->flags & MAP_ATTRIB)
ebe5cfb3	200	map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
2c1f3b7a	201	else
ebe5cfb3	202	map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;
2c1f3b7a AV	203
	204	return 0;
	205	}
	206
	207	static struct pccard_operations at91_cf_ops = {
	208	.init = at91_cf_ss_init,
	209	.suspend = at91_cf_ss_suspend,
	210	.get_status = at91_cf_get_status,
	211	.set_socket = at91_cf_set_socket,
	212	.set_io_map = at91_cf_set_io_map,
	213	.set_mem_map = at91_cf_set_mem_map,
	214	};
	215
	216	/--------------------------------------------------------------------------/
	217
0db6095d	218	static int __init at91_cf_probe(struct platform_device *pdev)
2c1f3b7a AV	219	{
2c1f3b7a AV	220	struct at91_cf_socket *cf;
0db6095d	221	struct at91_cf_data *board = pdev->dev.platform_data;
2c536200	222	struct resource *io;
2c1f3b7a AV	223	int status;
2c1f3b7a AV	224
80af9e6d	225	if (!board \|\| !gpio_is_valid(board->det_pin) \|\| !gpio_is_valid(board->rst_pin))
2c1f3b7a AV	226	return -ENODEV;
2c1f3b7a AV	227
2c536200 DB	228	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	229	if (!io)
	230	return -ENODEV;
	231
cd861280	232	cf = kzalloc(sizeof *cf, GFP_KERNEL);
2c1f3b7a AV	233	if (!cf)
	234	return -ENOMEM;
	235
	236	cf->board = board;
	237	cf->pdev = pdev;
ebe5cfb3	238	cf->phys_baseaddr = io->start;
0db6095d	239	platform_set_drvdata(pdev, cf);
2c1f3b7a	240
2c1f3b7a	241	/* must be a GPIO; ergo must trigger on both edges */
4c1fc445	242	status = gpio_request(board->det_pin, "cf_det");
2c1f3b7a AV	243	if (status < 0)
2c1f3b7a AV	244	goto fail0;
80af9e6d	245	status = request_irq(gpio_to_irq(board->det_pin), at91_cf_irq, 0, driver_name, cf);
4c1fc445 DB	246	if (status < 0)
4c1fc445 DB	247	goto fail00;
0db6095d	248	device_init_wakeup(&pdev->dev, 1);
2c1f3b7a	249
4c1fc445 DB	250	status = gpio_request(board->rst_pin, "cf_rst");
	251	if (status < 0)
	252	goto fail0a;
	253
80af9e6d	254	if (gpio_is_valid(board->vcc_pin)) {
4c1fc445 DB	255	status = gpio_request(board->vcc_pin, "cf_vcc");
	256	if (status < 0)
	257	goto fail0b;
	258	}
	259
2c1f3b7a AV	260	/*
	261	* The card driver will request this irq later as needed.
	262	* but it causes lots of "irqNN: nobody cared" messages
	263	* unless we report that we handle everything (sigh).
	264	* (Note: DK board doesn't wire the IRQ pin...)
	265	*/
80af9e6d	266	if (gpio_is_valid(board->irq_pin)) {
4c1fc445 DB	267	status = gpio_request(board->irq_pin, "cf_irq");
	268	if (status < 0)
	269	goto fail0c;
80af9e6d	270	status = request_irq(gpio_to_irq(board->irq_pin), at91_cf_irq,
dace1453	271	IRQF_SHARED, driver_name, cf);
2c1f3b7a	272	if (status < 0)
4c1fc445	273	goto fail0d;
80af9e6d	274	cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
2c536200	275	} else
9130adda	276	cf->socket.pci_irq = nr_irqs + 1;
2c1f3b7a AV	277
2c1f3b7a AV	278	/* pcmcia layer only remaps "real" memory not iospace */
4c1fc445 DB	279	cf->socket.io_offset = (unsigned long)
4c1fc445 DB	280	ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
ebe5cfb3 AV	281	if (!cf->socket.io_offset) {
ebe5cfb3 AV	282	status = -ENXIO;
2c1f3b7a	283	goto fail1;
ebe5cfb3	284	}
2c1f3b7a	285
40a0017e	286	/* reserve chip-select regions */
28f65c11	287	if (!request_mem_region(io->start, resource_size(io), driver_name)) {
ebe5cfb3	288	status = -ENXIO;
2c1f3b7a	289	goto fail1;
ebe5cfb3	290	}
2c1f3b7a AV	291
2c1f3b7a AV	292	pr_info("%s: irqs det #%d, io #%d\n", driver_name,
80af9e6d	293	gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));
2c1f3b7a AV	294
2c1f3b7a AV	295	cf->socket.owner = THIS_MODULE;
e4a3c3f0	296	cf->socket.dev.parent = &pdev->dev;
2c1f3b7a AV	297	cf->socket.ops = &at91_cf_ops;
	298	cf->socket.resource_ops = &pccard_static_ops;
	299	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	300	\| SS_CAP_MEM_ALIGN;
	301	cf->socket.map_size = SZ_2K;
2c536200	302	cf->socket.io[0].res = io;
2c1f3b7a AV	303
	304	status = pcmcia_register_socket(&cf->socket);
	305	if (status < 0)
	306	goto fail2;
	307
	308	return 0;
	309
	310	fail2:
28f65c11	311	release_mem_region(io->start, resource_size(io));
2c1f3b7a	312	fail1:
3efa9970 AL	313	if (cf->socket.io_offset)
3efa9970 AL	314	iounmap((void __iomem *) cf->socket.io_offset);
80af9e6d JE	315	if (gpio_is_valid(board->irq_pin)) {
80af9e6d JE	316	free_irq(gpio_to_irq(board->irq_pin), cf);
4c1fc445 DB	317	fail0d:
	318	gpio_free(board->irq_pin);
	319	}
	320	fail0c:
80af9e6d	321	if (gpio_is_valid(board->vcc_pin))
4c1fc445 DB	322	gpio_free(board->vcc_pin);
	323	fail0b:
	324	gpio_free(board->rst_pin);
2c1f3b7a	325	fail0a:
1fbece15	326	device_init_wakeup(&pdev->dev, 0);
80af9e6d	327	free_irq(gpio_to_irq(board->det_pin), cf);
4c1fc445 DB	328	fail00:
4c1fc445 DB	329	gpio_free(board->det_pin);
2c1f3b7a	330	fail0:
2c1f3b7a AV	331	kfree(cf);
	332	return status;
	333	}
	334
0db6095d	335	static int __exit at91_cf_remove(struct platform_device *pdev)
2c1f3b7a	336	{
0db6095d DB	337	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
0db6095d DB	338	struct at91_cf_data *board = cf->board;
2c536200	339	struct resource *io = cf->socket.io[0].res;
2c1f3b7a AV	340
2c1f3b7a AV	341	pcmcia_unregister_socket(&cf->socket);
28f65c11	342	release_mem_region(io->start, resource_size(io));
4c1fc445	343	iounmap((void __iomem *) cf->socket.io_offset);
80af9e6d JE	344	if (gpio_is_valid(board->irq_pin)) {
80af9e6d JE	345	free_irq(gpio_to_irq(board->irq_pin), cf);
4c1fc445 DB	346	gpio_free(board->irq_pin);
4c1fc445 DB	347	}
80af9e6d	348	if (gpio_is_valid(board->vcc_pin))
4c1fc445 DB	349	gpio_free(board->vcc_pin);
4c1fc445 DB	350	gpio_free(board->rst_pin);
0db6095d	351	device_init_wakeup(&pdev->dev, 0);
80af9e6d	352	free_irq(gpio_to_irq(board->det_pin), cf);
4c1fc445	353	gpio_free(board->det_pin);
2c1f3b7a AV	354	kfree(cf);
	355	return 0;
	356	}
	357
0db6095d DB	358	#ifdef CONFIG_PM
	359
	360	static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
	361	{
	362	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	363	struct at91_cf_data *board = cf->board;
	364
1fbece15	365	if (device_may_wakeup(&pdev->dev)) {
80af9e6d JE	366	enable_irq_wake(gpio_to_irq(board->det_pin));
	367	if (gpio_is_valid(board->irq_pin))
	368	enable_irq_wake(gpio_to_irq(board->irq_pin));
0db6095d	369	}
0db6095d DB	370	return 0;
	371	}
	372
	373	static int at91_cf_resume(struct platform_device *pdev)
	374	{
9af20376 MP	375	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	376	struct at91_cf_data *board = cf->board;
	377
	378	if (device_may_wakeup(&pdev->dev)) {
80af9e6d JE	379	disable_irq_wake(gpio_to_irq(board->det_pin));
	380	if (gpio_is_valid(board->irq_pin))
	381	disable_irq_wake(gpio_to_irq(board->irq_pin));
9af20376 MP	382	}
9af20376 MP	383
0db6095d DB	384	return 0;
	385	}
	386
	387	#else
	388	#define at91_cf_suspend NULL
	389	#define at91_cf_resume NULL
	390	#endif
	391
	392	static struct platform_driver at91_cf_driver = {
	393	.driver = {
	394	.name = (char *) driver_name,
	395	.owner = THIS_MODULE,
	396	},
2c1f3b7a	397	.remove = __exit_p(at91_cf_remove),
0db6095d DB	398	.suspend = at91_cf_suspend,
0db6095d DB	399	.resume = at91_cf_resume,
2c1f3b7a AV	400	};
	401
	402	/--------------------------------------------------------------------------/
	403
	404	static int __init at91_cf_init(void)
	405	{
02c83595	406	return platform_driver_probe(&at91_cf_driver, at91_cf_probe);
2c1f3b7a AV	407	}
	408	module_init(at91_cf_init);
	409
	410	static void __exit at91_cf_exit(void)
	411	{
0db6095d	412	platform_driver_unregister(&at91_cf_driver);
2c1f3b7a AV	413	}
	414	module_exit(at91_cf_exit);
	415
	416	MODULE_DESCRIPTION("AT91 Compact Flash Driver");
	417	MODULE_AUTHOR("David Brownell");
	418	MODULE_LICENSE("GPL");
12c2c019	419	MODULE_ALIAS("platform:at91_cf");