[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / pci / syscall.c

/*
 *	pci_syscall.c
 *
 * For architectures where we want to allow direct access
 * to the PCI config stuff - it would probably be preferable
 * on PCs too, but there people just do it by hand with the
 * magic northbridge registers..
 */

#include <linux/errno.h>
#include <linux/pci.h>
#include <linux/syscalls.h>
#include <asm/uaccess.h>
#include "pci.h"

SYSCALL_DEFINE5(pciconfig_read, unsigned long, bus, unsigned long, dfn,
		unsigned long, off, unsigned long, len, void __user *, buf)
{
	struct pci_dev *dev;
	u8 byte;
	u16 word;
	u32 dword;
	long err;
	long cfg_ret;

	if (!capable(CAP_SYS_ADMIN))
		return -EPERM;

	err = -ENODEV;
	dev = pci_get_bus_and_slot(bus, dfn);
	if (!dev)
		goto error;

	switch (len) {
	case 1:
		cfg_ret = pci_user_read_config_byte(dev, off, &byte);
		break;
	case 2:
		cfg_ret = pci_user_read_config_word(dev, off, &word);
		break;
	case 4:
		cfg_ret = pci_user_read_config_dword(dev, off, &dword);
		break;
	default:
		err = -EINVAL;
		goto error;
	};

	err = -EIO;
	if (cfg_ret != PCIBIOS_SUCCESSFUL)
		goto error;

	switch (len) {
	case 1:
		err = put_user(byte, (unsigned char __user *)buf);
		break;
	case 2:
		err = put_user(word, (unsigned short __user *)buf);
		break;
	case 4:
		err = put_user(dword, (unsigned int __user *)buf);
		break;
	}
	pci_dev_put(dev);
	return err;

error:
	/* ??? XFree86 doesn't even check the return value.  They
	   just look for 0xffffffff in the output, since that's what
	   they get instead of a machine check on x86.  */
	switch (len) {
	case 1:
		put_user(-1, (unsigned char __user *)buf);
		break;
	case 2:
		put_user(-1, (unsigned short __user *)buf);
		break;
	case 4:
		put_user(-1, (unsigned int __user *)buf);
		break;
	}
	pci_dev_put(dev);
	return err;
}

SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
		unsigned long, off, unsigned long, len, void __user *, buf)
{
	struct pci_dev *dev;
	u8 byte;
	u16 word;
	u32 dword;
	int err = 0;

	if (!capable(CAP_SYS_ADMIN))
		return -EPERM;

	dev = pci_get_bus_and_slot(bus, dfn);
	if (!dev)
		return -ENODEV;

	switch(len) {
	case 1:
		err = get_user(byte, (u8 __user *)buf);
		if (err)
			break;
		err = pci_user_write_config_byte(dev, off, byte);
		if (err != PCIBIOS_SUCCESSFUL)
			err = -EIO;
		break;

	case 2:
		err = get_user(word, (u16 __user *)buf);
		if (err)
			break;
		err = pci_user_write_config_word(dev, off, word);
		if (err != PCIBIOS_SUCCESSFUL)
			err = -EIO;
		break;

	case 4:
		err = get_user(dword, (u32 __user *)buf);
		if (err)
			break;
		err = pci_user_write_config_dword(dev, off, dword);
		if (err != PCIBIOS_SUCCESSFUL)
			err = -EIO;
		break;

	default:
		err = -EINVAL;
		break;
	}
	pci_dev_put(dev);
	return err;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* pci_syscall.c
	3	*
	4	* For architectures where we want to allow direct access
	5	* to the PCI config stuff - it would probably be preferable
	6	* on PCs too, but there people just do it by hand with the
	7	* magic northbridge registers..
	8	*/
	9
1da177e4 LT	10	#include <linux/errno.h>
1da177e4 LT	11	#include <linux/pci.h>
1da177e4 LT	12	#include <linux/syscalls.h>
1da177e4 LT	13	#include <asm/uaccess.h>
e04b0ea2	14	#include "pci.h"
1da177e4	15
c4ea37c2 HC	16	SYSCALL_DEFINE5(pciconfig_read, unsigned long, bus, unsigned long, dfn,
c4ea37c2 HC	17	unsigned long, off, unsigned long, len, void __user *, buf)
1da177e4 LT	18	{
	19	struct pci_dev *dev;
	20	u8 byte;
	21	u16 word;
	22	u32 dword;
e4585da2 AC	23	long err;
e4585da2 AC	24	long cfg_ret;
1da177e4	25
1da177e4	26	if (!capable(CAP_SYS_ADMIN))
e4585da2	27	return -EPERM;
1da177e4 LT	28
1da177e4 LT	29	err = -ENODEV;
e4585da2	30	dev = pci_get_bus_and_slot(bus, dfn);
1da177e4 LT	31	if (!dev)
	32	goto error;
	33
1da177e4 LT	34	switch (len) {
1da177e4 LT	35	case 1:
e04b0ea2	36	cfg_ret = pci_user_read_config_byte(dev, off, &byte);
1da177e4 LT	37	break;
1da177e4 LT	38	case 2:
e04b0ea2	39	cfg_ret = pci_user_read_config_word(dev, off, &word);
1da177e4 LT	40	break;
1da177e4 LT	41	case 4:
e04b0ea2	42	cfg_ret = pci_user_read_config_dword(dev, off, &dword);
1da177e4 LT	43	break;
	44	default:
	45	err = -EINVAL;
1da177e4 LT	46	goto error;
1da177e4 LT	47	};
1da177e4 LT	48
	49	err = -EIO;
	50	if (cfg_ret != PCIBIOS_SUCCESSFUL)
	51	goto error;
	52
	53	switch (len) {
	54	case 1:
	55	err = put_user(byte, (unsigned char __user *)buf);
	56	break;
	57	case 2:
	58	err = put_user(word, (unsigned short __user *)buf);
	59	break;
	60	case 4:
	61	err = put_user(dword, (unsigned int __user *)buf);
	62	break;
e4585da2 AC	63	}
e4585da2 AC	64	pci_dev_put(dev);
1da177e4 LT	65	return err;
	66
	67	error:
	68	/* ??? XFree86 doesn't even check the return value. They
	69	just look for 0xffffffff in the output, since that's what
	70	they get instead of a machine check on x86. */
	71	switch (len) {
	72	case 1:
	73	put_user(-1, (unsigned char __user *)buf);
	74	break;
	75	case 2:
	76	put_user(-1, (unsigned short __user *)buf);
	77	break;
	78	case 4:
	79	put_user(-1, (unsigned int __user *)buf);
	80	break;
e4585da2 AC	81	}
e4585da2 AC	82	pci_dev_put(dev);
1da177e4 LT	83	return err;
	84	}
	85
c4ea37c2 HC	86	SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
c4ea37c2 HC	87	unsigned long, off, unsigned long, len, void __user *, buf)
1da177e4 LT	88	{
	89	struct pci_dev *dev;
	90	u8 byte;
	91	u16 word;
	92	u32 dword;
	93	int err = 0;
	94
	95	if (!capable(CAP_SYS_ADMIN))
	96	return -EPERM;
	97
e4585da2	98	dev = pci_get_bus_and_slot(bus, dfn);
1da177e4 LT	99	if (!dev)
	100	return -ENODEV;
	101
1da177e4 LT	102	switch(len) {
	103	case 1:
	104	err = get_user(byte, (u8 __user *)buf);
	105	if (err)
	106	break;
e04b0ea2	107	err = pci_user_write_config_byte(dev, off, byte);
1da177e4 LT	108	if (err != PCIBIOS_SUCCESSFUL)
	109	err = -EIO;
	110	break;
	111
	112	case 2:
	113	err = get_user(word, (u16 __user *)buf);
	114	if (err)
	115	break;
e04b0ea2	116	err = pci_user_write_config_word(dev, off, word);
1da177e4 LT	117	if (err != PCIBIOS_SUCCESSFUL)
	118	err = -EIO;
	119	break;
	120
	121	case 4:
	122	err = get_user(dword, (u32 __user *)buf);
	123	if (err)
	124	break;
e04b0ea2	125	err = pci_user_write_config_dword(dev, off, dword);
1da177e4 LT	126	if (err != PCIBIOS_SUCCESSFUL)
	127	err = -EIO;
	128	break;
	129
	130	default:
	131	err = -EINVAL;
	132	break;
e4585da2	133	}
e4585da2	134	pci_dev_put(dev);
1da177e4 LT	135	return err;
1da177e4 LT	136	}