Merge tag 'v3.10.62' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / of / address.c
CommitLineData
6b884a8d 1
5019f0b1 2#include <linux/device.h>
6b884a8d
GL
3#include <linux/io.h>
4#include <linux/ioport.h>
dbbdee94 5#include <linux/module.h>
6b884a8d 6#include <linux/of_address.h>
dbbdee94
GL
7#include <linux/pci_regs.h>
8#include <linux/string.h>
6b884a8d 9
dbbdee94
GL
10/* Max address size we deal with */
11#define OF_MAX_ADDR_CELLS 4
5d61b165
SW
12#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
13#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
dbbdee94
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14
15static struct of_bus *of_match_bus(struct device_node *np);
0131d897
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16static int __of_address_to_resource(struct device_node *dev,
17 const __be32 *addrp, u64 size, unsigned int flags,
35f3da32 18 const char *name, struct resource *r);
dbbdee94
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19
20/* Debug utility */
21#ifdef DEBUG
0131d897 22static void of_dump_addr(const char *s, const __be32 *addr, int na)
dbbdee94
GL
23{
24 printk(KERN_DEBUG "%s", s);
25 while (na--)
154063a9 26 printk(" %08x", be32_to_cpu(*(addr++)));
dbbdee94
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27 printk("\n");
28}
29#else
0131d897 30static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
dbbdee94
GL
31#endif
32
33/* Callbacks for bus specific translators */
34struct of_bus {
35 const char *name;
36 const char *addresses;
37 int (*match)(struct device_node *parent);
38 void (*count_cells)(struct device_node *child,
39 int *addrc, int *sizec);
47b1e689 40 u64 (*map)(__be32 *addr, const __be32 *range,
dbbdee94 41 int na, int ns, int pna);
47b1e689 42 int (*translate)(__be32 *addr, u64 offset, int na);
0131d897 43 unsigned int (*get_flags)(const __be32 *addr);
dbbdee94
GL
44};
45
46/*
47 * Default translator (generic bus)
48 */
49
50static void of_bus_default_count_cells(struct device_node *dev,
51 int *addrc, int *sizec)
52{
53 if (addrc)
54 *addrc = of_n_addr_cells(dev);
55 if (sizec)
56 *sizec = of_n_size_cells(dev);
57}
58
47b1e689 59static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
dbbdee94
GL
60 int na, int ns, int pna)
61{
62 u64 cp, s, da;
63
64 cp = of_read_number(range, na);
65 s = of_read_number(range + na + pna, ns);
66 da = of_read_number(addr, na);
67
68 pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n",
69 (unsigned long long)cp, (unsigned long long)s,
70 (unsigned long long)da);
71
72 if (da < cp || da >= (cp + s))
73 return OF_BAD_ADDR;
74 return da - cp;
75}
76
47b1e689 77static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
78{
79 u64 a = of_read_number(addr, na);
80 memset(addr, 0, na * 4);
81 a += offset;
82 if (na > 1)
154063a9
GL
83 addr[na - 2] = cpu_to_be32(a >> 32);
84 addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
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GL
85
86 return 0;
87}
88
0131d897 89static unsigned int of_bus_default_get_flags(const __be32 *addr)
dbbdee94
GL
90{
91 return IORESOURCE_MEM;
92}
93
94#ifdef CONFIG_PCI
95/*
96 * PCI bus specific translator
97 */
98
99static int of_bus_pci_match(struct device_node *np)
100{
a5ed6be7 101 /*
df6b8e74 102 * "pciex" is PCI Express
a5ed6be7
BH
103 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
104 * "ht" is hypertransport
105 */
df6b8e74
KSS
106 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") ||
107 !strcmp(np->type, "vci") || !strcmp(np->type, "ht");
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GL
108}
109
110static void of_bus_pci_count_cells(struct device_node *np,
111 int *addrc, int *sizec)
112{
113 if (addrc)
114 *addrc = 3;
115 if (sizec)
116 *sizec = 2;
117}
118
0131d897 119static unsigned int of_bus_pci_get_flags(const __be32 *addr)
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GL
120{
121 unsigned int flags = 0;
0131d897 122 u32 w = be32_to_cpup(addr);
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GL
123
124 switch((w >> 24) & 0x03) {
125 case 0x01:
126 flags |= IORESOURCE_IO;
127 break;
128 case 0x02: /* 32 bits */
129 case 0x03: /* 64 bits */
130 flags |= IORESOURCE_MEM;
131 break;
132 }
133 if (w & 0x40000000)
134 flags |= IORESOURCE_PREFETCH;
135 return flags;
136}
137
47b1e689 138static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
0131d897 139 int pna)
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GL
140{
141 u64 cp, s, da;
142 unsigned int af, rf;
143
144 af = of_bus_pci_get_flags(addr);
145 rf = of_bus_pci_get_flags(range);
146
147 /* Check address type match */
148 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
149 return OF_BAD_ADDR;
150
151 /* Read address values, skipping high cell */
152 cp = of_read_number(range + 1, na - 1);
153 s = of_read_number(range + na + pna, ns);
154 da = of_read_number(addr + 1, na - 1);
155
156 pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n",
157 (unsigned long long)cp, (unsigned long long)s,
158 (unsigned long long)da);
159
160 if (da < cp || da >= (cp + s))
161 return OF_BAD_ADDR;
162 return da - cp;
163}
164
47b1e689 165static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
166{
167 return of_bus_default_translate(addr + 1, offset, na - 1);
168}
169
0131d897 170const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
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GL
171 unsigned int *flags)
172{
a9fadeef 173 const __be32 *prop;
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GL
174 unsigned int psize;
175 struct device_node *parent;
176 struct of_bus *bus;
177 int onesize, i, na, ns;
178
179 /* Get parent & match bus type */
180 parent = of_get_parent(dev);
181 if (parent == NULL)
182 return NULL;
183 bus = of_match_bus(parent);
184 if (strcmp(bus->name, "pci")) {
185 of_node_put(parent);
186 return NULL;
187 }
188 bus->count_cells(dev, &na, &ns);
189 of_node_put(parent);
5d61b165 190 if (!OF_CHECK_ADDR_COUNT(na))
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GL
191 return NULL;
192
193 /* Get "reg" or "assigned-addresses" property */
194 prop = of_get_property(dev, bus->addresses, &psize);
195 if (prop == NULL)
196 return NULL;
197 psize /= 4;
198
199 onesize = na + ns;
154063a9
GL
200 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
201 u32 val = be32_to_cpu(prop[0]);
202 if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
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GL
203 if (size)
204 *size = of_read_number(prop + na, ns);
205 if (flags)
206 *flags = bus->get_flags(prop);
207 return prop;
208 }
154063a9 209 }
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GL
210 return NULL;
211}
212EXPORT_SYMBOL(of_get_pci_address);
213
214int of_pci_address_to_resource(struct device_node *dev, int bar,
215 struct resource *r)
216{
0131d897 217 const __be32 *addrp;
dbbdee94
GL
218 u64 size;
219 unsigned int flags;
220
221 addrp = of_get_pci_address(dev, bar, &size, &flags);
222 if (addrp == NULL)
223 return -EINVAL;
35f3da32 224 return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
dbbdee94
GL
225}
226EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
227#endif /* CONFIG_PCI */
228
229/*
230 * ISA bus specific translator
231 */
232
233static int of_bus_isa_match(struct device_node *np)
234{
235 return !strcmp(np->name, "isa");
236}
237
238static void of_bus_isa_count_cells(struct device_node *child,
239 int *addrc, int *sizec)
240{
241 if (addrc)
242 *addrc = 2;
243 if (sizec)
244 *sizec = 1;
245}
246
47b1e689 247static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
0131d897 248 int pna)
dbbdee94
GL
249{
250 u64 cp, s, da;
251
252 /* Check address type match */
0131d897 253 if ((addr[0] ^ range[0]) & cpu_to_be32(1))
dbbdee94
GL
254 return OF_BAD_ADDR;
255
256 /* Read address values, skipping high cell */
257 cp = of_read_number(range + 1, na - 1);
258 s = of_read_number(range + na + pna, ns);
259 da = of_read_number(addr + 1, na - 1);
260
261 pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n",
262 (unsigned long long)cp, (unsigned long long)s,
263 (unsigned long long)da);
264
265 if (da < cp || da >= (cp + s))
266 return OF_BAD_ADDR;
267 return da - cp;
268}
269
47b1e689 270static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
271{
272 return of_bus_default_translate(addr + 1, offset, na - 1);
273}
274
0131d897 275static unsigned int of_bus_isa_get_flags(const __be32 *addr)
dbbdee94
GL
276{
277 unsigned int flags = 0;
0131d897 278 u32 w = be32_to_cpup(addr);
dbbdee94
GL
279
280 if (w & 1)
281 flags |= IORESOURCE_IO;
282 else
283 flags |= IORESOURCE_MEM;
284 return flags;
285}
286
287/*
288 * Array of bus specific translators
289 */
290
291static struct of_bus of_busses[] = {
292#ifdef CONFIG_PCI
293 /* PCI */
294 {
295 .name = "pci",
296 .addresses = "assigned-addresses",
297 .match = of_bus_pci_match,
298 .count_cells = of_bus_pci_count_cells,
299 .map = of_bus_pci_map,
300 .translate = of_bus_pci_translate,
301 .get_flags = of_bus_pci_get_flags,
302 },
303#endif /* CONFIG_PCI */
304 /* ISA */
305 {
306 .name = "isa",
307 .addresses = "reg",
308 .match = of_bus_isa_match,
309 .count_cells = of_bus_isa_count_cells,
310 .map = of_bus_isa_map,
311 .translate = of_bus_isa_translate,
312 .get_flags = of_bus_isa_get_flags,
313 },
314 /* Default */
315 {
316 .name = "default",
317 .addresses = "reg",
318 .match = NULL,
319 .count_cells = of_bus_default_count_cells,
320 .map = of_bus_default_map,
321 .translate = of_bus_default_translate,
322 .get_flags = of_bus_default_get_flags,
323 },
324};
325
326static struct of_bus *of_match_bus(struct device_node *np)
327{
328 int i;
329
330 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
331 if (!of_busses[i].match || of_busses[i].match(np))
332 return &of_busses[i];
333 BUG();
334 return NULL;
335}
336
8a864920
BH
337static int of_empty_ranges_quirk(void)
338{
339 if (IS_ENABLED(CONFIG_PPC)) {
340 /* To save cycles, we cache the result */
341 static int quirk_state = -1;
342
343 if (quirk_state < 0)
344 quirk_state =
345 of_machine_is_compatible("Power Macintosh") ||
346 of_machine_is_compatible("MacRISC");
347 return quirk_state;
348 }
349 return false;
350}
351
dbbdee94 352static int of_translate_one(struct device_node *parent, struct of_bus *bus,
47b1e689 353 struct of_bus *pbus, __be32 *addr,
dbbdee94
GL
354 int na, int ns, int pna, const char *rprop)
355{
0131d897 356 const __be32 *ranges;
dbbdee94
GL
357 unsigned int rlen;
358 int rone;
359 u64 offset = OF_BAD_ADDR;
360
361 /* Normally, an absence of a "ranges" property means we are
362 * crossing a non-translatable boundary, and thus the addresses
363 * below the current not cannot be converted to CPU physical ones.
364 * Unfortunately, while this is very clear in the spec, it's not
365 * what Apple understood, and they do have things like /uni-n or
366 * /ht nodes with no "ranges" property and a lot of perfectly
367 * useable mapped devices below them. Thus we treat the absence of
368 * "ranges" as equivalent to an empty "ranges" property which means
369 * a 1:1 translation at that level. It's up to the caller not to try
370 * to translate addresses that aren't supposed to be translated in
371 * the first place. --BenH.
3930f294
GL
372 *
373 * As far as we know, this damage only exists on Apple machines, so
374 * This code is only enabled on powerpc. --gcl
dbbdee94
GL
375 */
376 ranges = of_get_property(parent, rprop, &rlen);
8a864920 377 if (ranges == NULL && !of_empty_ranges_quirk()) {
3930f294
GL
378 pr_err("OF: no ranges; cannot translate\n");
379 return 1;
380 }
dbbdee94
GL
381 if (ranges == NULL || rlen == 0) {
382 offset = of_read_number(addr, na);
383 memset(addr, 0, pna * 4);
3930f294 384 pr_debug("OF: empty ranges; 1:1 translation\n");
dbbdee94
GL
385 goto finish;
386 }
387
388 pr_debug("OF: walking ranges...\n");
389
390 /* Now walk through the ranges */
391 rlen /= 4;
392 rone = na + pna + ns;
393 for (; rlen >= rone; rlen -= rone, ranges += rone) {
394 offset = bus->map(addr, ranges, na, ns, pna);
395 if (offset != OF_BAD_ADDR)
396 break;
397 }
398 if (offset == OF_BAD_ADDR) {
399 pr_debug("OF: not found !\n");
400 return 1;
401 }
402 memcpy(addr, ranges + na, 4 * pna);
403
404 finish:
405 of_dump_addr("OF: parent translation for:", addr, pna);
406 pr_debug("OF: with offset: %llx\n", (unsigned long long)offset);
407
408 /* Translate it into parent bus space */
409 return pbus->translate(addr, offset, pna);
410}
411
412/*
413 * Translate an address from the device-tree into a CPU physical address,
414 * this walks up the tree and applies the various bus mappings on the
415 * way.
416 *
417 * Note: We consider that crossing any level with #size-cells == 0 to mean
418 * that translation is impossible (that is we are not dealing with a value
419 * that can be mapped to a cpu physical address). This is not really specified
420 * that way, but this is traditionally the way IBM at least do things
421 */
47b1e689
KP
422static u64 __of_translate_address(struct device_node *dev,
423 const __be32 *in_addr, const char *rprop)
dbbdee94
GL
424{
425 struct device_node *parent = NULL;
426 struct of_bus *bus, *pbus;
47b1e689 427 __be32 addr[OF_MAX_ADDR_CELLS];
dbbdee94
GL
428 int na, ns, pna, pns;
429 u64 result = OF_BAD_ADDR;
430
431 pr_debug("OF: ** translation for device %s **\n", dev->full_name);
432
433 /* Increase refcount at current level */
434 of_node_get(dev);
435
436 /* Get parent & match bus type */
437 parent = of_get_parent(dev);
438 if (parent == NULL)
439 goto bail;
440 bus = of_match_bus(parent);
441
59f5ca48 442 /* Count address cells & copy address locally */
dbbdee94
GL
443 bus->count_cells(dev, &na, &ns);
444 if (!OF_CHECK_COUNTS(na, ns)) {
445 printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
446 dev->full_name);
447 goto bail;
448 }
449 memcpy(addr, in_addr, na * 4);
450
451 pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
452 bus->name, na, ns, parent->full_name);
453 of_dump_addr("OF: translating address:", addr, na);
454
455 /* Translate */
456 for (;;) {
457 /* Switch to parent bus */
458 of_node_put(dev);
459 dev = parent;
460 parent = of_get_parent(dev);
461
462 /* If root, we have finished */
463 if (parent == NULL) {
464 pr_debug("OF: reached root node\n");
465 result = of_read_number(addr, na);
466 break;
467 }
468
469 /* Get new parent bus and counts */
470 pbus = of_match_bus(parent);
471 pbus->count_cells(dev, &pna, &pns);
472 if (!OF_CHECK_COUNTS(pna, pns)) {
473 printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
474 dev->full_name);
475 break;
476 }
477
478 pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
479 pbus->name, pna, pns, parent->full_name);
480
481 /* Apply bus translation */
482 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
483 break;
484
485 /* Complete the move up one level */
486 na = pna;
487 ns = pns;
488 bus = pbus;
489
490 of_dump_addr("OF: one level translation:", addr, na);
491 }
492 bail:
493 of_node_put(parent);
494 of_node_put(dev);
495
496 return result;
497}
498
0131d897 499u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
dbbdee94
GL
500{
501 return __of_translate_address(dev, in_addr, "ranges");
502}
503EXPORT_SYMBOL(of_translate_address);
504
0131d897 505u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
dbbdee94
GL
506{
507 return __of_translate_address(dev, in_addr, "dma-ranges");
508}
509EXPORT_SYMBOL(of_translate_dma_address);
510
5d61b165
SW
511bool of_can_translate_address(struct device_node *dev)
512{
513 struct device_node *parent;
514 struct of_bus *bus;
515 int na, ns;
516
517 parent = of_get_parent(dev);
518 if (parent == NULL)
519 return false;
520
521 bus = of_match_bus(parent);
522 bus->count_cells(dev, &na, &ns);
523
524 of_node_put(parent);
525
526 return OF_CHECK_COUNTS(na, ns);
527}
528EXPORT_SYMBOL(of_can_translate_address);
529
0131d897 530const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
dbbdee94
GL
531 unsigned int *flags)
532{
0131d897 533 const __be32 *prop;
dbbdee94
GL
534 unsigned int psize;
535 struct device_node *parent;
536 struct of_bus *bus;
537 int onesize, i, na, ns;
538
539 /* Get parent & match bus type */
540 parent = of_get_parent(dev);
541 if (parent == NULL)
542 return NULL;
543 bus = of_match_bus(parent);
544 bus->count_cells(dev, &na, &ns);
545 of_node_put(parent);
5d61b165 546 if (!OF_CHECK_ADDR_COUNT(na))
dbbdee94
GL
547 return NULL;
548
549 /* Get "reg" or "assigned-addresses" property */
550 prop = of_get_property(dev, bus->addresses, &psize);
551 if (prop == NULL)
552 return NULL;
553 psize /= 4;
554
555 onesize = na + ns;
556 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
557 if (i == index) {
558 if (size)
559 *size = of_read_number(prop + na, ns);
560 if (flags)
561 *flags = bus->get_flags(prop);
562 return prop;
563 }
564 return NULL;
565}
566EXPORT_SYMBOL(of_get_address);
567
0131d897
SAS
568static int __of_address_to_resource(struct device_node *dev,
569 const __be32 *addrp, u64 size, unsigned int flags,
35f3da32 570 const char *name, struct resource *r)
1f5bef30
GL
571{
572 u64 taddr;
573
574 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
575 return -EINVAL;
576 taddr = of_translate_address(dev, addrp);
577 if (taddr == OF_BAD_ADDR)
578 return -EINVAL;
579 memset(r, 0, sizeof(struct resource));
580 if (flags & IORESOURCE_IO) {
581 unsigned long port;
582 port = pci_address_to_pio(taddr);
583 if (port == (unsigned long)-1)
584 return -EINVAL;
585 r->start = port;
586 r->end = port + size - 1;
587 } else {
588 r->start = taddr;
589 r->end = taddr + size - 1;
590 }
591 r->flags = flags;
35f3da32
BC
592 r->name = name ? name : dev->full_name;
593
1f5bef30
GL
594 return 0;
595}
596
597/**
598 * of_address_to_resource - Translate device tree address and return as resource
599 *
600 * Note that if your address is a PIO address, the conversion will fail if
601 * the physical address can't be internally converted to an IO token with
602 * pci_address_to_pio(), that is because it's either called to early or it
603 * can't be matched to any host bridge IO space
604 */
605int of_address_to_resource(struct device_node *dev, int index,
606 struct resource *r)
607{
0131d897 608 const __be32 *addrp;
1f5bef30
GL
609 u64 size;
610 unsigned int flags;
35f3da32 611 const char *name = NULL;
1f5bef30
GL
612
613 addrp = of_get_address(dev, index, &size, &flags);
614 if (addrp == NULL)
615 return -EINVAL;
35f3da32
BC
616
617 /* Get optional "reg-names" property to add a name to a resource */
618 of_property_read_string_index(dev, "reg-names", index, &name);
619
620 return __of_address_to_resource(dev, addrp, size, flags, name, r);
1f5bef30
GL
621}
622EXPORT_SYMBOL_GPL(of_address_to_resource);
623
90e33f62
GL
624struct device_node *of_find_matching_node_by_address(struct device_node *from,
625 const struct of_device_id *matches,
626 u64 base_address)
627{
628 struct device_node *dn = of_find_matching_node(from, matches);
629 struct resource res;
630
631 while (dn) {
632 if (of_address_to_resource(dn, 0, &res))
633 continue;
634 if (res.start == base_address)
635 return dn;
636 dn = of_find_matching_node(dn, matches);
637 }
638
639 return NULL;
640}
641
1f5bef30 642
6b884a8d
GL
643/**
644 * of_iomap - Maps the memory mapped IO for a given device_node
645 * @device: the device whose io range will be mapped
646 * @index: index of the io range
647 *
648 * Returns a pointer to the mapped memory
649 */
650void __iomem *of_iomap(struct device_node *np, int index)
651{
652 struct resource res;
653
654 if (of_address_to_resource(np, index, &res))
655 return NULL;
656
28c1b6d6 657 return ioremap(res.start, resource_size(&res));
6b884a8d
GL
658}
659EXPORT_SYMBOL(of_iomap);