Merge tag 'stable/for-linus-3.10-rc3-tag' of git://git.kernel.org/pub/scm/linux/kerne...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / wireless / iwlwifi / mvm / fw-api.h
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
410dc5aa 25 * in the file called COPYING.
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26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
fb3ceb81 73#include "fw-api-bt-coex.h"
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74
75/* queue and FIFO numbers by usage */
76enum {
77 IWL_MVM_OFFCHANNEL_QUEUE = 8,
78 IWL_MVM_CMD_QUEUE = 9,
79 IWL_MVM_AUX_QUEUE = 15,
80 IWL_MVM_FIRST_AGG_QUEUE = 16,
81 IWL_MVM_NUM_QUEUES = 20,
82 IWL_MVM_LAST_AGG_QUEUE = IWL_MVM_NUM_QUEUES - 1,
83 IWL_MVM_CMD_FIFO = 7
84};
85
86#define IWL_MVM_STATION_COUNT 16
87
88/* commands */
89enum {
90 MVM_ALIVE = 0x1,
91 REPLY_ERROR = 0x2,
92
93 INIT_COMPLETE_NOTIF = 0x4,
94
95 /* PHY context commands */
96 PHY_CONTEXT_CMD = 0x8,
97 DBG_CFG = 0x9,
98
99 /* station table */
100 ADD_STA = 0x18,
101 REMOVE_STA = 0x19,
102
103 /* TX */
104 TX_CMD = 0x1c,
105 TXPATH_FLUSH = 0x1e,
106 MGMT_MCAST_KEY = 0x1f,
107
108 /* global key */
109 WEP_KEY = 0x20,
110
111 /* MAC and Binding commands */
112 MAC_CONTEXT_CMD = 0x28,
113 TIME_EVENT_CMD = 0x29, /* both CMD and response */
114 TIME_EVENT_NOTIFICATION = 0x2a,
115 BINDING_CONTEXT_CMD = 0x2b,
116 TIME_QUOTA_CMD = 0x2c,
117
118 LQ_CMD = 0x4e,
119
120 /* Calibration */
121 TEMPERATURE_NOTIFICATION = 0x62,
122 CALIBRATION_CFG_CMD = 0x65,
123 CALIBRATION_RES_NOTIFICATION = 0x66,
124 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
125 RADIO_VERSION_NOTIFICATION = 0x68,
126
127 /* Scan offload */
128 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
129 SCAN_OFFLOAD_ABORT_CMD = 0x52,
130 SCAN_OFFLOAD_COMPLETE = 0x6D,
131 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
132 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
133
134 /* Phy */
135 PHY_CONFIGURATION_CMD = 0x6a,
136 CALIB_RES_NOTIF_PHY_DB = 0x6b,
137 /* PHY_DB_CMD = 0x6c, */
138
139 /* Power */
140 POWER_TABLE_CMD = 0x77,
141
142 /* Scanning */
143 SCAN_REQUEST_CMD = 0x80,
144 SCAN_ABORT_CMD = 0x81,
145 SCAN_START_NOTIFICATION = 0x82,
146 SCAN_RESULTS_NOTIFICATION = 0x83,
147 SCAN_COMPLETE_NOTIFICATION = 0x84,
148
149 /* NVM */
150 NVM_ACCESS_CMD = 0x88,
151
152 SET_CALIB_DEFAULT_CMD = 0x8e,
153
571765c8 154 BEACON_NOTIFICATION = 0x90,
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155 BEACON_TEMPLATE_CMD = 0x91,
156 TX_ANT_CONFIGURATION_CMD = 0x98,
fb3ceb81 157 BT_CONFIG = 0x9b,
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158 STATISTICS_NOTIFICATION = 0x9d,
159
160 /* RF-KILL commands and notifications */
161 CARD_STATE_CMD = 0xa0,
162 CARD_STATE_NOTIFICATION = 0xa1,
163
164 REPLY_RX_PHY_CMD = 0xc0,
165 REPLY_RX_MPDU_CMD = 0xc1,
166 BA_NOTIF = 0xc5,
167
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168 /* BT Coex */
169 BT_COEX_PRIO_TABLE = 0xcc,
170 BT_COEX_PROT_ENV = 0xcd,
171 BT_PROFILE_NOTIFICATION = 0xce,
172
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173 REPLY_DEBUG_CMD = 0xf0,
174 DEBUG_LOG_MSG = 0xf7,
175
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176 MCAST_FILTER_CMD = 0xd0,
177
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178 /* D3 commands/notifications */
179 D3_CONFIG_CMD = 0xd3,
180 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
181 OFFLOADS_QUERY_CMD = 0xd5,
182 REMOTE_WAKE_CONFIG_CMD = 0xd6,
183
184 /* for WoWLAN in particular */
185 WOWLAN_PATTERNS = 0xe0,
186 WOWLAN_CONFIGURATION = 0xe1,
187 WOWLAN_TSC_RSC_PARAM = 0xe2,
188 WOWLAN_TKIP_PARAM = 0xe3,
189 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
190 WOWLAN_GET_STATUSES = 0xe5,
191 WOWLAN_TX_POWER_PER_DB = 0xe6,
192
193 /* and for NetDetect */
194 NET_DETECT_CONFIG_CMD = 0x54,
195 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
196 NET_DETECT_PROFILES_CMD = 0x57,
197 NET_DETECT_HOTSPOTS_CMD = 0x58,
198 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
199
200 REPLY_MAX = 0xff,
201};
202
203/**
204 * struct iwl_cmd_response - generic response struct for most commands
205 * @status: status of the command asked, changes for each one
206 */
207struct iwl_cmd_response {
208 __le32 status;
209};
210
211/*
212 * struct iwl_tx_ant_cfg_cmd
213 * @valid: valid antenna configuration
214 */
215struct iwl_tx_ant_cfg_cmd {
216 __le32 valid;
217} __packed;
218
219/*
220 * Calibration control struct.
221 * Sent as part of the phy configuration command.
222 * @flow_trigger: bitmap for which calibrations to perform according to
223 * flow triggers.
224 * @event_trigger: bitmap for which calibrations to perform according to
225 * event triggers.
226 */
227struct iwl_calib_ctrl {
228 __le32 flow_trigger;
229 __le32 event_trigger;
230} __packed;
231
232/* This enum defines the bitmap of various calibrations to enable in both
233 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
234 */
235enum iwl_calib_cfg {
236 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
237 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
238 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
239 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
240 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
241 IWL_CALIB_CFG_DC_IDX = BIT(5),
242 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
243 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
244 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
245 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
246 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
247 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
248 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
249 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
250 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
251 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
252 IWL_CALIB_CFG_DAC_IDX = BIT(16),
253 IWL_CALIB_CFG_ABS_IDX = BIT(17),
254 IWL_CALIB_CFG_AGC_IDX = BIT(18),
255};
256
257/*
258 * Phy configuration command.
259 */
260struct iwl_phy_cfg_cmd {
261 __le32 phy_cfg;
262 struct iwl_calib_ctrl calib_control;
263} __packed;
264
265#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
266#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
267#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
268#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
269#define PHY_CFG_TX_CHAIN_A BIT(8)
270#define PHY_CFG_TX_CHAIN_B BIT(9)
271#define PHY_CFG_TX_CHAIN_C BIT(10)
272#define PHY_CFG_RX_CHAIN_A BIT(12)
273#define PHY_CFG_RX_CHAIN_B BIT(13)
274#define PHY_CFG_RX_CHAIN_C BIT(14)
275
276
277/* Target of the NVM_ACCESS_CMD */
278enum {
279 NVM_ACCESS_TARGET_CACHE = 0,
280 NVM_ACCESS_TARGET_OTP = 1,
281 NVM_ACCESS_TARGET_EEPROM = 2,
282};
283
b9545b48 284/* Section types for NVM_ACCESS_CMD */
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285enum {
286 NVM_SECTION_TYPE_HW = 0,
287 NVM_SECTION_TYPE_SW,
288 NVM_SECTION_TYPE_PAPD,
289 NVM_SECTION_TYPE_BT,
290 NVM_SECTION_TYPE_CALIBRATION,
291 NVM_SECTION_TYPE_PRODUCTION,
292 NVM_SECTION_TYPE_POST_FCS_CALIB,
293 NVM_NUM_OF_SECTIONS,
294};
295
296/**
297 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
298 * @op_code: 0 - read, 1 - write
299 * @target: NVM_ACCESS_TARGET_*
300 * @type: NVM_SECTION_TYPE_*
301 * @offset: offset in bytes into the section
302 * @length: in bytes, to read/write
303 * @data: if write operation, the data to write. On read its empty
304 */
b9545b48 305struct iwl_nvm_access_cmd {
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306 u8 op_code;
307 u8 target;
308 __le16 type;
309 __le16 offset;
310 __le16 length;
311 u8 data[];
312} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
313
314/**
315 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
316 * @offset: offset in bytes into the section
317 * @length: in bytes, either how much was written or read
318 * @type: NVM_SECTION_TYPE_*
319 * @status: 0 for success, fail otherwise
320 * @data: if read operation, the data returned. Empty on write.
321 */
b9545b48 322struct iwl_nvm_access_resp {
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323 __le16 offset;
324 __le16 length;
325 __le16 type;
326 __le16 status;
327 u8 data[];
328} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
329
330/* MVM_ALIVE 0x1 */
331
332/* alive response is_valid values */
333#define ALIVE_RESP_UCODE_OK BIT(0)
334#define ALIVE_RESP_RFKILL BIT(1)
335
336/* alive response ver_type values */
337enum {
338 FW_TYPE_HW = 0,
339 FW_TYPE_PROT = 1,
340 FW_TYPE_AP = 2,
341 FW_TYPE_WOWLAN = 3,
342 FW_TYPE_TIMING = 4,
343 FW_TYPE_WIPAN = 5
344};
345
346/* alive response ver_subtype values */
347enum {
348 FW_SUBTYPE_FULL_FEATURE = 0,
349 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
350 FW_SUBTYPE_REDUCED = 2,
351 FW_SUBTYPE_ALIVE_ONLY = 3,
352 FW_SUBTYPE_WOWLAN = 4,
353 FW_SUBTYPE_AP_SUBTYPE = 5,
354 FW_SUBTYPE_WIPAN = 6,
355 FW_SUBTYPE_INITIALIZE = 9
356};
357
358#define IWL_ALIVE_STATUS_ERR 0xDEAD
359#define IWL_ALIVE_STATUS_OK 0xCAFE
360
361#define IWL_ALIVE_FLG_RFKILL BIT(0)
362
363struct mvm_alive_resp {
364 __le16 status;
365 __le16 flags;
366 u8 ucode_minor;
367 u8 ucode_major;
368 __le16 id;
369 u8 api_minor;
370 u8 api_major;
371 u8 ver_subtype;
372 u8 ver_type;
373 u8 mac;
374 u8 opt;
375 __le16 reserved2;
376 __le32 timestamp;
377 __le32 error_event_table_ptr; /* SRAM address for error log */
378 __le32 log_event_table_ptr; /* SRAM address for event log */
379 __le32 cpu_register_ptr;
380 __le32 dbgm_config_ptr;
381 __le32 alive_counter_ptr;
382 __le32 scd_base_ptr; /* SRAM address for SCD */
383} __packed; /* ALIVE_RES_API_S_VER_1 */
384
385/* Error response/notification */
386enum {
387 FW_ERR_UNKNOWN_CMD = 0x0,
388 FW_ERR_INVALID_CMD_PARAM = 0x1,
389 FW_ERR_SERVICE = 0x2,
390 FW_ERR_ARC_MEMORY = 0x3,
391 FW_ERR_ARC_CODE = 0x4,
392 FW_ERR_WATCH_DOG = 0x5,
393 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
394 FW_ERR_WEP_KEY_SIZE = 0x11,
395 FW_ERR_OBSOLETE_FUNC = 0x12,
396 FW_ERR_UNEXPECTED = 0xFE,
397 FW_ERR_FATAL = 0xFF
398};
399
400/**
401 * struct iwl_error_resp - FW error indication
402 * ( REPLY_ERROR = 0x2 )
403 * @error_type: one of FW_ERR_*
404 * @cmd_id: the command ID for which the error occured
405 * @bad_cmd_seq_num: sequence number of the erroneous command
406 * @error_service: which service created the error, applicable only if
407 * error_type = 2, otherwise 0
408 * @timestamp: TSF in usecs.
409 */
410struct iwl_error_resp {
411 __le32 error_type;
412 u8 cmd_id;
413 u8 reserved1;
414 __le16 bad_cmd_seq_num;
415 __le32 error_service;
416 __le64 timestamp;
417} __packed;
418
419
420/* Common PHY, MAC and Bindings definitions */
421
422#define MAX_MACS_IN_BINDING (3)
423#define MAX_BINDINGS (4)
424#define AUX_BINDING_INDEX (3)
425#define MAX_PHYS (4)
426
427/* Used to extract ID and color from the context dword */
428#define FW_CTXT_ID_POS (0)
429#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
430#define FW_CTXT_COLOR_POS (8)
431#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
432#define FW_CTXT_INVALID (0xffffffff)
433
434#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
435 (_color << FW_CTXT_COLOR_POS))
436
437/* Possible actions on PHYs, MACs and Bindings */
438enum {
439 FW_CTXT_ACTION_STUB = 0,
440 FW_CTXT_ACTION_ADD,
441 FW_CTXT_ACTION_MODIFY,
442 FW_CTXT_ACTION_REMOVE,
443 FW_CTXT_ACTION_NUM
444}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
445
446/* Time Events */
447
448/* Time Event types, according to MAC type */
449enum iwl_time_event_type {
450 /* BSS Station Events */
451 TE_BSS_STA_AGGRESSIVE_ASSOC,
452 TE_BSS_STA_ASSOC,
453 TE_BSS_EAP_DHCP_PROT,
454 TE_BSS_QUIET_PERIOD,
455
456 /* P2P Device Events */
457 TE_P2P_DEVICE_DISCOVERABLE,
458 TE_P2P_DEVICE_LISTEN,
459 TE_P2P_DEVICE_ACTION_SCAN,
460 TE_P2P_DEVICE_FULL_SCAN,
461
462 /* P2P Client Events */
463 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
464 TE_P2P_CLIENT_ASSOC,
465 TE_P2P_CLIENT_QUIET_PERIOD,
466
467 /* P2P GO Events */
468 TE_P2P_GO_ASSOC_PROT,
469 TE_P2P_GO_REPETITIVE_NOA,
470 TE_P2P_GO_CT_WINDOW,
471
472 /* WiDi Sync Events */
473 TE_WIDI_TX_SYNC,
474
475 TE_MAX
476}; /* MAC_EVENT_TYPE_API_E_VER_1 */
477
478/* Time Event dependencies: none, on another TE, or in a specific time */
479enum {
480 TE_INDEPENDENT = 0,
481 TE_DEP_OTHER = 1,
482 TE_DEP_TSF = 2,
483 TE_EVENT_SOCIOPATHIC = 4,
484}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
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485/*
486 * Supported Time event notifications configuration.
487 * A notification (both event and fragment) includes a status indicating weather
488 * the FW was able to schedule the event or not. For fragment start/end
489 * notification the status is always success. There is no start/end fragment
490 * notification for monolithic events.
491 *
492 * @TE_NOTIF_NONE: no notifications
493 * @TE_NOTIF_HOST_EVENT_START: request/receive notification on event start
494 * @TE_NOTIF_HOST_EVENT_END:request/receive notification on event end
495 * @TE_NOTIF_INTERNAL_EVENT_START: internal FW use
496 * @TE_NOTIF_INTERNAL_EVENT_END: internal FW use.
497 * @TE_NOTIF_HOST_FRAG_START: request/receive notification on frag start
498 * @TE_NOTIF_HOST_FRAG_END:request/receive notification on frag end
499 * @TE_NOTIF_INTERNAL_FRAG_START: internal FW use.
500 * @TE_NOTIF_INTERNAL_FRAG_END: internal FW use.
501 */
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502enum {
503 TE_NOTIF_NONE = 0,
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504 TE_NOTIF_HOST_EVENT_START = 0x1,
505 TE_NOTIF_HOST_EVENT_END = 0x2,
506 TE_NOTIF_INTERNAL_EVENT_START = 0x4,
507 TE_NOTIF_INTERNAL_EVENT_END = 0x8,
508 TE_NOTIF_HOST_FRAG_START = 0x10,
509 TE_NOTIF_HOST_FRAG_END = 0x20,
510 TE_NOTIF_INTERNAL_FRAG_START = 0x40,
511 TE_NOTIF_INTERNAL_FRAG_END = 0x80
512}; /* MAC_EVENT_ACTION_API_E_VER_2 */
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513
514/*
515 * @TE_FRAG_NONE: fragmentation of the time event is NOT allowed.
516 * @TE_FRAG_SINGLE: fragmentation of the time event is allowed, but only
517 * the first fragment is scheduled.
518 * @TE_FRAG_DUAL: fragmentation of the time event is allowed, but only
519 * the first 2 fragments are scheduled.
520 * @TE_FRAG_ENDLESS: fragmentation of the time event is allowed, and any number
521 * of fragments are valid.
522 *
523 * Other than the constant defined above, specifying a fragmentation value 'x'
524 * means that the event can be fragmented but only the first 'x' will be
525 * scheduled.
526 */
527enum {
528 TE_FRAG_NONE = 0,
529 TE_FRAG_SINGLE = 1,
530 TE_FRAG_DUAL = 2,
531 TE_FRAG_ENDLESS = 0xffffffff
532};
533
534/* Repeat the time event endlessly (until removed) */
535#define TE_REPEAT_ENDLESS (0xffffffff)
536/* If a Time Event has bounded repetitions, this is the maximal value */
537#define TE_REPEAT_MAX_MSK (0x0fffffff)
538/* If a Time Event can be fragmented, this is the max number of fragments */
539#define TE_FRAG_MAX_MSK (0x0fffffff)
540
541/**
542 * struct iwl_time_event_cmd - configuring Time Events
543 * ( TIME_EVENT_CMD = 0x29 )
544 * @id_and_color: ID and color of the relevant MAC
545 * @action: action to perform, one of FW_CTXT_ACTION_*
546 * @id: this field has two meanings, depending on the action:
547 * If the action is ADD, then it means the type of event to add.
548 * For all other actions it is the unique event ID assigned when the
549 * event was added by the FW.
550 * @apply_time: When to start the Time Event (in GP2)
551 * @max_delay: maximum delay to event's start (apply time), in TU
552 * @depends_on: the unique ID of the event we depend on (if any)
553 * @interval: interval between repetitions, in TU
554 * @interval_reciprocal: 2^32 / interval
555 * @duration: duration of event in TU
556 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
557 * @dep_policy: one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
558 * @is_present: 0 or 1, are we present or absent during the Time Event
559 * @max_frags: maximal number of fragments the Time Event can be divided to
560 * @notify: notifications using TE_NOTIF_* (whom to notify when)
561 */
562struct iwl_time_event_cmd {
563 /* COMMON_INDEX_HDR_API_S_VER_1 */
564 __le32 id_and_color;
565 __le32 action;
566 __le32 id;
567 /* MAC_TIME_EVENT_DATA_API_S_VER_1 */
568 __le32 apply_time;
569 __le32 max_delay;
570 __le32 dep_policy;
571 __le32 depends_on;
572 __le32 is_present;
573 __le32 max_frags;
574 __le32 interval;
575 __le32 interval_reciprocal;
576 __le32 duration;
577 __le32 repeat;
578 __le32 notify;
579} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */
580
581/**
582 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
583 * @status: bit 0 indicates success, all others specify errors
584 * @id: the Time Event type
585 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
586 * @id_and_color: ID and color of the relevant MAC
587 */
588struct iwl_time_event_resp {
589 __le32 status;
590 __le32 id;
591 __le32 unique_id;
592 __le32 id_and_color;
593} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
594
595/**
596 * struct iwl_time_event_notif - notifications of time event start/stop
597 * ( TIME_EVENT_NOTIFICATION = 0x2a )
598 * @timestamp: action timestamp in GP2
599 * @session_id: session's unique id
600 * @unique_id: unique id of the Time Event itself
601 * @id_and_color: ID and color of the relevant MAC
602 * @action: one of TE_NOTIF_START or TE_NOTIF_END
603 * @status: true if scheduled, false otherwise (not executed)
604 */
605struct iwl_time_event_notif {
606 __le32 timestamp;
607 __le32 session_id;
608 __le32 unique_id;
609 __le32 id_and_color;
610 __le32 action;
611 __le32 status;
612} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
613
614
615/* Bindings and Time Quota */
616
617/**
618 * struct iwl_binding_cmd - configuring bindings
619 * ( BINDING_CONTEXT_CMD = 0x2b )
620 * @id_and_color: ID and color of the relevant Binding
621 * @action: action to perform, one of FW_CTXT_ACTION_*
622 * @macs: array of MAC id and colors which belong to the binding
623 * @phy: PHY id and color which belongs to the binding
624 */
625struct iwl_binding_cmd {
626 /* COMMON_INDEX_HDR_API_S_VER_1 */
627 __le32 id_and_color;
628 __le32 action;
629 /* BINDING_DATA_API_S_VER_1 */
630 __le32 macs[MAX_MACS_IN_BINDING];
631 __le32 phy;
632} __packed; /* BINDING_CMD_API_S_VER_1 */
633
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634/* The maximal number of fragments in the FW's schedule session */
635#define IWL_MVM_MAX_QUOTA 128
636
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637/**
638 * struct iwl_time_quota_data - configuration of time quota per binding
639 * @id_and_color: ID and color of the relevant Binding
640 * @quota: absolute time quota in TU. The scheduler will try to divide the
641 * remainig quota (after Time Events) according to this quota.
642 * @max_duration: max uninterrupted context duration in TU
643 */
644struct iwl_time_quota_data {
645 __le32 id_and_color;
646 __le32 quota;
647 __le32 max_duration;
648} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
649
650/**
651 * struct iwl_time_quota_cmd - configuration of time quota between bindings
652 * ( TIME_QUOTA_CMD = 0x2c )
653 * @quotas: allocations per binding
654 */
655struct iwl_time_quota_cmd {
656 struct iwl_time_quota_data quotas[MAX_BINDINGS];
657} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
658
659
660/* PHY context */
661
662/* Supported bands */
663#define PHY_BAND_5 (0)
664#define PHY_BAND_24 (1)
665
666/* Supported channel width, vary if there is VHT support */
667#define PHY_VHT_CHANNEL_MODE20 (0x0)
668#define PHY_VHT_CHANNEL_MODE40 (0x1)
669#define PHY_VHT_CHANNEL_MODE80 (0x2)
670#define PHY_VHT_CHANNEL_MODE160 (0x3)
671
672/*
673 * Control channel position:
674 * For legacy set bit means upper channel, otherwise lower.
675 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
676 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
677 * center_freq
678 * |
679 * 40Mhz |_______|_______|
680 * 80Mhz |_______|_______|_______|_______|
681 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
682 * code 011 010 001 000 | 100 101 110 111
683 */
684#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
685#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
686#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
687#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
688#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
689#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
690#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
691#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
692
693/*
694 * @band: PHY_BAND_*
695 * @channel: channel number
696 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
697 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
698 */
699struct iwl_fw_channel_info {
700 u8 band;
701 u8 channel;
702 u8 width;
703 u8 ctrl_pos;
704} __packed;
705
706#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
707#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
708 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
709#define PHY_RX_CHAIN_VALID_POS (1)
710#define PHY_RX_CHAIN_VALID_MSK \
711 (0x7 << PHY_RX_CHAIN_VALID_POS)
712#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
713#define PHY_RX_CHAIN_FORCE_SEL_MSK \
714 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
715#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
716#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
717 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
718#define PHY_RX_CHAIN_CNT_POS (10)
719#define PHY_RX_CHAIN_CNT_MSK \
720 (0x3 << PHY_RX_CHAIN_CNT_POS)
721#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
722#define PHY_RX_CHAIN_MIMO_CNT_MSK \
723 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
724#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
725#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
726 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
727
728/* TODO: fix the value, make it depend on firmware at runtime? */
729#define NUM_PHY_CTX 3
730
731/* TODO: complete missing documentation */
732/**
733 * struct iwl_phy_context_cmd - config of the PHY context
734 * ( PHY_CONTEXT_CMD = 0x8 )
735 * @id_and_color: ID and color of the relevant Binding
736 * @action: action to perform, one of FW_CTXT_ACTION_*
737 * @apply_time: 0 means immediate apply and context switch.
738 * other value means apply new params after X usecs
739 * @tx_param_color: ???
740 * @channel_info:
741 * @txchain_info: ???
742 * @rxchain_info: ???
743 * @acquisition_data: ???
744 * @dsp_cfg_flags: set to 0
745 */
746struct iwl_phy_context_cmd {
747 /* COMMON_INDEX_HDR_API_S_VER_1 */
748 __le32 id_and_color;
749 __le32 action;
750 /* PHY_CONTEXT_DATA_API_S_VER_1 */
751 __le32 apply_time;
752 __le32 tx_param_color;
753 struct iwl_fw_channel_info ci;
754 __le32 txchain_info;
755 __le32 rxchain_info;
756 __le32 acquisition_data;
757 __le32 dsp_cfg_flags;
758} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
759
760#define IWL_RX_INFO_PHY_CNT 8
761#define IWL_RX_INFO_AGC_IDX 1
762#define IWL_RX_INFO_RSSI_AB_IDX 2
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763#define IWL_OFDM_AGC_A_MSK 0x0000007f
764#define IWL_OFDM_AGC_A_POS 0
765#define IWL_OFDM_AGC_B_MSK 0x00003f80
766#define IWL_OFDM_AGC_B_POS 7
767#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
768#define IWL_OFDM_AGC_CODE_POS 20
8ca151b5 769#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
8ca151b5 770#define IWL_OFDM_RSSI_A_POS 0
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771#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
772#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
8ca151b5 773#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
8ca151b5 774#define IWL_OFDM_RSSI_B_POS 16
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775#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
776#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
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777
778/**
779 * struct iwl_rx_phy_info - phy info
780 * (REPLY_RX_PHY_CMD = 0xc0)
781 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
782 * @cfg_phy_cnt: configurable DSP phy data byte count
783 * @stat_id: configurable DSP phy data set ID
784 * @reserved1:
785 * @system_timestamp: GP2 at on air rise
786 * @timestamp: TSF at on air rise
787 * @beacon_time_stamp: beacon at on-air rise
788 * @phy_flags: general phy flags: band, modulation, ...
789 * @channel: channel number
790 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
791 * @rate_n_flags: RATE_MCS_*
792 * @byte_count: frame's byte-count
793 * @frame_time: frame's time on the air, based on byte count and frame rate
794 * calculation
6bfcb7e8 795 * @mac_active_msk: what MACs were active when the frame was received
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796 *
797 * Before each Rx, the device sends this data. It contains PHY information
798 * about the reception of the packet.
799 */
800struct iwl_rx_phy_info {
801 u8 non_cfg_phy_cnt;
802 u8 cfg_phy_cnt;
803 u8 stat_id;
804 u8 reserved1;
805 __le32 system_timestamp;
806 __le64 timestamp;
807 __le32 beacon_time_stamp;
808 __le16 phy_flags;
809 __le16 channel;
810 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
811 __le32 rate_n_flags;
812 __le32 byte_count;
6bfcb7e8 813 __le16 mac_active_msk;
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814 __le16 frame_time;
815} __packed;
816
817struct iwl_rx_mpdu_res_start {
818 __le16 byte_count;
819 __le16 reserved;
820} __packed;
821
822/**
823 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
824 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
825 * @RX_RES_PHY_FLAGS_MOD_CCK:
826 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
827 * @RX_RES_PHY_FLAGS_NARROW_BAND:
828 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
829 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
830 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
831 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
832 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
833 */
834enum iwl_rx_phy_flags {
835 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
836 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
837 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
838 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
839 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
840 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
841 RX_RES_PHY_FLAGS_AGG = BIT(7),
842 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
843 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
844 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
845};
846
847/**
848 * enum iwl_mvm_rx_status - written by fw for each Rx packet
849 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
850 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
851 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
852 * @RX_MPDU_RES_STATUS_KEY_VALID:
853 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
854 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
855 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
856 * in the driver.
857 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
858 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
859 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
860 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
861 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
862 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
863 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
864 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
865 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
866 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
867 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
868 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
869 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
870 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
871 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
872 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
873 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
874 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
875 * @RX_MPDU_RES_STATUS_RRF_KILL:
876 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
877 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
878 */
879enum iwl_mvm_rx_status {
880 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
881 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
882 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
883 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
884 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
885 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
886 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
887 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
888 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
889 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
890 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
891 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
892 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
893 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
894 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
895 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
896 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
897 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
898 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
899 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
900 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
901 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
902 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
903 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
904 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
905 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
906};
907
908/**
909 * struct iwl_radio_version_notif - information on the radio version
910 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
911 * @radio_flavor:
912 * @radio_step:
913 * @radio_dash:
914 */
915struct iwl_radio_version_notif {
916 __le32 radio_flavor;
917 __le32 radio_step;
918 __le32 radio_dash;
919} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
920
921enum iwl_card_state_flags {
922 CARD_ENABLED = 0x00,
923 HW_CARD_DISABLED = 0x01,
924 SW_CARD_DISABLED = 0x02,
925 CT_KILL_CARD_DISABLED = 0x04,
926 HALT_CARD_DISABLED = 0x08,
927 CARD_DISABLED_MSK = 0x0f,
928 CARD_IS_RX_ON = 0x10,
929};
930
931/**
932 * struct iwl_radio_version_notif - information on the radio version
933 * ( CARD_STATE_NOTIFICATION = 0xa1 )
934 * @flags: %iwl_card_state_flags
935 */
936struct iwl_card_state_notif {
937 __le32 flags;
938} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
939
940/**
941 * struct iwl_set_calib_default_cmd - set default value for calibration.
942 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
943 * @calib_index: the calibration to set value for
944 * @length: of data
945 * @data: the value to set for the calibration result
946 */
947struct iwl_set_calib_default_cmd {
948 __le16 calib_index;
949 __le16 length;
950 u8 data[0];
951} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
952
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953#define MAX_PORT_ID_NUM 2
954
955/**
956 * struct iwl_mcast_filter_cmd - configure multicast filter.
957 * @filter_own: Set 1 to filter out multicast packets sent by station itself
958 * @port_id: Multicast MAC addresses array specifier. This is a strange way
959 * to identify network interface adopted in host-device IF.
960 * It is used by FW as index in array of addresses. This array has
961 * MAX_PORT_ID_NUM members.
962 * @count: Number of MAC addresses in the array
963 * @pass_all: Set 1 to pass all multicast packets.
964 * @bssid: current association BSSID.
965 * @addr_list: Place holder for array of MAC addresses.
966 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
967 */
968struct iwl_mcast_filter_cmd {
969 u8 filter_own;
970 u8 port_id;
971 u8 count;
972 u8 pass_all;
973 u8 bssid[6];
974 u8 reserved[2];
975 u8 addr_list[0];
976} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
977
8ca151b5 978#endif /* __fw_api_h__ */