[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / net / ethernet / broadcom / bnx2x / bnx2x_dcb.h

/* bnx2x_dcb.h: Broadcom Everest network driver.
 *
 * Copyright 2009-2013 Broadcom Corporation
 *
 * Unless you and Broadcom execute a separate written software license
 * agreement governing use of this software, this software is licensed to you
 * under the terms of the GNU General Public License version 2, available
 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
 *
 * Notwithstanding the above, under no circumstances may you combine this
 * software in any way with any other Broadcom software provided under a
 * license other than the GPL, without Broadcom's express prior written
 * consent.
 *
 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
 * Written by: Dmitry Kravkov
 *
 */
#ifndef BNX2X_DCB_H
#define BNX2X_DCB_H

#include "bnx2x_hsi.h"

#define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */
struct bnx2x_dcbx_app_params {
	u32 enabled;
	u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
};

#define DCBX_COS_MAX_NUM_E2	DCBX_E2E3_MAX_NUM_COS
/* bnx2x currently limits numbers of supported COSes to 3 to be extended to 6 */
#define BNX2X_MAX_COS_SUPPORT	3
#define DCBX_COS_MAX_NUM_E3B0	BNX2X_MAX_COS_SUPPORT
#define DCBX_COS_MAX_NUM	BNX2X_MAX_COS_SUPPORT

struct bnx2x_dcbx_cos_params {
	u32	bw_tbl;
	u32	pri_bitmask;
	/*
	 * strict priority: valid values are 0..5; 0 is highest priority.
	 * There can't be two COSes with the same priority.
	 */
	u8	strict;
#define BNX2X_DCBX_STRICT_INVALID			DCBX_COS_MAX_NUM
#define BNX2X_DCBX_STRICT_COS_HIGHEST			0
#define BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(sp)	((sp) + 1)
	u8	pauseable;
};

struct bnx2x_dcbx_pg_params {
	u32 enabled;
	u8 num_of_cos; /* valid COS entries */
	struct bnx2x_dcbx_cos_params	cos_params[DCBX_COS_MAX_NUM];
};

struct bnx2x_dcbx_pfc_params {
	u32 enabled;
	u32 priority_non_pauseable_mask;
};

struct bnx2x_dcbx_port_params {
	struct bnx2x_dcbx_pfc_params pfc;
	struct bnx2x_dcbx_pg_params  ets;
	struct bnx2x_dcbx_app_params app;
};

#define BNX2X_DCBX_CONFIG_INV_VALUE			(0xFFFFFFFF)
#define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE		0
#define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE		1
#define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID	(BNX2X_DCBX_CONFIG_INV_VALUE)
#define BNX2X_IS_ETS_ENABLED(bp) ((bp)->dcb_state == BNX2X_DCB_STATE_ON &&\
				  (bp)->dcbx_port_params.ets.enabled)

struct bnx2x_config_lldp_params {
	u32 overwrite_settings;
	u32 msg_tx_hold;
	u32 msg_fast_tx;
	u32 tx_credit_max;
	u32 msg_tx_interval;
	u32 tx_fast;
};

struct bnx2x_admin_priority_app_table {
		u32 valid;
		u32 priority;
#define INVALID_TRAFFIC_TYPE_PRIORITY	(0xFFFFFFFF)
		u32 traffic_type;
#define TRAFFIC_TYPE_ETH		0
#define TRAFFIC_TYPE_PORT		1
		u32 app_id;
};

#define DCBX_CONFIG_MAX_APP_PROTOCOL 4
struct bnx2x_config_dcbx_params {
	u32 overwrite_settings;
	u32 admin_dcbx_version;
	u32 admin_ets_enable;
	u32 admin_pfc_enable;
	u32 admin_tc_supported_tx_enable;
	u32 admin_ets_configuration_tx_enable;
	u32 admin_ets_recommendation_tx_enable;
	u32 admin_pfc_tx_enable;
	u32 admin_application_priority_tx_enable;
	u32 admin_ets_willing;
	u32 admin_ets_reco_valid;
	u32 admin_pfc_willing;
	u32 admin_app_priority_willing;
	u32 admin_configuration_bw_precentage[8];
	u32 admin_configuration_ets_pg[8];
	u32 admin_recommendation_bw_precentage[8];
	u32 admin_recommendation_ets_pg[8];
	u32 admin_pfc_bitmap;
	struct bnx2x_admin_priority_app_table
		admin_priority_app_table[DCBX_CONFIG_MAX_APP_PROTOCOL];
	u32 admin_default_priority;
};

#define GET_FLAGS(flags, bits)		((flags) & (bits))
#define SET_FLAGS(flags, bits)		((flags) |= (bits))
#define RESET_FLAGS(flags, bits)	((flags) &= ~(bits))

enum {
	DCBX_READ_LOCAL_MIB,
	DCBX_READ_REMOTE_MIB
};

#define ETH_TYPE_FCOE		(0x8906)
#define TCP_PORT_ISCSI		(0xCBC)

#define PFC_VALUE_FRAME_SIZE				(512)
#define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed)  \
				((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))

#define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD			130
#define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD			170


struct cos_entry_help_data {
	u32			pri_join_mask;
	u32			cos_bw;
	u8			strict;
	bool			pausable;
};

struct cos_help_data {
	struct cos_entry_help_data	data[DCBX_COS_MAX_NUM];
	u8				num_of_cos;
};

#define DCBX_ILLEGAL_PG				(0xFF)
#define DCBX_PFC_PRI_MASK			(0xFF)
#define DCBX_STRICT_PRIORITY			(15)
#define DCBX_INVALID_COS_BW			(0xFFFFFFFF)
#define DCBX_PFC_PRI_NON_PAUSE_MASK(bp)		\
			((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
#define DCBX_PFC_PRI_PAUSE_MASK(bp)		\
					((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
#define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri)	\
				((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
#define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri)	\
			(DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
#define DCBX_IS_PFC_PRI_SOME_PAUSE(bp, pg_pri)	\
			(0 != DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri))
#define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri)	\
			(pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
#define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
			((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
#define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri)	\
			(!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) || \
			 IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))


struct pg_entry_help_data {
	u8	num_of_dif_pri;
	u8	pg;
	u32	pg_priority;
};

struct pg_help_data {
	struct pg_entry_help_data	data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
	u8				num_of_pg;
};

/* forward DCB/PFC related declarations */
struct bnx2x;
void bnx2x_dcbx_update(struct work_struct *work);
void bnx2x_dcbx_init_params(struct bnx2x *bp);
void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);

enum {
	BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
	BNX2X_DCBX_STATE_TX_PAUSED,
	BNX2X_DCBX_STATE_TX_RELEASED
};

void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);
void bnx2x_dcbx_pmf_update(struct bnx2x *bp);
/* DCB netlink */
#ifdef BCM_DCBNL
extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
#endif /* BCM_DCBNL */

#endif /* BNX2X_DCB_H */
Commit	Line	Data
e4901dde VZ	1	/* bnx2x_dcb.h: Broadcom Everest network driver.
e4901dde VZ	2	*
247fa82b	3	* Copyright 2009-2013 Broadcom Corporation
e4901dde VZ	4	*
	5	* Unless you and Broadcom execute a separate written software license
	6	* agreement governing use of this software, this software is licensed to you
	7	* under the terms of the GNU General Public License version 2, available
	8	* at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
	9	*
	10	* Notwithstanding the above, under no circumstances may you combine this
	11	* software in any way with any other Broadcom software provided under a
	12	* license other than the GPL, without Broadcom's express prior written
	13	* consent.
	14	*
	15	* Maintained by: Eilon Greenstein <eilong@broadcom.com>
	16	* Written by: Dmitry Kravkov
	17	*
	18	*/
	19	#ifndef BNX2X_DCB_H
	20	#define BNX2X_DCB_H
	21
	22	#include "bnx2x_hsi.h"
	23
	24	#define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */
	25	struct bnx2x_dcbx_app_params {
	26	u32 enabled;
	27	u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
	28	};
	29
d1976b2e DK	30	#define DCBX_COS_MAX_NUM_E2 DCBX_E2E3_MAX_NUM_COS
	31	/* bnx2x currently limits numbers of supported COSes to 3 to be extended to 6 */
	32	#define BNX2X_MAX_COS_SUPPORT 3
	33	#define DCBX_COS_MAX_NUM_E3B0 BNX2X_MAX_COS_SUPPORT
	34	#define DCBX_COS_MAX_NUM BNX2X_MAX_COS_SUPPORT
e4901dde VZ	35
	36	struct bnx2x_dcbx_cos_params {
	37	u32 bw_tbl;
	38	u32 pri_bitmask;
d1976b2e DK	39	/*
	40	* strict priority: valid values are 0..5; 0 is highest priority.
	41	* There can't be two COSes with the same priority.
	42	*/
e4901dde	43	u8 strict;
d1976b2e DK	44	#define BNX2X_DCBX_STRICT_INVALID DCBX_COS_MAX_NUM
	45	#define BNX2X_DCBX_STRICT_COS_HIGHEST 0
	46	#define BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(sp) ((sp) + 1)
e4901dde VZ	47	u8 pauseable;
	48	};
	49
	50	struct bnx2x_dcbx_pg_params {
	51	u32 enabled;
	52	u8 num_of_cos; /* valid COS entries */
d1976b2e	53	struct bnx2x_dcbx_cos_params cos_params[DCBX_COS_MAX_NUM];
e4901dde VZ	54	};
	55
	56	struct bnx2x_dcbx_pfc_params {
	57	u32 enabled;
	58	u32 priority_non_pauseable_mask;
	59	};
	60
	61	struct bnx2x_dcbx_port_params {
e4901dde VZ	62	struct bnx2x_dcbx_pfc_params pfc;
	63	struct bnx2x_dcbx_pg_params ets;
	64	struct bnx2x_dcbx_app_params app;
	65	};
	66
	67	#define BNX2X_DCBX_CONFIG_INV_VALUE (0xFFFFFFFF)
	68	#define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE 0
	69	#define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE 1
	70	#define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID (BNX2X_DCBX_CONFIG_INV_VALUE)
30ae438b DK	71	#define BNX2X_IS_ETS_ENABLED(bp) ((bp)->dcb_state == BNX2X_DCB_STATE_ON &&\
30ae438b DK	72	(bp)->dcbx_port_params.ets.enabled)
e4901dde	73
e4901dde VZ	74	struct bnx2x_config_lldp_params {
	75	u32 overwrite_settings;
	76	u32 msg_tx_hold;
	77	u32 msg_fast_tx;
	78	u32 tx_credit_max;
	79	u32 msg_tx_interval;
	80	u32 tx_fast;
	81	};
	82
	83	struct bnx2x_admin_priority_app_table {
	84	u32 valid;
	85	u32 priority;
	86	#define INVALID_TRAFFIC_TYPE_PRIORITY (0xFFFFFFFF)
	87	u32 traffic_type;
	88	#define TRAFFIC_TYPE_ETH 0
	89	#define TRAFFIC_TYPE_PORT 1
	90	u32 app_id;
	91	};
	92
f9c058b6	93	#define DCBX_CONFIG_MAX_APP_PROTOCOL 4
e4901dde	94	struct bnx2x_config_dcbx_params {
e4901dde VZ	95	u32 overwrite_settings;
	96	u32 admin_dcbx_version;
	97	u32 admin_ets_enable;
	98	u32 admin_pfc_enable;
	99	u32 admin_tc_supported_tx_enable;
	100	u32 admin_ets_configuration_tx_enable;
	101	u32 admin_ets_recommendation_tx_enable;
	102	u32 admin_pfc_tx_enable;
	103	u32 admin_application_priority_tx_enable;
	104	u32 admin_ets_willing;
	105	u32 admin_ets_reco_valid;
	106	u32 admin_pfc_willing;
	107	u32 admin_app_priority_willing;
	108	u32 admin_configuration_bw_precentage[8];
	109	u32 admin_configuration_ets_pg[8];
	110	u32 admin_recommendation_bw_precentage[8];
	111	u32 admin_recommendation_ets_pg[8];
	112	u32 admin_pfc_bitmap;
f9c058b6 DK	113	struct bnx2x_admin_priority_app_table
f9c058b6 DK	114	admin_priority_app_table[DCBX_CONFIG_MAX_APP_PROTOCOL];
e4901dde VZ	115	u32 admin_default_priority;
	116	};
	117
	118	#define GET_FLAGS(flags, bits) ((flags) & (bits))
	119	#define SET_FLAGS(flags, bits) ((flags) \|= (bits))
	120	#define RESET_FLAGS(flags, bits) ((flags) &= ~(bits))
	121
	122	enum {
	123	DCBX_READ_LOCAL_MIB,
	124	DCBX_READ_REMOTE_MIB
	125	};
	126
	127	#define ETH_TYPE_FCOE (0x8906)
	128	#define TCP_PORT_ISCSI (0xCBC)
	129
	130	#define PFC_VALUE_FRAME_SIZE (512)
	131	#define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed) \
	132	((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))
	133
	134	#define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD 130
	135	#define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD 170
	136
	137
	138
	139	struct cos_entry_help_data {
	140	u32 pri_join_mask;
	141	u32 cos_bw;
	142	u8 strict;
	143	bool pausable;
	144	};
	145
	146	struct cos_help_data {
d1976b2e	147	struct cos_entry_help_data data[DCBX_COS_MAX_NUM];
e4901dde VZ	148	u8 num_of_cos;
	149	};
	150
	151	#define DCBX_ILLEGAL_PG (0xFF)
	152	#define DCBX_PFC_PRI_MASK (0xFF)
	153	#define DCBX_STRICT_PRIORITY (15)
	154	#define DCBX_INVALID_COS_BW (0xFFFFFFFF)
	155	#define DCBX_PFC_PRI_NON_PAUSE_MASK(bp) \
	156	((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
	157	#define DCBX_PFC_PRI_PAUSE_MASK(bp) \
	158	((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
	159	#define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri) \
	160	((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
	161	#define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri) \
	162	(DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
d1976b2e DK	163	#define DCBX_IS_PFC_PRI_SOME_PAUSE(bp, pg_pri) \
d1976b2e DK	164	(0 != DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri))
e4901dde VZ	165	#define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri) \
	166	(pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
	167	#define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
	168	((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
	169	#define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri) \
	170	(!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) \|\| \
	171	IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))
	172
	173
	174	struct pg_entry_help_data {
	175	u8 num_of_dif_pri;
	176	u8 pg;
	177	u32 pg_priority;
	178	};
	179
	180	struct pg_help_data {
	181	struct pg_entry_help_data data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
	182	u8 num_of_pg;
	183	};
	184
	185	/* forward DCB/PFC related declarations */
	186	struct bnx2x;
e4901dde VZ	187	void bnx2x_dcbx_update(struct work_struct *work);
e4901dde VZ	188	void bnx2x_dcbx_init_params(struct bnx2x *bp);
785b9b1a	189	void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);
e4901dde VZ	190
	191	enum {
	192	BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
fab0dc89 DK	193	BNX2X_DCBX_STATE_TX_PAUSED,
fab0dc89 DK	194	BNX2X_DCBX_STATE_TX_RELEASED
e4901dde	195	};
fab0dc89	196
e4901dde	197	void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);
ef01854e	198	void bnx2x_dcbx_pmf_update(struct bnx2x *bp);
785b9b1a	199	/* DCB netlink */
98507672	200	#ifdef BCM_DCBNL
785b9b1a	201	extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
98507672 SR	202	int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
98507672 SR	203	#endif /* BCM_DCBNL */
785b9b1a	204
e4901dde	205	#endif /* BNX2X_DCB_H */