[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / sound / mt8127 / AudDrv_Ana_6323.c

/*
 * Copyright (C) 2007 The Android Open Source Project
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/*******************************************************************************
 *
 * Filename:
 * ---------
 *   AudDrv_Ana.c
 *
 * Project:
 * --------
 *   MT6583  Audio Driver ana Register setting
 *
 * Description:
 * ------------
 *   Audio register
 *
 * Author:
 * -------
 * Chipeng Chang
 *
 *------------------------------------------------------------------------------
 * $Revision: #1 $
 * $Modtime:$
 * $Log:$
 *
 *
 *******************************************************************************/


/*****************************************************************************
 *                     C O M P I L E R   F L A G S
 *****************************************************************************/


/*****************************************************************************
 *                E X T E R N A L   R E F E R E N C E S
 *****************************************************************************/

#include "AudDrv_Common.h"
#include "AudDrv_Ana_6323.h"
#include "AudDrv_Clk.h"
#include "AudDrv_ioctl.h"

// define this to use wrapper to control
#define AUDIO_USING_WRAP_DRIVER
#ifdef AUDIO_USING_WRAP_DRIVER
#include <mach/mt_pmic_wrap.h>
#endif

/*****************************************************************************
 *                         D A T A   T Y P E S
 *****************************************************************************/

void Ana_Set_Reg(uint32 offset, uint32 value, uint32 mask)
{
    // set pmic register or analog CONTROL_IFACE_PATH
    int ret = 0;
#ifdef AUDIO_USING_WRAP_DRIVER
    uint32 Reg_Value = Ana_Get_Reg(offset);

	if (!(offset <= AUDTOP_MAX_ADDR_OFFSET ||
		(offset >= ABB_AFE_ADDR_START && offset <= ABB_AFE_ADDR_END)))
		return;

    Reg_Value &= (~mask);
    Reg_Value |= (value & mask);
    ret = pwrap_write(offset, Reg_Value);
    Reg_Value = Ana_Get_Reg(offset);
    if ((Reg_Value & mask) != (value & mask))
    {
        printk("Ana_Set_Reg offset= 0x%x , value = 0x%x mask = 0x%x ret = %d Reg_Value = 0x%x\n", offset, value, mask, ret, Reg_Value);
    }
#endif
}

uint32 Ana_Get_Reg(uint32 offset)
{
    // get pmic register
    int ret = 0;
    uint32 Rdata = 0;

	if (!(offset <= AUDTOP_MAX_ADDR_OFFSET ||
		(offset >= ABB_AFE_ADDR_START && offset <= ABB_AFE_ADDR_END)))
		return 0;

#ifdef AUDIO_USING_WRAP_DRIVER
    ret = pwrap_read(offset, &Rdata);
#endif
    //PRINTK_ANA_REG ("Ana_Get_Reg offset= 0x%x  Rdata = 0x%x ret = %d\n",offset,Rdata,ret);
    return Rdata;
}

void AudDrv_Store_reg_ANA(AudAna_Suspend_Reg *pBackup_reg)
{
    PRINTK_AUDDRV("+AudDrv_Store_reg_ANA \n");

    if (pBackup_reg == NULL)
    {
        PRINTK_AUDDRV("pBackup_reg is null \n");
        PRINTK_AUDDRV("-AudDrv_Store_reg_ANA \n");
        return;
    }

    AudDrv_ANA_Clk_On();
    pBackup_reg->Suspend_Ana_ABB_AFE_CON0 = Ana_Get_Reg(ABB_AFE_CON0);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON1 = Ana_Get_Reg(ABB_AFE_CON1);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON2 = Ana_Get_Reg(ABB_AFE_CON2);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON3 = Ana_Get_Reg(ABB_AFE_CON3);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON4 = Ana_Get_Reg(ABB_AFE_CON4);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON5 = Ana_Get_Reg(ABB_AFE_CON5);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON6 = Ana_Get_Reg(ABB_AFE_CON6);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON7 = Ana_Get_Reg(ABB_AFE_CON7);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON8 = Ana_Get_Reg(ABB_AFE_CON8);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON9 = Ana_Get_Reg(ABB_AFE_CON9);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON10 = Ana_Get_Reg(ABB_AFE_CON10);
    pBackup_reg->Suspend_Ana_ABB_AFE_CON11 = Ana_Get_Reg(ABB_AFE_CON11);
    pBackup_reg->Suspend_Ana_ABB_AFE_UP8X_FIFO_CFG0 = Ana_Get_Reg(ABB_AFE_UP8X_FIFO_CFG0);
    pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG0 = Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG0);
    pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG1 = Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG1);
    pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG2 = Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG2);
    pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG3 = Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG3);
    pBackup_reg->Suspend_Ana_ABB_AFE_TOP_CON0 = Ana_Get_Reg(ABB_AFE_TOP_CON0);
    pBackup_reg->Suspend_Ana_ABB_AFE_MON_DEBUG0 = Ana_Get_Reg(ABB_AFE_MON_DEBUG0);

    pBackup_reg->Suspend_Ana_SPK_CON0 = Ana_Get_Reg(SPK_CON0);
    pBackup_reg->Suspend_Ana_SPK_CON1 = Ana_Get_Reg(SPK_CON1);
    pBackup_reg->Suspend_Ana_SPK_CON2 = Ana_Get_Reg(SPK_CON2);
    pBackup_reg->Suspend_Ana_SPK_CON6 = Ana_Get_Reg(SPK_CON6);
    pBackup_reg->Suspend_Ana_SPK_CON7 = Ana_Get_Reg(SPK_CON7);
    pBackup_reg->Suspend_Ana_SPK_CON8 = Ana_Get_Reg(SPK_CON8);
    pBackup_reg->Suspend_Ana_SPK_CON9 = Ana_Get_Reg(SPK_CON9);
    pBackup_reg->Suspend_Ana_SPK_CON10 = Ana_Get_Reg(SPK_CON10);
    pBackup_reg->Suspend_Ana_SPK_CON11 = Ana_Get_Reg(SPK_CON11);
    pBackup_reg->Suspend_Ana_SPK_CON12 = Ana_Get_Reg(SPK_CON12);
    pBackup_reg->Suspend_Ana_TOP_CKPDN0 = Ana_Get_Reg(TOP_CKPDN0);
    pBackup_reg->Suspend_Ana_TOP_CKPDN0_SET = Ana_Get_Reg(TOP_CKPDN0_SET);
    pBackup_reg->Suspend_Ana_TOP_CKPDN0_CLR = Ana_Get_Reg(TOP_CKPDN0_CLR);
    pBackup_reg->Suspend_Ana_TOP_CKPDN1 = Ana_Get_Reg(TOP_CKPDN1);
    pBackup_reg->Suspend_Ana_TOP_CKPDN1_SET = Ana_Get_Reg(TOP_CKPDN1_SET);
    pBackup_reg->Suspend_Ana_TOP_CKPDN1_CLR = Ana_Get_Reg(TOP_CKPDN1_CLR);
    pBackup_reg->Suspend_Ana_TOP_CKPDN2 = Ana_Get_Reg(TOP_CKPDN2);
    pBackup_reg->Suspend_Ana_TOP_CKPDN2_SET = Ana_Get_Reg(TOP_CKPDN2_SET);
    pBackup_reg->Suspend_Ana_TOP_CKPDN2_CLR = Ana_Get_Reg(TOP_CKPDN2_CLR);
    pBackup_reg->Suspend_Ana_TOP_RST_CON = Ana_Get_Reg(TOP_RST_CON);
    pBackup_reg->Suspend_Ana_TOP_RST_CON_SET = Ana_Get_Reg(TOP_RST_CON_SET);
    pBackup_reg->Suspend_Ana_TOP_RST_CON_CLR = Ana_Get_Reg(TOP_RST_CON_CLR);
    pBackup_reg->Suspend_Ana_TOP_RST_MISC = Ana_Get_Reg(TOP_RST_MISC);
    pBackup_reg->Suspend_Ana_TOP_RST_MISC_SET = Ana_Get_Reg(TOP_RST_MISC_SET);
    pBackup_reg->Suspend_Ana_TOP_RST_MISC_CLR = Ana_Get_Reg(TOP_RST_MISC_CLR);
    pBackup_reg->Suspend_Ana_TOP_CKCON0 = Ana_Get_Reg(TOP_CKPDN0);
    pBackup_reg->Suspend_Ana_TOP_CKCON0_SET = Ana_Get_Reg(TOP_CKPDN0_SET);
    pBackup_reg->Suspend_Ana_TOP_CKCON0_CLR = Ana_Get_Reg(TOP_CKPDN0_CLR);
    pBackup_reg->Suspend_Ana_TOP_CKCON1 = Ana_Get_Reg(TOP_CKPDN1);
    pBackup_reg->Suspend_Ana_TOP_CKCON1_SET = Ana_Get_Reg(TOP_CKPDN1_SET);
    pBackup_reg->Suspend_Ana_TOP_CKCON1_CLR = Ana_Get_Reg(TOP_CKPDN1_CLR);
    pBackup_reg->Suspend_Ana_TOP_CKTST0 = Ana_Get_Reg(TOP_CKTST0);
    pBackup_reg->Suspend_Ana_TOP_CKTST1 = Ana_Get_Reg(TOP_CKTST1);
    pBackup_reg->Suspend_Ana_TOP_CKTST2 = Ana_Get_Reg(TOP_CKTST2);

    pBackup_reg->Suspend_Ana_AUDTOP_CON0 = Ana_Get_Reg(AUDTOP_CON0);
    pBackup_reg->Suspend_Ana_AUDTOP_CON1 = Ana_Get_Reg(AUDTOP_CON1);
    pBackup_reg->Suspend_Ana_AUDTOP_CON2 = Ana_Get_Reg(AUDTOP_CON2);
    pBackup_reg->Suspend_Ana_AUDTOP_CON3 = Ana_Get_Reg(AUDTOP_CON3);
    pBackup_reg->Suspend_Ana_AUDTOP_CON4 = Ana_Get_Reg(AUDTOP_CON4);
    pBackup_reg->Suspend_Ana_AUDTOP_CON5 = Ana_Get_Reg(AUDTOP_CON5);
    pBackup_reg->Suspend_Ana_AUDTOP_CON6 = Ana_Get_Reg(AUDTOP_CON6);
    pBackup_reg->Suspend_Ana_AUDTOP_CON7 = Ana_Get_Reg(AUDTOP_CON7);
    pBackup_reg->Suspend_Ana_AUDTOP_CON8 = Ana_Get_Reg(AUDTOP_CON8);
    pBackup_reg->Suspend_Ana_AUDTOP_CON9 = Ana_Get_Reg(AUDTOP_CON9);

    AudDrv_ANA_Clk_Off();
}

void AudDrv_Recover_reg_ANA(AudAna_Suspend_Reg *pBackup_reg)
{
    PRINTK_AUDDRV("+AudDrv_Recover_reg_ANA \n");

    if (pBackup_reg == NULL)
    {
        PRINTK_AUDDRV("pBackup_reg is null \n");
        PRINTK_AUDDRV("-AudDrv_Recover_reg_ANA \n");
        return;
    }

    AudDrv_ANA_Clk_On();

    //TURN OFF 1. machine device 2.platform device
#if 0
    Ana_Set_Reg(SPK_CON12, 0x0000, 0xffff);
    Ana_Set_Reg(TOP_CKPDN1_SET, 0x000E, 0x000E); // Disable Speaker clock
    Ana_Set_Reg(AUDTOP_CON7, 0x2500, 0xffff); // set voice buffer gain as -22dB
    Ana_Set_Reg(AUDTOP_CON7, 0x2400, 0xffff); // Disable voice buffer
    Ana_Set_Reg(AUDTOP_CON4, 0x0000, 0xffff); // Disable audio bias and L-DAC
    Ana_Set_Reg(AUDTOP_CON5, 0x0014, 0xffff); // Set RCH/LCH buffer to smallest gain -5dB
    Ana_Set_Reg(AUDTOP_CON6, 0xF7F2, 0xffff); //
    Ana_Set_Reg(AUDTOP_CON0, 0x0000, 0x1000); // Disable 1.4v common mdoe
    Ana_Set_Reg(AUDTOP_CON6, 0x37E2, 0xffff); // Disable input short of HP drivers for voice signal leakage prevent and disable 2.4V reference buffer , audio DAC clock.
#endif
    Ana_Set_Reg(ABB_AFE_CON0, 0x0000, 0x0003);


    Ana_Set_Reg(SPK_CON0, pBackup_reg->Suspend_Ana_SPK_CON0, 0xFFFF);
    Ana_Set_Reg(SPK_CON1, pBackup_reg->Suspend_Ana_SPK_CON1, 0xFFFF);
    Ana_Set_Reg(SPK_CON2, pBackup_reg->Suspend_Ana_SPK_CON2, 0xFFFF);
    Ana_Set_Reg(SPK_CON6, pBackup_reg->Suspend_Ana_SPK_CON6, 0xFFFF);
    Ana_Set_Reg(SPK_CON7, pBackup_reg->Suspend_Ana_SPK_CON7, 0xFFFF);
    Ana_Set_Reg(SPK_CON8, pBackup_reg->Suspend_Ana_SPK_CON8, 0xFFFF);
    Ana_Set_Reg(SPK_CON9, pBackup_reg->Suspend_Ana_SPK_CON9, 0xFFFF);
    Ana_Set_Reg(SPK_CON10, pBackup_reg->Suspend_Ana_SPK_CON10, 0xFFFF);
    Ana_Set_Reg(SPK_CON11, pBackup_reg->Suspend_Ana_SPK_CON11, 0xFFFF);
    Ana_Set_Reg(SPK_CON12, pBackup_reg->Suspend_Ana_SPK_CON12, 0xFFFF);

    Ana_Set_Reg(TOP_CKPDN0, pBackup_reg->Suspend_Ana_TOP_CKPDN0, 0x0001);
    Ana_Set_Reg(TOP_CKPDN1, pBackup_reg->Suspend_Ana_TOP_CKPDN1, 0x010E);

    /*
    Ana_Set_Reg(TOP_CKPDN2, pBackup_reg->Suspend_Ana_TOP_CKPDN2, 0xFFFF);
    Ana_Set_Reg(TOP_RST_CON, pBackup_reg->Suspend_Ana_TOP_RST_CON, 0xFFFF);
    Ana_Set_Reg(TOP_RST_MISC, pBackup_reg->Suspend_Ana_TOP_RST_MISC, 0xFFFF);
    Ana_Set_Reg(TOP_CKPDN0, pBackup_reg->Suspend_Ana_TOP_CKCON0, 0xFFFF);
    Ana_Set_Reg(TOP_CKPDN1, pBackup_reg->Suspend_Ana_TOP_CKCON1, 0xFFFF);
    Ana_Set_Reg(TOP_CKTST0, pBackup_reg->Suspend_Ana_TOP_CKTST0, 0xFFFF);
    */
    Ana_Set_Reg(TOP_CKTST1, pBackup_reg->Suspend_Ana_TOP_CKTST1, 0xFFFF);
    Ana_Set_Reg(TOP_CKTST2, pBackup_reg->Suspend_Ana_TOP_CKTST2, 0xFFFF);

    Ana_Set_Reg(AUDTOP_CON0, pBackup_reg->Suspend_Ana_AUDTOP_CON0, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON1, pBackup_reg->Suspend_Ana_AUDTOP_CON1, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON2, pBackup_reg->Suspend_Ana_AUDTOP_CON2, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON3, pBackup_reg->Suspend_Ana_AUDTOP_CON3, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON4, pBackup_reg->Suspend_Ana_AUDTOP_CON4, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON5, pBackup_reg->Suspend_Ana_AUDTOP_CON5, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON6, pBackup_reg->Suspend_Ana_AUDTOP_CON6, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON7, pBackup_reg->Suspend_Ana_AUDTOP_CON7, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON8, pBackup_reg->Suspend_Ana_AUDTOP_CON8, 0xFFFF);
    Ana_Set_Reg(AUDTOP_CON9, pBackup_reg->Suspend_Ana_AUDTOP_CON9, 0xFFFF);

    Ana_Set_Reg(ABB_AFE_CON0, pBackup_reg->Suspend_Ana_ABB_AFE_CON0, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON1, pBackup_reg->Suspend_Ana_ABB_AFE_CON1, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON2, pBackup_reg->Suspend_Ana_ABB_AFE_CON2, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON3, pBackup_reg->Suspend_Ana_ABB_AFE_CON3, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON4, pBackup_reg->Suspend_Ana_ABB_AFE_CON4, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON5, pBackup_reg->Suspend_Ana_ABB_AFE_CON5, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON6, pBackup_reg->Suspend_Ana_ABB_AFE_CON6, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON7, pBackup_reg->Suspend_Ana_ABB_AFE_CON7, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON8, pBackup_reg->Suspend_Ana_ABB_AFE_CON8, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON9, pBackup_reg->Suspend_Ana_ABB_AFE_CON9, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON10, pBackup_reg->Suspend_Ana_ABB_AFE_CON10, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_CON11, pBackup_reg->Suspend_Ana_ABB_AFE_CON11, 0xFFFF);

    Ana_Set_Reg(ABB_AFE_UP8X_FIFO_CFG0, pBackup_reg->Suspend_Ana_ABB_AFE_UP8X_FIFO_CFG0, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_PMIC_NEWIF_CFG0, pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG0, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_PMIC_NEWIF_CFG1, pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG1, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_PMIC_NEWIF_CFG2, pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG2, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_PMIC_NEWIF_CFG3, pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG3, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_TOP_CON0, pBackup_reg->Suspend_Ana_ABB_AFE_TOP_CON0, 0xFFFF);
    Ana_Set_Reg(ABB_AFE_MON_DEBUG0, pBackup_reg->Suspend_Ana_ABB_AFE_MON_DEBUG0, 0xFFFF);

    AudDrv_ANA_Clk_Off();
}

void Ana_Log_Print(void)
{
    AudDrv_ANA_Clk_On();
    printk("ABB_AFE_CON0	= 0x%x\n", Ana_Get_Reg(ABB_AFE_CON0));
    printk("ABB_AFE_CON1	= 0x%x\n", Ana_Get_Reg(ABB_AFE_CON1));
    printk("ABB_AFE_CON2	= 0x%x\n", Ana_Get_Reg(ABB_AFE_CON2));
    printk("ABB_AFE_CON3	= 0x%x\n", Ana_Get_Reg(ABB_AFE_CON3));
    printk("ABB_AFE_CON4	= 0x%x\n", Ana_Get_Reg(ABB_AFE_CON4));
    printk("ABB_AFE_CON5  = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON5));
    printk("ABB_AFE_CON6  = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON6));
    printk("ABB_AFE_CON7  = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON7));
    printk("ABB_AFE_CON8  = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON8));
    printk("ABB_AFE_CON9  = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON9));
    printk("ABB_AFE_CON10  = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON10));
    printk("ABB_AFE_CON11  = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON11));

    printk("ABB_AFE_STA0  = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA0));
    printk("ABB_AFE_STA1  = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA1));
    printk("ABB_AFE_STA2  = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA2));

    printk("ABB_AFE_UP8X_FIFO_CFG0	= 0x%x\n", Ana_Get_Reg(ABB_AFE_UP8X_FIFO_CFG0));
    printk("ABB_AFE_UP8X_FIFO_LOG_MON0	= 0x%x\n", Ana_Get_Reg(ABB_AFE_UP8X_FIFO_LOG_MON0));
    printk("ABB_AFE_UP8X_FIFO_LOG_MON1	= 0x%x\n", Ana_Get_Reg(ABB_AFE_UP8X_FIFO_LOG_MON1));
    printk("ABB_AFE_PMIC_NEWIF_CFG0	= 0x%x\n", Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG0));
    printk("ABB_AFE_PMIC_NEWIF_CFG1	= 0x%x\n", Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG1));
    printk("ABB_AFE_PMIC_NEWIF_CFG2  = 0x%x\n", Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG2));
    printk("ABB_AFE_PMIC_NEWIF_CFG3  = 0x%x\n", Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG3));
    printk("ABB_AFE_TOP_CON0  = 0x%x\n", Ana_Get_Reg(ABB_AFE_TOP_CON0));
    printk("ABB_AFE_MON_DEBUG0  = 0x%x\n", Ana_Get_Reg(ABB_AFE_MON_DEBUG0));


    printk("SPK_CON0  = 0x%x\n", Ana_Get_Reg(SPK_CON0));
    printk("SPK_CON1  = 0x%x\n", Ana_Get_Reg(SPK_CON1));
    printk("SPK_CON2  = 0x%x\n", Ana_Get_Reg(SPK_CON2));
    printk("SPK_CON6  = 0x%x\n", Ana_Get_Reg(SPK_CON6));
    printk("SPK_CON7  = 0x%x\n", Ana_Get_Reg(SPK_CON7));
    printk("SPK_CON8  = 0x%x\n", Ana_Get_Reg(SPK_CON8));
    printk("SPK_CON9  = 0x%x\n", Ana_Get_Reg(SPK_CON9));
    printk("SPK_CON10  = 0x%x\n", Ana_Get_Reg(SPK_CON10));
    printk("SPK_CON11  = 0x%x\n", Ana_Get_Reg(SPK_CON11));
    printk("SPK_CON12  = 0x%x\n", Ana_Get_Reg(SPK_CON12));

    printk("CID	= 0x%x\n", Ana_Get_Reg(CID));
    printk("TOP_CKPDN0  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN0));
    printk("TOP_CKPDN0_SET  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN0_SET));
    printk("TOP_CKPDN0_CLR  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN0_CLR));
    printk("TOP_CKPDN1  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN1));
    printk("TOP_CKPDN1_SET  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN1_SET));
    printk("TOP_CKPDN1_CLR  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN1_CLR));
    printk("TOP_CKPDN2  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN2));
    printk("TOP_CKPDN2_SET  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN2_SET));
    printk("TOP_CKPDN2_CLR  = 0x%x\n", Ana_Get_Reg(TOP_CKPDN2_CLR));
    printk("TOP_CKCON1  = 0x%x\n", Ana_Get_Reg(TOP_CKCON1));

    printk("AUDTOP_CON0  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON0));
    printk("AUDTOP_CON1  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON1));
    printk("AUDTOP_CON2  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON2));
    printk("AUDTOP_CON3  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON3));
    printk("AUDTOP_CON4  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON4));
    printk("AUDTOP_CON5  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON5));
    printk("AUDTOP_CON6  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON6));
    printk("AUDTOP_CON7  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON7));
    printk("AUDTOP_CON8  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON8));
    printk("AUDTOP_CON9  = 0x%x\n", Ana_Get_Reg(AUDTOP_CON9));
    AudDrv_ANA_Clk_Off();
    printk("-Ana_Log_Print \n");
}


// export symbols for other module using
EXPORT_SYMBOL(Ana_Log_Print);
EXPORT_SYMBOL(Ana_Set_Reg);
EXPORT_SYMBOL(Ana_Get_Reg);
Commit	Line	Data
6fa3eb70 S	1	/*
	2	* Copyright (C) 2007 The Android Open Source Project
	3	*
	4	* Licensed under the Apache License, Version 2.0 (the "License");
	5	* you may not use this file except in compliance with the License.
	6	* You may obtain a copy of the License at
	7	*
	8	* http://www.apache.org/licenses/LICENSE-2.0
	9	*
	10	* Unless required by applicable law or agreed to in writing, software
	11	* distributed under the License is distributed on an "AS IS" BASIS,
	12	* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	13	* See the License for the specific language governing permissions and
	14	* limitations under the License.
	15	*/
	16	/*******************************************************************************
	17	*
	18	* Filename:
	19	* ---------
	20	* AudDrv_Ana.c
	21	*
	22	* Project:
	23	* --------
	24	* MT6583 Audio Driver ana Register setting
	25	*
	26	* Description:
	27	* ------------
	28	* Audio register
	29	*
	30	* Author:
	31	* -------
	32	* Chipeng Chang
	33	*
	34	*------------------------------------------------------------------------------
	35	* $Revision: #1 $
	36	* $Modtime:$
	37	* $Log:$
	38	*
	39	*
	40	*******************************************************************************/
	41
	42
	43	/*****************************************************************************
	44	* C O M P I L E R F L A G S
	45	*****************************************************************************/
	46
	47
	48	/*****************************************************************************
	49	* E X T E R N A L R E F E R E N C E S
	50	*****************************************************************************/
	51
	52	#include "AudDrv_Common.h"
	53	#include "AudDrv_Ana_6323.h"
	54	#include "AudDrv_Clk.h"
	55	#include "AudDrv_ioctl.h"
	56
	57	// define this to use wrapper to control
	58	#define AUDIO_USING_WRAP_DRIVER
	59	#ifdef AUDIO_USING_WRAP_DRIVER
	60	#include <mach/mt_pmic_wrap.h>
	61	#endif
	62
	63	/*****************************************************************************
	64	* D A T A T Y P E S
65	*****************************************************************************/
66
67	void Ana_Set_Reg(uint32 offset, uint32 value, uint32 mask)
68	{
69	// set pmic register or analog CONTROL_IFACE_PATH
70	int ret = 0;
71	#ifdef AUDIO_USING_WRAP_DRIVER
72	uint32 Reg_Value = Ana_Get_Reg(offset);
4b9e9796 S	73
	74	if (!(offset <= AUDTOP_MAX_ADDR_OFFSET \|\|
	75	(offset >= ABB_AFE_ADDR_START && offset <= ABB_AFE_ADDR_END)))
	76	return;
	77
6fa3eb70 S	78	Reg_Value &= (~mask);
	79	Reg_Value \|= (value & mask);
	80	ret = pwrap_write(offset, Reg_Value);
	81	Reg_Value = Ana_Get_Reg(offset);
	82	if ((Reg_Value & mask) != (value & mask))
	83	{
	84	printk("Ana_Set_Reg offset= 0x%x , value = 0x%x mask = 0x%x ret = %d Reg_Value = 0x%x\n", offset, value, mask, ret, Reg_Value);
	85	}
	86	#endif
	87	}
	88
	89	uint32 Ana_Get_Reg(uint32 offset)
	90	{
	91	// get pmic register
	92	int ret = 0;
	93	uint32 Rdata = 0;
4b9e9796 S	94
	95	if (!(offset <= AUDTOP_MAX_ADDR_OFFSET \|\|
	96	(offset >= ABB_AFE_ADDR_START && offset <= ABB_AFE_ADDR_END)))
	97	return 0;
	98
6fa3eb70 S	99	#ifdef AUDIO_USING_WRAP_DRIVER
	100	ret = pwrap_read(offset, &Rdata);
	101	#endif
	102	//PRINTK_ANA_REG ("Ana_Get_Reg offset= 0x%x Rdata = 0x%x ret = %d\n",offset,Rdata,ret);
	103	return Rdata;
	104	}
	105
	106	void AudDrv_Store_reg_ANA(AudAna_Suspend_Reg *pBackup_reg)
	107	{
	108	PRINTK_AUDDRV("+AudDrv_Store_reg_ANA \n");
	109
	110	if (pBackup_reg == NULL)
	111	{
	112	PRINTK_AUDDRV("pBackup_reg is null \n");
	113	PRINTK_AUDDRV("-AudDrv_Store_reg_ANA \n");
	114	return;
	115	}
	116
	117	AudDrv_ANA_Clk_On();
	118	pBackup_reg->Suspend_Ana_ABB_AFE_CON0 = Ana_Get_Reg(ABB_AFE_CON0);
	119	pBackup_reg->Suspend_Ana_ABB_AFE_CON1 = Ana_Get_Reg(ABB_AFE_CON1);
	120	pBackup_reg->Suspend_Ana_ABB_AFE_CON2 = Ana_Get_Reg(ABB_AFE_CON2);
	121	pBackup_reg->Suspend_Ana_ABB_AFE_CON3 = Ana_Get_Reg(ABB_AFE_CON3);
	122	pBackup_reg->Suspend_Ana_ABB_AFE_CON4 = Ana_Get_Reg(ABB_AFE_CON4);
	123	pBackup_reg->Suspend_Ana_ABB_AFE_CON5 = Ana_Get_Reg(ABB_AFE_CON5);
	124	pBackup_reg->Suspend_Ana_ABB_AFE_CON6 = Ana_Get_Reg(ABB_AFE_CON6);
	125	pBackup_reg->Suspend_Ana_ABB_AFE_CON7 = Ana_Get_Reg(ABB_AFE_CON7);
	126	pBackup_reg->Suspend_Ana_ABB_AFE_CON8 = Ana_Get_Reg(ABB_AFE_CON8);
	127	pBackup_reg->Suspend_Ana_ABB_AFE_CON9 = Ana_Get_Reg(ABB_AFE_CON9);
	128	pBackup_reg->Suspend_Ana_ABB_AFE_CON10 = Ana_Get_Reg(ABB_AFE_CON10);
	129	pBackup_reg->Suspend_Ana_ABB_AFE_CON11 = Ana_Get_Reg(ABB_AFE_CON11);
	130	pBackup_reg->Suspend_Ana_ABB_AFE_UP8X_FIFO_CFG0 = Ana_Get_Reg(ABB_AFE_UP8X_FIFO_CFG0);
	131	pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG0 = Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG0);
	132	pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG1 = Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG1);
	133	pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG2 = Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG2);
	134	pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG3 = Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG3);
	135	pBackup_reg->Suspend_Ana_ABB_AFE_TOP_CON0 = Ana_Get_Reg(ABB_AFE_TOP_CON0);
	136	pBackup_reg->Suspend_Ana_ABB_AFE_MON_DEBUG0 = Ana_Get_Reg(ABB_AFE_MON_DEBUG0);
	137
	138	pBackup_reg->Suspend_Ana_SPK_CON0 = Ana_Get_Reg(SPK_CON0);
	139	pBackup_reg->Suspend_Ana_SPK_CON1 = Ana_Get_Reg(SPK_CON1);
	140	pBackup_reg->Suspend_Ana_SPK_CON2 = Ana_Get_Reg(SPK_CON2);
	141	pBackup_reg->Suspend_Ana_SPK_CON6 = Ana_Get_Reg(SPK_CON6);
	142	pBackup_reg->Suspend_Ana_SPK_CON7 = Ana_Get_Reg(SPK_CON7);
	143	pBackup_reg->Suspend_Ana_SPK_CON8 = Ana_Get_Reg(SPK_CON8);
	144	pBackup_reg->Suspend_Ana_SPK_CON9 = Ana_Get_Reg(SPK_CON9);
	145	pBackup_reg->Suspend_Ana_SPK_CON10 = Ana_Get_Reg(SPK_CON10);
	146	pBackup_reg->Suspend_Ana_SPK_CON11 = Ana_Get_Reg(SPK_CON11);
	147	pBackup_reg->Suspend_Ana_SPK_CON12 = Ana_Get_Reg(SPK_CON12);
	148	pBackup_reg->Suspend_Ana_TOP_CKPDN0 = Ana_Get_Reg(TOP_CKPDN0);
	149	pBackup_reg->Suspend_Ana_TOP_CKPDN0_SET = Ana_Get_Reg(TOP_CKPDN0_SET);
	150	pBackup_reg->Suspend_Ana_TOP_CKPDN0_CLR = Ana_Get_Reg(TOP_CKPDN0_CLR);
	151	pBackup_reg->Suspend_Ana_TOP_CKPDN1 = Ana_Get_Reg(TOP_CKPDN1);
	152	pBackup_reg->Suspend_Ana_TOP_CKPDN1_SET = Ana_Get_Reg(TOP_CKPDN1_SET);
	153	pBackup_reg->Suspend_Ana_TOP_CKPDN1_CLR = Ana_Get_Reg(TOP_CKPDN1_CLR);
	154	pBackup_reg->Suspend_Ana_TOP_CKPDN2 = Ana_Get_Reg(TOP_CKPDN2);
	155	pBackup_reg->Suspend_Ana_TOP_CKPDN2_SET = Ana_Get_Reg(TOP_CKPDN2_SET);
	156	pBackup_reg->Suspend_Ana_TOP_CKPDN2_CLR = Ana_Get_Reg(TOP_CKPDN2_CLR);
	157	pBackup_reg->Suspend_Ana_TOP_RST_CON = Ana_Get_Reg(TOP_RST_CON);
	158	pBackup_reg->Suspend_Ana_TOP_RST_CON_SET = Ana_Get_Reg(TOP_RST_CON_SET);
	159	pBackup_reg->Suspend_Ana_TOP_RST_CON_CLR = Ana_Get_Reg(TOP_RST_CON_CLR);
	160	pBackup_reg->Suspend_Ana_TOP_RST_MISC = Ana_Get_Reg(TOP_RST_MISC);
	161	pBackup_reg->Suspend_Ana_TOP_RST_MISC_SET = Ana_Get_Reg(TOP_RST_MISC_SET);
	162	pBackup_reg->Suspend_Ana_TOP_RST_MISC_CLR = Ana_Get_Reg(TOP_RST_MISC_CLR);
163	pBackup_reg->Suspend_Ana_TOP_CKCON0 = Ana_Get_Reg(TOP_CKPDN0);
164	pBackup_reg->Suspend_Ana_TOP_CKCON0_SET = Ana_Get_Reg(TOP_CKPDN0_SET);
165	pBackup_reg->Suspend_Ana_TOP_CKCON0_CLR = Ana_Get_Reg(TOP_CKPDN0_CLR);
166	pBackup_reg->Suspend_Ana_TOP_CKCON1 = Ana_Get_Reg(TOP_CKPDN1);
167	pBackup_reg->Suspend_Ana_TOP_CKCON1_SET = Ana_Get_Reg(TOP_CKPDN1_SET);
168	pBackup_reg->Suspend_Ana_TOP_CKCON1_CLR = Ana_Get_Reg(TOP_CKPDN1_CLR);
169	pBackup_reg->Suspend_Ana_TOP_CKTST0 = Ana_Get_Reg(TOP_CKTST0);
170	pBackup_reg->Suspend_Ana_TOP_CKTST1 = Ana_Get_Reg(TOP_CKTST1);
171	pBackup_reg->Suspend_Ana_TOP_CKTST2 = Ana_Get_Reg(TOP_CKTST2);
172
173	pBackup_reg->Suspend_Ana_AUDTOP_CON0 = Ana_Get_Reg(AUDTOP_CON0);
174	pBackup_reg->Suspend_Ana_AUDTOP_CON1 = Ana_Get_Reg(AUDTOP_CON1);
175	pBackup_reg->Suspend_Ana_AUDTOP_CON2 = Ana_Get_Reg(AUDTOP_CON2);
176	pBackup_reg->Suspend_Ana_AUDTOP_CON3 = Ana_Get_Reg(AUDTOP_CON3);
177	pBackup_reg->Suspend_Ana_AUDTOP_CON4 = Ana_Get_Reg(AUDTOP_CON4);
178	pBackup_reg->Suspend_Ana_AUDTOP_CON5 = Ana_Get_Reg(AUDTOP_CON5);
179	pBackup_reg->Suspend_Ana_AUDTOP_CON6 = Ana_Get_Reg(AUDTOP_CON6);
180	pBackup_reg->Suspend_Ana_AUDTOP_CON7 = Ana_Get_Reg(AUDTOP_CON7);
181	pBackup_reg->Suspend_Ana_AUDTOP_CON8 = Ana_Get_Reg(AUDTOP_CON8);
182	pBackup_reg->Suspend_Ana_AUDTOP_CON9 = Ana_Get_Reg(AUDTOP_CON9);
183
184	AudDrv_ANA_Clk_Off();
185	}
186
187	void AudDrv_Recover_reg_ANA(AudAna_Suspend_Reg *pBackup_reg)
188	{
189	PRINTK_AUDDRV("+AudDrv_Recover_reg_ANA \n");
190
191	if (pBackup_reg == NULL)
192	{
193	PRINTK_AUDDRV("pBackup_reg is null \n");
194	PRINTK_AUDDRV("-AudDrv_Recover_reg_ANA \n");
195	return;
196	}
197
198	AudDrv_ANA_Clk_On();
199
200	//TURN OFF 1. machine device 2.platform device
201	#if 0
202	Ana_Set_Reg(SPK_CON12, 0x0000, 0xffff);
203	Ana_Set_Reg(TOP_CKPDN1_SET, 0x000E, 0x000E); // Disable Speaker clock
204	Ana_Set_Reg(AUDTOP_CON7, 0x2500, 0xffff); // set voice buffer gain as -22dB
205	Ana_Set_Reg(AUDTOP_CON7, 0x2400, 0xffff); // Disable voice buffer
206	Ana_Set_Reg(AUDTOP_CON4, 0x0000, 0xffff); // Disable audio bias and L-DAC
207	Ana_Set_Reg(AUDTOP_CON5, 0x0014, 0xffff); // Set RCH/LCH buffer to smallest gain -5dB
208	Ana_Set_Reg(AUDTOP_CON6, 0xF7F2, 0xffff); //
209	Ana_Set_Reg(AUDTOP_CON0, 0x0000, 0x1000); // Disable 1.4v common mdoe
210	Ana_Set_Reg(AUDTOP_CON6, 0x37E2, 0xffff); // Disable input short of HP drivers for voice signal leakage prevent and disable 2.4V reference buffer , audio DAC clock.
211	#endif
212	Ana_Set_Reg(ABB_AFE_CON0, 0x0000, 0x0003);
213
214
215	Ana_Set_Reg(SPK_CON0, pBackup_reg->Suspend_Ana_SPK_CON0, 0xFFFF);
216	Ana_Set_Reg(SPK_CON1, pBackup_reg->Suspend_Ana_SPK_CON1, 0xFFFF);
217	Ana_Set_Reg(SPK_CON2, pBackup_reg->Suspend_Ana_SPK_CON2, 0xFFFF);
218	Ana_Set_Reg(SPK_CON6, pBackup_reg->Suspend_Ana_SPK_CON6, 0xFFFF);
219	Ana_Set_Reg(SPK_CON7, pBackup_reg->Suspend_Ana_SPK_CON7, 0xFFFF);
220	Ana_Set_Reg(SPK_CON8, pBackup_reg->Suspend_Ana_SPK_CON8, 0xFFFF);
221	Ana_Set_Reg(SPK_CON9, pBackup_reg->Suspend_Ana_SPK_CON9, 0xFFFF);
222	Ana_Set_Reg(SPK_CON10, pBackup_reg->Suspend_Ana_SPK_CON10, 0xFFFF);
223	Ana_Set_Reg(SPK_CON11, pBackup_reg->Suspend_Ana_SPK_CON11, 0xFFFF);
224	Ana_Set_Reg(SPK_CON12, pBackup_reg->Suspend_Ana_SPK_CON12, 0xFFFF);
225
226	Ana_Set_Reg(TOP_CKPDN0, pBackup_reg->Suspend_Ana_TOP_CKPDN0, 0x0001);
227	Ana_Set_Reg(TOP_CKPDN1, pBackup_reg->Suspend_Ana_TOP_CKPDN1, 0x010E);
228
229	/*
230	Ana_Set_Reg(TOP_CKPDN2, pBackup_reg->Suspend_Ana_TOP_CKPDN2, 0xFFFF);
231	Ana_Set_Reg(TOP_RST_CON, pBackup_reg->Suspend_Ana_TOP_RST_CON, 0xFFFF);
232	Ana_Set_Reg(TOP_RST_MISC, pBackup_reg->Suspend_Ana_TOP_RST_MISC, 0xFFFF);
233	Ana_Set_Reg(TOP_CKPDN0, pBackup_reg->Suspend_Ana_TOP_CKCON0, 0xFFFF);
234	Ana_Set_Reg(TOP_CKPDN1, pBackup_reg->Suspend_Ana_TOP_CKCON1, 0xFFFF);
235	Ana_Set_Reg(TOP_CKTST0, pBackup_reg->Suspend_Ana_TOP_CKTST0, 0xFFFF);
236	*/
237	Ana_Set_Reg(TOP_CKTST1, pBackup_reg->Suspend_Ana_TOP_CKTST1, 0xFFFF);
238	Ana_Set_Reg(TOP_CKTST2, pBackup_reg->Suspend_Ana_TOP_CKTST2, 0xFFFF);
239
240	Ana_Set_Reg(AUDTOP_CON0, pBackup_reg->Suspend_Ana_AUDTOP_CON0, 0xFFFF);
241	Ana_Set_Reg(AUDTOP_CON1, pBackup_reg->Suspend_Ana_AUDTOP_CON1, 0xFFFF);
242	Ana_Set_Reg(AUDTOP_CON2, pBackup_reg->Suspend_Ana_AUDTOP_CON2, 0xFFFF);
243	Ana_Set_Reg(AUDTOP_CON3, pBackup_reg->Suspend_Ana_AUDTOP_CON3, 0xFFFF);
244	Ana_Set_Reg(AUDTOP_CON4, pBackup_reg->Suspend_Ana_AUDTOP_CON4, 0xFFFF);
245	Ana_Set_Reg(AUDTOP_CON5, pBackup_reg->Suspend_Ana_AUDTOP_CON5, 0xFFFF);
246	Ana_Set_Reg(AUDTOP_CON6, pBackup_reg->Suspend_Ana_AUDTOP_CON6, 0xFFFF);
247	Ana_Set_Reg(AUDTOP_CON7, pBackup_reg->Suspend_Ana_AUDTOP_CON7, 0xFFFF);
248	Ana_Set_Reg(AUDTOP_CON8, pBackup_reg->Suspend_Ana_AUDTOP_CON8, 0xFFFF);
249	Ana_Set_Reg(AUDTOP_CON9, pBackup_reg->Suspend_Ana_AUDTOP_CON9, 0xFFFF);
250
251	Ana_Set_Reg(ABB_AFE_CON0, pBackup_reg->Suspend_Ana_ABB_AFE_CON0, 0xFFFF);
252	Ana_Set_Reg(ABB_AFE_CON1, pBackup_reg->Suspend_Ana_ABB_AFE_CON1, 0xFFFF);
253	Ana_Set_Reg(ABB_AFE_CON2, pBackup_reg->Suspend_Ana_ABB_AFE_CON2, 0xFFFF);
254	Ana_Set_Reg(ABB_AFE_CON3, pBackup_reg->Suspend_Ana_ABB_AFE_CON3, 0xFFFF);
255	Ana_Set_Reg(ABB_AFE_CON4, pBackup_reg->Suspend_Ana_ABB_AFE_CON4, 0xFFFF);
256	Ana_Set_Reg(ABB_AFE_CON5, pBackup_reg->Suspend_Ana_ABB_AFE_CON5, 0xFFFF);
257	Ana_Set_Reg(ABB_AFE_CON6, pBackup_reg->Suspend_Ana_ABB_AFE_CON6, 0xFFFF);
258	Ana_Set_Reg(ABB_AFE_CON7, pBackup_reg->Suspend_Ana_ABB_AFE_CON7, 0xFFFF);
259	Ana_Set_Reg(ABB_AFE_CON8, pBackup_reg->Suspend_Ana_ABB_AFE_CON8, 0xFFFF);
260	Ana_Set_Reg(ABB_AFE_CON9, pBackup_reg->Suspend_Ana_ABB_AFE_CON9, 0xFFFF);
261	Ana_Set_Reg(ABB_AFE_CON10, pBackup_reg->Suspend_Ana_ABB_AFE_CON10, 0xFFFF);
262	Ana_Set_Reg(ABB_AFE_CON11, pBackup_reg->Suspend_Ana_ABB_AFE_CON11, 0xFFFF);
263
264	Ana_Set_Reg(ABB_AFE_UP8X_FIFO_CFG0, pBackup_reg->Suspend_Ana_ABB_AFE_UP8X_FIFO_CFG0, 0xFFFF);
265	Ana_Set_Reg(ABB_AFE_PMIC_NEWIF_CFG0, pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG0, 0xFFFF);
266	Ana_Set_Reg(ABB_AFE_PMIC_NEWIF_CFG1, pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG1, 0xFFFF);
267	Ana_Set_Reg(ABB_AFE_PMIC_NEWIF_CFG2, pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG2, 0xFFFF);
268	Ana_Set_Reg(ABB_AFE_PMIC_NEWIF_CFG3, pBackup_reg->Suspend_Ana_ABB_AFE_PMIC_NEWIF_CFG3, 0xFFFF);
269	Ana_Set_Reg(ABB_AFE_TOP_CON0, pBackup_reg->Suspend_Ana_ABB_AFE_TOP_CON0, 0xFFFF);
270	Ana_Set_Reg(ABB_AFE_MON_DEBUG0, pBackup_reg->Suspend_Ana_ABB_AFE_MON_DEBUG0, 0xFFFF);
271
272	AudDrv_ANA_Clk_Off();
273	}
274
275	void Ana_Log_Print(void)
276	{
277	AudDrv_ANA_Clk_On();
278	printk("ABB_AFE_CON0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON0));
279	printk("ABB_AFE_CON1 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON1));
280	printk("ABB_AFE_CON2 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON2));
281	printk("ABB_AFE_CON3 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON3));
282	printk("ABB_AFE_CON4 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON4));
283	printk("ABB_AFE_CON5 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON5));
284	printk("ABB_AFE_CON6 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON6));
285	printk("ABB_AFE_CON7 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON7));
286	printk("ABB_AFE_CON8 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON8));
287	printk("ABB_AFE_CON9 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON9));
288	printk("ABB_AFE_CON10 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON10));
289	printk("ABB_AFE_CON11 = 0x%x\n", Ana_Get_Reg(ABB_AFE_CON11));
290
291	printk("ABB_AFE_STA0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA0));
292	printk("ABB_AFE_STA1 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA1));
293	printk("ABB_AFE_STA2 = 0x%x\n", Ana_Get_Reg(ABB_AFE_STA2));
294
295	printk("ABB_AFE_UP8X_FIFO_CFG0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_UP8X_FIFO_CFG0));
296	printk("ABB_AFE_UP8X_FIFO_LOG_MON0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_UP8X_FIFO_LOG_MON0));
297	printk("ABB_AFE_UP8X_FIFO_LOG_MON1 = 0x%x\n", Ana_Get_Reg(ABB_AFE_UP8X_FIFO_LOG_MON1));
298	printk("ABB_AFE_PMIC_NEWIF_CFG0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG0));
299	printk("ABB_AFE_PMIC_NEWIF_CFG1 = 0x%x\n", Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG1));
300	printk("ABB_AFE_PMIC_NEWIF_CFG2 = 0x%x\n", Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG2));
301	printk("ABB_AFE_PMIC_NEWIF_CFG3 = 0x%x\n", Ana_Get_Reg(ABB_AFE_PMIC_NEWIF_CFG3));
302	printk("ABB_AFE_TOP_CON0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_TOP_CON0));
303	printk("ABB_AFE_MON_DEBUG0 = 0x%x\n", Ana_Get_Reg(ABB_AFE_MON_DEBUG0));
304
305
306	printk("SPK_CON0 = 0x%x\n", Ana_Get_Reg(SPK_CON0));
307	printk("SPK_CON1 = 0x%x\n", Ana_Get_Reg(SPK_CON1));
308	printk("SPK_CON2 = 0x%x\n", Ana_Get_Reg(SPK_CON2));
309	printk("SPK_CON6 = 0x%x\n", Ana_Get_Reg(SPK_CON6));
310	printk("SPK_CON7 = 0x%x\n", Ana_Get_Reg(SPK_CON7));
311	printk("SPK_CON8 = 0x%x\n", Ana_Get_Reg(SPK_CON8));
312	printk("SPK_CON9 = 0x%x\n", Ana_Get_Reg(SPK_CON9));
313	printk("SPK_CON10 = 0x%x\n", Ana_Get_Reg(SPK_CON10));
314	printk("SPK_CON11 = 0x%x\n", Ana_Get_Reg(SPK_CON11));
315	printk("SPK_CON12 = 0x%x\n", Ana_Get_Reg(SPK_CON12));
316
317	printk("CID = 0x%x\n", Ana_Get_Reg(CID));
318	printk("TOP_CKPDN0 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN0));
319	printk("TOP_CKPDN0_SET = 0x%x\n", Ana_Get_Reg(TOP_CKPDN0_SET));
320	printk("TOP_CKPDN0_CLR = 0x%x\n", Ana_Get_Reg(TOP_CKPDN0_CLR));
321	printk("TOP_CKPDN1 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN1));
322	printk("TOP_CKPDN1_SET = 0x%x\n", Ana_Get_Reg(TOP_CKPDN1_SET));
323	printk("TOP_CKPDN1_CLR = 0x%x\n", Ana_Get_Reg(TOP_CKPDN1_CLR));
324	printk("TOP_CKPDN2 = 0x%x\n", Ana_Get_Reg(TOP_CKPDN2));
325	printk("TOP_CKPDN2_SET = 0x%x\n", Ana_Get_Reg(TOP_CKPDN2_SET));
326	printk("TOP_CKPDN2_CLR = 0x%x\n", Ana_Get_Reg(TOP_CKPDN2_CLR));
327	printk("TOP_CKCON1 = 0x%x\n", Ana_Get_Reg(TOP_CKCON1));
328
329	printk("AUDTOP_CON0 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON0));
330	printk("AUDTOP_CON1 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON1));
331	printk("AUDTOP_CON2 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON2));
332	printk("AUDTOP_CON3 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON3));
333	printk("AUDTOP_CON4 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON4));
334	printk("AUDTOP_CON5 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON5));
335	printk("AUDTOP_CON6 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON6));
336	printk("AUDTOP_CON7 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON7));
337	printk("AUDTOP_CON8 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON8));
338	printk("AUDTOP_CON9 = 0x%x\n", Ana_Get_Reg(AUDTOP_CON9));
339	AudDrv_ANA_Clk_Off();
340	printk("-Ana_Log_Print \n");
341	}
342
343
344	// export symbols for other module using
345	EXPORT_SYMBOL(Ana_Log_Print);
346	EXPORT_SYMBOL(Ana_Set_Reg);
347	EXPORT_SYMBOL(Ana_Get_Reg);
348
349