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6fa3eb70 S |
1 | /* |
2 | * This confidential and proprietary software may be used only as | |
3 | * authorised by a licensing agreement from ARM Limited | |
02af6beb | 4 | * (C) COPYRIGHT 2009-2015 ARM Limited |
6fa3eb70 S |
5 | * ALL RIGHTS RESERVED |
6 | * The entire notice above must be reproduced on all authorised | |
7 | * copies and copies may only be made to the extent permitted | |
8 | * by a licensing agreement from ARM Limited. | |
9 | */ | |
10 | ||
11 | /** | |
12 | * @file mali_platform.h | |
13 | * Platform specific Mali driver functions | |
14 | */ | |
15 | ||
16 | #ifndef __MALI_PMU_H__ | |
17 | #define __MALI_PMU_H__ | |
18 | ||
19 | #include "mali_osk.h" | |
02af6beb S |
20 | #include "mali_kernel_common.h" |
21 | #include "mali_hw_core.h" | |
6fa3eb70 | 22 | |
02af6beb S |
23 | /** @brief MALI inbuilt PMU hardware info and PMU hardware has knowledge of cores power mask |
24 | */ | |
25 | struct mali_pmu_core { | |
26 | struct mali_hw_core hw_core; | |
27 | u32 registered_cores_mask; | |
28 | u32 switch_delay; | |
29 | }; | |
6fa3eb70 | 30 | |
02af6beb S |
31 | /** @brief Register layout for hardware PMU |
32 | */ | |
33 | typedef enum { | |
34 | PMU_REG_ADDR_MGMT_POWER_UP = 0x00, /*< Power up register */ | |
35 | PMU_REG_ADDR_MGMT_POWER_DOWN = 0x04, /*< Power down register */ | |
36 | PMU_REG_ADDR_MGMT_STATUS = 0x08, /*< Core sleep status register */ | |
37 | PMU_REG_ADDR_MGMT_INT_MASK = 0x0C, /*< Interrupt mask register */ | |
38 | PMU_REG_ADDR_MGMT_INT_RAWSTAT = 0x10, /*< Interrupt raw status register */ | |
39 | PMU_REG_ADDR_MGMT_INT_CLEAR = 0x18, /*< Interrupt clear register */ | |
40 | PMU_REG_ADDR_MGMT_SW_DELAY = 0x1C, /*< Switch delay register */ | |
41 | PMU_REGISTER_ADDRESS_SPACE_SIZE = 0x28, /*< Size of register space */ | |
42 | } pmu_reg_addr_mgmt_addr; | |
6fa3eb70 | 43 | |
02af6beb | 44 | #define PMU_REG_VAL_IRQ 1 |
6fa3eb70 | 45 | |
02af6beb | 46 | extern struct mali_pmu_core *mali_global_pmu_core; |
6fa3eb70 S |
47 | |
48 | /** @brief Initialisation of MALI PMU | |
49 | * | |
50 | * This is called from entry point of the driver in order to create and intialize the PMU resource | |
51 | * | |
52 | * @param resource it will be a pointer to a PMU resource | |
53 | * @param number_of_pp_cores Number of found PP resources in configuration | |
54 | * @param number_of_l2_caches Number of found L2 cache resources in configuration | |
55 | * @return The created PMU object, or NULL in case of failure. | |
56 | */ | |
57 | struct mali_pmu_core *mali_pmu_create(_mali_osk_resource_t *resource); | |
58 | ||
59 | /** @brief It deallocates the PMU resource | |
60 | * | |
61 | * This is called on the exit of the driver to terminate the PMU resource | |
62 | * | |
63 | * @param pmu Pointer to PMU core object to delete | |
64 | */ | |
65 | void mali_pmu_delete(struct mali_pmu_core *pmu); | |
66 | ||
02af6beb | 67 | /** @brief Set registered cores mask |
6fa3eb70 | 68 | * |
02af6beb S |
69 | * @param pmu Pointer to PMU core object |
70 | * @param mask All available/valid domain bits | |
6fa3eb70 | 71 | */ |
02af6beb | 72 | void mali_pmu_set_registered_cores_mask(struct mali_pmu_core *pmu, u32 mask); |
6fa3eb70 | 73 | |
02af6beb | 74 | /** @brief Retrieves the Mali PMU core object (if any) |
6fa3eb70 | 75 | * |
02af6beb | 76 | * @return The Mali PMU object, or NULL if no PMU exists. |
6fa3eb70 | 77 | */ |
02af6beb S |
78 | MALI_STATIC_INLINE struct mali_pmu_core *mali_pmu_get_global_pmu_core(void) |
79 | { | |
80 | return mali_global_pmu_core; | |
81 | } | |
6fa3eb70 | 82 | |
02af6beb | 83 | /** @brief Reset PMU core |
6fa3eb70 | 84 | * |
02af6beb S |
85 | * @param pmu Pointer to PMU core object to reset |
86 | */ | |
87 | void mali_pmu_reset(struct mali_pmu_core *pmu); | |
88 | ||
89 | void mali_pmu_power_up_all(struct mali_pmu_core *pmu); | |
90 | ||
91 | void mali_pmu_power_down_all(struct mali_pmu_core *pmu); | |
92 | ||
93 | /** @brief Returns a mask of the currently powered up domains | |
6fa3eb70 | 94 | * |
02af6beb | 95 | * @param pmu Pointer to PMU core object |
6fa3eb70 | 96 | */ |
02af6beb S |
97 | MALI_STATIC_INLINE u32 mali_pmu_get_mask(struct mali_pmu_core *pmu) |
98 | { | |
99 | u32 stat = mali_hw_core_register_read(&pmu->hw_core, PMU_REG_ADDR_MGMT_STATUS); | |
100 | return ((~stat) & pmu->registered_cores_mask); | |
101 | } | |
6fa3eb70 S |
102 | |
103 | /** @brief MALI GPU power down using MALI in-built PMU | |
104 | * | |
02af6beb | 105 | * Called to power down the specified cores. |
6fa3eb70 S |
106 | * |
107 | * @param pmu Pointer to PMU core object to power down | |
02af6beb | 108 | * @param mask Mask specifying which power domains to power down |
6fa3eb70 S |
109 | * @return _MALI_OSK_ERR_OK on success otherwise, a suitable _mali_osk_errcode_t error. |
110 | */ | |
02af6beb | 111 | _mali_osk_errcode_t mali_pmu_power_down(struct mali_pmu_core *pmu, u32 mask); |
6fa3eb70 S |
112 | |
113 | /** @brief MALI GPU power up using MALI in-built PMU | |
114 | * | |
02af6beb | 115 | * Called to power up the specified cores. |
6fa3eb70 S |
116 | * |
117 | * @param pmu Pointer to PMU core object to power up | |
02af6beb | 118 | * @param mask Mask specifying which power domains to power up |
6fa3eb70 S |
119 | * @return _MALI_OSK_ERR_OK on success otherwise, a suitable _mali_osk_errcode_t error. |
120 | */ | |
02af6beb | 121 | _mali_osk_errcode_t mali_pmu_power_up(struct mali_pmu_core *pmu, u32 mask); |
6fa3eb70 S |
122 | |
123 | #endif /* __MALI_PMU_H__ */ |