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import PULS_20180308
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / ext_disp / mt8127 / hdmitx.c
CommitLineData
6fa3eb70
S		 1/*****************************************************************************/
2/* Copyright (c) 2009 NXP Semiconductors BV */
3/* */
4/* This program is free software; you can redistribute it and/or modify */
5/* it under the terms of the GNU General Public License as published by */
6/* the Free Software Foundation, using version 2 of the License. */
7/* */
8/* This program is distributed in the hope that it will be useful, */
9/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
10/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
11/* GNU General Public License for more details. */
12/* */
13/* You should have received a copy of the GNU General Public License */
14/* along with this program; if not, write to the Free Software */
15/* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 */
16/* USA. */
17/* */
18/*****************************************************************************/
19#if defined(CONFIG_MTK_HDMI_SUPPORT)
20#define TMFL_TDA19989
21
22#define _tx_c_
23#include <generated/autoconf.h>
24#include <linux/mm.h>
25#include <linux/init.h>
26#include <linux/fb.h>
27#include <linux/delay.h>
28#include <linux/device.h>
29#include <linux/platform_device.h>
30#include <linux/dma-mapping.h>
31#include <linux/earlysuspend.h>
32#include <linux/kthread.h>
33#include <linux/rtpm_prio.h>
34#include <linux/vmalloc.h>
35#include <linux/disp_assert_layer.h>
36#include <linux/miscdevice.h>
37#include <linux/fs.h>
38#include <linux/file.h>
39#include <linux/cdev.h>
40#include <linux/slab.h>
41#include <linux/module.h>
42#include <linux/list.h>
43#include <linux/switch.h>
44#ifdef MTK_SMARTBOOK_SUPPORT
45#include <linux/sbsuspend.h>
46#endif
47#include <asm/uaccess.h>
48#include <asm/atomic.h>
49#include <asm/mach-types.h>
50#include <asm/cacheflush.h>
51#include <asm/io.h>
52#include <mach/dma.h>
53#include <mach/irqs.h>
54#include <asm/tlbflush.h>
55#include <asm/page.h>
56
57#include <mach/m4u.h>
58#include <mach/mt_typedefs.h>
59#include <mach/mt_reg_base.h>
60#include <mach/mt_clkmgr.h>
61#include <mach/mt_boot.h>
62#include <linux/earlysuspend.h>
63#include <linux/suspend.h>
64
65//#include "linux/hdmitx.h"
66#include "../video/mtkfb_info.h"
67
68#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
69#include "internal_hdmi_drv.h"
70#elif defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
71#include "inter_mhl_drv.h"
72#else
73#include "hdmi_drv.h"
74#endif
75#include "hdmi_utils.h"
76#include "hdmitx_drv.h"
77
78#include "dpi_reg.h"
79#include "mach/eint.h"
80#include "mach/irqs.h"
81
82#include "disp_drv_platform.h"
83#include "ddp_reg.h"
84#include "mtkfb.h"
85#include "dpi_drv.h"
86
87
88#include "dpi1_drv.h"
89#ifdef MTK_SMARTBOOK_SUPPORT
90#include "smartbook.h"
91#endif
92
93#ifdef I2C_DBG
94#include "tmbslHdmiTx_types.h"
95#include "tmbslTDA9989_local.h"
96#endif
97
98#if MTK_HDMI_MAIN_PATH
99#include "ddp_ovl.h"
100#include "ddp_rdma.h"
101#include "ddp_bls.h"
102#include "ddp_color.h"
103#endif
104
105#ifdef MTK_SEC_VIDEO_PATH_SUPPORT
106#include "tz_cross/trustzone.h"
107#include "tz_cross/ta_mem.h"
108#include <tz_cross/tz_ddp.h>
109#include "trustzone/kree/system.h"
110#include "trustzone/kree/mem.h"
111#endif
112
113#define MTK_HDMI_MULTI_DISPLAY_SUPPORT
114#define MTK_HDMI_FENCE_SUPPORT
115#ifndef MTK_OVERLAY_ENGINE_SUPPORT
116#define MTK_HDMI_ION_SUPPORT
117#endif
118
119#define HDMI_DEVNAME "hdmitx"
120
121#undef OUTREG32
122#define OUTREG32(x, y) {/*printk("[hdmi]write 0x%08x to 0x%08x\n", (y), (x)); */__OUTREG32((x),(y))}
123#define __OUTREG32(x,y) {*(unsigned int*)(x)=(y);}
124
125#define RETIF(cond, rslt) if ((cond)){HDMI_LOG("return in %d\n",__LINE__);return (rslt);}
126#define RET_VOID_IF(cond) if ((cond)){HDMI_LOG("return in %d\n",__LINE__);return;}
127#define RETIF_NOLOG(cond, rslt) if ((cond)){return (rslt);}
128#define RET_VOID_IF_NOLOG(cond) if ((cond)){return;}
129#define RETIFNOT(cond, rslt) if (!(cond)){HDMI_LOG("return in %d\n",__LINE__);return (rslt);}
130
131
132#define HDMI_DPI(suffix) DPI1 ## suffix
133#define HMID_DEST_DPI DISP_MODULE_DPI1
134
135#ifdef MTK_OVERLAY_ENGINE_SUPPORT
136static int hdmi_bpp = 3;
137#else
138static int hdmi_bpp = 4;
139#endif
140
141unsigned int addbuf = 0, delbuf = 0, rdmabuf = 0;
142
143#ifdef MTK_HDMI_FENCE_SUPPORT
144// Fence Sync Object
145#include "mtk_sync.h"
146spinlock_t hdmi_lock;
147DEFINE_SPINLOCK(hdmi_lock);
148#endif
149
150static bool factory_mode = false;
151
152#define ALIGN_TO(x, n) \
153 (((x) + ((n) - 1)) & ~((n) - 1))
154#define hdmi_abs(a) (((a) < 0) ? -(a) : (a))
155
156extern const HDMI_DRIVER *HDMI_GetDriver(void);
157extern void HDMI_DBG_Init(void);
158
159extern UINT32 DISP_GetScreenHeight(void);
160extern UINT32 DISP_GetScreenWidth(void);
161extern BOOL DISP_IsVideoMode(void);
162extern int disp_lock_mutex(void);
163extern int disp_unlock_mutex(int id);
164extern int disp_module_clock_on(DISP_MODULE_ENUM module, char *caller_name);
165extern int disp_module_clock_off(DISP_MODULE_ENUM module, char *caller_name);
166extern int m4u_do_mva_map_kernel(unsigned int mva, unsigned int size, int sec,
167 unsigned int* map_va, unsigned int* map_size);
168extern int m4u_do_mva_unmap_kernel(unsigned int mva, unsigned int size, unsigned int va);
169
170
171
172#ifdef MTK_SEC_VIDEO_PATH_SUPPORT
173extern void disp_register_intr(unsigned int irq, unsigned int secure);
174extern KREE_SESSION_HANDLE ddp_session_handle(void);
175unsigned int gRDMASecure = 0;
176unsigned int gRDMASecureSwitch = 0;
177#endif
178
179#ifdef CONFIG_PM
180extern int hdmi_drv_pm_restore_noirq(struct device *device);
181extern void hdmi_module_init(void);
182#endif
183
184extern BOOL is_early_suspended;
185
186static int hdmi_log_on = 1;
187static int hdmi_bufferdump_on = 1;
188static unsigned long hdmi_reschange = HDMI_VIDEO_RESOLUTION_NUM;
189
190#if defined (MTK_HDMI_ION_SUPPORT)
191#include <linux/ion_drv.h>
192
193static struct ion_client *ion_client;
194#endif
195
196static struct switch_dev hdmi_switch_data;
197static struct switch_dev hdmires_switch_data;
198#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
199static struct switch_dev hdmi_cec_switch_data;
200#endif
201
202HDMI_PARAMS _s_hdmi_params = {0};
203HDMI_PARAMS *hdmi_params = &_s_hdmi_params;
204static HDMI_DRIVER *hdmi_drv = NULL;
205
206#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
207 static size_t hdmi_colorspace = HDMI_RGB;
208 int flag_resolution_interlace(HDMI_VIDEO_RESOLUTION resolution)
209{
210 if((resolution==HDMI_VIDEO_1920x1080i_60Hz)||
211 (resolution==HDMI_VIDEO_1920x1080i_50Hz)||
212#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
213 (resolution==HDMI_VIDEO_1920x1080i3d_sbs_60Hz)||
214 (resolution==HDMI_VIDEO_1920x1080i3d_sbs_50Hz)||
215#endif
216 (resolution==HDMI_VIDEO_1920x1080i3d_60Hz)||
217 (resolution==HDMI_VIDEO_1920x1080i3d_60Hz))
218 return true;
219 else
220 return false;
221}
222 int flag_resolution_3d(HDMI_VIDEO_RESOLUTION resolution)
223{
224 if((resolution==HDMI_VIDEO_1280x720p3d_60Hz)||
225 (resolution==HDMI_VIDEO_1280x720p3d_50Hz)||
226 (resolution==HDMI_VIDEO_1920x1080i3d_60Hz)||
227 (resolution==HDMI_VIDEO_1920x1080i3d_60Hz)||
228 (resolution==HDMI_VIDEO_1920x1080p3d_24Hz)||
229 (resolution==HDMI_VIDEO_1920x1080p3d_23Hz))
230 return true;
231 else
232 return false;
233}
234#endif
235
236void hdmi_log_enable(int enable)
237{
238 printk("hdmi log %s\n", enable ? "enabled" : "disabled");
239 hdmi_log_on = enable;
240 hdmi_drv->log_enable(enable);
241}
242
243void hdmi_mmp_enable(int enable)
244{
245 printk("hdmi log %s\n", enable ? "enabled" : "disabled");
246 hdmi_bufferdump_on = enable;
247}
248
249static DEFINE_SEMAPHORE(hdmi_update_mutex);
250static DEFINE_SEMAPHORE(hdmi_ioctl_mutex);
251
252typedef struct
253{
254 bool is_reconfig_needed; // whether need to reset HDMI memory
255 bool is_enabled; // whether HDMI is enabled or disabled by user
256 bool is_force_disable; //used for camera scenario.
257 bool is_clock_on; // DPI is running or not
258 atomic_t state; // HDMI_POWER_STATE state
259 int lcm_width; // LCD write buffer width
260 int lcm_height; // LCD write buffer height
261 bool lcm_is_video_mode;
262 int hdmi_width; // DPI read buffer width
263 int hdmi_height; // DPI read buffer height
264 int bg_width; // DPI read buffer width
265 int bg_height; // DPI read buffer height
266 HDMI_VIDEO_RESOLUTION output_video_resolution;
267 HDMI_AUDIO_FORMAT output_audio_format;
268 int orientation; // MDP's orientation, 0 means 0 degree, 1 means 90 degree, 2 means 180 degree, 3 means 270 degree
269 HDMI_OUTPUT_MODE output_mode;
270 int scaling_factor;
271} _t_hdmi_context;
272
273typedef enum
274{
275 create_new,
276 insert_new,
277 reg_configed,
278 reg_updated,
279 buf_read_done,
280 buf_dropped
281} BUFFER_STATE;
282
283typedef struct _hdmi_buffer_list
284{
285 hdmi_video_buffer_info buffer_info;
286 BUFFER_STATE buf_state;
287
288 unsigned int idx; ///fence count
289 int fence; ///fence fd
290 struct ion_handle *hnd;
291 unsigned int mva;
292 unsigned int va;
293 struct list_head list;
294} hdmi_video_buffer_list;
295
296static struct list_head hdmi_video_mode_buffer_list;
297//static struct list_head *hdmi_video_buffer_list_head = &hdmi_video_mode_buffer_list;
298DEFINE_SEMAPHORE(hdmi_video_mode_mutex);
299//static atomic_t hdmi_video_mode_flag = ATOMIC_INIT(0);
300///static int hdmi_add_video_buffer(struct hdmi_video_buffer_info *buffer_info, struct file *file);
301///static struct hdmi_video_buffer_list *hdmi_search_video_buffer(struct hdmi_video_buffer_info *buffer_info, struct file *file);
302///static void hdmi_destory_video_buffer(void);
303#define IS_HDMI_IN_VIDEO_MODE() atomic_read(&hdmi_video_mode_flag)
304#define SET_HDMI_TO_VIDEO_MODE() atomic_set(&hdmi_video_mode_flag, 1)
305#define SET_HDMI_LEAVE_VIDEO_MODE() atomic_set(&hdmi_video_mode_flag, 0)
306static wait_queue_head_t hdmi_video_mode_wq;
307#define IS_HDMI_VIDEO_MODE_DPI_IN_CHANGING_ADDRESS() atomic_read(&hdmi_video_mode_dpi_change_address)
308#define SET_HDMI_VIDEO_MODE_DPI_CHANGE_ADDRESS() atomic_set(&hdmi_video_mode_dpi_change_address, 1)
309#define SET_HDMI_VIDEO_MODE_DPI_CHANGE_ADDRESS_DONE() atomic_set(&hdmi_video_mode_dpi_change_address, 0)
310
311
312static _t_hdmi_context hdmi_context;
313static _t_hdmi_context *p = &hdmi_context;
314static struct list_head HDMI_Buffer_List;
315
316#define IS_HDMI_ON() (HDMI_POWER_STATE_ON == atomic_read(&p->state))
317#define IS_HDMI_OFF() (HDMI_POWER_STATE_OFF == atomic_read(&p->state))
318#define IS_HDMI_STANDBY() (HDMI_POWER_STATE_STANDBY == atomic_read(&p->state))
319
320#define IS_HDMI_NOT_ON() (HDMI_POWER_STATE_ON != atomic_read(&p->state))
321#define IS_HDMI_NOT_OFF() (HDMI_POWER_STATE_OFF != atomic_read(&p->state))
322#define IS_HDMI_NOT_STANDBY() (HDMI_POWER_STATE_STANDBY != atomic_read(&p->state))
323
324#define SET_HDMI_ON() atomic_set(&p->state, HDMI_POWER_STATE_ON)
325#define SET_HDMI_OFF() atomic_set(&p->state, HDMI_POWER_STATE_OFF)
326#define SET_HDMI_STANDBY() atomic_set(&p->state, HDMI_POWER_STATE_STANDBY)
327
328int hdmi_allocate_hdmi_buffer(void);
329int hdmi_free_hdmi_buffer(void);
330int hdmi_rdma_address_config(bool enable, hdmi_video_buffer_info buffer_info);
331
332#ifdef MTK_HDMI_SCREEN_CAPTURE
333bool capture_screen = false;
334unsigned long capture_addr;
335#endif
336static int dp_mutex_dst = -1;
337static unsigned int temp_mva_w, temp_va, hdmi_va, hdmi_mva_r;
338
339
340static dev_t hdmi_devno;
341static struct cdev *hdmi_cdev;
342static struct class *hdmi_class = NULL;
343static unsigned int rdma1_addr_shadowed = NULL;
344static unsigned int rdma1_addr_using = NULL;
345
346#include <linux/mmprofile.h>
347struct HDMI_MMP_Events_t
348{
349 MMP_Event HDMI;
350 MMP_Event DDPKBitblt;
351 MMP_Event OverlayDone;
352 MMP_Event SwitchRDMABuffer;
353 MMP_Event SwitchOverlayBuffer;
354 MMP_Event StopOverlayBuffer;
355 MMP_Event RDMA1RegisterUpdated;
356 MMP_Event WDMA1RegisterUpdated;
357 MMP_Event WaitVSync;
358 MMP_Event BufferPost;
359 MMP_Event BufferInsert;
360 MMP_Event BufferAdd;
361 MMP_Event BufferUsed;
362 MMP_Event BufferRemove;
363 MMP_Event FenceCreate;
364 MMP_Event FenceSignal;
365 MMP_Event HDMIState;
366 MMP_Event GetDevInfo;
367 MMP_Event ErrorInfo;
368 MMP_Event MutexErr;
369 MMP_Event BufferCfg;
370 MMP_Event BufferUpdate;
371} HDMI_MMP_Events;
372
373typedef enum
374{
375 insert_Buffer_Err1 = 0xeff0,
376 insert_Buffer_Err2 ,
377 insert_Buffer_Err3 ,
378 insert_Buffer_Err4,
379 insert_Buffer_Err5,
380 Buffer_INFO_Err, ///5
381 Timeline_Err,
382 Buffer_Not_Enough, ///7
383 Buffer_Empt_Err,
384 Fence_Err, ///9
385 Mutex_Err1,
386 Mutex_Err2,
387 Mutex_Err3,
388 Buff_Dup_Err1, ///0xeffd
389 Buff_ION_Err1
390
391} HDMI_MMP_Err;
392
393typedef enum
394{
395 Plugout ,
396 Plugin ,
397 ResChange
398
399} HDMI_State;
400
401// ---------------------------------------------------------------------------
402// Information Dump Routines
403// ---------------------------------------------------------------------------
404
405void init_hdmi_mmp_events(void)
406{
407 HDMI_FUNC();
408 if (HDMI_MMP_Events.HDMI == 0)
409 {
410 HDMI_MMP_Events.HDMI = MMProfileRegisterEvent(MMP_RootEvent, "HDMI");
411 HDMI_MMP_Events.OverlayDone = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "OverlayDone");
412 HDMI_MMP_Events.DDPKBitblt = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "DDPKBitblt");
413 HDMI_MMP_Events.SwitchRDMABuffer = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "SwitchRDMABuffer");
414 HDMI_MMP_Events.SwitchOverlayBuffer = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "SwitchOverlayBuffer");
415 HDMI_MMP_Events.WDMA1RegisterUpdated = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "WDMA1RegisterUpdated");
416 HDMI_MMP_Events.WaitVSync = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "WaitVSync");
417 HDMI_MMP_Events.StopOverlayBuffer = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "StopOverlayBuffer");
418 HDMI_MMP_Events.RDMA1RegisterUpdated = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "RDMA1RegisterUpdated");
419
420 HDMI_MMP_Events.FenceCreate = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "FenceCreate");
421 HDMI_MMP_Events.BufferPost = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "BufferPost");
422 HDMI_MMP_Events.BufferInsert = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "BufferInsert");
423 HDMI_MMP_Events.BufferCfg = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "BufferCfg");
424 HDMI_MMP_Events.BufferUsed = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "BufferUsed");
425 HDMI_MMP_Events.BufferUpdate = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "BufferUpdate");
426 HDMI_MMP_Events.BufferRemove = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "BufferRemove");
427 HDMI_MMP_Events.FenceSignal = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "FenceSignal");
428 HDMI_MMP_Events.HDMIState = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "HDMIState");
429 HDMI_MMP_Events.GetDevInfo = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "GetDevInfo");
430 HDMI_MMP_Events.ErrorInfo = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "ErrorInfo");
431 HDMI_MMP_Events.MutexErr = MMProfileRegisterEvent(HDMI_MMP_Events.HDMI, "MutexErr");
432
433 MMProfileEnableEventRecursive(HDMI_MMP_Events.HDMI, 1);
434 }
435}
436
437#define ENABLE_HDMI_FPS_CONTROL_LOG 1
438#if ENABLE_HDMI_FPS_CONTROL_LOG
439//static unsigned int hdmi_fps_control_fps_wdma0 = 0;
440//static unsigned long hdmi_fps_control_time_base_wdma0 = 0;
441//static unsigned int hdmi_fps_control_fps_wdma1 = 0;
442//static unsigned long hdmi_fps_control_time_base_wdma1 = 0;
443//static unsigned int hdmi_fps_control_fps_rdma1 = 0;
444//static unsigned long hdmi_fps_control_time_base_rdma1 = 0;
445#endif
446
447typedef enum
448{
449 HDMI_OVERLAY_STATUS_STOPPED,
450 HDMI_OVERLAY_STATUS_STOPPING,
451 HDMI_OVERLAY_STATUS_STARTING,
452 HDMI_OVERLAY_STATUS_STARTED,
453} HDMI_OVERLAY_STATUS;
454
455static unsigned int hdmi_fps_control_dpi = 0;
456static unsigned int hdmi_fps_control_overlay = 0;
457//static HDMI_OVERLAY_STATUS hdmi_overlay_status = HDMI_OVERLAY_STATUS_STOPPED;
458//static unsigned int hdmi_rdma_switch_count = 0;
459
460static DPI_POLARITY clk_pol, de_pol, hsync_pol, vsync_pol;
461static unsigned int dpi_clk_div, dpi_clk_duty, hsync_pulse_width, hsync_back_porch, hsync_front_porch, vsync_pulse_width, vsync_back_porch, vsync_front_porch, intermediat_buffer_num;
462#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
463static BOOL fg3DFrame, fgInterlace;
464static unsigned int hdmi_res = HDMI_VIDEO_1280x720p_50Hz;
465#endif
466
467static HDMI_COLOR_ORDER rgb_order;
468
469//static struct task_struct *hdmi_update_task = NULL;
470//static wait_queue_head_t hdmi_update_wq;
471//static atomic_t hdmi_update_event = ATOMIC_INIT(0);
472
473//static struct task_struct *hdmi_overlay_config_task = NULL;
474//static wait_queue_head_t hdmi_overlay_config_wq;
475//static atomic_t hdmi_overlay_config_event = ATOMIC_INIT(0);
476
477static struct task_struct *hdmi_rdma_config_task = NULL;
478static struct task_struct *hdmi_rdma_update_task = NULL;
479
480#ifdef MTK_SMARTBOOK_SUPPORT
481static struct task_struct *hdmi_status_update_task = NULL;
482static wait_queue_head_t hdmi_status_update_wq;
483static atomic_t hdmi_status_update_event = ATOMIC_INIT(0);
484
485#endif
486
487static wait_queue_head_t hdmi_rdma_config_wq;
488static atomic_t hdmi_rdma_config_event = ATOMIC_INIT(0);
489
490static wait_queue_head_t hdmi_rdma_update_wq;
491static atomic_t hdmi_rdma_update_event = ATOMIC_INIT(0);
492
493static wait_queue_head_t reg_update_wq;
494//static atomic_t reg_update_event = ATOMIC_INIT(0);
495
496static wait_queue_head_t dst_reg_update_wq;
497//static atomic_t dst_reg_update_event = ATOMIC_INIT(0);
498
499static unsigned int hdmi_resolution_param_table[][3] =
500{
501 {720, 480, 60},
502 {1280, 720, 60},
503 {1920, 1080, 30},
504};
505
506#define ENABLE_HDMI_BUFFER_LOG 1
507#if ENABLE_HDMI_BUFFER_LOG
508bool enable_hdmi_buffer_log = 0;
509#define HDMI_BUFFER_LOG(fmt, arg...) \
510 do { \
511 if(enable_hdmi_buffer_log){printk("[hdmi_buffer] "); printk(fmt, ##arg);} \
512 }while (0)
513#else
514bool enable_hdmi_buffer_log = 0;
515#define HDMI_BUFFER_LOG(fmt, arg...)
516#endif
517
518int hdmi_rdma_buffer_switch_mode = 0; // 0: switch in rdma1 frame done interrupt, 1: switch after DDPK_Bitblt done
519static int hdmi_buffer_num = 0;
520static int *hdmi_buffer_available = 0;
521static int *hdmi_buffer_queue = 0;
522static int hdmi_buffer_end = 0;
523static int hdmi_buffer_start = 0;
524static int hdmi_buffer_fill_count = 0;
525static bool otg_enable_status = false;
526
527static DEFINE_SEMAPHORE(hdmi_buffer_mutex);
528
529static int fill_buffer_rgb(void *addr, unsigned int size)
530{
531 int i;
532 char *buf_addr;
533
534 buf_addr = (char *)addr;
535 for (i=0; i<size/3; i+=3)
536 {
537 buf_addr[i] = 0xff;
538 buf_addr[i+1] = 0x0;
539 buf_addr[i+2] = 0x0;
540 }
541 for (; i<size*2/3; i+=3)
542 {
543 buf_addr[i] = 0x0;
544 buf_addr[i+1] = 0xff;
545 buf_addr[i+2] = 0x0;
546 }
547 for (; i<size; i+=3)
548 {
549 buf_addr[i] = 0x0;
550 buf_addr[i+1] = 0x0;
551 buf_addr[i+2] = 0xff;
552 }
553
554 return 0;
555}
556
557static int hdmi_alloc_buffer(M4U_PORT_ID_ENUM port, unsigned int size, unsigned int *pVa, unsigned int *pMva)
558{
559 M4U_PORT_STRUCT m4uport;
560 unsigned int mva, va;
561
562 if (size == 0)
563 return -1;
564
565 va = (unsigned int) vmalloc(size);
566 if (((void *)va) == NULL)
567 {
568 printk("vmalloc %d bytes fail!!!\n", size);
569 return -1;
570 }
571
572 memset((void *) va, 0, size);
573
574 fill_buffer_rgb(va, size);
575
576 if (m4u_alloc_mva(port, va, size, 0, 0, &mva))
577 {
578 printk("m4u_alloc_mva for hdmi_mva_r fail\n");
579 vfree((void *) va);
580 return -1;
581 }
582
583 memset((void *) &m4uport, 0, sizeof(M4U_PORT_STRUCT));
584 m4uport.ePortID = port;
585 m4uport.Virtuality = 1;
586 m4uport.domain = 3;
587 m4uport.Security = 0;
588 m4uport.Distance = 1;
589 m4uport.Direction = 0;
590 m4u_config_port(&m4uport);
591
592 *pMva = mva;
593 *pVa = va;
594
595 printk("[Pattern] alloc_buffer va=0x%08x, mva=0x%08x\n", va, mva);
596
597 return 0;
598}
599
600
601#ifdef MTK_SEC_VIDEO_PATH_SUPPORT
602KREE_SESSION_HANDLE hdmi_pattern_secure_memory_session_handle(void)
603{
604 static KREE_SESSION_HANDLE hdmi_pattern_secure_memory_session = NULL;
605
606 printk("hdmi_pattern_secure_memory_session_handle() acquire TEE session\n");
607 if (NULL == hdmi_pattern_secure_memory_session)
608 {
609 TZ_RESULT ret;
610 printk("hdmi_pattern_secure_memory_session_handle() create session\n");
611 ret = KREE_CreateSession(TZ_TA_MEM_UUID, &hdmi_pattern_secure_memory_session);
612 if (ret != TZ_RESULT_SUCCESS)
613 {
614 printk("KREE_CreateSession fail, ret=%d\n", ret);
615 return NULL;
616 }
617 }
618
619 printk("hdmi_pattern_secure_memory_session_handle() session=%x\n",
620 (unsigned int)hdmi_pattern_secure_memory_session);
621 return hdmi_pattern_secure_memory_session;
622}
623
624void *hdmi_pattern_allocate_secure_memory(int size)
625{
626 KREE_SECUREMEM_HANDLE mem_handle;
627 TZ_RESULT ret;
628 struct disp_mva_map mva_map_struct;
629 MTEEC_PARAM param[4];
630 unsigned int paramTypes;
631
632 // Allocate
633 ret = KREE_AllocSecurechunkmem (hdmi_pattern_secure_memory_session_handle(), &mem_handle, 4096, size);
634 if (ret != TZ_RESULT_SUCCESS)
635 {
636 printk("KREE_AllocSecurechunkmem fail, ret=%d \n", ret);
637 return NULL;
638 }
639
640 printk("KREE_AllocSecurchunkemem handle=0x%x \n", mem_handle);
641
642 param[0].value.a = DISP_RDMA1;
643 param[1].value.a = 0;
644 param[2].value.a = (unsigned int)mem_handle;
645 param[3].value.a = size;
646 paramTypes = TZ_ParamTypes4(TZPT_VALUE_INPUT,TZPT_VALUE_INPUT,TZPT_VALUE_INPUT,TZPT_VALUE_INPUT);
647 ret = KREE_TeeServiceCall(ddp_session_handle(), TZCMD_DDP_SECURE_MVA_MAP, paramTypes, param);
648 if(ret!= TZ_RESULT_SUCCESS)
649 {
650 printk("KREE_TeeServiceCall(TZCMD_DDP_SECURE_MVA_MAP) fail, ret=%d \n", ret);
651
652 return -1;
653 }
654
655 return (void *)mem_handle;
656}
657#endif
658
659static unsigned int hdmi_pattern_va = 0;
660static unsigned int hdmi_pattern_mva = 0;
661static unsigned int hdmi_pattern_mva_sec = 0;
662static unsigned int g_hdmi_pattern = 0;
663
664void hdmi_pattern(int enable)
665{
666 int ret;
667 static unsigned int hdmi_pattern_buffer_init = 0;
668 unsigned int pattern_size = p->hdmi_width * p->hdmi_height*hdmi_bpp;
669
670 if (hdmi_pattern_buffer_init == 0)
671 {
672 if (hdmi_pattern_mva == 0) // normal mva
673 {
674 ret = hdmi_alloc_buffer(DISP_RDMA1, pattern_size, &hdmi_pattern_va, &hdmi_pattern_mva);
675 if (ret == -1)
676 return -1;
677 }
678 #ifdef MTK_SEC_VIDEO_PATH_SUPPORT
679 if (hdmi_pattern_mva_sec == 0) // handle
680 {
681 hdmi_pattern_mva_sec = (unsigned int)hdmi_pattern_allocate_secure_memory(pattern_size);
682 }
683 #endif
684
685 hdmi_pattern_buffer_init = 1;
686 }
687
688 g_hdmi_pattern = enable;
689
690 HDMI_LOG("hdmi_pattern %d\n", enable);
691
692}
693
694static hdmi_video_buffer_list *hdmi_query_buf_mva(unsigned int idx)
695{
696 hdmi_video_buffer_list *buf = 0;
697 ///spin_lock_bh(&hdmi_lock);
698 list_for_each_entry(buf, &HDMI_Buffer_List, list)
699 {
700 if (buf->idx == idx)
701 {
702 HDMI_LOG("query buf list=%x, idx=%d, mva=0x%08x\n", (unsigned int)buf, idx, buf->mva);
703 return buf;
704 }
705 }
706 ///spin_unlock_bh(&hdmi_lock);
707 return NULL;
708}
709
710
711#ifdef MTK_HDMI_ION_SUPPORT
712static void hdmi_ion_init(void)
713{
714 //struct ion_mm_data mm_data;
715
716 if (!ion_client && g_ion_device)
717 {
718 ion_client = ion_client_create(g_ion_device, "hdmi");
719
720 if (!ion_client)
721 {
722 HDMI_LOG("create ion client failed!\n");
723 return;
724 }
725
726 HDMI_LOG("create ion client 0x%p\n", ion_client);
727 }
728}
729/*
730static void hdmi_ion_deinit()
731{
732 if (ion_client)
733 {
734 ion_client_destroy(ion_client);
735 ion_client = NULL;
736 HDMI_LOG("destroy ion client 0x%p\n", ion_client);
737 }
738}*/
739
740static struct ion_handle *hdmi_ion_import_handle(struct ion_client *client, int fd)
741{
742 struct ion_handle *handle = NULL;
743 struct ion_mm_data mm_data;
744
745 // If no need Ion support, do nothing!
746 if (fd == MTK_HDMI_NO_ION_FD)
747 {
748 HDMI_LOG("NO NEED ion support");
749 return handle;
750 }
751
752 if (!ion_client)
753 {
754 HDMI_LOG("invalid ion client!\n");
755 return handle;
756 }
757
758 if (fd == MTK_HDMI_NO_FENCE_FD)
759 {
760 HDMI_LOG("invalid ion fd!\n");
761 return handle;
762 }
763
764 handle = ion_import_dma_buf(client, fd);
765
766 if (IS_ERR_OR_NULL(handle))
767 {
768 HDMI_LOG("import ion handle failed!\n");
769 handle = 0;
770 return handle;
771 }
772
773 mm_data.mm_cmd = ION_MM_CONFIG_BUFFER;
774 mm_data.config_buffer_param.handle = handle;
775 mm_data.config_buffer_param.eModuleID = 0;
776 mm_data.config_buffer_param.security = 0;
777 mm_data.config_buffer_param.coherent = 0;
778
779 if (ion_kernel_ioctl(ion_client, ION_CMD_MULTIMEDIA, (unsigned int)&mm_data))
780 {
781 HDMI_LOG("configure ion buffer failed!\n");
782 }
783
784 return handle;
785}
786
787static void hdmi_ion_free_handle(struct ion_client *client, struct ion_handle *handle)
788{
789 if (!ion_client)
790 {
791 HDMI_LOG("invalid ion client!\n");
792 return ;
793 }
794
795 if (!handle)
796 {
797 return ;
798 }
799
800 ion_free(client, handle);
801 HDMI_LOG("free ion handle 0x%p\n", handle);
802}
803
804static size_t hdmi_ion_phys_mmu_addr(struct ion_client *client, struct ion_handle *handle, unsigned int *mva)
805{
806 size_t size;
807
808 if (!ion_client)
809 {
810 HDMI_LOG("invalid ion client!\n");
811 return 0;
812 }
813
814 if (!handle)
815 {
816 return 0;
817 }
818
819 ion_phys(client, handle, (ion_phys_addr_t *)mva, &size);
820 HDMI_LOG("alloc mmu addr hnd=0x%p,mva=0x%08x\n", handle, (unsigned int)*mva);
821 return size;
822}
823#endif
824
825
826#ifdef MTK_HDMI_FENCE_SUPPORT
827#define FENCE_STEP_COUNTER 1
828DEFINE_MUTEX(FenceMutex);
829static atomic_t timeline_counter = ATOMIC_INIT(0);
830static atomic_t fence_counter = ATOMIC_INIT(0);
831static struct sw_sync_timeline *hdmi_timeline ;
832static unsigned int hdmi_get_fence_counter(void)
833{
834 return atomic_add_return(FENCE_STEP_COUNTER, &fence_counter);
835}
836
837//static unsigned int hdmi_get_timeline_counter_inc()
838//{
839// return atomic_read(&timeline_counter);
840//}
841
842static struct sw_sync_timeline *hdmi_create_timeline(void)
843{
844 char name[32];
845 const char *prefix = "hdmi_timeline";
846 sprintf(name, "%s", prefix);
847
848 hdmi_timeline = timeline_create(name);
849
850 if (hdmi_timeline == NULL)
851 {
852 printk(" error: cannot create timeline! \n");
853 }
854 else
855 {
856 HDMI_LOG(" hdmi_create_timeline() %s\n", name);
857 }
858
859 return hdmi_timeline;
860}
861
862static struct fence_data hdmi_create_fence(void)
863{
864 int fenceFd = MTK_HDMI_NO_FENCE_FD;
865 struct fence_data data;
866 const char *prefix = "hdmi_fence";
867
868 spin_lock_bh(&hdmi_lock);
869 data.value = hdmi_get_fence_counter();
870 spin_unlock_bh(&hdmi_lock);
871 sprintf(data.name, "%s-%d", prefix, data.value);
872
873 if (hdmi_timeline != NULL)
874 {
875 if (fence_create(hdmi_timeline, &data))
876 {
877 printk(" error: cannot create Fence Object! \n");
878 }
879 else
880 {
881 fenceFd = data.fence;
882 }
883
884 ///HDMI_LOG(" name %s, fenceFd=%d\n", data.name, fenceFd);
885 }
886 else
887 {
888 printk(" error: there is no Timeline to create Fence! \n");
889 }
890
891 MMProfileLogEx(HDMI_MMP_Events.FenceCreate, MMProfileFlagPulse, fenceFd, data.value);
892 return data;
893}
894
895
896static void hdmi_release_fence(void)
897{
898 unsigned int fence_cnt, timeline_cnt, inc;
899
900 spin_lock_bh(&hdmi_lock);
901 fence_cnt = atomic_read(&fence_counter);
902 timeline_cnt = atomic_read(&timeline_counter);
903 inc = fence_cnt - timeline_cnt;
904 spin_unlock_bh(&hdmi_lock);
905
906 if (inc <= 0)
907 {
908 return ;
909 }
910
911 if (hdmi_timeline != NULL)
912 {
913 timeline_inc(hdmi_timeline, inc);
914 }
915
916 spin_lock_bh(&hdmi_lock);
917 atomic_add(inc, &timeline_counter);
918 spin_unlock_bh(&hdmi_lock);
919
920 MMProfileLogEx(HDMI_MMP_Events.FenceSignal, MMProfileFlagPulse, atomic_read(&fence_counter), inc);
921
922}
923
924unsigned int hdmi_timeline_inc(void)
925{
926 unsigned int fence_cnt, timeline_cnt, inc;
927
928 spin_lock_bh(&hdmi_lock);
929 fence_cnt = atomic_read(&fence_counter);
930 timeline_cnt = atomic_read(&timeline_counter);
931 inc = fence_cnt - timeline_cnt;
932 spin_unlock_bh(&hdmi_lock);
933
934 if (inc < 0 || inc > 5)
935 {
936 if (hdmi_bufferdump_on > 0)
937 {
938 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, Timeline_Err, inc);
939 }
940
941 HDMI_LOG("fence error: inc=%d, fence_cnt=%d, timeline_cnt=%d! \n", inc, fence_cnt, timeline_cnt);
942 inc = 0;
943 }
944
945 spin_lock_bh(&hdmi_lock);
946 atomic_add(1, &timeline_counter);
947 spin_unlock_bh(&hdmi_lock);
948 return atomic_read(&timeline_counter);
949}
950
951/**
952 * step forward timeline
953 * all fence(sync_point) will be signaled prior to it's counter
954 * refer to {@link sw_sync_timeline_inc}
955 */
956static void hdmi_signal_fence(void)
957{
958 unsigned inc = 0;
959
960 if (hdmi_timeline != NULL)
961 {
962 inc = 1; ///hdmi_get_timeline_counter_inc();
963 timeline_inc(hdmi_timeline, inc);
964
965 if (hdmi_bufferdump_on > 0)
966 {
967 MMProfileLogEx(HDMI_MMP_Events.FenceSignal, MMProfileFlagPulse, atomic_read(&timeline_counter), atomic_read(&fence_counter));
968 }
969
970 ///HDMI_LOG(" %s:%d, tl %d, fd %d\n", hdmi_timeline->obj.name, hdmi_timeline->value, hdmi_timeline, fence_counter);
971 }
972 else
973 {
974 HDMI_LOG(" no Timeline to inc tl %d, fd %d\n", atomic_read(&timeline_counter), atomic_read(&fence_counter));
975 }
976
977
978}
979
980static void hdmi_sync_init(void)
981{
982
983 ///spin_lock_init(&hdmi_lock);
984 hdmi_create_timeline();
985 // Reset all counter to 0
986 atomic_set(&timeline_counter, 0);
987 atomic_set(&fence_counter, 0);
988}
989
990static void hdmi_sync_destroy(void)
991{
992
993 if (hdmi_timeline != NULL)
994 {
995 HDMI_LOG(" destroy timeline %s:%d\n", hdmi_timeline->obj.name, hdmi_timeline->value);
996 timeline_destroy(hdmi_timeline);
997 hdmi_timeline = NULL;
998 }
999
1000 // Reset all counter to 0
1001 atomic_set(&timeline_counter, 0);
1002 atomic_set(&fence_counter, 0);
1003}
1004
1005
1006#endif
1007
1008static void hdmi_buffer_init(int num)
1009{
1010 int i;
1011 return;
1012
1013 if (down_interruptible(&hdmi_buffer_mutex))
1014 {
1015 HDMI_LOG("Can't get semaphore in %s()\n", __func__);
1016 return;
1017 }
1018
1019 HDMI_FUNC();
1020
1021 hdmi_buffer_num = num;
1022 hdmi_buffer_start = 0;
1023 hdmi_buffer_end = 0;
1024 hdmi_buffer_fill_count = 0;
1025
1026 hdmi_buffer_available = (int *)vmalloc(hdmi_buffer_num * sizeof(int));
1027 hdmi_buffer_queue = (int *)vmalloc(hdmi_buffer_num * sizeof(int));
1028
1029 for (i = 0; i < hdmi_buffer_num; i++)
1030 {
1031 hdmi_buffer_available[i] = 1;
1032 hdmi_buffer_queue[i] = -1;
1033 }
1034
1035 up(&hdmi_buffer_mutex);
1036}
1037
1038static void hdmi_buffer_deinit(void)
1039{
1040 return;
1041
1042 if (down_interruptible(&hdmi_buffer_mutex))
1043 {
1044 HDMI_LOG("Can't get semaphore in %s()\n", __func__);
1045 return;
1046 }
1047
1048 HDMI_FUNC();
1049
1050 hdmi_buffer_start = 0;
1051 hdmi_buffer_end = 0;
1052 hdmi_buffer_fill_count = 0;
1053
1054 if (hdmi_buffer_available)
1055 {
1056 vfree((const void *)hdmi_buffer_available);
1057 hdmi_buffer_available = 0;
1058 }
1059
1060 if (hdmi_buffer_queue)
1061 {
1062 vfree((const void *)hdmi_buffer_queue);
1063 hdmi_buffer_queue = 0;
1064 }
1065
1066 up(&hdmi_buffer_mutex);
1067}
1068
1069/*
1070static void hdmi_dump_buffer_queue(void)
1071{
1072 HDMI_BUFFER_LOG("[hdmi] available={%d,%d,%d,%d} queue={%d,%d,%d,%d}, {start,end}={%d,%d} count=%d\n",
1073 hdmi_buffer_available[0], hdmi_buffer_available[1], hdmi_buffer_available[2], hdmi_buffer_available[3],
1074 hdmi_buffer_queue[hdmi_buffer_start],
1075 hdmi_buffer_queue[(hdmi_buffer_start + 1) % hdmi_buffer_num],
1076 hdmi_buffer_queue[(hdmi_buffer_start + 2) % hdmi_buffer_num],
1077 hdmi_buffer_queue[(hdmi_buffer_start + 3) % hdmi_buffer_num],
1078 hdmi_buffer_start, hdmi_buffer_end, hdmi_buffer_fill_count);
1079}
1080
1081static int hdmi_is_buffer_empty(void)
1082{
1083 return hdmi_buffer_fill_count == 0;
1084}
1085
1086static void hdmi_release_buffer(int index)
1087{
1088 //down_interruptible(&hdmi_buffer_mutex);
1089
1090 HDMI_BUFFER_LOG("[hdmi] hdmi_release_buffer: %d\n", index);
1091 hdmi_buffer_available[index] = 1;
1092 hdmi_dump_buffer_queue();
1093
1094 //up(&hdmi_buffer_mutex);
1095}*/
1096
1097static void hdmi_udelay(unsigned int us)
1098{
1099 udelay(us);
1100}
1101
1102static void hdmi_mdelay(unsigned int ms)
1103{
1104 msleep(ms);
1105}
1106
1107static unsigned int hdmi_get_width(HDMI_VIDEO_RESOLUTION r)
1108{
1109 ASSERT(r < HDMI_VIDEO_RESOLUTION_NUM);
1110 return hdmi_resolution_param_table[r][0];
1111}
1112
1113static unsigned int hdmi_get_height(HDMI_VIDEO_RESOLUTION r)
1114{
1115 ASSERT(r < HDMI_VIDEO_RESOLUTION_NUM);
1116 return hdmi_resolution_param_table[r][1];
1117}
1118
1119HDMI_VIDEO_RESOLUTION hdmi_get_resolution(void)
1120{
1121 return p->output_video_resolution;
1122}
1123
1124
1125static atomic_t hdmi_fake_in = ATOMIC_INIT(false);
1126#define IS_HDMI_FAKE_PLUG_IN() (true == atomic_read(&hdmi_fake_in))
1127#define SET_HDMI_FAKE_PLUG_IN() (atomic_set(&hdmi_fake_in, true))
1128#define SET_HDMI_NOT_FAKE() (atomic_set(&hdmi_fake_in, false))
1129
1130// For Debugfs
1131void hdmi_cable_fake_plug_in(void)
1132{
1133 SET_HDMI_FAKE_PLUG_IN();
1134 HDMI_LOG("[HDMIFake]Cable Plug In\n");
1135
1136 if (p->is_force_disable == false)
1137 {
1138 if (IS_HDMI_STANDBY())
1139 {
1140 hdmi_resume();
1141 ///msleep(1000);
1142 switch_set_state(&hdmi_switch_data, HDMI_STATE_ACTIVE);
1143 hdmi_reschange = HDMI_VIDEO_RESOLUTION_NUM;
1144 }
1145 }
1146}
1147
1148// For Debugfs
1149void hdmi_cable_fake_plug_out(void)
1150{
1151 SET_HDMI_NOT_FAKE();
1152 HDMI_LOG("[HDMIFake]Disable\n");
1153
1154 if (p->is_force_disable == false)
1155 {
1156 if (IS_HDMI_ON())
1157 {
1158 if (hdmi_drv->get_state() != HDMI_STATE_ACTIVE)
1159 {
1160 hdmi_suspend();
1161 switch_set_state(&hdmi_switch_data, HDMI_STATE_NO_DEVICE);
1162 }
1163 }
1164 }
1165}
1166
1167void hdmi_set_mode(unsigned char ucMode)
1168{
1169 HDMI_FUNC();
1170
1171 hdmi_drv->set_mode(ucMode);
1172
1173 return;
1174}
1175
1176void hdmi_reg_dump(void)
1177{
1178 hdmi_drv->dump();
1179}
1180
1181void hdmi_read_reg(unsigned char u8Reg)
1182{
1183}
1184
1185void hdmi_write_reg(unsigned char u8Reg, unsigned char u8Data)
1186{
1187}
1188
1189/* Will be called in LCD Interrupt handler to check whether HDMI is actived */
1190bool is_hdmi_active(void)
1191{
1192 return IS_HDMI_ON();
1193}
1194
1195int get_hdmi_dev_info(HDMI_QUERY_TYPE type)
1196{
1197 switch (type)
1198 {
1199 case HDMI_CHARGE_CURRENT:
1200 {
1201 if ((p->is_enabled == false)
1202 || hdmi_params->cabletype == HDMI_CABLE)
1203 {
1204 return 0;
1205 }
1206 else if (hdmi_params->cabletype == MHL_CABLE)
1207 {
1208 return 500;
1209 }
1210 else if (hdmi_params->cabletype == MHL_2_CABLE)
1211 {
1212 return 900;
1213 }
1214
1215 }
1216
1217 default:
1218 return 0;
1219 }
1220
1221}
1222
1223#ifdef MTK_SEC_VIDEO_PATH_SUPPORT
1224void hdmi_config_m4u(unsigned int bSecure)
1225{
1226 MTEEC_PARAM param[4];
1227 unsigned int paramTypes;
1228 TZ_RESULT ret;
1229 param[0].value.a = DISP_RDMA1;
1230 param[1].value.a = bSecure;
1231 paramTypes = TZ_ParamTypes2(TZPT_VALUE_INPUT,TZPT_VALUE_INPUT);
1232 ret = KREE_TeeServiceCall(ddp_session_handle(), TZCMD_DDP_SET_SECURE_MODE, paramTypes, param);
1233 if(ret!= TZ_RESULT_SUCCESS)
1234 {
1235 HDMI_LOG("KREE_TeeServiceCall(TZCMD_DDP_SET_SECURE_MODE) fail, ret=%d \n", ret);
1236 }
1237}
1238
1239void hdmi_set_rdma_addr(unsigned int hdmiSourceAddr, unsigned int size, unsigned int bSecure)
1240{
1241 MTEEC_PARAM param[4];
1242 unsigned int paramTypes;
1243 TZ_RESULT ret;
1244
1245 param[0].value.a = (uint32_t) hdmiSourceAddr;
1246 param[1].value.a = (uint32_t) bSecure;
1247 param[2].value.a = (uint32_t) size;
1248 paramTypes = TZ_ParamTypes3(TZPT_VALUE_INPUT, TZPT_VALUE_INPUT, TZPT_VALUE_INPUT);
1249 ret = KREE_TeeServiceCall(ddp_session_handle(), TZCMD_DDP_RDMA1_ADDR_CONFIG, paramTypes, param);
1250 if(ret!= TZ_RESULT_SUCCESS)
1251 {
1252 HDMI_LOG("TZCMD_DDP_RDMA_ADDR_CONFIG fail, ret=%d \n", ret);
1253 }
1254}
1255#endif
1256
1257
1258static int hdmi_rdma_config_kthread(void *data)
1259{
1260 struct sched_param param = { .sched_priority = RTPM_PRIO_SCRN_UPDATE };
1261 int buf_configed = 0;
1262
1263 sched_setscheduler(current, SCHED_RR, &param);
1264
1265 for (;;)
1266 {
1267 buf_configed = 0;
1268 wait_event_interruptible(hdmi_rdma_config_wq, atomic_read(&hdmi_rdma_config_event));
1269 atomic_set(&hdmi_rdma_config_event, 0);
1270
1271#ifdef MTK_HDMI_FENCE_SUPPORT
1272 MMProfileLogEx(HDMI_MMP_Events.BufferCfg, MMProfileFlagStart, p->is_clock_on, 1);
1273
1274 if (down_interruptible(&hdmi_update_mutex))
1275 {
1276 MMProfileLogEx(HDMI_MMP_Events.MutexErr, MMProfileFlagPulse, Mutex_Err1, Mutex_Err1);
1277 MMProfileLogEx(HDMI_MMP_Events.BufferCfg, MMProfileFlagEnd, p->is_clock_on, 1);
1278 HDMI_LOG("[HDMI] can't get semaphore in\n");
1279 continue; /// continue return EAGAIN
1280 }
1281
1282
1283 if (p->is_clock_on == true) ///remove the first head here
1284 {
1285 if (!list_empty(&HDMI_Buffer_List))
1286 {
1287 hdmi_video_buffer_list *pBuffList = NULL;
1288
1289 spin_lock_bh(&hdmi_lock);
1290 pBuffList = list_first_entry(&HDMI_Buffer_List, hdmi_video_buffer_list, list);
1291
1292 while(pBuffList->buf_state != insert_new) {
1293 buf_configed++;
1294
1295 if (list_is_last(&pBuffList->list, &HDMI_Buffer_List)) {
1296 break;
1297 }
1298
1299 pBuffList = list_entry(pBuffList->list.next, hdmi_video_buffer_list, list);
1300 }
1301
1302 spin_unlock_bh(&hdmi_lock);
1303
1304 if ((pBuffList == NULL) || (pBuffList->buf_state != insert_new))
1305 {
1306 //HDMI_LOG("pBuffList == NULL and it's not insert new");
1307 if (pBuffList && (hdmi_bufferdump_on > 0))
1308 {
1309 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, Buffer_Not_Enough, (unsigned int)pBuffList);
1310 }
1311 else if (hdmi_bufferdump_on > 0)
1312 {
1313 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, Buffer_Not_Enough, buf_configed);
1314 }
1315
1316 /*if ((pBuffList != NULL) && (pBuffList->buf_state == insert_new))
1317 {
1318 //pBuffList->buf_state = buf_read_done;
1319 pBuffList->buf_state = buf_dropped;
1320 HDMI_LOG(" buffer config error to configed %x, state %d, idx %d\n", (unsigned int)pBuffList, pBuffList->buf_state, pBuffList->idx);
1321 }*/
1322 }
1323 else
1324 {
1325#ifdef MTK_OVERLAY_ENGINE_SUPPORT
1326 if(sync_fence_wait(pBuffList->fence, 1000) < 0){
1327 HDMI_LOG("[error] rdma1 acquire fence timeout phy=0x%08x\n", (unsigned int)pBuffList->buffer_info.src_phy_addr);
1328 pBuffList->buf_state = buf_dropped;
1329 }
1330 else
1331#endif
1332 {
1333 if(hdmi_rdma_address_config(true, pBuffList->buffer_info) < 0)
1334 {
1335 HDMI_LOG(" rdma config(pBuffList %p) error to exit\n", pBuffList);
1336 pBuffList->buf_state = buf_read_done;
1337 }
1338 else{
1339 spin_lock_bh(&hdmi_lock);
1340 pBuffList->buf_state = reg_configed;
1341 spin_unlock_bh(&hdmi_lock);
1342
1343 buf_configed = 1;
1344
1345 if (hdmi_bufferdump_on > 0)
1346 {
1347 MMProfileLogEx(HDMI_MMP_Events.BufferUsed, MMProfileFlagPulse, (unsigned int)pBuffList, buf_configed);
1348 }
1349 }//end else of config fail
1350 }// end else of fence timeout
1351 }
1352
1353 }
1354 else
1355 {
1356 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, Buffer_Empt_Err, Buffer_Empt_Err);
1357 HDMI_LOG(" rdma config buffer is NULL\n");
1358 }
1359 }
1360
1361 up(&hdmi_update_mutex);
1362 MMProfileLogEx(HDMI_MMP_Events.BufferCfg, MMProfileFlagEnd, p->is_clock_on, 1);
1363#else
1364
1365#endif
1366
1367 if (kthread_should_stop())
1368 {
1369 break;
1370 }
1371 }
1372
1373 return 0;
1374}
1375
1376#ifdef MTK_SMARTBOOK_SUPPORT
1377bool callback_plug = false;
1378static int hdmi_status_update_kthread(void *data)
1379{
1380 struct sched_param param = { .sched_priority = RTPM_PRIO_SCRN_UPDATE };
1381 sched_setscheduler(current, SCHED_RR, &param);
1382
1383 for (;;)
1384 {
1385 wait_event_interruptible(hdmi_status_update_wq, atomic_read(&hdmi_status_update_event));
1386 atomic_set(&hdmi_status_update_event, 0);
1387
1388 printk("[hdmi]%s, state = %d\n", __func__);
1389
1390 if (callback_plug == false)
1391 {
1392 continue;
1393 }
1394
1395 hdmi_resume();
1396
1397 hdmi_drv->get_params(hdmi_params);
1398 switch_set_state(&hdmi_switch_data, HDMI_STATE_ACTIVE);
1399
1400 if (hdmi_params->cabletype == MHL_SMB_CABLE)
1401 {
1402#ifdef CONFIG_HAS_SBSUSPEND
1403 sb_plug_in();
1404#endif
1405 }
1406
1407 printk("[hdmi]%s, out!\n", __func__);
1408
1409 if (kthread_should_stop())
1410 {
1411 break;
1412 }
1413 }
1414}
1415#endif
1416
1417#ifdef MTK_HDMI_FENCE_SUPPORT
1418static int hdmi_rdma_update_kthread(void *data)
1419{
1420 struct sched_param param = { .sched_priority = RTPM_PRIO_SCRN_UPDATE };
1421 int buf_sequence;
1422 hdmi_video_buffer_list *pUpdateList = NULL;
1423 hdmi_video_buffer_list *pBuffList = NULL;
1424 hdmi_video_buffer_list *pNextList = NULL;
1425
1426 int remove_buffer_cnt = 0;
1427 int using_buf_cnt = 0;
1428
1429 sched_setscheduler(current, SCHED_RR, &param);
1430
1431 for (;;)
1432 {
1433 remove_buffer_cnt = 0;
1434
1435 wait_event_interruptible(hdmi_rdma_update_wq, atomic_read(&hdmi_rdma_update_event));
1436 atomic_set(&hdmi_rdma_update_event, 0);
1437
1438 MMProfileLogEx(HDMI_MMP_Events.BufferUpdate, MMProfileFlagStart, p->is_clock_on, 1);
1439
1440
1441 if (down_interruptible(&hdmi_update_mutex))
1442 {
1443 MMProfileLogEx(HDMI_MMP_Events.MutexErr, MMProfileFlagPulse, Mutex_Err1, Mutex_Err1);
1444 MMProfileLogEx(HDMI_MMP_Events.BufferUpdate, MMProfileFlagEnd, p->is_clock_on, 1);
1445 HDMI_LOG("[HDMI] can't get semaphore in\n");
1446 continue;
1447 }
1448
1449 buf_sequence = 0;
1450 pUpdateList = NULL;
1451
1452 if (!is_early_suspended && p->is_clock_on == true) ///remove the first head here
1453 {
1454 if (!list_empty(&HDMI_Buffer_List))
1455 {
1456 pBuffList = NULL;
1457 pNextList = NULL;
1458
1459 spin_lock_bh(&hdmi_lock);
1460 pBuffList = list_first_entry(&HDMI_Buffer_List, hdmi_video_buffer_list, list);
1461
1462 while (pBuffList)
1463 {
1464 //pr_err("[1]buf_state=%d src_phy_addr=0x%08x buf_sequence=%d",pBuffList->buf_state,pBuffList->buffer_info.src_phy_addr, buf_sequence);
1465 if (pBuffList->buf_state == insert_new) {
1466 if (!list_is_last(&pBuffList->list, &HDMI_Buffer_List))
1467 pNextList = list_entry(pBuffList->list.next, hdmi_video_buffer_list, list);
1468 if (pNextList && pNextList->buf_state == insert_new) {
1469 pBuffList->buf_state = buf_dropped;
1470 pBuffList = pNextList;
1471 pNextList = NULL;
1472 } else
1473 break;
1474 }
1475 else if (pBuffList->buf_state == reg_configed)
1476 {
1477 buf_sequence++;
1478 pBuffList->buf_state = reg_updated;
1479 if (buf_sequence > 1){
1480 pUpdateList->buf_state = buf_read_done;
1481 //pr_err("[look back]src_phy_addr=0x%08x => buf_read_done",pUpdateList->buffer_info.src_phy_addr);
1482 }
1483 pUpdateList = pBuffList;
1484 }
1485 else if (pBuffList->buf_state == reg_updated)
1486 {
1487 pBuffList->buf_state = buf_read_done;
1488 }
1489 //pr_err("[2]buf_state=%d src_phy_addr=0x%08x buf_sequence=%d",pBuffList->buf_state,pBuffList->buffer_info.src_phy_addr, buf_sequence);
1490
1491 if (!list_is_last(&pBuffList->list, &HDMI_Buffer_List))
1492 {
1493 pBuffList = list_entry(pBuffList->list.next, hdmi_video_buffer_list, list);
1494 }
1495 else
1496 {
1497 pBuffList = NULL;
1498 }
1499
1500 }
1501
1502 pBuffList = NULL;
1503 pBuffList = list_first_entry(&HDMI_Buffer_List, hdmi_video_buffer_list, list);
1504 spin_unlock_bh(&hdmi_lock);
1505
1506 while (pBuffList && !list_is_last(&pBuffList->list, &HDMI_Buffer_List))
1507 {
1508 if (pBuffList && ((pBuffList->buf_state == buf_read_done) || (pBuffList->buf_state == buf_dropped)))
1509 {
1510 if (pBuffList->buffer_info.src_phy_addr != rdma1_addr_using)
1511 {
1512 //do {
1513 if (hdmi_bufferdump_on > 0)
1514 {
1515 MMProfileLogEx(HDMI_MMP_Events.BufferRemove, MMProfileFlagPulse, (unsigned int)pBuffList, (unsigned int)pBuffList->buffer_info.src_phy_addr);
1516 }
1517 else
1518 {
1519 HDMI_LOG("remove list %x-->buffer %x \n", (unsigned int)pBuffList, (unsigned int)pBuffList->buffer_info.src_phy_addr);
1520 }
1521 //pr_err("[deleting]src_phy_addr=0x%08x",pBuffList->buffer_info.src_phy_addr);
1522
1523#ifdef MTK_HDMI_ION_SUPPORT
1524
1525 if (pBuffList->va)
1526 {
1527 ion_unmap_kernel(ion_client, pBuffList->hnd);
1528 }
1529
1530 hdmi_ion_free_handle(ion_client, pBuffList->hnd);
1531#endif
1532 spin_lock_bh(&hdmi_lock);
1533#ifdef MTK_OVERLAY_ENGINE_SUPPORT
1534 sync_fence_put(pBuffList->fence);
1535#endif
1536 list_del(&pBuffList->list);
1537 kfree(pBuffList);
1538 pBuffList = NULL;
1539 spin_unlock_bh(&hdmi_lock);
1540
1541 hdmi_timeline_inc();
1542 hdmi_signal_fence();
1543
1544 remove_buffer_cnt++;
1545 HDMI_LOG("[HDMI] DEL BUF[%d]\n", delbuf++);
1546
1547 spin_lock_bh(&hdmi_lock);
1548 pBuffList = list_first_entry(&HDMI_Buffer_List, hdmi_video_buffer_list, list);
1549 spin_unlock_bh(&hdmi_lock);
1550 //}while(using_buf_cnt--);
1551
1552 //using_buf_cnt = 0;
1553 }
1554 else
1555 {
1556 //pr_err("src_phy_addr(0x%08x) != rdma1_addr_using(0x%08x) so doesn't signal fence",pBuffList->buffer_info.src_phy_addr,rdma1_addr_using);
1557 break;
1558 }
1559 }
1560 else if(pBuffList && (pBuffList->buf_state == create_new))
1561 {
1562 using_buf_cnt++;
1563 pBuffList = list_entry(pBuffList->list.next, hdmi_video_buffer_list, list);
1564 }
1565 else
1566 {
1567 break;
1568 }
1569
1570 }
1571
1572 if (remove_buffer_cnt > 1)
1573 {
1574 if (hdmi_bufferdump_on > 0)
1575 {
1576 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, Buff_Dup_Err1, remove_buffer_cnt);
1577 }
1578
1579 HDMI_LOG("[hdmi] %s, %d remove two buffer one time\n", __func__, __LINE__);
1580
1581 }
1582 }
1583
1584 }
1585 else
1586 {
1587 HDMI_LOG("fence stop rdma \n");
1588 pBuffList = NULL;
1589
1590 while (!list_empty(&HDMI_Buffer_List))
1591 {
1592 spin_lock_bh(&hdmi_lock);
1593 pBuffList = list_first_entry(&HDMI_Buffer_List, hdmi_video_buffer_list, list);
1594 spin_unlock_bh(&hdmi_lock);
1595
1596 if (hdmi_bufferdump_on > 0)
1597 {
1598 MMProfileLogEx(HDMI_MMP_Events.BufferRemove, MMProfileFlagPulse, (unsigned int)pBuffList, (unsigned int)pBuffList->buffer_info.src_phy_addr);
1599 }
1600 else
1601 {
1602 HDMI_LOG("delete list %x-->buffer %x \n", (unsigned int)pBuffList, (unsigned int)pBuffList->buffer_info.src_phy_addr);
1603 }
1604
1605#ifdef MTK_HDMI_ION_SUPPORT
1606
1607 if (pBuffList->va)
1608 {
1609 ion_unmap_kernel(ion_client, pBuffList->hnd);
1610 }
1611
1612 hdmi_ion_free_handle(ion_client, pBuffList->hnd);
1613#endif
1614
1615 spin_lock_bh(&hdmi_lock);
1616#ifdef MTK_OVERLAY_ENGINE_SUPPORT
1617 sync_fence_put(pBuffList->fence);
1618#endif
1619 list_del(&pBuffList->list);
1620 kfree(pBuffList);
1621 pBuffList = NULL;
1622 spin_unlock_bh(&hdmi_lock);
1623 HDMI_LOG("[HDMI] DEL BUF[%d]\n", delbuf++);
1624 }
1625
1626 hdmi_release_fence();
1627 HDMI_LOG("fence stop rdma done\n");
1628 }
1629
1630 up(&hdmi_update_mutex);
1631 MMProfileLogEx(HDMI_MMP_Events.BufferUpdate, MMProfileFlagEnd, p->is_clock_on, (unsigned int)pUpdateList);
1632
1633 if (kthread_should_stop())
1634 {
1635 break;
1636 }
1637
1638 }
1639
1640 return 0;
1641}
1642#endif
1643
1644extern void DBG_OnTriggerHDMI(void);
1645extern void DBG_OnHDMIDone(void);
1646
1647#undef HDMI_ANALOG_BASE
1648#undef MHL_TVDPLL_CON0
1649#undef RG_TVDPLL_EN
1650#undef RG_TVDPLL_POSDIV
1651#undef RG_TVDPLL_POSDIV_MASK
1652#undef MHL_TVDPLL_CON1
1653#undef RG_TVDPLL_SDM_PCW
1654#undef RG_TVDPLL_SDM_PCW_MASK
1655#undef TVDPLL_SDM_PCW_CHG
1656#undef TVDPLL_SDM_PCW_F
1657#undef MHL_TVDPLL_PWR
1658#undef RG_TVDPLL_PWR_ON
1659
1660#define HDMI_ANALOG_BASE (0xf0209000)
1661#define MHL_TVDPLL_CON0 0x260
1662#define RG_TVDPLL_EN (1)
1663#define RG_TVDPLL_POSDIV (4)
1664#define RG_TVDPLL_POSDIV_MASK (0x07 << 4)
1665#define MHL_TVDPLL_CON1 0x264
1666#define RG_TVDPLL_SDM_PCW (0)
1667#define RG_TVDPLL_SDM_PCW_MASK (0x1FFFFF)
1668#define TVDPLL_SDM_PCW_CHG (1 << 31)
1669#define TVDPLL_SDM_PCW_F (1<<23)
1670
1671#define MHL_TVDPLL_PWR 0x26C
1672#define RG_TVDPLL_PWR_ON (1)
1673
1674#define vWriteHdmiANA(dAddr, dVal) (*((volatile unsigned int *)(HDMI_ANALOG_BASE + dAddr)) = (dVal))
1675#define dReadHdmiANA(dAddr) (*((volatile unsigned int *)(HDMI_ANALOG_BASE + dAddr)))
1676#define vWriteHdmiANAMsk(dAddr, dVal, dMsk) (vWriteHdmiANA((dAddr), (dReadHdmiANA(dAddr) & (~(dMsk))) | ((dVal) & (dMsk))))
1677//--------------------------FIXME-------------------------------
1678void hdmi_config_pll(HDMI_VIDEO_RESOLUTION resolution)
1679{
1680
1681 vWriteHdmiANAMsk(0x0,0x1131,0x1131);
1682 vWriteHdmiANAMsk(MHL_TVDPLL_PWR,RG_TVDPLL_PWR_ON,RG_TVDPLL_PWR_ON);
1683 mdelay(1);
1684 vWriteHdmiANAMsk(0x0,0x1133,0x1133);
1685 mdelay(5);
1686 //vWriteHdmiANAMsk(MHL_TVDPLL_CON1,TVDPLL_SDM_PCW_CHG,TVDPLL_SDM_PCW_CHG);
1687 switch(resolution)
1688 {
1689 case HDMI_VIDEO_720x480p_60Hz:
1690 case HDMI_VIDEO_720x576p_50Hz:
1691 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,0,RG_TVDPLL_EN);
1692 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,(0x04 << RG_TVDPLL_POSDIV),RG_TVDPLL_POSDIV_MASK);
1693 vWriteHdmiANAMsk(MHL_TVDPLL_CON1,(0x0109d8a << RG_TVDPLL_SDM_PCW),RG_TVDPLL_SDM_PCW_MASK);
1694 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,RG_TVDPLL_EN,RG_TVDPLL_EN);
1695
1696 break;
1697
1698 case HDMI_VIDEO_1920x1080p_30Hz:
1699 case HDMI_VIDEO_1280x720p_50Hz:
1700 case HDMI_VIDEO_1920x1080i_50Hz:
1701#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
1702 case HDMI_VIDEO_1920x1080i3d_sbs_50Hz:
1703#endif
1704 case HDMI_VIDEO_1920x1080p_25Hz:
1705 case HDMI_VIDEO_1920x1080p_24Hz:
1706 case HDMI_VIDEO_1920x1080p_50Hz:
1707 case HDMI_VIDEO_1280x720p3d_50Hz:
1708 case HDMI_VIDEO_1920x1080i3d_50Hz:
1709 case HDMI_VIDEO_1920x1080p3d_24Hz:
1710 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,0,RG_TVDPLL_EN);
1711 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,(0x04 << RG_TVDPLL_POSDIV),RG_TVDPLL_POSDIV_MASK);
1712 vWriteHdmiANAMsk(MHL_TVDPLL_CON1,(1497246 << RG_TVDPLL_SDM_PCW),RG_TVDPLL_SDM_PCW_MASK);
1713 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,RG_TVDPLL_EN,RG_TVDPLL_EN);
1714
1715 break;
1716
1717 case HDMI_VIDEO_1280x720p_60Hz:
1718 case HDMI_VIDEO_1920x1080i_60Hz:
1719#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
1720 case HDMI_VIDEO_1920x1080i3d_sbs_60Hz:
1721#endif
1722 case HDMI_VIDEO_1920x1080p_23Hz:
1723 case HDMI_VIDEO_1920x1080p_29Hz:
1724 case HDMI_VIDEO_1920x1080p_60Hz:
1725 case HDMI_VIDEO_1280x720p3d_60Hz:
1726 case HDMI_VIDEO_1920x1080i3d_60Hz:
1727 case HDMI_VIDEO_1920x1080p3d_23Hz:
1728 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,0,RG_TVDPLL_EN);
1729 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,(0x04 << RG_TVDPLL_POSDIV),RG_TVDPLL_POSDIV_MASK);
1730 vWriteHdmiANAMsk(MHL_TVDPLL_CON1,(1495733 << RG_TVDPLL_SDM_PCW),RG_TVDPLL_SDM_PCW_MASK);
1731 vWriteHdmiANAMsk(MHL_TVDPLL_CON0,RG_TVDPLL_EN,RG_TVDPLL_EN);
1732
1733 break;
1734 default:
1735 {
1736 break;
1737 }
1738 }
1739
1740 mdelay(20);
1741 //vWriteHdmiANAMsk(MHL_TVDPLL_CON1,TVDPLL_SDM_PCW_CHG,TVDPLL_SDM_PCW_CHG);
1742}
1743
1744
1745static wait_queue_head_t hdmi_vsync_wq;
1746static bool hdmi_vsync_flag = false;
1747static int hdmi_vsync_cnt = 0;
1748
1749void hdmi_waitVsync(void)
1750{
1751 MMProfileLogEx(HDMI_MMP_Events.WaitVSync, MMProfileFlagStart, hdmi_vsync_cnt, p->is_clock_on);
1752
1753 if (p->is_clock_on == false)
1754 {
1755 printk("[hdmi]:hdmi has suspend, return directly\n");
1756 msleep(19);
1757 MMProfileLogEx(HDMI_MMP_Events.WaitVSync, MMProfileFlagEnd, hdmi_vsync_cnt, p->is_clock_on);
1758 return;
1759 }
1760
1761 hdmi_vsync_cnt++;
1762
1763 hdmi_vsync_flag = 0;
1764
1765 if (wait_event_interruptible_timeout(hdmi_vsync_wq, hdmi_vsync_flag, HZ / 10) == 0)
1766 {
1767 printk("[hdmi] Wait VSync timeout. early_suspend=%d\n", p->is_clock_on);
1768 }
1769
1770 MMProfileLogEx(HDMI_MMP_Events.WaitVSync, MMProfileFlagEnd, hdmi_vsync_cnt, p->is_clock_on);
1771 hdmi_vsync_cnt--;
1772 return;
1773}
1774EXPORT_SYMBOL(hdmi_waitVsync);
1775
1776static void _rdma1_irq_handler(unsigned int param)
1777{
1778 RET_VOID_IF_NOLOG(!is_hdmi_active());
1779
1780 ///RET_VOID_IF_NOLOG(!p->lcm_is_video_mode);
1781 ///HDMI_LOG("_rdma1_irq_handler irq %x\n", param);
1782
1783 if (param & 0x20) // taget line 0x20
1784 {
1785 MMProfileLogEx(HDMI_MMP_Events.RDMA1RegisterUpdated, MMProfileFlagPulse, param, 0x20);
1786
1787 ///hdmi_update_buffer_switch();
1788
1789 atomic_set(&hdmi_rdma_config_event, 1);
1790 wake_up_interruptible(&hdmi_rdma_config_wq);
1791 }
1792
1793 if(param&(1<<2)) //frame done
1794 {
1795 //pr_err("enter _rdma1_irq_handler frame done rdma1_addr_using=0x%08x rdma1_addr_shadowed=0x%08x",rdma1_addr_using, rdma1_addr_shadowed);
1796 rdma1_addr_using = rdma1_addr_shadowed;
1797 }
1798 if ((param & 2) && (hdmi_params->cabletype == MHL_SMB_CABLE)) // rdma1 register updated
1799 {
1800 MMProfileLogEx(HDMI_MMP_Events.RDMA1RegisterUpdated, MMProfileFlagPulse, param, 2);
1801
1802 hdmi_vsync_flag = 1;
1803 wake_up_interruptible(&hdmi_vsync_wq);
1804
1805 }
1806
1807 if (param & 1) // rdma1 register updated
1808 {
1809 MMProfileLogEx(HDMI_MMP_Events.RDMA1RegisterUpdated, MMProfileFlagPulse, param, 1);
1810
1811 atomic_set(&hdmi_rdma_update_event, 1);
1812 wake_up_interruptible(&hdmi_rdma_update_wq);
1813
1814 }
1815#ifdef MTK_SEC_VIDEO_PATH_SUPPORT
1816 else if(gRDMASecureSwitch && (param & 4))
1817 {
1818 atomic_set(&hdmi_rdma_update_event, 1);
1819 wake_up_interruptible(&hdmi_rdma_update_wq);
1820 gRDMASecureSwitch = 0;
1821 }
1822#endif
1823}
1824
1825/* Allocate memory, set M4U, LCD, MDP, DPI */
1826/* LCD overlay to memory -> MDP resize and rotate to memory -> DPI read to HDMI */
1827/* Will only be used in ioctl(MTK_HDMI_AUDIO_VIDEO_ENABLE) */
1828static HDMI_STATUS hdmi_drv_init(void)
1829{
1830 int lcm_width, lcm_height;
1831 int tmpBufferSize;
1832 //M4U_PORT_STRUCT m4uport;
1833
1834 HDMI_FUNC();
1835
1836 if(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS)
1837 {
1838 HDMI_LOG(" dpi bypass mode ,return directly\n");
1839
1840 }
1841
1842 RETIF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS, 0);
1843
1844 p->hdmi_width = hdmi_get_width(hdmi_params->init_config.vformat);
1845 p->hdmi_height = hdmi_get_height(hdmi_params->init_config.vformat);
1846 p->bg_width = 0;
1847 p->bg_height = 0;
1848
1849 lcm_width = DISP_GetScreenWidth();
1850 lcm_height = DISP_GetScreenHeight();
1851
1852 //printk("[hdmi]%s, hdmi_width=%d, hdmi_height=%d\n", __func__, p->hdmi_width, p->hdmi_height);
1853 HDMI_LOG("lcm_width=%d, lcm_height=%d\n", lcm_width, lcm_height);
1854
1855 tmpBufferSize = lcm_width * lcm_height * hdmi_bpp * hdmi_params->intermediat_buffer_num;
1856
1857 temp_va = (unsigned int) vmalloc(tmpBufferSize);
1858
1859 if (((void *) temp_va) == NULL)
1860 {
1861 HDMI_LOG("vmalloc %d bytes fail\n", tmpBufferSize);
1862 return -1;
1863 }
1864
1865
1866 HDMI_LOG("temp_va=0x%08x, temp_mva_w=0x%08x\n", temp_va, temp_mva_w);
1867
1868
1869 p->lcm_width = lcm_width;
1870 p->lcm_height = lcm_height;
1871 p->output_video_resolution = hdmi_params->init_config.vformat;
1872 p->output_audio_format = hdmi_params->init_config.aformat;
1873 p->scaling_factor = hdmi_params->scaling_factor < 10 ? hdmi_params->scaling_factor : 10;
1874
1875 ///if (p->lcm_is_video_mode)
1876 {
1877 hdmi_buffer_init(hdmi_params->intermediat_buffer_num);
1878 }
1879
1880 hdmi_dpi_config_clock(); // configure dpi clock
1881
1882 hdmi_dpi_power_switch(false); // but dpi power is still off
1883
1884 ///if (p->lcm_is_video_mode)
1885 {
1886 disp_register_irq(DISP_MODULE_RDMA1, _rdma1_irq_handler);
1887
1888#ifdef MTK_HDMI_FENCE_SUPPORT
1889
1890 if (!hdmi_rdma_config_task)
1891 {
1892 hdmi_rdma_config_task = kthread_create(hdmi_rdma_config_kthread, NULL, "hdmi_rdma_config_kthread");
1893 wake_up_process(hdmi_rdma_config_task);
1894 }
1895
1896 if (!hdmi_rdma_update_task)
1897 {
1898 hdmi_rdma_update_task = kthread_create(hdmi_rdma_update_kthread, NULL, "hdmi_rdma_update_kthread");
1899 wake_up_process(hdmi_rdma_update_task);
1900 }
1901
1902#endif
1903
1904#ifdef MTK_SMARTBOOK_SUPPORT
1905
1906 if (!hdmi_status_update_task)
1907 {
1908 hdmi_status_update_task = kthread_create(hdmi_status_update_kthread, NULL, "hdmi_status_update_kthread");
1909 wake_up_process(hdmi_status_update_task);
1910 }
1911
1912#endif
1913 }
1914
1915 init_hdmi_mmp_events();
1916
1917 return HDMI_STATUS_OK;
1918}
1919
1920//free IRQ
1921/*static*/ void hdmi_dpi_free_irq(void)
1922{
1923 RET_VOID_IF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS);
1924 DPI_CHECK_RET(HDMI_DPI(_FreeIRQ)());
1925}
1926
1927/* Release memory */
1928/* Will only be used in ioctl(MTK_HDMI_AUDIO_VIDEO_ENABLE) */
1929static HDMI_STATUS hdmi_drv_deinit(void)
1930{
1931 int temp_va_size;
1932
1933 HDMI_FUNC();
1934 RETIF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS, 0);
1935
1936 disp_unregister_irq(DISP_MODULE_RDMA1, _rdma1_irq_handler);
1937
1938 hdmi_dpi_power_switch(false);
1939 hdmi_buffer_deinit();
1940 hdmi_free_hdmi_buffer();
1941 hdmi_dpi_free_irq();
1942
1943 //free temp_va & temp_mva
1944 HDMI_LOG("Free temp_va and temp_mva\n");
1945 temp_va_size = p->lcm_width * p->lcm_height * hdmi_bpp * hdmi_params->intermediat_buffer_num;
1946
1947 if (temp_va)
1948 {
1949 vfree((void *) temp_va);
1950 temp_va = 0;
1951 }
1952
1953 hdmi_dpi_free_irq();
1954 return HDMI_STATUS_OK;
1955}
1956
1957static void hdmi_dpi_config_update(void)
1958{
1959 HDMI_FUNC();
1960 DPI_CHECK_RET(HDMI_DPI(_SW_Reset)(0x1));
1961 DPI_CHECK_RET(HDMI_DPI(_ConfigPixelClk)(clk_pol, dpi_clk_div, dpi_clk_duty));
1962
1963 DPI_CHECK_RET(HDMI_DPI(_ConfigDataEnable)(de_pol)); // maybe no used
1964
1965 DPI_CHECK_RET(HDMI_DPI(_ConfigHsync)(hsync_pol, hsync_pulse_width, hsync_back_porch, hsync_front_porch));
1966
1967 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync)(vsync_pol, vsync_pulse_width, vsync_back_porch, vsync_front_porch));
1968
1969#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
1970 if(fgInterlace)
1971 {
1972 if(fg3DFrame)
1973 {
1974 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_LEVEN)(vsync_pulse_width, vsync_back_porch, vsync_front_porch, fgInterlace));
1975
1976 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_RODD)(vsync_pulse_width, vsync_back_porch, vsync_front_porch));
1977
1978 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_REVEN)(vsync_pulse_width, vsync_back_porch, vsync_front_porch, fgInterlace));
1979 }
1980 else
1981 {
1982 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_LEVEN)(vsync_pulse_width, vsync_back_porch+1, vsync_front_porch, fgInterlace));
1983
1984 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_RODD)(0, 0, 0));
1985
1986 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_REVEN)(0, 0, 0, 0));
1987 }
1988 }
1989 else
1990 {
1991 if(fg3DFrame)
1992 {
1993 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_LEVEN)(0, 0, 0, 0));
1994
1995 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_RODD)(vsync_pulse_width, vsync_back_porch, vsync_front_porch));
1996
1997 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_REVEN)(0, 0, 0, 0));
1998 }
1999 else
2000 {
2001 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_LEVEN)(0, 0, 0, 0));
2002
2003 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_RODD)(0, 0, 0));
2004
2005 DPI_CHECK_RET(HDMI_DPI(_ConfigVsync_REVEN)(0, 0, 0, 0));
2006 }
2007 }
2008 DPI_CHECK_RET(HDMI_DPI(_Config_Ctrl)(fg3DFrame, fgInterlace)); //config 3D and Interlace
2009#endif
2010 if ((HDMI_VIDEO_1920x1080i_60Hz == p->output_video_resolution) ||
2011 (HDMI_VIDEO_1920x1080i_50Hz == p->output_video_resolution)
2012 #if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
2013 || (HDMI_VIDEO_1920x1080i3d_sbs_60Hz == p->output_video_resolution)
2014 || (HDMI_VIDEO_1920x1080i3d_sbs_50Hz == p->output_video_resolution)
2015 #endif
2016 )
2017 {
2018 DPI_CHECK_RET(HDMI_DPI(_FBSetSize)(p->hdmi_width, p->hdmi_height/2));
2019 }
2020 else
2021 {
2022 DPI_CHECK_RET(HDMI_DPI(_FBSetSize)(p->hdmi_width, p->hdmi_height));
2023 }
2024
2025 DPI_CHECK_RET(HDMI_DPI(_FBSetPitch)(DPI_FB_0, p->hdmi_width * 3)); // do nothing
2026 DPI_CHECK_RET(HDMI_DPI(_FBEnable)(DPI_FB_0, TRUE)); // do nothing
2027#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
2028 DPI_CHECK_RET(DPI1_SetChannelLimit(0x0100, 0x0EB0, 0x0100, 0x0EB0));
2029#endif
2030 //OUTREG32(0xF208C090, 0x41);
2031 DPI_CHECK_RET(HDMI_DPI(_FBSetFormat)(DPI_FB_FORMAT_RGB888)); // do nothing
2032
2033 if (HDMI_COLOR_ORDER_BGR == rgb_order)
2034 {
2035 DPI_CHECK_RET(HDMI_DPI(_SetRGBOrder)(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_BGR)); // do nothing
2036 }
2037 else
2038 {
2039 DPI_CHECK_RET(HDMI_DPI(_SetRGBOrder)(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_RGB)); // do nothing
2040 }
2041#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
2042 DPI_CHECK_RET(HDMI_DPI(_Config_ColorSpace)(hdmi_colorspace, hdmi_res));
2043 DPI_CHECK_RET(HDMI_DPI(_SW_Reset)(0x0));
2044#endif
2045}
2046
2047
2048/* Will only be used in hdmi_drv_init(), this means that will only be use in ioctl(MTK_HDMI_AUDIO_VIDEO_ENABLE) */
2049/*static*/ void hdmi_dpi_config_clock(void)
2050{
2051 int ret = 0;
2052
2053 HDMI_FUNC();
2054
2055 RET_VOID_IF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS);
2056#if 0
2057 ret = enable_pll(TVDPLL, "HDMI");
2058 p->is_clock_on = true;
2059
2060 HDMI_LOG("set clock on true\n");
2061
2062 if(ret)
2063 {
2064 HDMI_LOG("enable_pll fail!!\n");
2065 }
2066#endif
2067
2068 p->is_clock_on = true;//???Right??
2069
2070
2071 switch (hdmi_params->init_config.vformat)
2072 {
2073 case HDMI_VIDEO_720x480p_60Hz:
2074 {
2075 printk("[hdmi]480p\n");
2076 //ret = pll_fsel(TVDPLL, 0x1C7204C7);
2077 ASSERT(!ret);
2078
2079 dpi_clk_div = 2;
2080 dpi_clk_duty = 1;
2081
2082 break;
2083 }
2084 case HDMI_VIDEO_1280x720p_60Hz:
2085 {
2086 printk("[hdmi]720p 60Hz\n");
2087
2088 dpi_clk_div = 2;
2089 dpi_clk_duty = 1;
2090
2091 break;
2092 }
2093#if defined(MTK_MT8193_HDMI_SUPPORT)|| defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
2094 case HDMI_VIDEO_1280x720p_50Hz: {
2095 printk("[hdmi]720p 50Hz\n");
2096 //ret = pll_fsel(TVDPLL, 0x1C7204C7);
2097 ASSERT(!ret);
2098
2099 dpi_clk_div = 2;
2100 dpi_clk_duty = 1;
2101
2102 break;
2103 }
2104#endif
2105 case HDMI_VIDEO_1920x1080p_30Hz:
2106 {
2107 printk("[hdmi]1080p 30Hz\n");
2108 dpi_clk_div = 2;
2109 dpi_clk_duty = 1;
2110
2111 break;
2112 }
2113
2114 default:
2115 {
2116 printk("[hdmi] not supported format, %s, %d, format = %d\n", __func__, __LINE__, hdmi_params->init_config.vformat);
2117 break;
2118 }
2119 }
2120
2121 clk_pol = hdmi_params->clk_pol;
2122 de_pol = hdmi_params->de_pol;
2123 hsync_pol = hdmi_params->hsync_pol;
2124 vsync_pol = hdmi_params->vsync_pol;;
2125
2126 hsync_pulse_width = hdmi_params->hsync_pulse_width;
2127 vsync_pulse_width = hdmi_params->vsync_pulse_width;
2128 hsync_back_porch = hdmi_params->hsync_back_porch;
2129 vsync_back_porch = hdmi_params->vsync_back_porch;
2130 hsync_front_porch = hdmi_params->hsync_front_porch;
2131 vsync_front_porch = hdmi_params->vsync_front_porch;
2132
2133 rgb_order = hdmi_params->rgb_order;
2134 intermediat_buffer_num = hdmi_params->intermediat_buffer_num;
2135
2136
2137 DPI_CHECK_RET(HDMI_DPI(_Init)(TRUE));
2138}
2139
2140
2141int hdmi_allocate_hdmi_buffer(void)
2142{
2143#if 1
2144 // just for alloc pattern buffer
2145 // If mva from HWC can set to RDMA1 directly, this alloc should be removed
2146 hdmi_pattern(0);
2147 return 0;
2148#else
2149 M4U_PORT_STRUCT m4uport;
2150 int hdmiPixelSize = p->hdmi_width * p->hdmi_height;
2151 int hdmiDataSize = hdmiPixelSize * 4;////hdmi_bpp;
2152 int hdmiBufferSize = hdmiDataSize * hdmi_params->intermediat_buffer_num;
2153
2154 HDMI_FUNC();
2155
2156 RETIF(hdmi_va, 0);
2157
2158 hdmi_va = (unsigned int) vmalloc(hdmiBufferSize);
2159
2160 if (((void *) hdmi_va) == NULL)
2161 {
2162 HDMI_LOG("vmalloc %d bytes fail!!!\n", hdmiBufferSize);
2163 return -1;
2164 }
2165
2166 memset((void *) hdmi_va, 0, hdmiBufferSize);
2167
2168 //RDMA1
2169 if (m4u_alloc_mva(DISP_RDMA1, hdmi_va, hdmiBufferSize, 0, 0, &hdmi_mva_r))
2170 {
2171 HDMI_LOG("m4u_alloc_mva for hdmi_mva_r fail\n");
2172 return -1;
2173 }
2174
2175 memset((void *) &m4uport, 0, sizeof(M4U_PORT_STRUCT));
2176 m4uport.ePortID = DISP_RDMA1;
2177 m4uport.Virtuality = 1;
2178 m4uport.domain = 0;
2179 m4uport.Security = 0;
2180 m4uport.Distance = 1;
2181 m4uport.Direction = 0;
2182 m4u_config_port(&m4uport);
2183
2184 HDMI_LOG("hdmi_va=0x%08x, hdmi_mva_r=0x%08x\n", hdmi_va, hdmi_mva_r);
2185
2186 return 0;
2187#endif
2188}
2189
2190int hdmi_free_hdmi_buffer(void)
2191{
2192 int hdmi_va_size = p->hdmi_width * p->hdmi_height * hdmi_bpp * hdmi_params->intermediat_buffer_num;
2193 return 0;
2194
2195 //free hdmi_va & hdmi_mva
2196 HDMI_LOG("Free hdmi_va and hdmi_mva\n");
2197
2198 if (hdmi_mva_r)
2199 {
2200 M4U_PORT_STRUCT m4uport;
2201 m4uport.ePortID = DISP_RDMA1;
2202 m4uport.Virtuality = 0;
2203 m4uport.domain = 0;
2204 m4uport.Security = 0;
2205 m4uport.Distance = 1;
2206 m4uport.Direction = 0;
2207 m4u_config_port(&m4uport);
2208
2209 m4u_dealloc_mva(DISP_RDMA1,
2210 hdmi_va,
2211 hdmi_va_size,
2212 hdmi_mva_r);
2213 hdmi_mva_r = 0;
2214 }
2215
2216 if (hdmi_va)
2217 {
2218 vfree((void *) hdmi_va);
2219 hdmi_va = 0;
2220 }
2221
2222 return 0;
2223}
2224
2225static int rdmafpscnt = 0;
2226int hdmi_rdma_address_config(bool enable, hdmi_video_buffer_info buffer_info)
2227{
2228 int rdmaInputFormat;
2229 int rdmaInputsize;
2230 int buffer_size;
2231 unsigned int offset;
2232 unsigned int hdmiSourceAddr;
2233 struct disp_path_config_struct config = {0};
2234 bool need_config;
2235
2236 ///HDMI_FUNC();
2237
2238 if (enable)
2239 {
2240 if (p->is_clock_on == false)
2241 {
2242 HDMI_LOG(" clock stoped enable(%d), is_clock_on(%d)\n", enable, p->is_clock_on);
2243 return -1;
2244 }
2245
2246#ifdef MTK_OVERLAY_ENGINE_SUPPORT
2247 rdmaInputFormat = RDMA_INPUT_FORMAT_RGB888;
2248 rdmaInputsize = 3;
2249#else
2250 rdmaInputFormat = 16;
2251 rdmaInputsize = 3;
2252
2253 if (buffer_info.src_fmt == MTK_FB_FORMAT_ARGB8888)
2254 {
2255 rdmaInputsize = 4;
2256 rdmaInputFormat = 16;
2257 }
2258 else if (buffer_info.src_fmt == MTK_FB_FORMAT_BGR888)
2259 {
2260 rdmaInputsize = 3;
2261 rdmaInputFormat = 8;
2262 }
2263#endif
2264
2265 buffer_size = buffer_info.src_width*buffer_info.src_height*rdmaInputsize;
2266
2267#ifdef MTK_SEC_VIDEO_PATH_SUPPORT
2268 if(buffer_info.security == 1)
2269 {
2270 hdmiSourceAddr = (unsigned int)buffer_info.src_phy_addr; //This will be a secure buffer handle
2271 }
2272 else
2273#endif
2274 {
2275 offset = (buffer_info.src_pitch - buffer_info.src_width) / 2 * rdmaInputsize;
2276 hdmiSourceAddr = (unsigned int)buffer_info.src_phy_addr
2277 + buffer_info.src_offset_y * buffer_info.src_pitch * rdmaInputsize
2278 + buffer_info.src_offset_x * rdmaInputsize + offset;
2279 }
2280
2281 config.addr = hdmiSourceAddr;
2282 config.srcWidth = buffer_info.src_width;
2283 config.srcHeight = buffer_info.src_height;
2284 config.bgROI.width = buffer_info.src_width;
2285 config.bgROI.height = buffer_info.src_height;
2286 config.srcROI.width = buffer_info.src_width;
2287 config.srcROI.height = buffer_info.src_height;
2288 config.srcROI.x = 0;
2289 config.srcROI.y = 0;
2290 config.bgROI.x = 0;
2291 config.bgROI.y = 0;
2292 config.bgColor = 0x0; // background color
2293 config.inFormat = rdmaInputFormat;
2294 config.pitch = buffer_info.src_pitch * rdmaInputsize;
2295 config.outFormat = RDMA_OUTPUT_FORMAT_ARGB;
2296
2297 #if MTK_HDMI_MAIN_PATH
2298 /*sub path rdma1->dpi0*/
2299 config.srcModule = DISP_MODULE_RDMA1;
2300 config.dstModule = DISP_MODULE_DPI0;
2301 #else
2302 config.srcModule = DISP_MODULE_RDMA1;
2303 config.dstModule = HMID_DEST_DPI;
2304 #endif
2305
2306#if 1
2307 if ((hdmi_abs(buffer_info.src_height - p->hdmi_height) > 32)
2308 || (hdmi_abs(buffer_info.src_width - p->hdmi_width) > 32))
2309 {
2310 HDMI_LOG("[error]info: fmt %d, h %d, w %d, x_o %d, y_o %d, pitch %d hdmi_h %d -w %d\n", buffer_info.src_fmt, buffer_info.src_height, buffer_info.src_width,
2311 buffer_info.src_offset_x, buffer_info.src_offset_y, buffer_info.src_pitch, p->hdmi_height, p->hdmi_width);
2312 return -1;
2313 }
2314#endif
2315
2316 if ((HDMI_VIDEO_1920x1080i_60Hz == p->output_video_resolution) ||
2317 (HDMI_VIDEO_1920x1080i_50Hz == p->output_video_resolution)
2318#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
2319 || (HDMI_VIDEO_1920x1080i3d_sbs_60Hz == p->output_video_resolution)
2320 || (HDMI_VIDEO_1920x1080i3d_sbs_50Hz == p->output_video_resolution)
2321#endif
2322 )
2323 {
2324 config.pitch = config.pitch *2;
2325 config.srcHeight /= 2;
2326 if (DPI1_IS_TOP_FIELD())
2327 {
2328#ifdef CONFIG_MTK_SEC_VIDEO_PATH_SUPPORT
2329 if(buffer_info.security == 0)
2330#endif
2331 config.addr += buffer_info.src_pitch * rdmaInputsize;
2332 }
2333 }
2334
2335 need_config = true;
2336
2337 if (dp_mutex_dst <= 0)
2338 {
2339 dp_mutex_dst = 2;
2340 rdmafpscnt = 0;
2341 }
2342 else
2343 {
2344 need_config = false;
2345 }
2346
2347 rdmafpscnt++;
2348
2349 ///disp_path_get_mutex_(dp_mutex_dst);
2350 HDMI_LOG("[HDMI] RDMA BUF[%d], secure = %d\n", rdmabuf++, buffer_info.security);
2351
2352#ifdef MTK_SEC_VIDEO_PATH_SUPPORT
2353 disp_path_get_mutex_(dp_mutex_dst);
2354 if (true == need_config) {
2355 //Config M4U setting
2356 #if 1
2357 gRDMASecure = buffer_info.security;
2358 hdmi_config_m4u(buffer_info.security); //Config M4U normal or secure
2359 disp_path_config_(&config, dp_mutex_dst); //RDMA1 will not be started and setted buffer address in this function for SVP
2360 if (buffer_info.security)
2361 {
2362 hdmi_set_rdma_addr(hdmiSourceAddr, buffer_size, buffer_info.security);
2363 }
2364 else
2365 {
2366 DISP_REG_SET(0xa000 + DISP_REG_RDMA_MEM_START_ADDR, hdmiSourceAddr);
2367 }
2368 disp_path_release_mutex_(dp_mutex_dst);
2369 DPI_CHECK_RET(HDMI_DPI(_EnableClk)());
2370 RDMAStart(1); //Start RDMA1 for HDMI Path
2371 #else
2372 M4U_PORT_STRUCT m4uport;
2373 memset((void *) &m4uport, 0, sizeof(M4U_PORT_STRUCT));
2374 m4uport.ePortID = DISP_RDMA1;
2375 m4uport.Virtuality = 1;
2376 m4uport.domain = 0;
2377 m4uport.Security = 0;
2378 m4uport.Distance = 1;
2379 m4uport.Direction = 0;
2380 m4u_config_port(&m4uport);
2381 disp_path_config_(&config, dp_mutex_dst); //RDMA1 will not be started and setted buffer address in this function for SVP
2382 disp_path_release_mutex_(dp_mutex_dst);
2383 #endif
2384 }
2385 else{
2386 //hdmi_set_rdma_addr(hdmiSourceAddr, buffer_info.security);
2387 if (buffer_info.security != gRDMASecure)
2388 {
2389 //if (gRDMASecure)
2390 disp_register_intr(MT6582_DISP_RDMA1_IRQ_ID, 1); //register tee interrupt handler
2391 hdmi_set_rdma_addr(hdmiSourceAddr, buffer_size, buffer_info.security);
2392 rdma1_addr_shadowed = (unsigned int)hdmiSourceAddr;
2393 disp_path_release_mutex_(dp_mutex_dst);
2394 //if (gRDMASecure)
2395 disp_register_intr(MT6582_DISP_RDMA1_IRQ_ID, 0); //register ree interrupt handler
2396 gRDMASecure = buffer_info.security;
2397 gRDMASecureSwitch = 1;
2398 }
2399 else
2400 {
2401 //rdma1_addr_shadowed = (unsigned int)buffer_info.src_phy_addr;
2402 if (buffer_info.security)
2403 {
2404 hdmi_set_rdma_addr(hdmiSourceAddr, buffer_size, buffer_info.security);
2405 }
2406 else
2407 {
2408 DISP_REG_SET(0xa000 + DISP_REG_RDMA_MEM_START_ADDR, hdmiSourceAddr);
2409 }
2410 rdma1_addr_shadowed = (unsigned int)buffer_info.src_phy_addr;
2411 disp_path_release_mutex_(dp_mutex_dst);
2412 }
2413
2414 }
2415#else
2416 disp_path_get_mutex_(dp_mutex_dst);
2417 if (true == need_config)
2418 {
2419 M4U_PORT_STRUCT m4uport;
2420 memset((void *) &m4uport, 0, sizeof(M4U_PORT_STRUCT));
2421 m4uport.ePortID = DISP_RDMA1;
2422 m4uport.Virtuality = 1;
2423 m4uport.domain = 0;
2424 m4uport.Security = 0;
2425 m4uport.Distance = 1;
2426 m4uport.Direction = 0;
2427 m4u_config_port(&m4uport);
2428
2429 #if MTK_HDMI_MAIN_PATH
2430 #else
2431 disp_path_config_(&config, dp_mutex_dst);
2432 #endif
2433
2434 ///DPI_CHECK_RET(HDMI_DPI(_EnableColorBar)());
2435 DPI_CHECK_RET(HDMI_DPI(_EnableClk)());
2436 DPI_CHECK_RET(HDMI_DPI(_DumpRegisters)());
2437 }
2438 else
2439 {
2440 DISP_REG_SET(0xa000 + DISP_REG_RDMA_MEM_START_ADDR, config.addr);
2441 rdma1_addr_shadowed = (unsigned int)hdmiSourceAddr;
2442 }
2443 disp_path_release_mutex_(dp_mutex_dst);
2444#endif
2445 ///disp_path_release_mutex_(dp_mutex_dst);
2446 }
2447 else
2448 {
2449 if (-1 != dp_mutex_dst)
2450 {
2451 //FIXME: release mutex timeout
2452 HDMI_LOG("Stop RDMA1>DPI\n");
2453 disp_path_get_mutex_(dp_mutex_dst);
2454
2455 ///DISP_REG_SET_FIELD(1 << dp_mutex_src , DISP_REG_CONFIG_MUTEX_INTEN, 1);
2456 RDMAStop(1);
2457 RDMAReset(1);
2458 disp_path_release_mutex_(dp_mutex_dst);
2459
2460 //disp_unlock_mutex(dp_mutex_dst);
2461 dp_mutex_dst = -1;
2462#ifdef MTK_SEC_VIDEO_PATH_SUPPORT
2463 gRDMASecure = 0;
2464 gRDMASecureSwitch = 0;
2465 hdmi_config_m4u(0);
2466#endif
2467 }
2468 }
2469
2470 return 0;
2471}
2472
2473/* Switch DPI Power for HDMI Driver */
2474/*static*/ void hdmi_dpi_power_switch(bool enable)
2475{
2476 //int ret;
2477
2478 HDMI_FUNC();
2479 HDMI_LOG("%s enable : %d\n", __func__,enable);
2480
2481 HDMI_LOG("DPI clock enable : %d\n", enable);
2482
2483 if(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS)
2484 {
2485 HDMI_LOG("output_mode:%d dpi bypass\n", p->output_mode);
2486 }
2487
2488 RET_VOID_IF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS);
2489
2490 if (enable)
2491 {
2492 if (p->is_clock_on == true)
2493 {
2494 HDMI_LOG("power on request while already powered on!\n");
2495
2496 #if MTK_HDMI_MAIN_PATH
2497 /*if hdmi main path, force enable pll*/
2498
2499 #else
2500
2501 return;
2502
2503 #endif
2504 }
2505#if 0
2506 ret = enable_pll(TVDPLL, "HDMI");
2507 if(ret)
2508 {
2509 HDMI_LOG("enable_pll fail!!\n");
2510 return;
2511 }
2512#endif
2513 HDMI_DPI(_PowerOn)();
2514 HDMI_DPI(_EnableIrq)();
2515 DPI_CHECK_RET(HDMI_DPI(_EnableClk)());
2516
2517 p->is_clock_on = true;
2518 }
2519 else
2520 {
2521#if 1
2522
2523 if (p->is_clock_on == false)
2524 {
2525 HDMI_MSG("power off request while already powered off!\n");
2526
2527 return;
2528 }
2529
2530#endif
2531 p->is_clock_on = false;
2532 atomic_set(&hdmi_rdma_update_event, 1); ///release buffer
2533 wake_up_interruptible(&hdmi_rdma_update_wq);
2534
2535 HDMI_DPI(_DisableIrq)();
2536 HDMI_DPI(_DisableClk)();
2537 HDMI_DPI(_PowerOff)();
2538#if 0
2539 ret = disable_pll(TVDPLL, "HDMI");
2540 if(ret)
2541 {
2542 HDMI_LOG("disable_pll fail!!\n");
2543 //return;
2544 }
2545#endif
2546 }
2547}
2548
2549/* Configure video attribute */
2550static int hdmi_video_config(HDMI_VIDEO_RESOLUTION vformat, HDMI_VIDEO_INPUT_FORMAT vin, HDMI_VIDEO_OUTPUT_FORMAT vout)
2551{
2552 HDMI_FUNC();
2553
2554 if(IS_HDMI_NOT_ON())
2555 {
2556 HDMI_LOG(" hdmi power state(%d) is not on,change resolution \n",atomic_read(&p->state));
2557 }
2558
2559 #if MTK_HDMI_MAIN_PATH
2560 /*if hdmi main path, force video config*/
2561
2562 #else
2563 RETIF(IS_HDMI_NOT_ON(), 0);
2564 #endif
2565#if 0//for debug using
2566 hdmi_allocate_hdmi_buffer();
2567#endif
2568 ///hdmi_dst_display_path_config(true);
2569
2570 hdmi_fps_control_overlay = 0;
2571 hdmi_fps_control_dpi = 0;
2572
2573 return hdmi_drv->video_config(vformat, vin, vout);
2574}
2575
2576/* Configure audio attribute, will be called by audio driver */
2577int hdmi_audio_config(int samplerate)
2578{
2579 HDMI_FUNC();
2580 RETIF(!p->is_enabled, 0);
2581 RETIF(IS_HDMI_NOT_ON(), 0);
2582
2583 HDMI_LOG("sample rate=%d\n", samplerate);
2584
2585 if (samplerate == 48000)
2586 {
2587 p->output_audio_format = HDMI_AUDIO_PCM_16bit_48000;
2588 }
2589 else if (samplerate == 44100)
2590 {
2591 p->output_audio_format = HDMI_AUDIO_PCM_16bit_44100;
2592 }
2593 else if (samplerate == 32000)
2594 {
2595 p->output_audio_format = HDMI_AUDIO_PCM_16bit_32000;
2596 }
2597 else
2598 {
2599 HDMI_LOG("samplerate not support:%d\n", samplerate);
2600 }
2601
2602
2603 hdmi_drv->audio_config(p->output_audio_format);
2604
2605 return 0;
2606}
2607
2608/* No one will use this function */
2609/*static*/ int hdmi_video_enable(bool enable)
2610{
2611 HDMI_FUNC();
2612
2613
2614 return hdmi_drv->video_enable(enable);
2615}
2616
2617/* No one will use this function */
2618/*static*/ int hdmi_audio_enable(bool enable)
2619{
2620 HDMI_FUNC();
2621
2622
2623 return hdmi_drv->audio_enable(enable);
2624}
2625
2626struct timer_list timer;
2627void __timer_isr(unsigned long n)
2628{
2629 HDMI_FUNC();
2630
2631 if (hdmi_drv->audio_enable)
2632 {
2633 hdmi_drv->audio_enable(true);
2634 }
2635
2636 del_timer(&timer);
2637}
2638
2639int hdmi_audio_delay_mute(int latency)
2640{
2641 HDMI_FUNC();
2642 memset((void *)&timer, 0, sizeof(timer));
2643 timer.expires = jiffies + (latency * HZ / 1000);
2644 timer.function = __timer_isr;
2645 init_timer(&timer);
2646 add_timer(&timer);
2647
2648 if (hdmi_drv->audio_enable)
2649 {
2650 hdmi_drv->audio_enable(false);
2651 }
2652
2653 return 0;
2654}
2655
2656#ifdef MTK_SMARTBOOK_SUPPORT
2657struct timer_list smb_timer;
2658static bool smb_timer_started = false;
2659void smartbook_state_callback();
2660
2661static void __smb_timer_isr(unsigned long n)
2662{
2663 HDMI_FUNC();
2664 del_timer(&smb_timer);
2665
2666 smb_timer_started = false;
2667 smartbook_state_callback();
2668}
2669
2670int hdmi_smb_notify_delay(int ms_latency)
2671{
2672 HDMI_FUNC();
2673
2674 if (smb_timer_started == true)
2675 {
2676 return 0;
2677 }
2678
2679 memset((void *)&smb_timer, 0, sizeof(smb_timer));
2680 smb_timer.expires = jiffies + msecs_to_jiffies(ms_latency);;
2681 smb_timer.function = __smb_timer_isr;
2682 init_timer(&smb_timer);
2683 add_timer(&smb_timer);
2684
2685 smb_timer_started = true;
2686 return 0;
2687}
2688
2689void smartbook_state_callback()
2690{
2691 printk("[hdmi]%s \n", __func__);
2692 atomic_set(&hdmi_status_update_event, 1);
2693 wake_up_interruptible(&hdmi_status_update_wq);
2694
2695}
2696#endif
2697
2698#if ((!defined(MTK_MT8193_HDMI_SUPPORT))&&( !defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT))&&(!defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)))||(defined(MTK_ALPS_BOX_SUPPORT))
2699/* Reset HDMI Driver state */
2700static void hdmi_state_reset(void)
2701{
2702 HDMI_FUNC();
2703
2704 if (hdmi_drv->get_state() == HDMI_STATE_ACTIVE)
2705 {
2706 switch_set_state(&hdmi_switch_data, HDMI_STATE_ACTIVE);
2707 hdmi_reschange = HDMI_VIDEO_RESOLUTION_NUM;
2708 }
2709 else
2710 {
2711 switch_set_state(&hdmi_switch_data, HDMI_STATE_NO_DEVICE);
2712 switch_set_state(&hdmires_switch_data, 0);
2713 }
2714}
2715#endif
2716
2717extern void smi_dynamic_adj_hint_mhl(int mhl_enable);
2718/* HDMI Driver state callback function */
2719void hdmi_state_callback(HDMI_STATE state)
2720{
2721
2722 printk("[hdmi]%s, state = %d\n", __func__, state);
2723
2724 if(p->is_force_disable == true)
2725 {
2726 HDMI_LOG("hdmi is force disable(%d), return directly\n",p->is_force_disable);
2727 }
2728
2729 if(IS_HDMI_FAKE_PLUG_IN())
2730 {
2731 HDMI_LOG("hdmi is fake in , return directly\n");
2732 }
2733
2734 RET_VOID_IF((p->is_force_disable == true));
2735 RET_VOID_IF(IS_HDMI_FAKE_PLUG_IN());
2736
2737 switch (state)
2738 {
2739 case HDMI_STATE_NO_DEVICE:
2740 {
2741#ifdef MTK_SMARTBOOK_SUPPORT
2742 callback_plug = false;
2743#endif
2744 hdmi_suspend();
2745 switch_set_state(&hdmi_switch_data, HDMI_STATE_NO_DEVICE);
2746 switch_set_state(&hdmires_switch_data, 0);
2747#ifdef MTK_SMARTBOOK_SUPPORT
2748#ifdef CONFIG_HAS_SBSUSPEND
2749
2750 if (hdmi_params->cabletype == MHL_SMB_CABLE)
2751 {
2752 sb_plug_out();
2753 }
2754
2755 printk("[hdmi]%s, state = %d out!\n", __func__, state);
2756#endif
2757#endif
2758 smi_dynamic_adj_hint_mhl(0);
2759 break;
2760 }
2761
2762 case HDMI_STATE_ACTIVE:
2763 {
2764
2765#ifndef MTK_SMARTBOOK_SUPPORT
2766 hdmi_resume();
2767
2768 //force update screen
2769 if (HDMI_OUTPUT_MODE_LCD_MIRROR == p->output_mode)
2770 {
2771 //msleep(1000);
2772 }
2773
2774 switch_set_state(&hdmi_switch_data, HDMI_STATE_ACTIVE);
2775#else
2776 callback_plug = true;
2777 hdmi_smb_notify_delay(3500);
2778#endif
2779 hdmi_reschange = HDMI_VIDEO_RESOLUTION_NUM;
2780 smi_dynamic_adj_hint_mhl(1);
2781 break;
2782 }
2783
2784 default:
2785 {
2786 printk("[hdmi]%s, state not support\n", __func__);
2787 break;
2788 }
2789 }
2790
2791 return;
2792}
2793#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
2794void hdmi_cec_state_callback(HDMI_CEC_STATE state)
2795{
2796 printk("[hdmi]%s, cec_state = %d\n", __func__, state);
2797 switch_set_state(&hdmi_cec_switch_data, 0xff);
2798 switch(state)
2799 {
2800 case HDMI_CEC_STATE_PLUG_OUT:
2801 switch_set_state(&hdmi_cec_switch_data, HDMI_CEC_STATE_PLUG_OUT);
2802 break;
2803 case HDMI_CEC_STATE_GET_PA:
2804 switch_set_state(&hdmi_cec_switch_data, HDMI_CEC_STATE_GET_PA);
2805 break;
2806 case HDMI_CEC_STATE_TX_STS:
2807 switch_set_state(&hdmi_cec_switch_data, HDMI_CEC_STATE_TX_STS);
2808 break;
2809 case HDMI_CEC_STATE_GET_CMD:
2810 switch_set_state(&hdmi_cec_switch_data, HDMI_CEC_STATE_GET_CMD);
2811 break;
2812 default:
2813 printk("[hdmi]%s, cec_state not support\n", __func__);
2814 break;
2815 }
2816}
2817#endif
2818
2819/*static*/ void hdmi_power_on(void)
2820{
2821 HDMI_FUNC();
2822
2823 if(IS_HDMI_NOT_OFF())
2824 {
2825 HDMI_LOG("hdmi power state(%d) is not power off,return directly\n",atomic_read(&p->state));
2826
2827 }
2828
2829 RET_VOID_IF(IS_HDMI_NOT_OFF());
2830
2831 if (down_interruptible(&hdmi_update_mutex))
2832 {
2833 printk("[hdmi][HDMI] can't get semaphore in %s()\n", __func__);
2834 return;
2835 }
2836
2837 // Why we set power state before calling hdmi_drv->power_on()?
2838 // Because when power on, the hpd irq will come immediately,
2839 // that means hdmi_resume will be called before hdmi_drv->power_on() retuen here.
2840 // So we have to ensure the power state is STANDBY before hdmi_resume() be called.
2841 SET_HDMI_STANDBY();
2842 HDMI_LOG("hdmi set power state(%d) standby \n",atomic_read(&p->state));
2843
2844 // enable/disable pll must be couple
2845 //hdmi_dpi_power_switch(true);
2846 enable_clock(MT_CG_DISP0_SMI_COMMON , "HDMITX");
2847 enable_clock(MT_CG_DISP0_SMI_LARB0 , "HDMITX");
2848 enable_clock(MT_CG_DISP0_MUTEX_32K , "HDMITX");
2849 enable_clock(MT_CG_DISP0_DISP_RMDA1, "HDMITX");
2850 hdmi_drv->power_on();
2851
2852 // When camera is open, the state will only be changed when camera exits.
2853 // So we bypass state_reset here, if camera is open.
2854 // The related scenario is: suspend in camera with hdmi enabled.
2855 // Why need state_reset() here?
2856 // When we suspend the phone, and then plug out hdmi cable, the hdmi chip status will change immediately
2857 // But when we resume the phone and check hdmi status, the irq will never come again
2858 // So we have to reset hdmi state manually, to ensure the status is the same between the host and hdmi chip.
2859
2860#if ((!defined(MTK_MT8193_HDMI_SUPPORT))&&( !defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT))&&(!defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)))||(defined(MTK_ALPS_BOX_SUPPORT))
2861 if (p->is_force_disable == false)
2862 {
2863 if (IS_HDMI_FAKE_PLUG_IN())
2864 {
2865 //FixMe, deadlock may happened here, due to recursive use mutex
2866 hdmi_resume();
2867 msleep(1000);
2868 switch_set_state(&hdmi_switch_data, HDMI_STATE_ACTIVE);
2869 hdmi_reschange = HDMI_VIDEO_RESOLUTION_NUM;
2870 }
2871 else
2872 {
2873 hdmi_state_reset();
2874
2875 HDMI_LOG("hdmi state %d\n",hdmi_drv->get_state());
2876 // this is just a ugly workaround for some tv sets...
2877 //if(hdmi_drv->get_state() == HDMI_STATE_ACTIVE)
2878 // hdmi_resume();
2879 }
2880 }
2881#endif
2882
2883 up(&hdmi_update_mutex);
2884
2885 return;
2886}
2887
2888/*static*/ void hdmi_power_off(void)
2889{
2890 HDMI_FUNC();
2891
2892 switch_set_state(&hdmires_switch_data, 0);
2893
2894 if(IS_HDMI_OFF())
2895 {
2896 HDMI_LOG("hdmi power state(%d) is already power off,return directly\n",atomic_read(&p->state));
2897
2898 }
2899
2900 RET_VOID_IF(IS_HDMI_OFF());
2901
2902 if (down_interruptible(&hdmi_update_mutex))
2903 {
2904 printk("[hdmi][HDMI] can't get semaphore in %s()\n", __func__);
2905 return;
2906 }
2907
2908 hdmi_drv->power_off();
2909 //hdmi_dpi_power_switch(false);
2910 SET_HDMI_OFF();
2911 hdmi_video_buffer_info temp;
2912 memset(&temp, 0, sizeof(temp));
2913 hdmi_rdma_address_config(false, temp);
2914
2915 disable_clock(MT_CG_DISP0_DISP_RMDA1, "HDMITX");
2916 disable_clock(MT_CG_DISP0_MUTEX_32K , "HDMITX");
2917 disable_clock(MT_CG_DISP0_SMI_LARB0 , "HDMITX");
2918 disable_clock(MT_CG_DISP0_SMI_COMMON , "HDMITX");
2919
2920 HDMI_LOG("hdmi set power state(%d) off\n",atomic_read(&p->state));
2921
2922 up(&hdmi_update_mutex);
2923
2924
2925
2926 return;
2927}
2928
2929/*static*/ void hdmi_suspend(void)
2930{
2931 hdmi_video_buffer_info temp;
2932
2933 HDMI_FUNC();
2934
2935 if(IS_HDMI_NOT_ON())
2936 {
2937 HDMI_LOG("hdmi power state is not power on,return directly\n");
2938
2939 }
2940
2941 RET_VOID_IF(IS_HDMI_NOT_ON());
2942
2943 if (hdmi_bufferdump_on > 0)
2944 {
2945 MMProfileLogEx(HDMI_MMP_Events.HDMIState, MMProfileFlagStart, Plugout, 0);
2946 }
2947
2948 if (down_interruptible(&hdmi_update_mutex))
2949 {
2950 printk("[hdmi][HDMI] can't get semaphore in %s()\n", __func__);
2951 return;
2952 }
2953
2954 hdmi_dpi_power_switch(false);
2955 memset(&temp, 0, sizeof(temp));
2956 hdmi_rdma_address_config(false, temp);
2957
2958 hdmi_drv->suspend();
2959 SET_HDMI_STANDBY();
2960
2961 disp_module_clock_off(DISP_MODULE_RDMA1, "HDMI");
2962 up(&hdmi_update_mutex);
2963
2964 if (hdmi_bufferdump_on > 0)
2965 {
2966 MMProfileLogEx(HDMI_MMP_Events.HDMIState, MMProfileFlagEnd, Plugout, 0);
2967 }
2968}
2969
2970/*static*/ void hdmi_resume(void)
2971{
2972 HDMI_FUNC();
2973
2974 if(IS_HDMI_NOT_STANDBY())
2975 {
2976 HDMI_LOG("hdmi power state(%d) is not standby,return directly\n",atomic_read(&p->state));
2977
2978 }
2979
2980 RET_VOID_IF(IS_HDMI_NOT_STANDBY());
2981 SET_HDMI_ON();
2982
2983 HDMI_LOG("hdmi set power state(%d)\n",atomic_read(&p->state));
2984
2985 if (hdmi_bufferdump_on > 0)
2986 {
2987 MMProfileLogEx(HDMI_MMP_Events.HDMIState, MMProfileFlagStart, Plugin, 0);
2988 }
2989
2990 if (down_interruptible(&hdmi_update_mutex))
2991 {
2992 printk("[hdmi][HDMI] can't get semaphore in %s()\n", __func__);
2993 return;
2994 }
2995
2996 disp_module_clock_on(DISP_MODULE_RDMA1, "HDMI");
2997
2998 hdmi_dpi_power_switch(true);
2999 hdmi_drv->resume();
3000 up(&hdmi_update_mutex);
3001
3002 if (hdmi_bufferdump_on > 0)
3003 {
3004 MMProfileLogEx(HDMI_MMP_Events.HDMIState, MMProfileFlagEnd, Plugin, 0);
3005 }
3006}
3007
3008/* Set HDMI orientation, will be called in mtkfb_ioctl(SET_ORIENTATION) */
3009/*static*/ void hdmi_setorientation(int orientation)
3010{
3011 HDMI_FUNC();
3012 ///RET_VOID_IF(!p->is_enabled);
3013
3014 if (down_interruptible(&hdmi_update_mutex))
3015 {
3016 printk("[hdmi][HDMI] can't get semaphore in %s\n", __func__);
3017 return;
3018 }
3019
3020 p->orientation = orientation;
3021 p->is_reconfig_needed = true;
3022
3023 //done:
3024 up(&hdmi_update_mutex);
3025}
3026
3027static int hdmi_release(struct inode *inode, struct file *file)
3028{
3029 HDMI_FUNC();
3030 return 0;
3031}
3032
3033static int hdmi_open(struct inode *inode, struct file *file)
3034{
3035 HDMI_FUNC();
3036 return 0;
3037}
3038
3039static BOOL hdmi_drv_init_context(void);
3040
3041static void dpi_setting_res(u8 arg)
3042{
3043#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3044 fg3DFrame = FALSE;
3045 fgInterlace = FALSE;
3046#endif
3047
3048 switch (arg)
3049 {
3050 case HDMI_VIDEO_720x480p_60Hz:
3051 {
3052
3053 clk_pol = HDMI_POLARITY_FALLING;
3054 de_pol = HDMI_POLARITY_RISING;
3055 hsync_pol = HDMI_POLARITY_RISING;
3056 vsync_pol = HDMI_POLARITY_RISING;
3057
3058 dpi_clk_div = 2;
3059
3060 hsync_pulse_width = 62;
3061 hsync_back_porch = 60;
3062 hsync_front_porch = 16;
3063
3064 vsync_pulse_width = 6;
3065 vsync_back_porch = 30;
3066 vsync_front_porch = 9;
3067
3068 p->hdmi_width = 720;
3069 p->hdmi_height = 480;
3070 p->output_video_resolution = HDMI_VIDEO_720x480p_60Hz;
3071 break;
3072 }
3073#if defined(MTK_MT8193_HDMI_SUPPORT)|| defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3074 case HDMI_VIDEO_720x576p_50Hz:
3075 {
3076
3077 clk_pol = HDMI_POLARITY_FALLING;
3078 de_pol = HDMI_POLARITY_RISING;
3079 hsync_pol = HDMI_POLARITY_RISING;
3080 vsync_pol = HDMI_POLARITY_RISING;
3081
3082 dpi_clk_div = 2;
3083
3084 hsync_pulse_width = 64;
3085 hsync_back_porch = 68;
3086 hsync_front_porch = 12;
3087
3088 vsync_pulse_width = 5;
3089 vsync_back_porch = 39;
3090 vsync_front_porch = 5;
3091
3092 p->hdmi_width = 720;
3093 p->hdmi_height = 576;
3094 p->output_video_resolution = HDMI_VIDEO_720x576p_50Hz;
3095 break;
3096 }
3097#endif
3098 case HDMI_VIDEO_1280x720p_60Hz:
3099 {
3100
3101 clk_pol = HDMI_POLARITY_FALLING;
3102 de_pol = HDMI_POLARITY_RISING;
3103#if defined(HDMI_TDA19989)|| defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3104 hsync_pol = HDMI_POLARITY_FALLING;
3105#else
3106 hsync_pol = HDMI_POLARITY_RISING;
3107#endif
3108#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3109 vsync_pol = HDMI_POLARITY_FALLING;
3110#else
3111 vsync_pol = HDMI_POLARITY_RISING;
3112#endif
3113
3114 dpi_clk_div = 2;
3115
3116 hsync_pulse_width = 40;
3117 hsync_back_porch = 220;
3118 hsync_front_porch = 110;
3119
3120 vsync_pulse_width = 5;
3121 vsync_back_porch = 20;
3122 vsync_front_porch = 5;
3123
3124 p->hdmi_width = 1280;
3125 p->hdmi_height = 720;
3126 p->output_video_resolution = HDMI_VIDEO_1280x720p_60Hz;
3127 break;
3128 }
3129#if defined(MTK_MT8193_HDMI_SUPPORT)|| defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3130 case HDMI_VIDEO_1280x720p_50Hz:
3131 {
3132
3133 clk_pol = HDMI_POLARITY_FALLING;
3134 de_pol = HDMI_POLARITY_RISING;
3135#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3136 hsync_pol = HDMI_POLARITY_FALLING;
3137 vsync_pol = HDMI_POLARITY_FALLING;
3138#else
3139 hsync_pol = HDMI_POLARITY_RISING;
3140 vsync_pol = HDMI_POLARITY_RISING;
3141#endif
3142
3143 dpi_clk_div = 2;
3144
3145 hsync_pulse_width = 40;
3146 hsync_back_porch = 220;
3147 hsync_front_porch = 440;
3148
3149 vsync_pulse_width = 5;
3150 vsync_back_porch = 20;
3151 vsync_front_porch = 5;
3152
3153 p->hdmi_width = 1280;
3154 p->hdmi_height = 720;
3155 p->output_video_resolution = HDMI_VIDEO_1280x720p_50Hz;
3156 break;
3157 }
3158 case HDMI_VIDEO_1920x1080p_24Hz:
3159 {
3160
3161 clk_pol = HDMI_POLARITY_FALLING;
3162 de_pol = HDMI_POLARITY_RISING;
3163#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3164 hsync_pol = HDMI_POLARITY_FALLING;
3165 vsync_pol = HDMI_POLARITY_FALLING;
3166#else
3167 hsync_pol = HDMI_POLARITY_RISING;
3168 vsync_pol = HDMI_POLARITY_RISING;
3169#endif
3170
3171 dpi_clk_div = 2;
3172
3173 hsync_pulse_width = 44;
3174 hsync_back_porch = 148;
3175 hsync_front_porch = 638;
3176
3177 vsync_pulse_width = 5;
3178 vsync_back_porch = 36;
3179 vsync_front_porch = 4;
3180
3181 p->hdmi_width = 1920;
3182 p->hdmi_height = 1080;
3183 p->output_video_resolution = HDMI_VIDEO_1920x1080p_24Hz;
3184 break;
3185 }
3186 case HDMI_VIDEO_1920x1080p_25Hz:
3187 {
3188
3189 clk_pol = HDMI_POLARITY_FALLING;
3190 de_pol = HDMI_POLARITY_RISING;
3191#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3192 hsync_pol = HDMI_POLARITY_FALLING;
3193 vsync_pol = HDMI_POLARITY_FALLING;
3194#else
3195 hsync_pol = HDMI_POLARITY_RISING;
3196 vsync_pol = HDMI_POLARITY_RISING;
3197#endif
3198
3199 dpi_clk_div = 2;
3200
3201 hsync_pulse_width = 44;
3202 hsync_back_porch = 148;
3203 hsync_front_porch = 528;
3204
3205 vsync_pulse_width = 5;
3206 vsync_back_porch = 36;
3207 vsync_front_porch = 4;
3208
3209 p->hdmi_width = 1920;
3210 p->hdmi_height = 1080;
3211 p->output_video_resolution = HDMI_VIDEO_1920x1080p_25Hz;
3212 break;
3213 }
3214#endif
3215 case HDMI_VIDEO_1920x1080p_30Hz:
3216 {
3217
3218 clk_pol = HDMI_POLARITY_FALLING;
3219 de_pol = HDMI_POLARITY_RISING;
3220#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3221 hsync_pol = HDMI_POLARITY_FALLING;
3222 vsync_pol = HDMI_POLARITY_FALLING;
3223#else
3224 hsync_pol = HDMI_POLARITY_RISING;
3225 vsync_pol = HDMI_POLARITY_RISING;
3226#endif
3227
3228 dpi_clk_div = 2;
3229
3230 hsync_pulse_width = 44;
3231 hsync_back_porch = 148;
3232 hsync_front_porch = 88;
3233
3234 vsync_pulse_width = 5;
3235 vsync_back_porch = 36;
3236 vsync_front_porch = 4;
3237
3238 p->hdmi_width = 1920;
3239 p->hdmi_height = 1080;
3240 p->output_video_resolution = HDMI_VIDEO_1920x1080p_30Hz;
3241 break;
3242 }
3243#if defined(MTK_MT8193_HDMI_SUPPORT)|| defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3244 case HDMI_VIDEO_1920x1080p_29Hz:
3245 {
3246
3247 clk_pol = HDMI_POLARITY_FALLING;
3248 de_pol = HDMI_POLARITY_RISING;
3249#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3250 hsync_pol = HDMI_POLARITY_FALLING;
3251 vsync_pol = HDMI_POLARITY_FALLING;
3252#else
3253 hsync_pol = HDMI_POLARITY_RISING;
3254 vsync_pol = HDMI_POLARITY_RISING;
3255#endif
3256
3257 dpi_clk_div = 2;
3258
3259 hsync_pulse_width = 44;
3260 hsync_back_porch = 148;
3261 hsync_front_porch = 88;
3262
3263 vsync_pulse_width = 5;
3264 vsync_back_porch = 36;
3265 vsync_front_porch = 4;
3266
3267 p->hdmi_width = 1920;
3268 p->hdmi_height = 1080;
3269 p->output_video_resolution = HDMI_VIDEO_1920x1080p_29Hz;
3270 break;
3271 }
3272 case HDMI_VIDEO_1920x1080p_23Hz:
3273 {
3274
3275 clk_pol = HDMI_POLARITY_FALLING;
3276 de_pol = HDMI_POLARITY_RISING;
3277#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3278 hsync_pol = HDMI_POLARITY_FALLING;
3279 vsync_pol = HDMI_POLARITY_FALLING;
3280#else
3281 hsync_pol = HDMI_POLARITY_RISING;
3282 vsync_pol = HDMI_POLARITY_RISING;
3283#endif
3284
3285 dpi_clk_div = 2;
3286
3287 hsync_pulse_width = 44;
3288 hsync_back_porch = 148;
3289 hsync_front_porch = 638;
3290
3291 vsync_pulse_width = 5;
3292 vsync_back_porch = 36;
3293 vsync_front_porch = 4;
3294
3295 p->hdmi_width = 1920;
3296 p->hdmi_height = 1080;
3297 p->output_video_resolution = HDMI_VIDEO_1920x1080p_23Hz;
3298 break;
3299 }
3300#endif
3301
3302#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3303 case HDMI_VIDEO_1920x1080p_60Hz:
3304 {
3305
3306 clk_pol = HDMI_POLARITY_FALLING;
3307 de_pol = HDMI_POLARITY_RISING;
3308 hsync_pol = HDMI_POLARITY_FALLING;
3309 vsync_pol = HDMI_POLARITY_FALLING;
3310
3311 dpi_clk_div = 2;
3312
3313 hsync_pulse_width = 44;
3314 hsync_back_porch = 148;
3315 hsync_front_porch = 88;
3316
3317 vsync_pulse_width = 5;
3318 vsync_back_porch = 36;
3319 vsync_front_porch = 4;
3320
3321 p->hdmi_width = 1920;
3322 p->hdmi_height = 1080;
3323 p->output_video_resolution = HDMI_VIDEO_1920x1080p_60Hz;
3324 break;
3325 }
3326 case HDMI_VIDEO_1920x1080p_50Hz:
3327 {
3328
3329 clk_pol = HDMI_POLARITY_FALLING;
3330 de_pol = HDMI_POLARITY_RISING;
3331 hsync_pol = HDMI_POLARITY_FALLING;
3332 vsync_pol = HDMI_POLARITY_FALLING;
3333
3334 dpi_clk_div = 2;
3335
3336 hsync_pulse_width = 44;
3337 hsync_back_porch = 148;
3338 hsync_front_porch = 528;
3339
3340 vsync_pulse_width = 5;
3341 vsync_back_porch = 36;
3342 vsync_front_porch = 4;
3343
3344 p->hdmi_width = 1920;
3345 p->hdmi_height = 1080;
3346 p->output_video_resolution = HDMI_VIDEO_1920x1080p_50Hz;
3347 break;
3348 }
3349 case HDMI_VIDEO_1920x1080i_60Hz:
3350 {
3351 fgInterlace = TRUE;
3352 clk_pol = HDMI_POLARITY_FALLING;
3353 de_pol = HDMI_POLARITY_RISING;
3354 hsync_pol = HDMI_POLARITY_FALLING;
3355 vsync_pol = HDMI_POLARITY_FALLING;
3356
3357 dpi_clk_div = 2;
3358
3359 hsync_pulse_width = 44;
3360 hsync_back_porch = 148;
3361 hsync_front_porch = 88;
3362
3363 vsync_pulse_width = 5;
3364 vsync_back_porch = 15;
3365 vsync_front_porch = 2;
3366
3367 p->hdmi_width = 1920;
3368 p->hdmi_height = 1080;
3369 p->output_video_resolution = HDMI_VIDEO_1920x1080i_60Hz;
3370 break;
3371 }
3372#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3373 case HDMI_VIDEO_1920x1080i3d_sbs_60Hz:
3374 {
3375 fgInterlace = TRUE;
3376 clk_pol = HDMI_POLARITY_FALLING;
3377 de_pol = HDMI_POLARITY_RISING;
3378 hsync_pol = HDMI_POLARITY_FALLING;
3379 vsync_pol = HDMI_POLARITY_FALLING;
3380
3381 dpi_clk_div = 2;
3382
3383 hsync_pulse_width = 44;
3384 hsync_back_porch = 148;
3385 hsync_front_porch = 88;
3386
3387 vsync_pulse_width = 5;
3388 vsync_back_porch = 15;
3389 vsync_front_porch = 2;
3390
3391 p->hdmi_width = 1920;
3392 p->hdmi_height = 1080;
3393 p->output_video_resolution = HDMI_VIDEO_1920x1080i3d_sbs_60Hz;
3394 break;
3395 }
3396#endif
3397 case HDMI_VIDEO_1920x1080i_50Hz:
3398 {
3399 fgInterlace = TRUE;
3400 clk_pol = HDMI_POLARITY_FALLING;
3401 de_pol = HDMI_POLARITY_RISING;
3402 hsync_pol = HDMI_POLARITY_FALLING;
3403 vsync_pol = HDMI_POLARITY_FALLING;
3404
3405 dpi_clk_div = 2;
3406
3407 hsync_pulse_width = 44;
3408 hsync_back_porch = 148;
3409 hsync_front_porch = 528;
3410
3411 vsync_pulse_width = 5;
3412 vsync_back_porch = 15;
3413 vsync_front_porch = 2;
3414
3415 p->hdmi_width = 1920;
3416 p->hdmi_height = 1080;
3417 p->output_video_resolution = HDMI_VIDEO_1920x1080i_50Hz;
3418 break;
3419 }
3420#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3421 case HDMI_VIDEO_1920x1080i3d_sbs_50Hz:
3422 {
3423 fgInterlace = TRUE;
3424 clk_pol = HDMI_POLARITY_FALLING;
3425 de_pol = HDMI_POLARITY_RISING;
3426 hsync_pol = HDMI_POLARITY_FALLING;
3427 vsync_pol = HDMI_POLARITY_FALLING;
3428
3429 dpi_clk_div = 2;
3430
3431 hsync_pulse_width = 44;
3432 hsync_back_porch = 148;
3433 hsync_front_porch = 528;
3434
3435 vsync_pulse_width = 5;
3436 vsync_back_porch = 15;
3437 vsync_front_porch = 2;
3438
3439 p->hdmi_width = 1920;
3440 p->hdmi_height = 1080;
3441 p->output_video_resolution = HDMI_VIDEO_1920x1080i3d_sbs_50Hz;
3442 break;
3443 }
3444#endif
3445 case HDMI_VIDEO_1920x1080i3d_60Hz:
3446 {
3447 fgInterlace = TRUE;
3448 fg3DFrame = TRUE;
3449 clk_pol = HDMI_POLARITY_FALLING;
3450 de_pol = HDMI_POLARITY_RISING;
3451
3452 hsync_pol = HDMI_POLARITY_FALLING;
3453 vsync_pol = HDMI_POLARITY_FALLING;
3454
3455
3456 dpi_clk_div = 2;
3457
3458 hsync_pulse_width = 44;
3459 hsync_back_porch = 148;
3460 hsync_front_porch = 88;
3461
3462 vsync_pulse_width = 5;
3463 vsync_back_porch = 15;
3464 vsync_front_porch = 2;
3465
3466 p->hdmi_width = 1920;
3467 p->hdmi_height = 540;
3468 p->output_video_resolution = HDMI_VIDEO_1920x1080i3d_60Hz;
3469 break;
3470}
3471
3472 case HDMI_VIDEO_1920x1080i3d_50Hz:
3473{
3474 fgInterlace = TRUE;
3475 fg3DFrame = TRUE;
3476 clk_pol = HDMI_POLARITY_FALLING;
3477 de_pol = HDMI_POLARITY_RISING;
3478
3479 hsync_pol = HDMI_POLARITY_FALLING;
3480 vsync_pol = HDMI_POLARITY_FALLING;
3481
3482
3483 dpi_clk_div = 2;
3484
3485 hsync_pulse_width = 168;
3486 hsync_back_porch = 184;
3487 hsync_front_porch = 32;
3488
3489 vsync_pulse_width = 5;
3490 vsync_back_porch = 57;
3491 vsync_front_porch = 23;
3492
3493 p->hdmi_width = 1920;
3494 p->hdmi_height = 540;
3495 p->output_video_resolution = HDMI_VIDEO_1920x1080i3d_50Hz;
3496 break;
3497 }
3498 case HDMI_VIDEO_1280x720p3d_60Hz:
3499 {
3500 fg3DFrame = TRUE;
3501 clk_pol = HDMI_POLARITY_FALLING;
3502 de_pol = HDMI_POLARITY_RISING;
3503
3504 hsync_pol = HDMI_POLARITY_FALLING;
3505 vsync_pol = HDMI_POLARITY_FALLING;
3506
3507
3508 dpi_clk_div = 2;
3509
3510 hsync_pulse_width = 40;
3511 hsync_back_porch = 220;
3512 hsync_front_porch = 110;
3513
3514 vsync_pulse_width = 5;
3515 vsync_back_porch = 20;
3516 vsync_front_porch = 5;
3517
3518 p->hdmi_width = 1280;
3519 p->hdmi_height = 720;
3520 p->output_video_resolution = HDMI_VIDEO_1280x720p3d_60Hz;
3521 break;
3522 }
3523 case HDMI_VIDEO_1280x720p3d_50Hz:
3524 {
3525 fg3DFrame = TRUE;
3526 clk_pol = HDMI_POLARITY_FALLING;
3527 de_pol = HDMI_POLARITY_RISING;
3528 hsync_pol = HDMI_POLARITY_FALLING;
3529 vsync_pol = HDMI_POLARITY_FALLING;
3530
3531
3532 dpi_clk_div = 2;
3533
3534 hsync_pulse_width = 40;
3535 hsync_back_porch = 220;
3536 hsync_front_porch = 440;
3537
3538 vsync_pulse_width = 5;
3539 vsync_back_porch = 20;
3540 vsync_front_porch = 5;
3541
3542 p->hdmi_width = 1280;
3543 p->hdmi_height = 720;
3544 p->output_video_resolution = HDMI_VIDEO_1280x720p3d_50Hz;
3545 break;
3546 }
3547 case HDMI_VIDEO_1920x1080p3d_24Hz:
3548 {
3549 fg3DFrame = TRUE;
3550 clk_pol = HDMI_POLARITY_FALLING;
3551 de_pol = HDMI_POLARITY_RISING;
3552 hsync_pol = HDMI_POLARITY_FALLING;
3553 vsync_pol = HDMI_POLARITY_FALLING;
3554
3555
3556 dpi_clk_div = 2;
3557
3558 hsync_pulse_width = 44;
3559 hsync_back_porch = 148;
3560 hsync_front_porch = 638;
3561
3562 vsync_pulse_width = 5;
3563 vsync_back_porch = 36;
3564 vsync_front_porch = 4;
3565
3566 p->hdmi_width = 1920;
3567 p->hdmi_height = 1080;
3568 p->output_video_resolution = HDMI_VIDEO_1920x1080p3d_24Hz;
3569 break;
3570 }
3571 case HDMI_VIDEO_1920x1080p3d_23Hz:
3572 {
3573 fg3DFrame = TRUE;
3574 clk_pol = HDMI_POLARITY_FALLING;
3575 de_pol = HDMI_POLARITY_RISING;
3576 hsync_pol = HDMI_POLARITY_FALLING;
3577 vsync_pol = HDMI_POLARITY_FALLING;
3578
3579
3580 dpi_clk_div = 2;
3581
3582 hsync_pulse_width = 44;
3583 hsync_back_porch = 148;
3584 hsync_front_porch = 638;
3585
3586 vsync_pulse_width = 5;
3587 vsync_back_porch = 36;
3588 vsync_front_porch = 4;
3589
3590 p->hdmi_width = 1920;
3591 p->hdmi_height = 1080;
3592 p->output_video_resolution = HDMI_VIDEO_1920x1080p3d_23Hz;
3593 break;
3594 }
3595#endif
3596
3597 default:
3598 break;
3599 }
3600#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3601 hdmi_res = p->output_video_resolution;
3602#endif
3603}
3604
3605void MTK_HDMI_Set_Security_Output(int enable)
3606{
3607 return;
3608#if 0
3609 RETIF(!p->is_enabled, 0);
3610 RETIF(IS_HDMI_OFF(), 0);
3611
3612 if (enable)
3613 {
3614 if (hdmi_drv->get_state() == HDMI_STATE_ACTIVE)
3615 {
3616 hdmi_resume();
3617 msleep(1000);
3618 switch_set_state(&hdmi_switch_data, HDMI_STATE_ACTIVE);
3619 }
3620 }
3621 else
3622 {
3623 if (hdmi_drv->get_state() == HDMI_STATE_ACTIVE)
3624 {
3625 hdmi_suspend();
3626 switch_set_state(&hdmi_switch_data, HDMI_STATE_NO_DEVICE);
3627 switch_set_state(&hdmires_switch_data, 0);
3628 }
3629 }
3630#endif
3631}
3632
3633static long hdmi_ioctl_ex(struct file *file, unsigned int cmd, unsigned long arg)
3634{
3635 void __user *argp = (void __user *)arg;
3636
3637 int r = 0;
3638 #if defined(MTK_MT8193_HDMI_SUPPORT)|| defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
3639 hdmi_device_write w_info;
3640#if (defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT) && defined(CONFIG_MTK_HDMI_HDCP_SUPPORT)&&defined(CONFIG_MTK_DRM_KEY_MNG_SUPPORT))
3641 hdmi_hdcp_drmkey key;
3642#else
3643 hdmi_hdcp_key key;
3644#endif
3645 send_slt_data send_sltdata;
3646 CEC_SLT_DATA get_sltdata;
3647 hdmi_para_setting data_info;
3648 HDMI_EDID_INFO_T pv_get_info;
3649 CEC_FRAME_DESCRIPTION cec_frame;
3650 CEC_ADDRESS cecaddr;
3651 CEC_DRV_ADDR_CFG_T cecsetAddr;
3652 CEC_SEND_MSG_T cecsendframe;
3653 READ_REG_VALUE regval;
3654
3655#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
3656 CEC_USR_CMD_T cec_usr_cmd;
3657 CEC_ACK_INFO_T cec_tx_status;
3658#endif
3659 #endif
3660#ifdef CONFIG_MTK_INTERNAL_MHL_SUPPORT
3661 RW_VALUE stSpi;
3662 unsigned int addr,u4data;
3663 unsigned int tmp;
3664 stMhlCmd_st stMhlCmd;
3665 HDMI_EDID_INFO_T pv_get_info;
3666 unsigned char pdata[16];
3667 MHL_3D_INFO_T pv_3d_info;
3668 hdmi_para_setting data_info;
3669#if (defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT) && defined(CONFIG_MTK_HDMI_HDCP_SUPPORT)&&defined(CONFIG_MTK_DRM_KEY_MNG_SUPPORT))
3670 hdmi_hdcp_drmkey key;
3671#else
3672 hdmi_hdcp_key key;
3673#endif
3674
3675#endif
3676 #if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) || defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3677 HDMIDRV_AUDIO_PARA audio_para;
3678 #endif
3679 HDMI_LOG("[HDMI] hdmi ioctl= %s(%d), arg = %lu\n", _hdmi_ioctl_spy(cmd), cmd & 0xff, arg);
3680
3681 switch (cmd)
3682 {
3683 #if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT) ||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3684 case MTK_HDMI_AUDIO_SETTING:
3685 {
3686 if (copy_from_user(&audio_para, (void __user *)arg, sizeof(audio_para))) {
3687 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3688 r = -EFAULT;
3689 } else {
3690 if(down_interruptible(&hdmi_update_mutex))
3691 {
3692 HDMI_LOG("[HDMI] can't get semaphore in\n");
3693 return EAGAIN;
3694 }
3695 hdmi_drv->audiosetting(&audio_para);
3696 up(&hdmi_update_mutex);
3697 }
3698 break;
3699 }
3700 #endif
3701 #if defined(MTK_MT8193_HDMI_SUPPORT) || defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
3702 case MTK_HDMI_WRITE_DEV:
3703 {
3704 if (copy_from_user(&w_info, (void __user *)arg, sizeof(w_info))) {
3705 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3706 r = -EFAULT;
3707 } else {
3708 hdmi_drv->write(w_info.u4Addr, w_info.u4Data);
3709 }
3710 break;
3711 }
3712
3713 case MTK_HDMI_INFOFRAME_SETTING:
3714 {
3715 if (copy_from_user(&data_info, (void __user *)arg, sizeof(data_info))) {
3716 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3717 r = -EFAULT;
3718 } else {
3719 hdmi_drv->InfoframeSetting(data_info.u4Data1 & 0xFF, data_info.u4Data2 & 0xFF);
3720 }
3721 break;
3722 }
3723
3724 case MTK_HDMI_HDCP_KEY:
3725 {
3726 if (copy_from_user(&key, (void __user *)arg, sizeof(key))) {
3727 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3728 r = -EFAULT;
3729 } else {
3730 hdmi_drv->hdcpkey((UINT8*)&key);
3731 }
3732 break;
3733 }
3734
3735 case MTK_HDMI_SETLA:
3736 {
3737 if (copy_from_user(&cecsetAddr, (void __user *)arg, sizeof(cecsetAddr))) {
3738 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3739 r = -EFAULT;
3740 } else {
3741 hdmi_drv->setcecla(&cecsetAddr);
3742 }
3743 break;
3744 }
3745
3746 case MTK_HDMI_SENDSLTDATA:
3747 {
3748 if (copy_from_user(&send_sltdata, (void __user *)arg, sizeof(send_sltdata))) {
3749 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3750 r = -EFAULT;
3751 } else {
3752 hdmi_drv->sendsltdata((UINT8*)&send_sltdata);
3753 }
3754 break;
3755 }
3756
3757 case MTK_HDMI_SET_CECCMD:
3758 {
3759 if (copy_from_user(&cecsendframe, (void __user *)arg, sizeof(cecsendframe))) {
3760 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3761 r = -EFAULT;
3762 } else {
3763 hdmi_drv->setceccmd(&cecsendframe);
3764 }
3765 break;
3766 }
3767
3768 case MTK_HDMI_CEC_ENABLE:
3769 {
3770 hdmi_drv->cecenable(arg & 0xFF);
3771 break;
3772 }
3773
3774
3775 case MTK_HDMI_GET_EDID:
3776 {
3777 hdmi_drv->getedid(&pv_get_info);
3778 if (copy_to_user((void __user *)arg, &pv_get_info, sizeof(pv_get_info))) {
3779 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3780 r = -EFAULT;
3781 }
3782 break;
3783 }
3784
3785 case MTK_HDMI_GET_CECCMD:
3786 {
3787 hdmi_drv->getceccmd(&cec_frame);
3788 if (copy_to_user((void __user *)arg, &cec_frame, sizeof(cec_frame))) {
3789 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3790 r = -EFAULT;
3791 }
3792 break;
3793 }
3794
3795 case MTK_HDMI_GET_CECSTS:
3796 {
3797 hdmi_drv->getcectxstatus(&cec_tx_status);
3798 if (copy_to_user((void __user *)arg, &cec_tx_status, sizeof(CEC_ACK_INFO_T))) {
3799 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3800 r = -EFAULT;
3801 }
3802 break;
3803 }
3804
3805 case MTK_HDMI_CEC_USR_CMD:
3806 {
3807 if (copy_from_user(&cec_usr_cmd, (void __user *)arg, sizeof(CEC_USR_CMD_T))) {
3808 r = -EFAULT;
3809 } else {
3810 hdmi_drv->cecusrcmd(cec_usr_cmd.cmd,&(cec_usr_cmd.result));
3811 }
3812 if (copy_to_user((void __user *)arg, &cec_usr_cmd, sizeof(CEC_USR_CMD_T))) {
3813 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3814 r = -EFAULT;
3815 }
3816 break;
3817 }
3818
3819 case MTK_HDMI_GET_SLTDATA:
3820 {
3821 hdmi_drv->getsltdata(&get_sltdata);
3822 if (copy_to_user((void __user *)arg, &get_sltdata, sizeof(get_sltdata))) {
3823 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3824 r = -EFAULT;
3825 }
3826 break;
3827 }
3828
3829 case MTK_HDMI_GET_CECADDR:
3830 {
3831 hdmi_drv->getcecaddr(&cecaddr);
3832 if (copy_to_user((void __user *)arg, &cecaddr, sizeof(cecaddr))) {
3833 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3834 r = -EFAULT;
3835 }
3836 break;
3837 }
3838
3839 case MTK_HDMI_COLOR_DEEP:
3840 {
3841 if (copy_from_user(&data_info, (void __user *)arg, sizeof(data_info))) {
3842 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3843 r = -EFAULT;
3844 } else {
3845
3846 HDMI_LOG("MTK_HDMI_COLOR_DEEP: %d %d \n",data_info.u4Data1,data_info.u4Data2);
3847
3848 hdmi_drv->colordeep(data_info.u4Data1 & 0xFF, data_info.u4Data2 & 0xFF);
3849 }
3850 #if (defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT) || defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT))
3851 hdmi_colorspace = (unsigned char)data_info.u4Data1;
3852 DPI_CHECK_RET(HDMI_DPI(_Config_ColorSpace)(hdmi_colorspace, hdmi_res));
3853 #endif
3854 break;
3855 }
3856
3857 case MTK_HDMI_READ_DEV:
3858 {
3859 if (copy_from_user(&regval, (void __user *)arg, sizeof(regval))) {
3860 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3861 r = -EFAULT;
3862 } else {
3863 hdmi_drv->read(regval.u1adress, &regval.pu1Data);
3864 }
3865
3866 if (copy_to_user((void __user *)arg, &regval, sizeof(regval))) {
3867 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3868 r = -EFAULT;
3869 }
3870 break;
3871 }
3872
3873 case MTK_HDMI_ENABLE_LOG:
3874 {
3875 hdmi_drv->log_enable(arg & 0xFFFF);
3876 break;
3877 }
3878
3879 case MTK_HDMI_ENABLE_HDCP:
3880 {
3881 hdmi_drv->enablehdcp(arg & 0xFFFF);
3882 break;
3883 }
3884
3885 case MTK_HDMI_CECRX_MODE:
3886 {
3887 hdmi_drv->setcecrxmode(arg & 0xFFFF);
3888 break;
3889 }
3890
3891 case MTK_HDMI_STATUS:
3892 {
3893 hdmi_drv->hdmistatus();
3894 break;
3895 }
3896
3897 case MTK_HDMI_CHECK_EDID:
3898 {
3899 hdmi_drv->checkedid(arg & 0xFF);
3900 break;
3901 }
3902
3903 #elif defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
3904 case MTK_HDMI_READ:
3905 {
3906 if (copy_from_user(&stSpi, (void __user *)arg, sizeof(RW_VALUE))) {
3907 r = -EFAULT;
3908 } else {
3909 hdmi_drv->read(stSpi.u4Addr,&(stSpi.u4Data));
3910 }
3911 if (copy_to_user((void __user *)arg, &stSpi, sizeof(RW_VALUE))) {
3912 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3913 r = -EFAULT;
3914 }
3915 break;
3916 }
3917 case MTK_HDMI_WRITE:
3918 {
3919 if (copy_from_user(&stSpi, (void __user *)arg, sizeof(RW_VALUE))) {
3920 r = -EFAULT;
3921 } else {
3922 hdmi_drv->write(stSpi.u4Addr,stSpi.u4Data);
3923 }
3924 break;
3925 }
3926 case MTK_HDMI_DUMP:
3927 {
3928 if (copy_from_user(&stSpi, (void __user *)arg, sizeof(RW_VALUE))) {
3929 r = -EFAULT;
3930 } else {
3931 }
3932 break;
3933 }
3934 case MTK_HDMI_STATUS:
3935 {
3936 hdmi_drv->hdmistatus();
3937 break;
3938 }
3939 case MTK_HDMI_DUMP6397:
3940 {
3941 hdmi_drv->dump6397();
3942 break;
3943 }
3944 case MTK_HDMI_DUMP6397_W:
3945 {
3946 if (copy_from_user(&stSpi, (void __user *)arg, sizeof(RW_VALUE))) {
3947 r = -EFAULT;
3948 } else {
3949 hdmi_drv->write6397(stSpi.u4Addr,stSpi.u4Data);
3950 }
3951 break;
3952 }
3953 case MTK_HDMI_DUMP6397_R:
3954 {
3955 if (copy_from_user(&stSpi, (void __user *)arg, sizeof(RW_VALUE))) {
3956 r = -EFAULT;
3957 } else {
3958 hdmi_drv->read6397(stSpi.u4Addr,&(stSpi.u4Data));
3959 }
3960
3961 if (copy_to_user((void __user *)arg, &stSpi, sizeof(RW_VALUE))) {
3962 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
3963 r = -EFAULT;
3964 }
3965
3966 break;
3967 }
3968 case MTK_HDMI_CBUS_STATUS:
3969 {
3970 hdmi_drv->cbusstatus();
3971 break;
3972 }
3973 case MTK_HDMI_CMD:
3974 {
3975 printk("MTK_HDMI_CMD\n");
3976 if (copy_from_user(&stMhlCmd, (void __user *)arg, sizeof(stMhlCmd_st))) {
3977 printk("copy_from_user failed! line:%d \n", __LINE__);
3978 r = -EFAULT;
3979 }
3980 printk("[MHL]cmd=%x%x%x%x\n",stMhlCmd.u4Cmd,stMhlCmd.u4Para,stMhlCmd.u4Para1,stMhlCmd.u4Para2);
3981 hdmi_drv->mhl_cmd(stMhlCmd.u4Cmd,stMhlCmd.u4Para,stMhlCmd.u4Para1,stMhlCmd.u4Para2);
3982 break;
3983 }
3984 case MTK_HDMI_HDCP:
3985 {
3986 if (arg) {
3987 hdmi_drv->enablehdcp(3);
3988 }
3989 else
3990 {
3991 hdmi_drv->enablehdcp(0);
3992 }
3993 break;
3994 }
3995 case MTK_HDMI_HDCP_KEY:
3996 {
3997 if (copy_from_user(&key, (void __user *)arg, sizeof(key))) {
3998 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
3999 r = -EFAULT;
4000 } else {
4001 hdmi_drv->hdcpkey((UINT8*)&key);
4002 }
4003 break;
4004 }
4005 case MTK_HDMI_CONNECT_STATUS:
4006 {
4007 tmp = hdmi_drv->get_state();
4008 if (copy_to_user((void __user *)arg, &tmp, sizeof(unsigned int))) {
4009 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
4010 r = -EFAULT;
4011 }
4012 break;
4013 }
4014 case MTK_HDMI_GET_EDID:
4015 {
4016 hdmi_drv->getedid(&pv_get_info);
4017 if (copy_to_user((void __user *)arg, &pv_get_info, sizeof(pv_get_info))) {
4018 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
4019 r = -EFAULT;
4020 }
4021 break;
4022 }
4023 case MTK_MHL_GET_DCAP:
4024 {
4025 hdmi_drv->getdcapdata(pdata);
4026 if (copy_to_user((void __user *)arg, pdata, sizeof(pdata))) {
4027 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
4028 r = -EFAULT;
4029 }
4030 break;
4031 }
4032 case MTK_MHL_GET_3DINFO:
4033 {
4034 hdmi_drv->get3dinfo(&pv_3d_info);
4035 if (copy_to_user((void __user *)arg, &pv_3d_info, sizeof(pv_3d_info))) {
4036 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
4037 r = -EFAULT;
4038 }
4039 break;
4040 }
4041 case MTK_HDMI_COLOR_DEEP:
4042 {
4043 if (copy_from_user(&data_info, (void __user *)arg, sizeof(data_info))) {
4044 HDMI_LOG("copy_from_user failed! line:%d \n", __LINE__);
4045 r = -EFAULT;
4046 } else {
4047
4048 HDMI_LOG("MTK_HDMI_COLOR_DEEP: %d %d %d\n",data_info.u4Data1,data_info.u4Data2,hdmi_res);
4049
4050
4051 hdmi_colorspace = (unsigned char)(data_info.u4Data1 & 0xFF);
4052 if((hdmi_res == HDMI_VIDEO_1920x1080p_60Hz)
4053 ||(hdmi_res == HDMI_VIDEO_1920x1080p_50Hz)
4054 ||(hdmi_res == HDMI_VIDEO_1280x720p3d_60Hz)
4055 ||(hdmi_res == HDMI_VIDEO_1280x720p3d_50Hz)
4056 ||(hdmi_res == HDMI_VIDEO_1920x1080p3d_24Hz)
4057 ||(hdmi_res == HDMI_VIDEO_1920x1080p3d_23Hz)
4058 )
4059 {
4060 hdmi_colorspace = HDMI_YCBCR_422;
4061 }
4062 hdmi_drv->colordeep(hdmi_colorspace);
4063 }
4064 DPI_CHECK_RET(HDMI_DPI(_Config_ColorSpace)(hdmi_colorspace, hdmi_res));
4065 break;
4066 }
4067 #endif
4068 case MTK_HDMI_AUDIO_VIDEO_ENABLE:
4069 {
4070 hdmi_video_buffer_info temp;
4071
4072 if (arg)
4073 {
4074 if(p->is_enabled)
4075 {
4076 HDMI_LOG("already enabled !\n");
4077 return 0;
4078 }
4079
4080 HDMI_CHECK_RET(hdmi_drv_init());
4081 if(hdmi_drv->enter) hdmi_drv->enter();
4082 hdmi_power_on();
4083 p->is_enabled = true;
4084 #ifdef CONFIG_MTK_INTERNAL_MHL_SUPPORT
4085 if(get_boot_mode() == FACTORY_BOOT)
4086 {
4087 for(tmp = 0;tmp < 60;tmp++)
4088 {
4089 msleep(100);
4090 if(IS_HDMI_ON())
4091 break;
4092 }
4093 }
4094 #endif
4095 HDMI_LOG("set hdmi to enable !\n");
4096
4097 }
4098 else
4099 {
4100 if (!p->is_enabled)
4101 {
4102 HDMI_LOG("already disabled !\n");
4103
4104 return 0;
4105 }
4106
4107 //when disable hdmi, HPD is disabled
4108 switch_set_state(&hdmi_switch_data, HDMI_STATE_NO_DEVICE);
4109
4110 //wait hdmi finish update
4111 if (down_interruptible(&hdmi_update_mutex))
4112 {
4113 printk("[hdmi][HDMI] can't get semaphore in %s()\n", __func__);
4114 return -EFAULT;
4115 }
4116
4117 hdmi_rdma_address_config(false, temp);
4118 up(&hdmi_update_mutex);
4119 hdmi_power_off();
4120
4121 //wait hdmi finish update
4122 if (down_interruptible(&hdmi_update_mutex))
4123 {
4124 printk("[hdmi][HDMI] can't get semaphore in %s()\n", __func__);
4125 return -EFAULT;
4126 }
4127
4128 HDMI_CHECK_RET(hdmi_drv_deinit());
4129 p->is_enabled = false;
4130 up(&hdmi_update_mutex);
4131
4132 if (hdmi_drv->exit)
4133 {
4134 hdmi_drv->exit();
4135 }
4136 }
4137
4138 break;
4139 }
4140
4141 case MTK_HDMI_FORCE_FULLSCREEN_ON:
4142 //case MTK_HDMI_FORCE_CLOSE:
4143 {
4144 RETIF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS, 0);
4145 RETIF(!p->is_enabled, 0);
4146 RETIF(IS_HDMI_OFF(), 0);
4147
4148 if (p->is_force_disable == true)
4149 {
4150 break;
4151 }
4152
4153 if (IS_HDMI_FAKE_PLUG_IN())
4154 {
4155 hdmi_suspend();
4156 switch_set_state(&hdmi_switch_data, HDMI_STATE_NO_DEVICE);
4157 switch_set_state(&hdmires_switch_data, 0);
4158 }
4159 else
4160 {
4161 if (hdmi_drv->get_state() == HDMI_STATE_ACTIVE)
4162 {
4163 hdmi_suspend();
4164 switch_set_state(&hdmi_switch_data, HDMI_STATE_NO_DEVICE);
4165 switch_set_state(&hdmires_switch_data, 0);
4166 }
4167 }
4168
4169 p->is_force_disable = true;
4170
4171 break;
4172 }
4173
4174 case MTK_HDMI_FORCE_FULLSCREEN_OFF:
4175 //case MTK_HDMI_FORCE_OPEN:
4176 {
4177 RETIF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS, 0);
4178 RETIF(!p->is_enabled, 0);
4179 RETIF(IS_HDMI_OFF(), 0);
4180
4181 if (p->is_force_disable == false)
4182 {
4183 break;
4184 }
4185
4186 if (IS_HDMI_FAKE_PLUG_IN())
4187 {
4188 hdmi_resume();
4189 msleep(1000);
4190 switch_set_state(&hdmi_switch_data, HDMI_STATE_ACTIVE);
4191 hdmi_reschange = HDMI_VIDEO_RESOLUTION_NUM;
4192 }
4193 else
4194 {
4195 if (hdmi_drv->get_state() == HDMI_STATE_ACTIVE)
4196 {
4197 hdmi_resume();
4198 msleep(1000);
4199 switch_set_state(&hdmi_switch_data, HDMI_STATE_ACTIVE);
4200 hdmi_reschange = HDMI_VIDEO_RESOLUTION_NUM;
4201 }
4202 }
4203
4204 p->is_force_disable = false;
4205
4206 break;
4207 }
4208
4209 /* Shutdown thread(No matter IPO), system suspend/resume will go this way... */
4210 case MTK_HDMI_POWER_ENABLE:
4211 {
4212 if(!p->is_enabled)
4213 {
4214 HDMI_LOG("HDMI not enabled yet!\n");
4215 }
4216
4217 RETIF(!p->is_enabled, 0);
4218
4219 if (arg)
4220 {
4221 if(otg_enable_status)
4222 {
4223 HDMI_LOG("HDMI otg_enable_status!\n");
4224 }
4225
4226 RETIF(otg_enable_status, 0);
4227 hdmi_power_on();
4228 }
4229 else
4230 {
4231 hdmi_power_off();
4232 switch_set_state(&hdmi_switch_data, HDMI_STATE_NO_DEVICE);
4233 }
4234
4235 break;
4236 }
4237
4238 case MTK_HDMI_USBOTG_STATUS:
4239 {
4240 HDMI_LOG("MTK_HDMI_USBOTG_STATUS, arg=%ld, enable %d\n", arg, p->is_enabled);
4241
4242 RETIF(!p->is_enabled, 0);
4243 RETIF((hdmi_params->cabletype != MHL_CABLE), 0);
4244
4245 if (arg)
4246 {
4247 otg_enable_status = true;
4248 }
4249 else
4250 {
4251 otg_enable_status = false;
4252 RETIF(p->is_force_disable, 0);
4253 hdmi_power_on();
4254
4255 }
4256
4257 break;
4258 }
4259
4260 case MTK_HDMI_AUDIO_ENABLE:
4261 {
4262 RETIF(!p->is_enabled, 0);
4263
4264 if (arg)
4265 {
4266 HDMI_CHECK_RET(hdmi_audio_enable(true));
4267 }
4268 else
4269 {
4270 HDMI_CHECK_RET(hdmi_audio_enable(false));
4271 }
4272
4273 break;
4274 }
4275
4276 case MTK_HDMI_VIDEO_ENABLE:
4277 {
4278 RETIF(!p->is_enabled, 0);
4279 break;
4280 }
4281
4282 case MTK_HDMI_VIDEO_CONFIG:
4283 {
4284 hdmi_video_buffer_info temp;
4285 int tmp = 0;
4286
4287 HDMI_LOG("video resolution configuration, arg=%ld, %ld\n", arg, hdmi_reschange);
4288
4289 if(!p->is_enabled)
4290 {
4291 HDMI_LOG(" hdmi not enabled,change resolution \n");
4292 }
4293 if(IS_HDMI_NOT_ON())
4294 {
4295 HDMI_LOG(" hdmi power state(%d) is not on,change resolution \n",atomic_read(&p->state));
4296 }
4297
4298 RETIF(!p->is_enabled, 0);
4299
4300 #if MTK_HDMI_MAIN_PATH
4301 /*if hdmi main path, force change resolution*/
4302
4303 #else
4304 RETIF(IS_HDMI_NOT_ON(), 0);
4305 #endif
4306
4307 if (hdmi_reschange == arg)
4308 {
4309 HDMI_LOG("hdmi_reschange=%ld\n", hdmi_reschange);
4310 break;
4311 }
4312
4313 hdmi_reschange = arg;
4314 #if MTK_HDMI_MAIN_PATH
4315 /*if hdmi main path, force change resolution*/
4316
4317 #else
4318 p->is_clock_on = false;
4319 #endif
4320
4321 atomic_set(&hdmi_rdma_update_event, 1);
4322 wake_up_interruptible(&hdmi_rdma_update_wq);
4323
4324 while (1)
4325 {
4326 if ((list_empty(&HDMI_Buffer_List)) || (tmp > 15))
4327 {
4328 if (tmp > 15)
4329 {
4330 HDMI_LOG(" Error HDMI_Buffer_List is not empty\n");
4331 }
4332
4333 break;
4334 }
4335 else
4336 {
4337 msleep(2);
4338 }
4339
4340 tmp++;
4341 }
4342
4343 if(!p->is_enabled)
4344 {
4345 HDMI_LOG(" hdmi not enabled,change resolution fail\n");
4346 }
4347 if(IS_HDMI_NOT_ON())
4348 {
4349 HDMI_LOG(" hdmi power state is not on,change resolution \n");
4350 }
4351
4352 RETIF(!p->is_enabled, 0);
4353
4354 #if MTK_HDMI_MAIN_PATH
4355 /*if hdmi main path, force change resolution*/
4356
4357 #else
4358 RETIF(IS_HDMI_NOT_ON(), 0);
4359 #endif
4360
4361 if (hdmi_bufferdump_on > 0)
4362 {
4363 MMProfileLogEx(HDMI_MMP_Events.HDMIState, MMProfileFlagStart, ResChange, arg);
4364 }
4365
4366 if (down_interruptible(&hdmi_update_mutex))
4367 {
4368 HDMI_LOG("[HDMI] can't get semaphore in\n");
4369 return -EFAULT;
4370 }
4371#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
4372 if((arg == HDMI_VIDEO_1920x1080p_60Hz)
4373 ||(arg == HDMI_VIDEO_1920x1080p_50Hz)
4374 ||(arg == HDMI_VIDEO_1280x720p3d_60Hz)
4375 ||(arg == HDMI_VIDEO_1280x720p3d_50Hz)
4376 ||(arg == HDMI_VIDEO_1920x1080p3d_24Hz)
4377 ||(arg == HDMI_VIDEO_1920x1080p3d_23Hz)
4378 )
4379 {
4380 hdmi_colorspace = HDMI_YCBCR_422;
4381 }
4382 else
4383 hdmi_colorspace = HDMI_RGB;
4384 hdmi_drv->colordeep(hdmi_colorspace);
4385#endif
4386
4387#if (defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)||defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT))
4388 if(hdmi_drv->tmdsonoff)
4389 {
4390 hdmi_mdelay(50);
4391 hdmi_drv->tmdsonoff(0);
4392 }
4393#endif
4394 hdmi_rdma_address_config(false, temp);
4395
4396 hdmi_config_pll(arg);
4397 dpi_setting_res((u8)arg);
4398 hdmi_video_config(p->output_video_resolution, HDMI_VIN_FORMAT_RGB888, HDMI_VOUT_FORMAT_RGB888);
4399
4400 {
4401 unsigned int rdma_idx = 1;
4402
4403 unsigned int line = p->hdmi_height * 4 / 5;
4404
4405 if((arg == HDMI_VIDEO_1920x1080i_60Hz)
4406 ||(arg == HDMI_VIDEO_1920x1080i_50Hz)
4407#if defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT)
4408 || (arg == HDMI_VIDEO_1920x1080i3d_sbs_60Hz)
4409 || (arg == HDMI_VIDEO_1920x1080i3d_sbs_50Hz)
4410#endif
4411 )
4412 {
4413 line /= 2;
4414 }
4415
4416 printk("[hdmi] set rdma1 target line %d,hdmi_height %d,res %ld\n",line,p->hdmi_height, arg);
4417 RDMASetTargetLine(rdma_idx, line);
4418 }
4419
4420 DPI_CHECK_RET(HDMI_DPI(_DisableClk)());
4421#if (!defined(CONFIG_MTK_INTERNAL_MHL_SUPPORT) && !defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT))
4422 DPI_CHECK_RET(HDMI_DPI(_ConfigHDMI)());
4423#endif
4424 hdmi_dpi_config_update();
4425 DPI_CHECK_RET(HDMI_DPI(_EnableClk)());
4426
4427 up(&hdmi_update_mutex);
4428
4429 #if MTK_HDMI_MAIN_PATH
4430 /*if hdmi main path, force change resolution*/
4431
4432 #else
4433 p->is_clock_on = true;
4434 #endif
4435
4436 if (factory_mode == false)
4437 {
4438 switch_set_state(&hdmires_switch_data, hdmi_reschange + 1);
4439 }
4440
4441 if (hdmi_bufferdump_on > 0)
4442 {
4443 MMProfileLogEx(HDMI_MMP_Events.HDMIState, MMProfileFlagEnd, ResChange, hdmi_reschange + 1);
4444 }
4445
4446 #if MTK_HDMI_MAIN_PATH
4447 {
4448 unsigned int disp_width = p->hdmi_width;
4449 unsigned int disp_height = p->hdmi_height;
4450
4451 unsigned int ovl_bg_color = 0x0;
4452 int mutexID = 0;
4453 disp_path_get_mutex_(mutexID);
4454
4455
4456 {
4457 unsigned int layer = 0;
4458 unsigned int src_pitch = disp_width*4; /*ovl format rgba*/
4459
4460 if(IS_INTERLACE_OUTPUT(arg))
4461 {
4462 src_pitch *= 2;
4463 }
4464 /*ovl config*/
4465 for(;layer<4;++layer)
4466 {
4467 OVLLayerSizeConfig(layer,disp_width,disp_height);
4468 OVLLayerSrcPitch(layer,src_pitch);
4469
4470 }
4471
4472 OVLROI(disp_width, disp_height,ovl_bg_color);// background B
4473
4474
4475 }
4476
4477 {
4478 unsigned int rdma_idx = 0;
4479
4480 unsigned int rdma_height = disp_height;
4481
4482 if(IS_INTERLACE_OUTPUT(arg))
4483 {
4484 rdma_height /= 2;
4485 }
4486
4487
4488 RDMASetOutputFrameSize(rdma_idx, disp_width,rdma_height);
4489
4490
4491 }
4492
4493
4494
4495 disp_bls_init(disp_width, disp_height);
4496
4497 DpEngine_COLORonConfig(disp_width, disp_height);
4498
4499 disp_path_release_mutex_(mutexID);
4500
4501
4502 }
4503
4504 #endif
4505
4506 HDMI_LOG("video resolution (%ld) configuration done\n", hdmi_reschange + 1);
4507
4508 break;
4509 }
4510
4511 case MTK_HDMI_AUDIO_CONFIG:
4512 {
4513 RETIF(!p->is_enabled, 0);
4514
4515 break;
4516 }
4517
4518 case MTK_HDMI_IS_FORCE_AWAKE:
4519 {
4520 if (!hdmi_drv_init_context())
4521 {
4522 printk("[hdmi]%s, hdmi_drv_init_context fail\n", __func__);
4523 return HDMI_STATUS_NOT_IMPLEMENTED;
4524 }
4525
4526 HDMI_LOG(" MTK_HDMI_IS_FORCE_AWAKE,%d\n",hdmi_params->is_force_awake );
4527
4528
4529 r = copy_to_user(argp, &hdmi_params->is_force_awake, sizeof(hdmi_params->is_force_awake)) ? -EFAULT : 0;
4530 break;
4531 }
4532
4533#if 1
4534
4535 case MTK_HDMI_ENTER_VIDEO_MODE:
4536 {
4537 RETIF(!p->is_enabled, 0);
4538 RETIF(HDMI_OUTPUT_MODE_VIDEO_MODE != p->output_mode, 0);
4539 //FIXME
4540 break;
4541 }
4542
4543 case MTK_HDMI_REGISTER_VIDEO_BUFFER:
4544 {
4545#if 0
4546 struct hdmi_video_buffer_info video_buffer_info;
4547 RETIF(!p->is_enabled, 0);
4548 RETIF(HDMI_OUTPUT_MODE_VIDEO_MODE != p->output_mode, 0);
4549
4550 if (copy_from_user(&video_buffer_info, (void __user *)argp, sizeof(video_buffer_info)))
4551 {
4552 HDMI_LOG("copy_from_user failed! line\n");
4553 r = -EFAULT;
4554 break;
4555 }
4556
4557 if (video_buffer_info.src_vir_addr == 0)
4558 {
4559 HDMI_LOG("[Error]HDMI_REGISTER_VIDEO_BUFFER VA should not be NULL\n");
4560 break;
4561 }
4562
4563 if (down_interruptible(&hdmi_video_mode_mutex))
4564 {
4565 HDMI_LOG("[HDMI] can't get semaphore in\n");
4566 break;
4567 }
4568
4569 if (hdmi_add_video_buffer(&video_buffer_info, file) < 0)
4570 {
4571 r = -ENOMEM;
4572 }
4573
4574 up(&hdmi_video_mode_mutex);
4575#endif
4576 break;
4577
4578 }
4579
4580 case MTK_HDMI_POST_VIDEO_BUFFER:
4581 {
4582 hdmi_video_buffer_info video_buffer_info;
4583 hdmi_video_buffer_list *pBuffList = NULL;
4584 MMP_MetaDataBitmap_t Bitmap;
4585
4586 video_buffer_info.src_fmt = MTK_FB_FORMAT_ARGB8888;
4587 //bool first_post = false;
4588
4589 ///struct hdmi_video_buffer_list *buffer_list;
4590 if ((p->is_enabled == false) || (p->is_clock_on == false) || IS_HDMI_NOT_ON())
4591 {
4592 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, insert_Buffer_Err1, insert_Buffer_Err1);
4593 RETIF(!p->is_enabled, 0);
4594 RETIF(!p->is_clock_on, -1);
4595 RETIF(IS_HDMI_NOT_ON(), 0);
4596 }
4597
4598 if (copy_from_user(&video_buffer_info, (void __user *)argp, sizeof(video_buffer_info)))
4599 {
4600 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, insert_Buffer_Err2, insert_Buffer_Err2);
4601 HDMI_LOG("copy_from_user failed! line\n");
4602 r = -EFAULT;
4603 break;
4604 }
4605
4606 if (hdmi_bufferdump_on > 0)
4607 {
4608 MMProfileLogEx(HDMI_MMP_Events.BufferPost, MMProfileFlagStart, p->is_enabled, p->is_clock_on);
4609 }
4610
4611 DBG_OnTriggerHDMI();
4612#ifdef MTK_OVERLAY_ENGINE_SUPPORT
4613
4614 printk("POST Buffer Info: va:0x%p mva:0x%p fmt:0x%x, pitch:%d, ROI(%d,%d,%d,%d), "
4615 "nextidx:0x%x, ident:0x%x, connect:%d, sec:%d, fenceFd:0x%x\n",
4616 video_buffer_info.src_base_addr,
4617 video_buffer_info.src_phy_addr,
4618 video_buffer_info.src_fmt,
4619 video_buffer_info.src_pitch,
4620 video_buffer_info.src_offset_x,
4621 video_buffer_info.src_offset_y,
4622 video_buffer_info.src_width,
4623 video_buffer_info.src_height,
4624 video_buffer_info.next_buff_idx,
4625 video_buffer_info.identity,
4626 video_buffer_info.connected_type,
4627 video_buffer_info.security,
4628 video_buffer_info.fenceFd);
4629
4630 if(p->is_clock_on)
4631 {
4632 pBuffList = kmalloc(sizeof(hdmi_video_buffer_list), GFP_KERNEL);
4633 memset(pBuffList, 0 , sizeof(hdmi_video_buffer_list));//THE BUG REASON???
4634 spin_lock_bh(&hdmi_lock);
4635 pBuffList->buf_state = insert_new;
4636 pBuffList->fence = NULL;
4637 memcpy(&pBuffList->buffer_info, &video_buffer_info, sizeof(video_buffer_info));
4638 if (pBuffList->buffer_info.fenceFd >= 0)
4639 pBuffList->fence = sync_fence_fdget(pBuffList->buffer_info.fenceFd);
4640
4641 // for debug -- colorbar
4642 if(g_hdmi_pattern == 1)
4643 {
4644 pBuffList->buffer_info.src_phy_addr = hdmi_pattern_mva;
4645 }
4646 // for debug -- svp colorbar
4647 else if (g_hdmi_pattern == 2)
4648 {
4649 pBuffList->buffer_info.src_phy_addr = hdmi_pattern_mva_sec;
4650 pBuffList->buffer_info.security = 1;
4651 }
4652
4653 INIT_LIST_HEAD(&pBuffList->list);
4654 list_add_tail(&pBuffList->list, &HDMI_Buffer_List);
4655 spin_unlock_bh(&hdmi_lock);
4656 HDMI_LOG("[HDMI] ADD BUF[%d], secure = %d, addr = %X\n", addbuf++, video_buffer_info.security, (unsigned int)video_buffer_info.src_phy_addr);
4657
4658 if (dp_mutex_dst < 0) {
4659 atomic_set(&hdmi_rdma_config_event, 1);
4660 wake_up_interruptible(&hdmi_rdma_config_wq);
4661 }
4662
4663 if (hdmi_bufferdump_on >= 0x7)
4664 {
4665 MMP_MetaDataBitmap_t Bitmap;
4666 unsigned int mva_size, kernel_va, kernel_size;
4667
4668 mva_size = video_buffer_info.src_width*video_buffer_info.src_height*3;
4669 m4u_do_mva_map_kernel(video_buffer_info.src_phy_addr, mva_size, 0, &kernel_va, &kernel_size);
4670
4671 HDMI_LOG("video_buffer_info kernel_va: 0x%x kernel_size: 0x%x\n", kernel_va, kernel_size);
4672
4673 Bitmap.data1 = video_buffer_info.src_width;
4674 Bitmap.data2 = video_buffer_info.src_pitch;
4675 Bitmap.width = video_buffer_info.src_width;
4676 Bitmap.height = video_buffer_info.src_height;
4677 Bitmap.format = MMProfileBitmapRGB888;
4678 Bitmap.start_pos = 0;
4679 Bitmap.pitch = video_buffer_info.src_pitch * 3;
4680 Bitmap.data_size = kernel_size;
4681 Bitmap.down_sample_x = 10;
4682 Bitmap.down_sample_y = 10;
4683 Bitmap.pData = kernel_va;
4684 Bitmap.bpp = 24;
4685
4686 if (kernel_size != 0)
4687 MMProfileLogMetaBitmap(HDMI_MMP_Events.DDPKBitblt, MMProfileFlagPulse, &Bitmap);
4688
4689 m4u_do_mva_unmap_kernel(video_buffer_info.src_phy_addr, mva_size, kernel_va);
4690 }
4691
4692 }
4693 else
4694 {
4695 struct sync_fence *fence;
4696 if (video_buffer_info.fenceFd >= 0)
4697 {
4698 fence = sync_fence_fdget(video_buffer_info.fenceFd);
4699 sync_fence_put(pBuffList->fence);
4700 }
4701 }
4702#else
4703 spin_lock_bh(&hdmi_lock);
4704
4705 if (p->is_clock_on)
4706 {
4707#ifdef MTK_HDMI_ION_SUPPORT
4708 pBuffList = hdmi_query_buf_mva(video_buffer_info.next_buff_idx);
4709
4710 if (pBuffList)
4711 {
4712 memcpy(&(pBuffList->buffer_info), &video_buffer_info, sizeof(video_buffer_info));
4713
4714 if (pBuffList->hnd != 0)
4715 {
4716 if (video_buffer_info.src_phy_addr != NULL)
4717 {
4718 HDMI_LOG("Warning: ion enable, but phy is not null \n");
4719 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, Buff_ION_Err1, 1);
4720 }
4721 else
4722 {
4723 HDMI_LOG("ion disable, bufflist %x, vir %x, phy %x \n", (unsigned int)pBuffList, (unsigned int)video_buffer_info.src_base_addr, (unsigned int)video_buffer_info.src_phy_addr);
4724 }
4725
4726 video_buffer_info.src_phy_addr = (void *)pBuffList->mva;
4727 video_buffer_info.src_base_addr = (void *)pBuffList->va;
4728 pBuffList->buffer_info.src_phy_addr = (void *)pBuffList->mva;
4729 pBuffList->buffer_info.src_base_addr = (void *)pBuffList->va;
4730 }
4731 }
4732 else
4733 {
4734 spin_unlock_bh(&hdmi_lock);
4735 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, Buff_ION_Err1, 0);
4736 HDMI_LOG("Warning: buffer list no buffers! \n");
4737 r = -EFAULT;
4738 break;
4739 }
4740
4741#endif
4742 pBuffList->buf_state = insert_new;
4743 spin_unlock_bh(&hdmi_lock);
4744
4745 if (dp_mutex_dst <= 0)
4746 {
4747 atomic_set(&hdmi_rdma_config_event, 1);
4748 wake_up_interruptible(&hdmi_rdma_config_wq);
4749 }
4750
4751 if ((capture_screen == true) || (hdmi_bufferdump_on >= 0x7))
4752 {
4753 Bitmap.data1 = video_buffer_info.src_width;
4754 Bitmap.data2 = video_buffer_info.src_pitch;
4755 Bitmap.width = video_buffer_info.src_width;
4756 Bitmap.height = video_buffer_info.src_height;
4757 Bitmap.format = MMProfileBitmapBGRA8888;
4758 Bitmap.start_pos = (video_buffer_info.src_pitch - video_buffer_info.src_width) / 2 * 4;
4759 Bitmap.pitch = video_buffer_info.src_pitch * 4;
4760
4761 Bitmap.data_size = Bitmap.pitch * Bitmap.height;
4762 Bitmap.down_sample_x = 10;
4763 Bitmap.down_sample_y = 10;
4764 Bitmap.pData = video_buffer_info.src_base_addr;
4765 Bitmap.bpp = 32;
4766 }
4767
4768 if (hdmi_bufferdump_on >= 0x7)
4769 {
4770 MMProfileLogMetaBitmap(HDMI_MMP_Events.DDPKBitblt, MMProfileFlagPulse, &Bitmap);
4771 }
4772
4773 if (capture_screen == true)
4774 {
4775 memcpy((void *)capture_addr, video_buffer_info.src_base_addr, Bitmap.data_size);
4776 capture_screen = false;
4777 }
4778 }
4779 else
4780 {
4781 spin_unlock_bh(&hdmi_lock);
4782 }
4783#endif
4784
4785
4786#ifndef MTK_HDMI_FENCE_SUPPORT
4787 HDMI_LOG("wait hdmi_rdma_config_wq \n");
4788 wait_event_interruptible(hdmi_rdma_config_wq, atomic_read(&hdmi_rdma_config_event));
4789 atomic_set(&hdmi_rdma_config_event, 0);
4790#else
4791
4792 if (hdmi_bufferdump_on > 0)
4793 {
4794 MMProfileLogEx(HDMI_MMP_Events.BufferInsert, MMProfileFlagPulse, (unsigned int)pBuffList, video_buffer_info.next_buff_idx);
4795 }
4796
4797
4798 ///up(&hdmi_update_mutex);
4799 if (hdmi_bufferdump_on > 0)
4800 {
4801 if (pBuffList)
4802 {
4803 MMProfileLogEx(HDMI_MMP_Events.BufferPost, MMProfileFlagEnd, (unsigned int)pBuffList, (unsigned int)pBuffList->buffer_info.src_phy_addr);
4804 }
4805 else
4806 {
4807 MMProfileLogEx(HDMI_MMP_Events.BufferPost, MMProfileFlagEnd, (unsigned int)pBuffList, 0);
4808 }
4809 }
4810
4811#endif
4812
4813 HDMI_LOG("MTK_HDMI_POST_VIDEO_BUFFER done\n");
4814 break;
4815 }
4816
4817 case MTK_HDMI_LEAVE_VIDEO_MODE:
4818 {
4819 RETIF(!p->is_enabled, 0);
4820 break;
4821 }
4822
4823#endif
4824
4825 case MTK_HDMI_FACTORY_MODE_ENABLE:
4826 {
4827 if (hdmi_drv->power_on())
4828 {
4829 r = -EAGAIN;
4830 HDMI_LOG("Error factory mode test fail\n");
4831 }
4832 else
4833 {
4834 HDMI_LOG("before power off\n");
4835 hdmi_drv->power_off();
4836 HDMI_LOG("after power off\n");
4837 }
4838
4839 break;
4840 }
4841
4842 case MTK_HDMI_FACTORY_GET_STATUS:
4843 {
4844 bool hdmi_status = false;
4845
4846 if (p->is_clock_on == true)
4847 {
4848 hdmi_status = true;
4849 }
4850
4851 HDMI_LOG("MTK_HDMI_FACTORY_GET_STATUS is %d \n", p->is_clock_on);
4852
4853 if (copy_to_user((void __user *)arg, &hdmi_status, sizeof(hdmi_status)))
4854 {
4855 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
4856 r = -EFAULT;
4857 }
4858
4859 break;
4860 }
4861
4862 case MTK_HDMI_FACTORY_DPI_TEST:
4863 {
4864#if 1
4865
4866 if (down_interruptible(&hdmi_update_mutex))
4867 {
4868 HDMI_LOG("[HDMI] can't get semaphore in\n");
4869 return EAGAIN;
4870 }
4871
4872 hdmi_dpi_config_update();
4873 // for build error, by mtk40021
4874 //DPI_CHECK_RET(HDMI_DPI(_ConfigDualEdge(true)));
4875 //DPI_CHECK_RET(HDMI_DPI(_ConfigPixelClk(DPI_POLARITY_FALLING, 0, 0)));
4876
4877 // for build error, by mtk40021
4878 DPI_CHECK_RET(HDMI_DPI(_EnableColorBar()));
4879 //*(volatile unsigned int *)0xf4014f00 = 0x00000041;
4880 DPI_CHECK_RET(HDMI_DPI(_EnableClk()));
4881 DPI_CHECK_RET(HDMI_DPI(_DumpRegisters()));
4882
4883 up(&hdmi_update_mutex);
4884#endif
4885 break;
4886 }
4887
4888 case MTK_HDMI_GET_DEV_INFO:
4889 {
4890 int displayid = 0;
4891 mtk_dispif_info_t hdmi_info;
4892
4893 if (hdmi_bufferdump_on > 0)
4894 {
4895 MMProfileLogEx(HDMI_MMP_Events.GetDevInfo, MMProfileFlagStart, p->is_enabled, p->is_clock_on);
4896 }
4897
4898 HDMI_LOG("DEV_INFO configuration get + \n");
4899
4900 if (copy_from_user(&displayid, (void __user *)arg, sizeof(displayid)))
4901 {
4902 if (hdmi_bufferdump_on > 0)
4903 {
4904 MMProfileLogEx(HDMI_MMP_Events.GetDevInfo, MMProfileFlagEnd, 0xff, 0xff1);
4905 }
4906
4907 HDMI_LOG(": copy_from_user failed! line:%d \n", __LINE__);
4908 return -EAGAIN;
4909 }
4910
4911 if (displayid != MTKFB_DISPIF_HDMI)
4912 {
4913 if (hdmi_bufferdump_on > 0)
4914 {
4915 MMProfileLogEx(HDMI_MMP_Events.GetDevInfo, MMProfileFlagPulse, 0xff, 0xff2);
4916 }
4917
4918 HDMI_LOG(": invalid display id:%d \n", displayid);
4919 ///return -EAGAIN;
4920 }
4921
4922 memset(&hdmi_info, 0, sizeof(hdmi_info));
4923 hdmi_info.displayFormat = DISPIF_FORMAT_RGB888;
4924 hdmi_info.displayHeight = p->hdmi_height;
4925 hdmi_info.displayWidth = p->hdmi_width;
4926 hdmi_info.display_id = displayid;
4927 hdmi_info.isConnected = 1;
4928 hdmi_info.displayMode = DISPIF_MODE_COMMAND;
4929
4930 if (hdmi_params->cabletype == MHL_SMB_CABLE)
4931 {
4932 hdmi_info.displayType = HDMI_SMARTBOOK;
4933 }
4934 else if (hdmi_params->cabletype == MHL_CABLE)
4935 {
4936 hdmi_info.displayType = MHL;
4937 }
4938 else
4939 {
4940 hdmi_info.displayType = HDMI;
4941 }
4942
4943 hdmi_info.isHwVsyncAvailable = 1;
4944 hdmi_info.vsyncFPS = 60;
4945
4946 if (copy_to_user((void __user *)arg, &hdmi_info, sizeof(hdmi_info)))
4947 {
4948 if (hdmi_bufferdump_on > 0)
4949 {
4950 MMProfileLogEx(HDMI_MMP_Events.GetDevInfo, MMProfileFlagEnd, 0xff, 0xff2);
4951 }
4952
4953 HDMI_LOG("copy_to_user failed! line:%d \n", __LINE__);
4954 r = -EFAULT;
4955 }
4956
4957 if (hdmi_bufferdump_on > 0)
4958 {
4959 MMProfileLogEx(HDMI_MMP_Events.GetDevInfo, MMProfileFlagEnd, p->is_enabled, hdmi_info.displayType);
4960 }
4961
4962 HDMI_LOG("DEV_INFO configuration get displayType-%d \n", hdmi_info.displayType);
4963
4964 break;
4965 }
4966
4967 case MTK_HDMI_PREPARE_BUFFER:
4968 {
4969 hdmi_buffer_info hdmi_buffer;
4970#ifndef MTK_OVERLAY_ENGINE_SUPPORT
4971 struct ion_handle *handle = NULL;
4972 hdmi_video_buffer_list *pBuffList = NULL;
4973 unsigned int mva = 0x0;
4974 unsigned int va = 0x0;
4975#endif
4976
4977#ifdef MTK_HDMI_FENCE_SUPPORT
4978 struct fence_data data;
4979
4980 if (hdmi_bufferdump_on > 0)
4981 {
4982 MMProfileLogEx(HDMI_MMP_Events.FenceCreate, MMProfileFlagStart, 0, 0);
4983 }
4984
4985 if (copy_from_user(&hdmi_buffer, (void __user *)arg, sizeof(hdmi_buffer)))
4986 {
4987 printk("[HDMI]: copy_from_user failed! line:%d \n", __LINE__);
4988 r = -EFAULT;
4989 break;
4990 }
4991
4992 if (down_interruptible(&hdmi_update_mutex))
4993 {
4994 MMProfileLogEx(HDMI_MMP_Events.MutexErr, MMProfileFlagPulse, Mutex_Err2, Mutex_Err2);
4995 HDMI_LOG("[HDMI] Warning can't get semaphore in\n");
4996 r = -EFAULT;
4997 break;
4998 }
4999
5000 hdmi_buffer.fence_fd = MTK_HDMI_NO_FENCE_FD;
5001
5002 if (p->is_clock_on)
5003 {
5004 data = hdmi_create_fence();
5005#ifdef MTK_OVERLAY_ENGINE_SUPPORT
5006 hdmi_buffer.fence_fd = data.fence;
5007 hdmi_buffer.index = data.value;
5008#else
5009 pBuffList = kmalloc(sizeof(hdmi_video_buffer_list), GFP_KERNEL);
5010 memset(pBuffList, 0 , sizeof(hdmi_video_buffer_list));
5011#ifdef MTK_HDMI_ION_SUPPORT
5012 if (!ion_client)
5013 {
5014 hdmi_ion_init();
5015
5016 if (!ion_client)
5017 {
5018 HDMI_LOG(": get ion_client fail (0x%x)\n", (unsigned int)ion_client);
5019 r = -EFAULT;
5020 up(&hdmi_update_mutex);
5021 break;
5022 }
5023 }
5024 handle = hdmi_ion_import_handle(ion_client, hdmi_buffer.ion_fd);
5025 hdmi_ion_phys_mmu_addr(ion_client, handle, &mva);
5026 va = (unsigned int)ion_map_kernel(ion_client, handle);
5027#endif
5028 spin_lock_bh(&hdmi_lock);
5029 pBuffList->buf_state = create_new;
5030 pBuffList->fence = data.fence;
5031 pBuffList->idx = data.value;
5032 pBuffList->hnd = handle;
5033 pBuffList->mva = mva;
5034 pBuffList->va = va;
5035 hdmi_buffer.fence_fd = data.fence;
5036 hdmi_buffer.index = data.value;
5037 INIT_LIST_HEAD(&pBuffList->list);
5038 list_add_tail(&pBuffList->list, &HDMI_Buffer_List);
5039 spin_unlock_bh(&hdmi_lock);
5040 HDMI_LOG(": add list :%x, index %d, fd %d\n", (unsigned int)pBuffList, pBuffList->idx, pBuffList->fence);
5041#endif
5042 }
5043 else
5044 {
5045 HDMI_LOG(" : Error in hdmi_create_fence when is_clock_on is off\n");
5046 MMProfileLogEx(HDMI_MMP_Events.ErrorInfo, MMProfileFlagPulse, Fence_Err, 0);
5047 }
5048
5049 up(&hdmi_update_mutex);
5050
5051 if (copy_to_user((void __user *)arg, &hdmi_buffer, sizeof(hdmi_buffer)))
5052 {
5053 HDMI_LOG(": copy_to_user error! line:%d \n", __LINE__);
5054 r = -EFAULT;
5055 }
5056
5057#ifndef MTK_OVERLAY_ENGINE_SUPPORT
5058 if (hdmi_bufferdump_on > 0)
5059 {
5060 MMProfileLogEx(HDMI_MMP_Events.FenceCreate, MMProfileFlagEnd, hdmi_buffer.fence_fd, (unsigned int)pBuffList);
5061 }
5062#endif
5063
5064#endif
5065 break;
5066 }
5067
5068 case MTK_HDMI_SCREEN_CAPTURE:
5069 {
5070 int capture_wait_times = 0;
5071 capture_screen = true;
5072
5073 if (copy_from_user(&capture_addr, (void __user *)arg, sizeof(capture_addr)))
5074 {
5075 HDMI_LOG(": copy_to_user failed! line:%d \n", __LINE__);
5076 r = -EFAULT;
5077 }
5078
5079 while (capture_wait_times < 3)
5080 {
5081 msleep(20);
5082 capture_wait_times++;
5083
5084 if (capture_screen == false)
5085 {
5086 break;
5087 }
5088 }
5089
5090 if (capture_screen == true)
5091 {
5092 HDMI_LOG("capture scree fail,is_enabled(%d), wait_times(%d)\n", p->is_clock_on, capture_wait_times);
5093 }
5094 else
5095 {
5096 HDMI_LOG("screen_capture done,is_enabled(%d), wait_times(%d)\n", p->is_clock_on, capture_wait_times);
5097 }
5098
5099 capture_screen = false;
5100 break;
5101 }
5102
5103 default:
5104 {
5105 HDMI_LOG("[hdmi][HDMI] arguments error %x, %x\n", MTK_HDMI_GET_DEV_INFO, cmd);
5106 break;
5107 }
5108 }
5109
5110 return r;
5111}
5112
5113long hdmi_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5114{
5115 long r;
5116 bool fg_need_sync = false;
5117
5118 switch(cmd)
5119 {
5120 case MTK_HDMI_AUDIO_VIDEO_ENABLE:
5121 case MTK_HDMI_POWER_ENABLE:
5122 case MTK_HDMI_VIDEO_CONFIG:
5123 case MTK_HDMI_POST_VIDEO_BUFFER:
5124 case MTK_HDMI_PREPARE_BUFFER:
5125 fg_need_sync = true;
5126 break;
5127 }
5128
5129 if (fg_need_sync)
5130 {
5131 if (down_interruptible(&hdmi_ioctl_mutex))
5132 {
5133 printk("[HDMI]warning: down err\n!");
5134 }
5135 }
5136
5137 r = hdmi_ioctl_ex(file, cmd, arg);
5138
5139 if (fg_need_sync)
5140 {
5141 up(&hdmi_ioctl_mutex);
5142 }
5143
5144 return r;
5145}
5146
5147
5148static int hdmi_remove(struct platform_device *pdev)
5149{
5150 return 0;
5151}
5152
5153static BOOL hdmi_drv_init_context(void)
5154{
5155 static const HDMI_UTIL_FUNCS hdmi_utils =
5156 {
5157 .udelay = hdmi_udelay,
5158 .mdelay = hdmi_mdelay,
5159 .state_callback = hdmi_state_callback,
5160 #if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
5161 .cec_state_callback = hdmi_cec_state_callback,
5162 #endif
5163 };
5164
5165 if (hdmi_drv != NULL)
5166 {
5167 return TRUE;
5168 }
5169
5170
5171 hdmi_drv = (HDMI_DRIVER *)HDMI_GetDriver();
5172
5173 if (NULL == hdmi_drv)
5174 {
5175 return FALSE;
5176 }
5177
5178 hdmi_drv->set_util_funcs(&hdmi_utils);
5179 hdmi_drv->get_params(hdmi_params);
5180
5181 return TRUE;
5182}
5183
5184static void __exit hdmi_exit(void)
5185{
5186
5187#ifdef MTK_HDMI_FENCE_SUPPORT
5188 hdmi_sync_destroy();
5189#endif
5190 device_destroy(hdmi_class, hdmi_devno);
5191 class_destroy(hdmi_class);
5192 cdev_del(hdmi_cdev);
5193 unregister_chrdev_region(hdmi_devno, 1);
5194
5195}
5196
5197struct file_operations hdmi_fops =
5198{
5199 .owner = THIS_MODULE,
5200 .unlocked_ioctl = hdmi_ioctl,
5201 .open = hdmi_open,
5202 .release = hdmi_release,
5203};
5204
5205static int hdmi_probe(struct platform_device *pdev)
5206{
5207 int ret = 0;
5208 struct class_device *class_dev = NULL;
5209
5210 printk("[hdmi]%s\n", __func__);
5211
5212 /* Allocate device number for hdmi driver */
5213 ret = alloc_chrdev_region(&hdmi_devno, 0, 1, HDMI_DEVNAME);
5214
5215 if (ret)
5216 {
5217 printk("[hdmi]alloc_chrdev_region fail\n");
5218 return -1;
5219 }
5220
5221 /* For character driver register to system, device number binded to file operations */
5222 hdmi_cdev = cdev_alloc();
5223 hdmi_cdev->owner = THIS_MODULE;
5224 hdmi_cdev->ops = &hdmi_fops;
5225 ret = cdev_add(hdmi_cdev, hdmi_devno, 1);
5226
5227 /* For device number binded to device name(hdmitx), one class is corresponeded to one node */
5228 hdmi_class = class_create(THIS_MODULE, HDMI_DEVNAME);
5229 /* mknod /dev/hdmitx */
5230 class_dev = (struct class_device *)device_create(hdmi_class, NULL, hdmi_devno, NULL, HDMI_DEVNAME);
5231
5232 printk("[hdmi][%s] current=0x%08x\n", __func__, (unsigned int)current);
5233
5234 if (!hdmi_drv_init_context())
5235 {
5236 printk("[hdmi]%s, hdmi_drv_init_context fail\n", __func__);
5237 return HDMI_STATUS_NOT_IMPLEMENTED;
5238 }
5239
5240 init_waitqueue_head(&hdmi_video_mode_wq);
5241 INIT_LIST_HEAD(&hdmi_video_mode_buffer_list);
5242
5243 init_waitqueue_head(&hdmi_rdma_config_wq);
5244 init_waitqueue_head(&hdmi_rdma_update_wq);
5245 init_waitqueue_head(&reg_update_wq);
5246 init_waitqueue_head(&dst_reg_update_wq);
5247
5248 init_waitqueue_head(&hdmi_vsync_wq);
5249
5250#ifdef MTK_SMARTBOOK_SUPPORT
5251 init_waitqueue_head(&hdmi_status_update_wq);
5252#endif
5253 return 0;
5254}
5255
5256#ifdef CONFIG_PM
5257
5258int hdmi_pm_suspend(struct device *device)
5259{
5260 HDMI_LOG("[hdmi] %s\n", __FUNCTION__);
5261
5262 return 0;
5263}
5264
5265int hdmi_pm_resume(struct device *device)
5266{
5267 HDMI_LOG("[hdmi] %s\n", __FUNCTION__);
5268
5269 return 0;
5270}
5271
5272int hdmi_pm_restore_noirq(struct device *dev)
5273{
5274 HDMI_LOG("[hdmi] %s\n", __FUNCTION__);
5275
5276 hdmi_drv_pm_restore_noirq(dev);
5277 hdmi_module_init();
5278
5279 return 0;
5280}
5281
5282struct dev_pm_ops hdmi_pm_ops =
5283{
5284 .suspend = hdmi_pm_suspend,
5285 .resume = hdmi_pm_resume,
5286 .freeze = hdmi_pm_suspend,
5287 .thaw = hdmi_pm_resume,
5288 .poweroff = hdmi_pm_suspend,
5289 .restore = hdmi_pm_resume,
5290 .restore_noirq = hdmi_pm_restore_noirq
5291};
5292#endif
5293
5294#ifdef CONFIG_HAS_EARLYSUSPEND
5295static void hdmi_early_suspend(struct early_suspend *h)
5296{
5297 printk(" hdmi_early_suspend \n");
5298 hdmi_ioctl(NULL,MTK_HDMI_POWER_ENABLE,0);
5299}
5300
5301static void hdmi_late_resume(struct early_suspend *h)
5302{
5303 printk(" hdmi_late_resume\n");
5304 hdmi_ioctl(NULL,MTK_HDMI_POWER_ENABLE,1);
5305}
5306
5307static struct early_suspend hdmi_early_suspend_handler =
5308{
5309 .level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN +1 ,
5310 .suspend = hdmi_early_suspend,
5311 .resume = hdmi_late_resume,
5312};
5313#endif
5314
5315static struct platform_driver hdmi_driver =
5316{
5317 .probe = hdmi_probe,
5318 .remove = hdmi_remove,
5319 .driver = {
5320 .name = HDMI_DEVNAME,
5321#ifdef CONFIG_PM
5322 .pm = &hdmi_pm_ops,
5323#endif
5324 }
5325};
5326
5327static int __init hdmi_init(void)
5328{
5329 int ret = 0;
5330 int tmp_boot_mode;
4b9e9796 5331
6fa3eb70 5332 printk("[hdmi]%s\n", __func__);
4b9e9796 5333
6fa3eb70
S		 5334 if (platform_driver_register(&hdmi_driver))
5335 {
5336 printk("[hdmi]failed to register hdmitx driver\n");
5337 return -1;
5338 }
5339
5340 memset((void *)&hdmi_context, 0, sizeof(_t_hdmi_context));
5341
5342#if MTK_HDMI_MAIN_PATH
5343#else
5344
5345 SET_HDMI_OFF();
5346 HDMI_LOG("hdmi set power state(%d) off\n",atomic_read(&p->state));
5347
5348#endif
5349
5350 //init_hdmi_mmp_events();
5351
5352 if (!hdmi_drv_init_context())
5353 {
5354 printk("[hdmi]%s, hdmi_drv_init_context fail\n", __func__);
5355 return HDMI_STATUS_NOT_IMPLEMENTED;
5356 }
5357
5358 p->output_mode = hdmi_params->output_mode;
5359 p->orientation = 0;
5360 hdmi_drv->init();
5361 HDMI_LOG("Output mode is %s\n", (hdmi_params->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS) ? "HDMI_OUTPUT_MODE_DPI_BYPASS" : "HDMI_OUTPUT_MODE_LCD_MIRROR");
5362
5363 if (hdmi_params->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS)
5364 {
5365 p->output_video_resolution = HDMI_VIDEO_RESOLUTION_NUM;
5366 }
5367
5368 HDMI_DBG_Init();
5369
5370 hdmi_switch_data.name = "hdmi";
5371 hdmi_switch_data.index = 0;
5372 hdmi_switch_data.state = NO_DEVICE;
5373
5374 // for support hdmi hotplug, inform AP the event
5375 ret = switch_dev_register(&hdmi_switch_data);
5376
5377#if defined(CONFIG_MTK_INTERNAL_HDMI_SUPPORT)
5378 hdmi_cec_switch_data.name = "cec_hdmi";
5379 hdmi_cec_switch_data.index = 0;
5380 hdmi_cec_switch_data.state = 0;
5381 ret = switch_dev_register(&hdmi_cec_switch_data);
5382#endif
5383
5384 hdmires_switch_data.name = "res_hdmi";
5385 hdmires_switch_data.index = 0;
5386 hdmires_switch_data.state = 0;
5387
5388 // for support hdmi hotplug, inform AP the event
5389 ret = switch_dev_register(&hdmires_switch_data);
5390
5391 if (ret)
5392 {
5393 printk("[hdmi][HDMI]switch_dev_register returned:%d!\n", ret);
5394 return 1;
5395 }
5396
5397#ifdef MTK_HDMI_FENCE_SUPPORT
5398 hdmi_sync_init();
5399 INIT_LIST_HEAD(&HDMI_Buffer_List);
5400#endif
5401 tmp_boot_mode = get_boot_mode();
5402
5403 if ((tmp_boot_mode == FACTORY_BOOT) || (tmp_boot_mode == ATE_FACTORY_BOOT))
5404 {
5405 factory_mode = true;
5406 }
5407
5408#ifdef CONFIG_HAS_EARLYSUSPEND
5409 register_early_suspend(&hdmi_early_suspend_handler);
5410#endif
5411
5412 return 0;
5413}
5414
5415module_init(hdmi_init);
5416module_exit(hdmi_exit);
5417MODULE_AUTHOR("Xuecheng, Zhang <xuecheng.zhang@mediatek.com>");
5418MODULE_DESCRIPTION("HDMI Driver");
5419MODULE_LICENSE("GPL");
5420
5421#endif
kernel source for telekom puls (alcatel/mediatek)