[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / mfd / omap-usb-tll.c

/**
 * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
 * Author: Keshava Munegowda <keshava_mgowda@ti.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2  of
 * the License as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/pm_runtime.h>
#include <linux/platform_data/usb-omap.h>

#define USBTLL_DRIVER_NAME	"usbhs_tll"

/* TLL Register Set */
#define	OMAP_USBTLL_REVISION				(0x00)
#define	OMAP_USBTLL_SYSCONFIG				(0x10)
#define	OMAP_USBTLL_SYSCONFIG_CACTIVITY			(1 << 8)
#define	OMAP_USBTLL_SYSCONFIG_SIDLEMODE			(1 << 3)
#define	OMAP_USBTLL_SYSCONFIG_ENAWAKEUP			(1 << 2)
#define	OMAP_USBTLL_SYSCONFIG_SOFTRESET			(1 << 1)
#define	OMAP_USBTLL_SYSCONFIG_AUTOIDLE			(1 << 0)

#define	OMAP_USBTLL_SYSSTATUS				(0x14)
#define	OMAP_USBTLL_SYSSTATUS_RESETDONE			(1 << 0)

#define	OMAP_USBTLL_IRQSTATUS				(0x18)
#define	OMAP_USBTLL_IRQENABLE				(0x1C)

#define	OMAP_TLL_SHARED_CONF				(0x30)
#define	OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN		(1 << 6)
#define	OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN		(1 << 5)
#define	OMAP_TLL_SHARED_CONF_USB_DIVRATION		(1 << 2)
#define	OMAP_TLL_SHARED_CONF_FCLK_REQ			(1 << 1)
#define	OMAP_TLL_SHARED_CONF_FCLK_IS_ON			(1 << 0)

#define	OMAP_TLL_CHANNEL_CONF(num)			(0x040 + 0x004 * num)
#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT		24
#define	OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF		(1 << 11)
#define	OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE		(1 << 10)
#define	OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE		(1 << 9)
#define	OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE		(1 << 8)
#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS		(1 << 1)
#define	OMAP_TLL_CHANNEL_CONF_CHANEN			(1 << 0)

#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0		0x0
#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM		0x1
#define OMAP_TLL_FSLSMODE_3PIN_PHY			0x2
#define OMAP_TLL_FSLSMODE_4PIN_PHY			0x3
#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0		0x4
#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM		0x5
#define OMAP_TLL_FSLSMODE_3PIN_TLL			0x6
#define OMAP_TLL_FSLSMODE_4PIN_TLL			0x7
#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0		0xA
#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM		0xB

#define	OMAP_TLL_ULPI_FUNCTION_CTRL(num)		(0x804 + 0x100 * num)
#define	OMAP_TLL_ULPI_INTERFACE_CTRL(num)		(0x807 + 0x100 * num)
#define	OMAP_TLL_ULPI_OTG_CTRL(num)			(0x80A + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_EN_RISE(num)			(0x80D + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_EN_FALL(num)			(0x810 + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_STATUS(num)			(0x813 + 0x100 * num)
#define	OMAP_TLL_ULPI_INT_LATCH(num)			(0x814 + 0x100 * num)
#define	OMAP_TLL_ULPI_DEBUG(num)			(0x815 + 0x100 * num)
#define	OMAP_TLL_ULPI_SCRATCH_REGISTER(num)		(0x816 + 0x100 * num)

#define OMAP_REV2_TLL_CHANNEL_COUNT			2
#define OMAP_TLL_CHANNEL_COUNT				3
#define OMAP_TLL_CHANNEL_1_EN_MASK			(1 << 0)
#define OMAP_TLL_CHANNEL_2_EN_MASK			(1 << 1)
#define OMAP_TLL_CHANNEL_3_EN_MASK			(1 << 2)

/* Values of USBTLL_REVISION - Note: these are not given in the TRM */
#define OMAP_USBTLL_REV1		0x00000015	/* OMAP3 */
#define OMAP_USBTLL_REV2		0x00000018	/* OMAP 3630 */
#define OMAP_USBTLL_REV3		0x00000004	/* OMAP4 */

#define is_ehci_tll_mode(x)	(x == OMAP_EHCI_PORT_MODE_TLL)

/* only PHY and UNUSED modes don't need TLL */
#define omap_usb_mode_needs_tll(x)	((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
					 (x) != OMAP_EHCI_PORT_MODE_PHY)

struct usbtll_omap {
	int					nch;	/* num. of channels */
	struct usbhs_omap_platform_data		*pdata;
	struct clk				**ch_clk;
};

/*-------------------------------------------------------------------------*/

static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
static struct device	*tll_dev;
static DEFINE_SPINLOCK(tll_lock);	/* serialize access to tll_dev */

/*-------------------------------------------------------------------------*/

static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
{
	__raw_writel(val, base + reg);
}

static inline u32 usbtll_read(void __iomem *base, u32 reg)
{
	return __raw_readl(base + reg);
}

static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
{
	__raw_writeb(val, base + reg);
}

static inline u8 usbtll_readb(void __iomem *base, u8 reg)
{
	return __raw_readb(base + reg);
}

/*-------------------------------------------------------------------------*/

static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
{
	switch (pmode) {
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
		return true;

	default:
		return false;
	}
}

/*
 * convert the port-mode enum to a value we can use in the FSLSMODE
 * field of USBTLL_CHANNEL_CONF
 */
static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
{
	switch (mode) {
	case OMAP_USBHS_PORT_MODE_UNUSED:
	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;

	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_3PIN_PHY;

	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
		return OMAP_TLL_FSLSMODE_4PIN_PHY;

	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
		return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;

	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_3PIN_TLL;

	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
		return OMAP_TLL_FSLSMODE_4PIN_TLL;

	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
		return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;

	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
		return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
	default:
		pr_warn("Invalid port mode, using default\n");
		return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
	}
}

/**
 * usbtll_omap_probe - initialize TI-based HCDs
 *
 * Allocates basic resources for this USB host controller.
 */
static int usbtll_omap_probe(struct platform_device *pdev)
{
	struct device				*dev =  &pdev->dev;
	struct usbhs_omap_platform_data		*pdata = dev->platform_data;
	void __iomem				*base;
	struct resource				*res;
	struct usbtll_omap			*tll;
	unsigned				reg;
	int					ret = 0;
	int					i, ver;
	bool needs_tll;

	dev_dbg(dev, "starting TI HSUSB TLL Controller\n");

	tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
	if (!tll) {
		dev_err(dev, "Memory allocation failed\n");
		return -ENOMEM;
	}

	if (!pdata) {
		dev_err(dev, "Platform data missing\n");
		return -ENODEV;
	}

	tll->pdata = pdata;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	base = devm_request_and_ioremap(dev, res);
	if (!base) {
		ret = -EADDRNOTAVAIL;
		dev_err(dev, "Resource request/ioremap failed:%d\n", ret);
		return ret;
	}

	platform_set_drvdata(pdev, tll);
	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);

	ver =  usbtll_read(base, OMAP_USBTLL_REVISION);
	switch (ver) {
	case OMAP_USBTLL_REV1:
		tll->nch = OMAP_TLL_CHANNEL_COUNT;
		break;
	case OMAP_USBTLL_REV2:
	case OMAP_USBTLL_REV3:
		tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
		break;
	default:
		tll->nch = OMAP_TLL_CHANNEL_COUNT;
		dev_dbg(dev,
		 "USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
			ver, tll->nch);
		break;
	}

	tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk * [tll->nch]),
						GFP_KERNEL);
	if (!tll->ch_clk) {
		ret = -ENOMEM;
		dev_err(dev, "Couldn't allocate memory for channel clocks\n");
		goto err_clk_alloc;
	}

	for (i = 0; i < tll->nch; i++) {
		char clkname[] = "usb_tll_hs_usb_chx_clk";

		snprintf(clkname, sizeof(clkname),
					"usb_tll_hs_usb_ch%d_clk", i);
		tll->ch_clk[i] = clk_get(dev, clkname);

		if (IS_ERR(tll->ch_clk[i]))
			dev_dbg(dev, "can't get clock : %s\n", clkname);
	}

	needs_tll = false;
	for (i = 0; i < tll->nch; i++)
		needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);

	if (needs_tll) {

		/* Program Common TLL register */
		reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
		reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
			| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
		reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
		reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;

		usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);

		/* Enable channels now */
		for (i = 0; i < tll->nch; i++) {
			reg = usbtll_read(base,	OMAP_TLL_CHANNEL_CONF(i));

			if (is_ohci_port(pdata->port_mode[i])) {
				reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
				<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
				reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
			} else if (pdata->port_mode[i] ==
					OMAP_EHCI_PORT_MODE_TLL) {
				/*
				 * Disable AutoIdle, BitStuffing
				 * and use SDR Mode
				 */
				reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
					| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
					| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
			} else {
				continue;
			}
			reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
			usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);

			usbtll_writeb(base,
				      OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
				      0xbe);
		}
	}

	pm_runtime_put_sync(dev);
	/* only after this can omap_tll_enable/disable work */
	spin_lock(&tll_lock);
	tll_dev = dev;
	spin_unlock(&tll_lock);

	return 0;

err_clk_alloc:
	pm_runtime_put_sync(dev);
	pm_runtime_disable(dev);

	return ret;
}

/**
 * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
 * @pdev: USB Host Controller being removed
 *
 * Reverses the effect of usbtll_omap_probe().
 */
static int usbtll_omap_remove(struct platform_device *pdev)
{
	struct usbtll_omap *tll = platform_get_drvdata(pdev);
	int i;

	spin_lock(&tll_lock);
	tll_dev = NULL;
	spin_unlock(&tll_lock);

	for (i = 0; i < tll->nch; i++)
		if (!IS_ERR(tll->ch_clk[i]))
			clk_put(tll->ch_clk[i]);

	pm_runtime_disable(&pdev->dev);
	return 0;
}

static int usbtll_runtime_resume(struct device *dev)
{
	struct usbtll_omap			*tll = dev_get_drvdata(dev);
	struct usbhs_omap_platform_data		*pdata = tll->pdata;
	int i;

	dev_dbg(dev, "usbtll_runtime_resume\n");

	for (i = 0; i < tll->nch; i++) {
		if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
			int r;

			if (IS_ERR(tll->ch_clk[i]))
				continue;

			r = clk_enable(tll->ch_clk[i]);
			if (r) {
				dev_err(dev,
				 "Error enabling ch %d clock: %d\n", i, r);
			}
		}
	}

	return 0;
}

static int usbtll_runtime_suspend(struct device *dev)
{
	struct usbtll_omap			*tll = dev_get_drvdata(dev);
	struct usbhs_omap_platform_data		*pdata = tll->pdata;
	int i;

	dev_dbg(dev, "usbtll_runtime_suspend\n");

	for (i = 0; i < tll->nch; i++) {
		if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
			if (!IS_ERR(tll->ch_clk[i]))
				clk_disable(tll->ch_clk[i]);
		}
	}

	return 0;
}

static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
	SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
			   usbtll_runtime_resume,
			   NULL)
};

static struct platform_driver usbtll_omap_driver = {
	.driver = {
		.name		= (char *)usbtll_driver_name,
		.owner		= THIS_MODULE,
		.pm		= &usbtllomap_dev_pm_ops,
	},
	.probe		= usbtll_omap_probe,
	.remove		= usbtll_omap_remove,
};

int omap_tll_enable(void)
{
	int ret;

	spin_lock(&tll_lock);

	if (!tll_dev) {
		pr_err("%s: OMAP USB TLL not initialized\n", __func__);
		ret = -ENODEV;
	} else {
		ret = pm_runtime_get_sync(tll_dev);
	}

	spin_unlock(&tll_lock);

	return ret;
}
EXPORT_SYMBOL_GPL(omap_tll_enable);

int omap_tll_disable(void)
{
	int ret;

	spin_lock(&tll_lock);

	if (!tll_dev) {
		pr_err("%s: OMAP USB TLL not initialized\n", __func__);
		ret = -ENODEV;
	} else {
		ret = pm_runtime_put_sync(tll_dev);
	}

	spin_unlock(&tll_lock);

	return ret;
}
EXPORT_SYMBOL_GPL(omap_tll_disable);

MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");

static int __init omap_usbtll_drvinit(void)
{
	return platform_driver_register(&usbtll_omap_driver);
}

/*
 * init before usbhs core driver;
 * The usbtll driver should be initialized before
 * the usbhs core driver probe function is called.
 */
fs_initcall(omap_usbtll_drvinit);

static void __exit omap_usbtll_drvexit(void)
{
	platform_driver_unregister(&usbtll_omap_driver);
}
module_exit(omap_usbtll_drvexit);
Commit	Line	Data
16fa3dc7 KM	1	/**
	2	* omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
	5	* Author: Keshava Munegowda <keshava_mgowda@ti.com>
	6	*
	7	* This program is free software: you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 of
	9	* the License as published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/types.h>
	22	#include <linux/slab.h>
	23	#include <linux/spinlock.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/clk.h>
	26	#include <linux/io.h>
	27	#include <linux/err.h>
16fa3dc7	28	#include <linux/pm_runtime.h>
e8c4a7ac	29	#include <linux/platform_data/usb-omap.h>
16fa3dc7 KM	30
	31	#define USBTLL_DRIVER_NAME "usbhs_tll"
	32
	33	/* TLL Register Set */
	34	#define OMAP_USBTLL_REVISION (0x00)
	35	#define OMAP_USBTLL_SYSCONFIG (0x10)
	36	#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
	37	#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
	38	#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
	39	#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
	40	#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
	41
	42	#define OMAP_USBTLL_SYSSTATUS (0x14)
	43	#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
	44
	45	#define OMAP_USBTLL_IRQSTATUS (0x18)
	46	#define OMAP_USBTLL_IRQENABLE (0x1C)
	47
	48	#define OMAP_TLL_SHARED_CONF (0x30)
	49	#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
	50	#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
	51	#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
	52	#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
	53	#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
	54
	55	#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
	56	#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
	57	#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
	58	#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
	59	#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
	60	#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
	61	#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
	62	#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
	63
	64	#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
	65	#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
	66	#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
	67	#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
	68	#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
	69	#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
	70	#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
	71	#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
	72	#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
	73	#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
	74
	75	#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
	76	#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
	77	#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
	78	#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
	79	#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
	80	#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
	81	#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
	82	#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
	83	#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
	84
	85	#define OMAP_REV2_TLL_CHANNEL_COUNT 2
	86	#define OMAP_TLL_CHANNEL_COUNT 3
	87	#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
	88	#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
	89	#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
	90
	91	/* Values of USBTLL_REVISION - Note: these are not given in the TRM */
	92	#define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */
	93	#define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */
94	#define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */
95
96	#define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL)
97
32a51f2a RQ	98	/* only PHY and UNUSED modes don't need TLL */
	99	#define omap_usb_mode_needs_tll(x) ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
	100	(x) != OMAP_EHCI_PORT_MODE_PHY)
	101
16fa3dc7	102	struct usbtll_omap {
7e0ff103	103	int nch; /* num. of channels */
9d9c6ae7	104	struct usbhs_omap_platform_data *pdata;
0bde3e9f	105	struct clk **ch_clk;
16fa3dc7 KM	106	};
	107
	108	/-------------------------------------------------------------------------/
	109
7ed86191 RQ	110	static const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
7ed86191 RQ	111	static struct device *tll_dev;
66751446	112	static DEFINE_SPINLOCK(tll_lock); /* serialize access to tll_dev */
16fa3dc7 KM	113
	114	/-------------------------------------------------------------------------/
	115
	116	static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
	117	{
	118	__raw_writel(val, base + reg);
	119	}
	120
	121	static inline u32 usbtll_read(void __iomem *base, u32 reg)
	122	{
	123	return __raw_readl(base + reg);
	124	}
	125
	126	static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
	127	{
	128	__raw_writeb(val, base + reg);
	129	}
	130
	131	static inline u8 usbtll_readb(void __iomem *base, u8 reg)
	132	{
	133	return __raw_readb(base + reg);
	134	}
	135
	136	/-------------------------------------------------------------------------/
	137
	138	static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
	139	{
	140	switch (pmode) {
	141	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	142	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
	143	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
	144	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
	145	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
	146	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
	147	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
	148	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
	149	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
	150	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
	151	return true;
	152
	153	default:
	154	return false;
	155	}
	156	}
	157
	158	/*
	159	* convert the port-mode enum to a value we can use in the FSLSMODE
	160	* field of USBTLL_CHANNEL_CONF
	161	*/
	162	static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
	163	{
	164	switch (mode) {
	165	case OMAP_USBHS_PORT_MODE_UNUSED:
	166	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
	167	return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
	168
	169	case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
	170	return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
	171
	172	case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
	173	return OMAP_TLL_FSLSMODE_3PIN_PHY;
	174
	175	case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
	176	return OMAP_TLL_FSLSMODE_4PIN_PHY;
177
178	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
179	return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
180
181	case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
182	return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
183
184	case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
185	return OMAP_TLL_FSLSMODE_3PIN_TLL;
186
187	case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
188	return OMAP_TLL_FSLSMODE_4PIN_TLL;
189
190	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
191	return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
192
193	case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
194	return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
195	default:
196	pr_warn("Invalid port mode, using default\n");
197	return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
198	}
199	}
200
201	/**
202	* usbtll_omap_probe - initialize TI-based HCDs
203	*
204	* Allocates basic resources for this USB host controller.
205	*/
f791be49	206	static int usbtll_omap_probe(struct platform_device *pdev)
16fa3dc7 KM	207	{
16fa3dc7 KM	208	struct device *dev = &pdev->dev;
9d9c6ae7	209	struct usbhs_omap_platform_data *pdata = dev->platform_data;
16fa3dc7 KM	210	void __iomem *base;
	211	struct resource *res;
	212	struct usbtll_omap *tll;
	213	unsigned reg;
16fa3dc7	214	int ret = 0;
7e0ff103	215	int i, ver;
32a51f2a	216	bool needs_tll;
16fa3dc7 KM	217
	218	dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
	219
1a7a8d70	220	tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
16fa3dc7 KM	221	if (!tll) {
16fa3dc7 KM	222	dev_err(dev, "Memory allocation failed\n");
1a7a8d70	223	return -ENOMEM;
16fa3dc7 KM	224	}
16fa3dc7 KM	225
8bdbd154 RQ	226	if (!pdata) {
	227	dev_err(dev, "Platform data missing\n");
	228	return -ENODEV;
	229	}
	230
9d9c6ae7	231	tll->pdata = pdata;
16fa3dc7	232
16fa3dc7	233	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1a7a8d70	234	base = devm_request_and_ioremap(dev, res);
16fa3dc7	235	if (!base) {
1a7a8d70 RQ	236	ret = -EADDRNOTAVAIL;
1a7a8d70 RQ	237	dev_err(dev, "Resource request/ioremap failed:%d\n", ret);
0bde3e9f	238	return ret;
16fa3dc7 KM	239	}
	240
	241	platform_set_drvdata(pdev, tll);
	242	pm_runtime_enable(dev);
	243	pm_runtime_get_sync(dev);
	244
16fa3dc7 KM	245	ver = usbtll_read(base, OMAP_USBTLL_REVISION);
	246	switch (ver) {
	247	case OMAP_USBTLL_REV1:
7e0ff103	248	tll->nch = OMAP_TLL_CHANNEL_COUNT;
16fa3dc7	249	break;
7e0ff103	250	case OMAP_USBTLL_REV2:
16fa3dc7	251	case OMAP_USBTLL_REV3:
7e0ff103	252	tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
16fa3dc7 KM	253	break;
16fa3dc7 KM	254	default:
7e0ff103 RQ	255	tll->nch = OMAP_TLL_CHANNEL_COUNT;
	256	dev_dbg(dev,
	257	"USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
	258	ver, tll->nch);
	259	break;
16fa3dc7 KM	260	}
16fa3dc7 KM	261
0bde3e9f RQ	262	tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk * [tll->nch]),
	263	GFP_KERNEL);
	264	if (!tll->ch_clk) {
	265	ret = -ENOMEM;
	266	dev_err(dev, "Couldn't allocate memory for channel clocks\n");
	267	goto err_clk_alloc;
	268	}
	269
	270	for (i = 0; i < tll->nch; i++) {
	271	char clkname[] = "usb_tll_hs_usb_chx_clk";
	272
	273	snprintf(clkname, sizeof(clkname),
	274	"usb_tll_hs_usb_ch%d_clk", i);
	275	tll->ch_clk[i] = clk_get(dev, clkname);
	276
	277	if (IS_ERR(tll->ch_clk[i]))
	278	dev_dbg(dev, "can't get clock : %s\n", clkname);
	279	}
	280
32a51f2a RQ	281	needs_tll = false;
	282	for (i = 0; i < tll->nch; i++)
	283	needs_tll \|= omap_usb_mode_needs_tll(pdata->port_mode[i]);
	284
	285	if (needs_tll) {
16fa3dc7 KM	286
	287	/* Program Common TLL register */
	288	reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
	289	reg \|= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
	290	\| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
	291	reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
	292	reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
	293
	294	usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
	295
	296	/* Enable channels now */
7e0ff103	297	for (i = 0; i < tll->nch; i++) {
16fa3dc7 KM	298	reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
	299
	300	if (is_ohci_port(pdata->port_mode[i])) {
	301	reg \|= ohci_omap3_fslsmode(pdata->port_mode[i])
	302	<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
	303	reg \|= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
	304	} else if (pdata->port_mode[i] ==
	305	OMAP_EHCI_PORT_MODE_TLL) {
	306	/*
	307	* Disable AutoIdle, BitStuffing
	308	* and use SDR Mode
	309	*/
	310	reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
	311	\| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
	312	\| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
	313	} else {
	314	continue;
	315	}
	316	reg \|= OMAP_TLL_CHANNEL_CONF_CHANEN;
	317	usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
	318
	319	usbtll_writeb(base,
	320	OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
	321	0xbe);
	322	}
	323	}
	324
16fa3dc7	325	pm_runtime_put_sync(dev);
7ed86191	326	/* only after this can omap_tll_enable/disable work */
66751446	327	spin_lock(&tll_lock);
7ed86191	328	tll_dev = dev;
66751446	329	spin_unlock(&tll_lock);
16fa3dc7	330
1a7a8d70 RQ	331	return 0;
1a7a8d70 RQ	332
0bde3e9f RQ	333	err_clk_alloc:
	334	pm_runtime_put_sync(dev);
	335	pm_runtime_disable(dev);
16fa3dc7	336
16fa3dc7 KM	337	return ret;
	338	}
	339
	340	/**
	341	* usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
	342	* @pdev: USB Host Controller being removed
	343	*
	344	* Reverses the effect of usbtll_omap_probe().
	345	*/
4740f73f	346	static int usbtll_omap_remove(struct platform_device *pdev)
16fa3dc7 KM	347	{
16fa3dc7 KM	348	struct usbtll_omap *tll = platform_get_drvdata(pdev);
0bde3e9f RQ	349	int i;
0bde3e9f RQ	350
66751446	351	spin_lock(&tll_lock);
7ed86191	352	tll_dev = NULL;
66751446	353	spin_unlock(&tll_lock);
7ed86191	354
0bde3e9f RQ	355	for (i = 0; i < tll->nch; i++)
	356	if (!IS_ERR(tll->ch_clk[i]))
	357	clk_put(tll->ch_clk[i]);
16fa3dc7	358
16fa3dc7	359	pm_runtime_disable(&pdev->dev);
16fa3dc7 KM	360	return 0;
	361	}
	362
	363	static int usbtll_runtime_resume(struct device *dev)
	364	{
	365	struct usbtll_omap *tll = dev_get_drvdata(dev);
9d9c6ae7	366	struct usbhs_omap_platform_data *pdata = tll->pdata;
0bde3e9f	367	int i;
16fa3dc7 KM	368
	369	dev_dbg(dev, "usbtll_runtime_resume\n");
	370
0bde3e9f	371	for (i = 0; i < tll->nch; i++) {
32a51f2a	372	if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
0bde3e9f	373	int r;
16fa3dc7	374
0bde3e9f RQ	375	if (IS_ERR(tll->ch_clk[i]))
	376	continue;
	377
	378	r = clk_enable(tll->ch_clk[i]);
	379	if (r) {
	380	dev_err(dev,
	381	"Error enabling ch %d clock: %d\n", i, r);
	382	}
	383	}
	384	}
16fa3dc7	385
16fa3dc7 KM	386	return 0;
	387	}
	388
	389	static int usbtll_runtime_suspend(struct device *dev)
	390	{
	391	struct usbtll_omap *tll = dev_get_drvdata(dev);
9d9c6ae7	392	struct usbhs_omap_platform_data *pdata = tll->pdata;
0bde3e9f	393	int i;
16fa3dc7 KM	394
	395	dev_dbg(dev, "usbtll_runtime_suspend\n");
	396
0bde3e9f	397	for (i = 0; i < tll->nch; i++) {
32a51f2a	398	if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
0bde3e9f RQ	399	if (!IS_ERR(tll->ch_clk[i]))
	400	clk_disable(tll->ch_clk[i]);
	401	}
	402	}
16fa3dc7	403
16fa3dc7 KM	404	return 0;
	405	}
	406
	407	static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
	408	SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
	409	usbtll_runtime_resume,
	410	NULL)
	411	};
	412
	413	static struct platform_driver usbtll_omap_driver = {
	414	.driver = {
	415	.name = (char *)usbtll_driver_name,
	416	.owner = THIS_MODULE,
	417	.pm = &usbtllomap_dev_pm_ops,
	418	},
	419	.probe = usbtll_omap_probe,
84449216	420	.remove = usbtll_omap_remove,
16fa3dc7 KM	421	};
	422
	423	int omap_tll_enable(void)
	424	{
66751446 RQ	425	int ret;
	426
	427	spin_lock(&tll_lock);
	428
7ed86191 RQ	429	if (!tll_dev) {
7ed86191 RQ	430	pr_err("%s: OMAP USB TLL not initialized\n", __func__);
66751446 RQ	431	ret = -ENODEV;
	432	} else {
	433	ret = pm_runtime_get_sync(tll_dev);
16fa3dc7	434	}
66751446 RQ	435
	436	spin_unlock(&tll_lock);
	437
	438	return ret;
16fa3dc7 KM	439	}
	440	EXPORT_SYMBOL_GPL(omap_tll_enable);
	441
	442	int omap_tll_disable(void)
	443	{
66751446 RQ	444	int ret;
	445
	446	spin_lock(&tll_lock);
	447
7ed86191 RQ	448	if (!tll_dev) {
7ed86191 RQ	449	pr_err("%s: OMAP USB TLL not initialized\n", __func__);
66751446 RQ	450	ret = -ENODEV;
	451	} else {
	452	ret = pm_runtime_put_sync(tll_dev);
16fa3dc7	453	}
66751446 RQ	454
	455	spin_unlock(&tll_lock);
	456
	457	return ret;
16fa3dc7 KM	458	}
	459	EXPORT_SYMBOL_GPL(omap_tll_disable);
	460
	461	MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
	462	MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
	463	MODULE_LICENSE("GPL v2");
	464	MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
	465
	466	static int __init omap_usbtll_drvinit(void)
	467	{
	468	return platform_driver_register(&usbtll_omap_driver);
	469	}
	470
	471	/*
	472	* init before usbhs core driver;
	473	* The usbtll driver should be initialized before
	474	* the usbhs core driver probe function is called.
	475	*/
	476	fs_initcall(omap_usbtll_drvinit);
	477
	478	static void __exit omap_usbtll_drvexit(void)
	479	{
	480	platform_driver_unregister(&usbtll_omap_driver);
	481	}
	482	module_exit(omap_usbtll_drvexit);