Commit | Line | Data |
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62579266 RV |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License Terms: GNU General Public License v2 | |
5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | |
6 | * Author: Rabin Vincent <rabin.vincent@stericsson.com> | |
adceed62 | 7 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> |
62579266 RV |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/slab.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/irq.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include <linux/mfd/core.h> | |
47c16975 | 19 | #include <linux/mfd/abx500.h> |
ee66e653 | 20 | #include <linux/mfd/abx500/ab8500.h> |
549931f9 | 21 | #include <linux/regulator/ab8500.h> |
62579266 RV |
22 | |
23 | /* | |
24 | * Interrupt register offsets | |
25 | * Bank : 0x0E | |
26 | */ | |
47c16975 MW |
27 | #define AB8500_IT_SOURCE1_REG 0x00 |
28 | #define AB8500_IT_SOURCE2_REG 0x01 | |
29 | #define AB8500_IT_SOURCE3_REG 0x02 | |
30 | #define AB8500_IT_SOURCE4_REG 0x03 | |
31 | #define AB8500_IT_SOURCE5_REG 0x04 | |
32 | #define AB8500_IT_SOURCE6_REG 0x05 | |
33 | #define AB8500_IT_SOURCE7_REG 0x06 | |
34 | #define AB8500_IT_SOURCE8_REG 0x07 | |
d6255529 | 35 | #define AB9540_IT_SOURCE13_REG 0x0C |
47c16975 MW |
36 | #define AB8500_IT_SOURCE19_REG 0x12 |
37 | #define AB8500_IT_SOURCE20_REG 0x13 | |
38 | #define AB8500_IT_SOURCE21_REG 0x14 | |
39 | #define AB8500_IT_SOURCE22_REG 0x15 | |
40 | #define AB8500_IT_SOURCE23_REG 0x16 | |
41 | #define AB8500_IT_SOURCE24_REG 0x17 | |
62579266 RV |
42 | |
43 | /* | |
44 | * latch registers | |
45 | */ | |
47c16975 MW |
46 | #define AB8500_IT_LATCH1_REG 0x20 |
47 | #define AB8500_IT_LATCH2_REG 0x21 | |
48 | #define AB8500_IT_LATCH3_REG 0x22 | |
49 | #define AB8500_IT_LATCH4_REG 0x23 | |
50 | #define AB8500_IT_LATCH5_REG 0x24 | |
51 | #define AB8500_IT_LATCH6_REG 0x25 | |
52 | #define AB8500_IT_LATCH7_REG 0x26 | |
53 | #define AB8500_IT_LATCH8_REG 0x27 | |
54 | #define AB8500_IT_LATCH9_REG 0x28 | |
55 | #define AB8500_IT_LATCH10_REG 0x29 | |
92d50a41 | 56 | #define AB8500_IT_LATCH12_REG 0x2B |
d6255529 | 57 | #define AB9540_IT_LATCH13_REG 0x2C |
47c16975 MW |
58 | #define AB8500_IT_LATCH19_REG 0x32 |
59 | #define AB8500_IT_LATCH20_REG 0x33 | |
60 | #define AB8500_IT_LATCH21_REG 0x34 | |
61 | #define AB8500_IT_LATCH22_REG 0x35 | |
62 | #define AB8500_IT_LATCH23_REG 0x36 | |
63 | #define AB8500_IT_LATCH24_REG 0x37 | |
62579266 RV |
64 | |
65 | /* | |
66 | * mask registers | |
67 | */ | |
68 | ||
47c16975 MW |
69 | #define AB8500_IT_MASK1_REG 0x40 |
70 | #define AB8500_IT_MASK2_REG 0x41 | |
71 | #define AB8500_IT_MASK3_REG 0x42 | |
72 | #define AB8500_IT_MASK4_REG 0x43 | |
73 | #define AB8500_IT_MASK5_REG 0x44 | |
74 | #define AB8500_IT_MASK6_REG 0x45 | |
75 | #define AB8500_IT_MASK7_REG 0x46 | |
76 | #define AB8500_IT_MASK8_REG 0x47 | |
77 | #define AB8500_IT_MASK9_REG 0x48 | |
78 | #define AB8500_IT_MASK10_REG 0x49 | |
79 | #define AB8500_IT_MASK11_REG 0x4A | |
80 | #define AB8500_IT_MASK12_REG 0x4B | |
81 | #define AB8500_IT_MASK13_REG 0x4C | |
82 | #define AB8500_IT_MASK14_REG 0x4D | |
83 | #define AB8500_IT_MASK15_REG 0x4E | |
84 | #define AB8500_IT_MASK16_REG 0x4F | |
85 | #define AB8500_IT_MASK17_REG 0x50 | |
86 | #define AB8500_IT_MASK18_REG 0x51 | |
87 | #define AB8500_IT_MASK19_REG 0x52 | |
88 | #define AB8500_IT_MASK20_REG 0x53 | |
89 | #define AB8500_IT_MASK21_REG 0x54 | |
90 | #define AB8500_IT_MASK22_REG 0x55 | |
91 | #define AB8500_IT_MASK23_REG 0x56 | |
92 | #define AB8500_IT_MASK24_REG 0x57 | |
93 | ||
94 | #define AB8500_REV_REG 0x80 | |
0f620837 | 95 | #define AB8500_IC_NAME_REG 0x82 |
e5c238c3 | 96 | #define AB8500_SWITCH_OFF_STATUS 0x00 |
62579266 | 97 | |
b4a31037 AL |
98 | #define AB8500_TURN_ON_STATUS 0x00 |
99 | ||
d6255529 LW |
100 | #define AB9540_MODEM_CTRL2_REG 0x23 |
101 | #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) | |
102 | ||
62579266 RV |
103 | /* |
104 | * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt | |
2ced445e LW |
105 | * numbers are indexed into this array with (num / 8). The interupts are |
106 | * defined in linux/mfd/ab8500.h | |
62579266 RV |
107 | * |
108 | * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at | |
109 | * offset 0. | |
110 | */ | |
2ced445e | 111 | /* AB8500 support */ |
62579266 | 112 | static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { |
92d50a41 | 113 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, |
62579266 RV |
114 | }; |
115 | ||
d6255529 LW |
116 | /* AB9540 support */ |
117 | static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { | |
118 | 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, | |
119 | }; | |
120 | ||
0f620837 LW |
121 | static const char ab8500_version_str[][7] = { |
122 | [AB8500_VERSION_AB8500] = "AB8500", | |
123 | [AB8500_VERSION_AB8505] = "AB8505", | |
124 | [AB8500_VERSION_AB9540] = "AB9540", | |
125 | [AB8500_VERSION_AB8540] = "AB8540", | |
126 | }; | |
127 | ||
47c16975 MW |
128 | static int ab8500_get_chip_id(struct device *dev) |
129 | { | |
6bce7bf1 MW |
130 | struct ab8500 *ab8500; |
131 | ||
132 | if (!dev) | |
133 | return -EINVAL; | |
134 | ab8500 = dev_get_drvdata(dev->parent); | |
135 | return ab8500 ? (int)ab8500->chip_id : -EINVAL; | |
47c16975 MW |
136 | } |
137 | ||
138 | static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
139 | u8 reg, u8 data) | |
62579266 RV |
140 | { |
141 | int ret; | |
47c16975 MW |
142 | /* |
143 | * Put the u8 bank and u8 register together into a an u16. | |
144 | * The bank on higher 8 bits and register in lower 8 bits. | |
145 | * */ | |
146 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 RV |
147 | |
148 | dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); | |
149 | ||
392cbd1e | 150 | mutex_lock(&ab8500->lock); |
47c16975 | 151 | |
62579266 RV |
152 | ret = ab8500->write(ab8500, addr, data); |
153 | if (ret < 0) | |
154 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
155 | addr, ret); | |
47c16975 | 156 | mutex_unlock(&ab8500->lock); |
62579266 RV |
157 | |
158 | return ret; | |
159 | } | |
160 | ||
47c16975 MW |
161 | static int ab8500_set_register(struct device *dev, u8 bank, |
162 | u8 reg, u8 value) | |
62579266 | 163 | { |
47c16975 | 164 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 165 | |
47c16975 | 166 | return set_register_interruptible(ab8500, bank, reg, value); |
62579266 | 167 | } |
62579266 | 168 | |
47c16975 MW |
169 | static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, |
170 | u8 reg, u8 *value) | |
62579266 RV |
171 | { |
172 | int ret; | |
47c16975 MW |
173 | /* put the u8 bank and u8 reg together into a an u16. |
174 | * bank on higher 8 bits and reg in lower */ | |
175 | u16 addr = ((u16)bank) << 8 | reg; | |
176 | ||
392cbd1e | 177 | mutex_lock(&ab8500->lock); |
62579266 RV |
178 | |
179 | ret = ab8500->read(ab8500, addr); | |
180 | if (ret < 0) | |
181 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
182 | addr, ret); | |
47c16975 MW |
183 | else |
184 | *value = ret; | |
62579266 | 185 | |
47c16975 | 186 | mutex_unlock(&ab8500->lock); |
62579266 RV |
187 | dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); |
188 | ||
189 | return ret; | |
190 | } | |
191 | ||
47c16975 MW |
192 | static int ab8500_get_register(struct device *dev, u8 bank, |
193 | u8 reg, u8 *value) | |
62579266 | 194 | { |
47c16975 | 195 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); |
62579266 | 196 | |
47c16975 | 197 | return get_register_interruptible(ab8500, bank, reg, value); |
62579266 | 198 | } |
47c16975 MW |
199 | |
200 | static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, | |
201 | u8 reg, u8 bitmask, u8 bitvalues) | |
62579266 RV |
202 | { |
203 | int ret; | |
47c16975 MW |
204 | u8 data; |
205 | /* put the u8 bank and u8 reg together into a an u16. | |
206 | * bank on higher 8 bits and reg in lower */ | |
207 | u16 addr = ((u16)bank) << 8 | reg; | |
62579266 | 208 | |
392cbd1e | 209 | mutex_lock(&ab8500->lock); |
62579266 | 210 | |
47c16975 MW |
211 | ret = ab8500->read(ab8500, addr); |
212 | if (ret < 0) { | |
213 | dev_err(ab8500->dev, "failed to read reg %#x: %d\n", | |
214 | addr, ret); | |
62579266 | 215 | goto out; |
47c16975 | 216 | } |
62579266 | 217 | |
47c16975 MW |
218 | data = (u8)ret; |
219 | data = (~bitmask & data) | (bitmask & bitvalues); | |
62579266 | 220 | |
47c16975 MW |
221 | ret = ab8500->write(ab8500, addr, data); |
222 | if (ret < 0) | |
223 | dev_err(ab8500->dev, "failed to write reg %#x: %d\n", | |
224 | addr, ret); | |
62579266 | 225 | |
47c16975 | 226 | dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); |
62579266 RV |
227 | out: |
228 | mutex_unlock(&ab8500->lock); | |
229 | return ret; | |
230 | } | |
47c16975 MW |
231 | |
232 | static int ab8500_mask_and_set_register(struct device *dev, | |
233 | u8 bank, u8 reg, u8 bitmask, u8 bitvalues) | |
234 | { | |
235 | struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); | |
236 | ||
237 | return mask_and_set_register_interruptible(ab8500, bank, reg, | |
238 | bitmask, bitvalues); | |
239 | ||
240 | } | |
241 | ||
242 | static struct abx500_ops ab8500_ops = { | |
243 | .get_chip_id = ab8500_get_chip_id, | |
244 | .get_register = ab8500_get_register, | |
245 | .set_register = ab8500_set_register, | |
246 | .get_register_page = NULL, | |
247 | .set_register_page = NULL, | |
248 | .mask_and_set_register = ab8500_mask_and_set_register, | |
249 | .event_registers_startup_state_get = NULL, | |
250 | .startup_irq_enabled = NULL, | |
251 | }; | |
62579266 | 252 | |
9505a0a0 | 253 | static void ab8500_irq_lock(struct irq_data *data) |
62579266 | 254 | { |
9505a0a0 | 255 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
256 | |
257 | mutex_lock(&ab8500->irq_lock); | |
258 | } | |
259 | ||
9505a0a0 | 260 | static void ab8500_irq_sync_unlock(struct irq_data *data) |
62579266 | 261 | { |
9505a0a0 | 262 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
62579266 RV |
263 | int i; |
264 | ||
2ced445e | 265 | for (i = 0; i < ab8500->mask_size; i++) { |
62579266 RV |
266 | u8 old = ab8500->oldmask[i]; |
267 | u8 new = ab8500->mask[i]; | |
268 | int reg; | |
269 | ||
270 | if (new == old) | |
271 | continue; | |
272 | ||
0f620837 LW |
273 | /* |
274 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
275 | * 2.0 | |
276 | */ | |
277 | if (ab8500->irq_reg_offset[i] == 11 && | |
278 | is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 MW |
279 | continue; |
280 | ||
62579266 RV |
281 | ab8500->oldmask[i] = new; |
282 | ||
2ced445e | 283 | reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; |
47c16975 | 284 | set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); |
62579266 RV |
285 | } |
286 | ||
287 | mutex_unlock(&ab8500->irq_lock); | |
288 | } | |
289 | ||
9505a0a0 | 290 | static void ab8500_irq_mask(struct irq_data *data) |
62579266 | 291 | { |
9505a0a0 MB |
292 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
293 | int offset = data->irq - ab8500->irq_base; | |
62579266 RV |
294 | int index = offset / 8; |
295 | int mask = 1 << (offset % 8); | |
296 | ||
297 | ab8500->mask[index] |= mask; | |
298 | } | |
299 | ||
9505a0a0 | 300 | static void ab8500_irq_unmask(struct irq_data *data) |
62579266 | 301 | { |
9505a0a0 MB |
302 | struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); |
303 | int offset = data->irq - ab8500->irq_base; | |
62579266 RV |
304 | int index = offset / 8; |
305 | int mask = 1 << (offset % 8); | |
306 | ||
307 | ab8500->mask[index] &= ~mask; | |
308 | } | |
309 | ||
310 | static struct irq_chip ab8500_irq_chip = { | |
311 | .name = "ab8500", | |
9505a0a0 MB |
312 | .irq_bus_lock = ab8500_irq_lock, |
313 | .irq_bus_sync_unlock = ab8500_irq_sync_unlock, | |
314 | .irq_mask = ab8500_irq_mask, | |
e6f9306e | 315 | .irq_disable = ab8500_irq_mask, |
9505a0a0 | 316 | .irq_unmask = ab8500_irq_unmask, |
62579266 RV |
317 | }; |
318 | ||
319 | static irqreturn_t ab8500_irq(int irq, void *dev) | |
320 | { | |
321 | struct ab8500 *ab8500 = dev; | |
322 | int i; | |
323 | ||
324 | dev_vdbg(ab8500->dev, "interrupt\n"); | |
325 | ||
2ced445e LW |
326 | for (i = 0; i < ab8500->mask_size; i++) { |
327 | int regoffset = ab8500->irq_reg_offset[i]; | |
62579266 | 328 | int status; |
47c16975 | 329 | u8 value; |
62579266 | 330 | |
0f620837 LW |
331 | /* |
332 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
333 | * 2.0 | |
334 | */ | |
335 | if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 MW |
336 | continue; |
337 | ||
47c16975 MW |
338 | status = get_register_interruptible(ab8500, AB8500_INTERRUPT, |
339 | AB8500_IT_LATCH1_REG + regoffset, &value); | |
340 | if (status < 0 || value == 0) | |
62579266 RV |
341 | continue; |
342 | ||
343 | do { | |
88aec4f7 | 344 | int bit = __ffs(value); |
62579266 RV |
345 | int line = i * 8 + bit; |
346 | ||
347 | handle_nested_irq(ab8500->irq_base + line); | |
47c16975 MW |
348 | value &= ~(1 << bit); |
349 | } while (value); | |
62579266 RV |
350 | } |
351 | ||
352 | return IRQ_HANDLED; | |
353 | } | |
354 | ||
355 | static int ab8500_irq_init(struct ab8500 *ab8500) | |
356 | { | |
357 | int base = ab8500->irq_base; | |
358 | int irq; | |
2ced445e | 359 | int num_irqs; |
62579266 | 360 | |
d6255529 LW |
361 | if (is_ab9540(ab8500)) |
362 | num_irqs = AB9540_NR_IRQS; | |
363 | else | |
364 | num_irqs = AB8500_NR_IRQS; | |
2ced445e LW |
365 | |
366 | for (irq = base; irq < base + num_irqs; irq++) { | |
d5bb1221 TG |
367 | irq_set_chip_data(irq, ab8500); |
368 | irq_set_chip_and_handler(irq, &ab8500_irq_chip, | |
62579266 | 369 | handle_simple_irq); |
d5bb1221 | 370 | irq_set_nested_thread(irq, 1); |
62579266 RV |
371 | #ifdef CONFIG_ARM |
372 | set_irq_flags(irq, IRQF_VALID); | |
373 | #else | |
d5bb1221 | 374 | irq_set_noprobe(irq); |
62579266 RV |
375 | #endif |
376 | } | |
377 | ||
378 | return 0; | |
379 | } | |
380 | ||
381 | static void ab8500_irq_remove(struct ab8500 *ab8500) | |
382 | { | |
383 | int base = ab8500->irq_base; | |
384 | int irq; | |
2ced445e LW |
385 | int num_irqs; |
386 | ||
d6255529 LW |
387 | if (is_ab9540(ab8500)) |
388 | num_irqs = AB9540_NR_IRQS; | |
389 | else | |
390 | num_irqs = AB8500_NR_IRQS; | |
62579266 | 391 | |
2ced445e | 392 | for (irq = base; irq < base + num_irqs; irq++) { |
62579266 RV |
393 | #ifdef CONFIG_ARM |
394 | set_irq_flags(irq, 0); | |
395 | #endif | |
d5bb1221 TG |
396 | irq_set_chip_and_handler(irq, NULL, NULL); |
397 | irq_set_chip_data(irq, NULL); | |
62579266 RV |
398 | } |
399 | } | |
400 | ||
d6255529 | 401 | /* AB8500 GPIO Resources */ |
5cef8df5 | 402 | static struct resource __devinitdata ab8500_gpio_resources[] = { |
0cb3fcd7 BB |
403 | { |
404 | .name = "GPIO_INT6", | |
405 | .start = AB8500_INT_GPIO6R, | |
406 | .end = AB8500_INT_GPIO41F, | |
407 | .flags = IORESOURCE_IRQ, | |
408 | } | |
409 | }; | |
410 | ||
d6255529 LW |
411 | /* AB9540 GPIO Resources */ |
412 | static struct resource __devinitdata ab9540_gpio_resources[] = { | |
413 | { | |
414 | .name = "GPIO_INT6", | |
415 | .start = AB8500_INT_GPIO6R, | |
416 | .end = AB8500_INT_GPIO41F, | |
417 | .flags = IORESOURCE_IRQ, | |
418 | }, | |
419 | { | |
420 | .name = "GPIO_INT14", | |
421 | .start = AB9540_INT_GPIO50R, | |
422 | .end = AB9540_INT_GPIO54R, | |
423 | .flags = IORESOURCE_IRQ, | |
424 | }, | |
425 | { | |
426 | .name = "GPIO_INT15", | |
427 | .start = AB9540_INT_GPIO50F, | |
428 | .end = AB9540_INT_GPIO54F, | |
429 | .flags = IORESOURCE_IRQ, | |
430 | } | |
431 | }; | |
432 | ||
5cef8df5 | 433 | static struct resource __devinitdata ab8500_gpadc_resources[] = { |
62579266 RV |
434 | { |
435 | .name = "HW_CONV_END", | |
436 | .start = AB8500_INT_GP_HW_ADC_CONV_END, | |
437 | .end = AB8500_INT_GP_HW_ADC_CONV_END, | |
438 | .flags = IORESOURCE_IRQ, | |
439 | }, | |
440 | { | |
441 | .name = "SW_CONV_END", | |
442 | .start = AB8500_INT_GP_SW_ADC_CONV_END, | |
443 | .end = AB8500_INT_GP_SW_ADC_CONV_END, | |
444 | .flags = IORESOURCE_IRQ, | |
445 | }, | |
446 | }; | |
447 | ||
5cef8df5 | 448 | static struct resource __devinitdata ab8500_rtc_resources[] = { |
62579266 RV |
449 | { |
450 | .name = "60S", | |
451 | .start = AB8500_INT_RTC_60S, | |
452 | .end = AB8500_INT_RTC_60S, | |
453 | .flags = IORESOURCE_IRQ, | |
454 | }, | |
455 | { | |
456 | .name = "ALARM", | |
457 | .start = AB8500_INT_RTC_ALARM, | |
458 | .end = AB8500_INT_RTC_ALARM, | |
459 | .flags = IORESOURCE_IRQ, | |
460 | }, | |
461 | }; | |
462 | ||
5cef8df5 | 463 | static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { |
77686517 SI |
464 | { |
465 | .name = "ONKEY_DBF", | |
466 | .start = AB8500_INT_PON_KEY1DB_F, | |
467 | .end = AB8500_INT_PON_KEY1DB_F, | |
468 | .flags = IORESOURCE_IRQ, | |
469 | }, | |
470 | { | |
471 | .name = "ONKEY_DBR", | |
472 | .start = AB8500_INT_PON_KEY1DB_R, | |
473 | .end = AB8500_INT_PON_KEY1DB_R, | |
474 | .flags = IORESOURCE_IRQ, | |
475 | }, | |
476 | }; | |
477 | ||
6af75ecd | 478 | static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { |
e098aded | 479 | { |
6af75ecd LW |
480 | .name = "ACC_DETECT_1DB_F", |
481 | .start = AB8500_INT_ACC_DETECT_1DB_F, | |
482 | .end = AB8500_INT_ACC_DETECT_1DB_F, | |
483 | .flags = IORESOURCE_IRQ, | |
e098aded MW |
484 | }, |
485 | { | |
6af75ecd LW |
486 | .name = "ACC_DETECT_1DB_R", |
487 | .start = AB8500_INT_ACC_DETECT_1DB_R, | |
488 | .end = AB8500_INT_ACC_DETECT_1DB_R, | |
489 | .flags = IORESOURCE_IRQ, | |
490 | }, | |
491 | { | |
492 | .name = "ACC_DETECT_21DB_F", | |
493 | .start = AB8500_INT_ACC_DETECT_21DB_F, | |
494 | .end = AB8500_INT_ACC_DETECT_21DB_F, | |
495 | .flags = IORESOURCE_IRQ, | |
496 | }, | |
497 | { | |
498 | .name = "ACC_DETECT_21DB_R", | |
499 | .start = AB8500_INT_ACC_DETECT_21DB_R, | |
500 | .end = AB8500_INT_ACC_DETECT_21DB_R, | |
501 | .flags = IORESOURCE_IRQ, | |
502 | }, | |
503 | { | |
504 | .name = "ACC_DETECT_22DB_F", | |
505 | .start = AB8500_INT_ACC_DETECT_22DB_F, | |
506 | .end = AB8500_INT_ACC_DETECT_22DB_F, | |
507 | .flags = IORESOURCE_IRQ, | |
e098aded | 508 | }, |
6af75ecd LW |
509 | { |
510 | .name = "ACC_DETECT_22DB_R", | |
511 | .start = AB8500_INT_ACC_DETECT_22DB_R, | |
512 | .end = AB8500_INT_ACC_DETECT_22DB_R, | |
513 | .flags = IORESOURCE_IRQ, | |
514 | }, | |
515 | }; | |
516 | ||
517 | static struct resource __devinitdata ab8500_charger_resources[] = { | |
e098aded MW |
518 | { |
519 | .name = "MAIN_CH_UNPLUG_DET", | |
520 | .start = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
521 | .end = AB8500_INT_MAIN_CH_UNPLUG_DET, | |
522 | .flags = IORESOURCE_IRQ, | |
523 | }, | |
524 | { | |
525 | .name = "MAIN_CHARGE_PLUG_DET", | |
526 | .start = AB8500_INT_MAIN_CH_PLUG_DET, | |
527 | .end = AB8500_INT_MAIN_CH_PLUG_DET, | |
528 | .flags = IORESOURCE_IRQ, | |
529 | }, | |
e098aded MW |
530 | { |
531 | .name = "VBUS_DET_R", | |
532 | .start = AB8500_INT_VBUS_DET_R, | |
533 | .end = AB8500_INT_VBUS_DET_R, | |
534 | .flags = IORESOURCE_IRQ, | |
535 | }, | |
536 | { | |
6af75ecd LW |
537 | .name = "VBUS_DET_F", |
538 | .start = AB8500_INT_VBUS_DET_F, | |
539 | .end = AB8500_INT_VBUS_DET_F, | |
e098aded MW |
540 | .flags = IORESOURCE_IRQ, |
541 | }, | |
542 | { | |
6af75ecd LW |
543 | .name = "USB_LINK_STATUS", |
544 | .start = AB8500_INT_USB_LINK_STATUS, | |
545 | .end = AB8500_INT_USB_LINK_STATUS, | |
546 | .flags = IORESOURCE_IRQ, | |
547 | }, | |
548 | { | |
549 | .name = "USB_CHARGE_DET_DONE", | |
550 | .start = AB8500_INT_USB_CHG_DET_DONE, | |
551 | .end = AB8500_INT_USB_CHG_DET_DONE, | |
e098aded MW |
552 | .flags = IORESOURCE_IRQ, |
553 | }, | |
554 | { | |
555 | .name = "VBUS_OVV", | |
556 | .start = AB8500_INT_VBUS_OVV, | |
557 | .end = AB8500_INT_VBUS_OVV, | |
558 | .flags = IORESOURCE_IRQ, | |
559 | }, | |
560 | { | |
6af75ecd LW |
561 | .name = "USB_CH_TH_PROT_R", |
562 | .start = AB8500_INT_USB_CH_TH_PROT_R, | |
563 | .end = AB8500_INT_USB_CH_TH_PROT_R, | |
e098aded MW |
564 | .flags = IORESOURCE_IRQ, |
565 | }, | |
566 | { | |
6af75ecd LW |
567 | .name = "USB_CH_TH_PROT_F", |
568 | .start = AB8500_INT_USB_CH_TH_PROT_F, | |
569 | .end = AB8500_INT_USB_CH_TH_PROT_F, | |
e098aded MW |
570 | .flags = IORESOURCE_IRQ, |
571 | }, | |
572 | { | |
6af75ecd LW |
573 | .name = "MAIN_EXT_CH_NOT_OK", |
574 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
575 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
576 | .flags = IORESOURCE_IRQ, | |
577 | }, | |
578 | { | |
579 | .name = "MAIN_CH_TH_PROT_R", | |
580 | .start = AB8500_INT_MAIN_CH_TH_PROT_R, | |
581 | .end = AB8500_INT_MAIN_CH_TH_PROT_R, | |
582 | .flags = IORESOURCE_IRQ, | |
583 | }, | |
584 | { | |
585 | .name = "MAIN_CH_TH_PROT_F", | |
586 | .start = AB8500_INT_MAIN_CH_TH_PROT_F, | |
587 | .end = AB8500_INT_MAIN_CH_TH_PROT_F, | |
588 | .flags = IORESOURCE_IRQ, | |
589 | }, | |
590 | { | |
591 | .name = "USB_CHARGER_NOT_OKR", | |
592 | .start = AB8500_INT_USB_CHARGER_NOT_OK, | |
593 | .end = AB8500_INT_USB_CHARGER_NOT_OK, | |
594 | .flags = IORESOURCE_IRQ, | |
595 | }, | |
596 | { | |
597 | .name = "USB_CHARGER_NOT_OKF", | |
598 | .start = AB8500_INT_USB_CHARGER_NOT_OKF, | |
599 | .end = AB8500_INT_USB_CHARGER_NOT_OKF, | |
600 | .flags = IORESOURCE_IRQ, | |
601 | }, | |
602 | { | |
603 | .name = "CH_WD_EXP", | |
604 | .start = AB8500_INT_CH_WD_EXP, | |
605 | .end = AB8500_INT_CH_WD_EXP, | |
606 | .flags = IORESOURCE_IRQ, | |
607 | }, | |
608 | }; | |
609 | ||
610 | static struct resource __devinitdata ab8500_btemp_resources[] = { | |
611 | { | |
612 | .name = "BAT_CTRL_INDB", | |
613 | .start = AB8500_INT_BAT_CTRL_INDB, | |
614 | .end = AB8500_INT_BAT_CTRL_INDB, | |
e098aded MW |
615 | .flags = IORESOURCE_IRQ, |
616 | }, | |
617 | { | |
618 | .name = "BTEMP_LOW", | |
619 | .start = AB8500_INT_BTEMP_LOW, | |
620 | .end = AB8500_INT_BTEMP_LOW, | |
621 | .flags = IORESOURCE_IRQ, | |
622 | }, | |
623 | { | |
624 | .name = "BTEMP_HIGH", | |
625 | .start = AB8500_INT_BTEMP_HIGH, | |
626 | .end = AB8500_INT_BTEMP_HIGH, | |
627 | .flags = IORESOURCE_IRQ, | |
628 | }, | |
629 | { | |
6af75ecd LW |
630 | .name = "BTEMP_LOW_MEDIUM", |
631 | .start = AB8500_INT_BTEMP_LOW_MEDIUM, | |
632 | .end = AB8500_INT_BTEMP_LOW_MEDIUM, | |
e098aded MW |
633 | .flags = IORESOURCE_IRQ, |
634 | }, | |
635 | { | |
6af75ecd LW |
636 | .name = "BTEMP_MEDIUM_HIGH", |
637 | .start = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
638 | .end = AB8500_INT_BTEMP_MEDIUM_HIGH, | |
e098aded MW |
639 | .flags = IORESOURCE_IRQ, |
640 | }, | |
6af75ecd LW |
641 | }; |
642 | ||
643 | static struct resource __devinitdata ab8500_fg_resources[] = { | |
e098aded | 644 | { |
6af75ecd LW |
645 | .name = "NCONV_ACCU", |
646 | .start = AB8500_INT_CCN_CONV_ACC, | |
647 | .end = AB8500_INT_CCN_CONV_ACC, | |
e098aded MW |
648 | .flags = IORESOURCE_IRQ, |
649 | }, | |
650 | { | |
6af75ecd LW |
651 | .name = "BATT_OVV", |
652 | .start = AB8500_INT_BATT_OVV, | |
653 | .end = AB8500_INT_BATT_OVV, | |
e098aded MW |
654 | .flags = IORESOURCE_IRQ, |
655 | }, | |
656 | { | |
6af75ecd LW |
657 | .name = "LOW_BAT_F", |
658 | .start = AB8500_INT_LOW_BAT_F, | |
659 | .end = AB8500_INT_LOW_BAT_F, | |
660 | .flags = IORESOURCE_IRQ, | |
661 | }, | |
662 | { | |
663 | .name = "LOW_BAT_R", | |
664 | .start = AB8500_INT_LOW_BAT_R, | |
665 | .end = AB8500_INT_LOW_BAT_R, | |
666 | .flags = IORESOURCE_IRQ, | |
667 | }, | |
668 | { | |
669 | .name = "CC_INT_CALIB", | |
670 | .start = AB8500_INT_CC_INT_CALIB, | |
671 | .end = AB8500_INT_CC_INT_CALIB, | |
e098aded MW |
672 | .flags = IORESOURCE_IRQ, |
673 | }, | |
674 | }; | |
675 | ||
6af75ecd LW |
676 | static struct resource __devinitdata ab8500_chargalg_resources[] = {}; |
677 | ||
df720647 | 678 | #ifdef CONFIG_DEBUG_FS |
5cef8df5 | 679 | static struct resource __devinitdata ab8500_debug_resources[] = { |
e098aded MW |
680 | { |
681 | .name = "IRQ_FIRST", | |
682 | .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
683 | .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, | |
684 | .flags = IORESOURCE_IRQ, | |
685 | }, | |
686 | { | |
687 | .name = "IRQ_LAST", | |
688 | .start = AB8500_INT_USB_CHARGER_NOT_OKF, | |
689 | .end = AB8500_INT_USB_CHARGER_NOT_OKF, | |
690 | .flags = IORESOURCE_IRQ, | |
691 | }, | |
692 | }; | |
df720647 | 693 | #endif |
e098aded | 694 | |
5cef8df5 | 695 | static struct resource __devinitdata ab8500_usb_resources[] = { |
e098aded MW |
696 | { |
697 | .name = "ID_WAKEUP_R", | |
698 | .start = AB8500_INT_ID_WAKEUP_R, | |
699 | .end = AB8500_INT_ID_WAKEUP_R, | |
700 | .flags = IORESOURCE_IRQ, | |
701 | }, | |
702 | { | |
703 | .name = "ID_WAKEUP_F", | |
704 | .start = AB8500_INT_ID_WAKEUP_F, | |
705 | .end = AB8500_INT_ID_WAKEUP_F, | |
706 | .flags = IORESOURCE_IRQ, | |
707 | }, | |
708 | { | |
709 | .name = "VBUS_DET_F", | |
710 | .start = AB8500_INT_VBUS_DET_F, | |
711 | .end = AB8500_INT_VBUS_DET_F, | |
712 | .flags = IORESOURCE_IRQ, | |
713 | }, | |
714 | { | |
715 | .name = "VBUS_DET_R", | |
716 | .start = AB8500_INT_VBUS_DET_R, | |
717 | .end = AB8500_INT_VBUS_DET_R, | |
718 | .flags = IORESOURCE_IRQ, | |
719 | }, | |
92d50a41 MW |
720 | { |
721 | .name = "USB_LINK_STATUS", | |
722 | .start = AB8500_INT_USB_LINK_STATUS, | |
723 | .end = AB8500_INT_USB_LINK_STATUS, | |
724 | .flags = IORESOURCE_IRQ, | |
725 | }, | |
6af75ecd LW |
726 | { |
727 | .name = "USB_ADP_PROBE_PLUG", | |
728 | .start = AB8500_INT_ADP_PROBE_PLUG, | |
729 | .end = AB8500_INT_ADP_PROBE_PLUG, | |
730 | .flags = IORESOURCE_IRQ, | |
731 | }, | |
732 | { | |
733 | .name = "USB_ADP_PROBE_UNPLUG", | |
734 | .start = AB8500_INT_ADP_PROBE_UNPLUG, | |
735 | .end = AB8500_INT_ADP_PROBE_UNPLUG, | |
736 | .flags = IORESOURCE_IRQ, | |
737 | }, | |
e098aded MW |
738 | }; |
739 | ||
5cef8df5 | 740 | static struct resource __devinitdata ab8500_temp_resources[] = { |
e098aded MW |
741 | { |
742 | .name = "AB8500_TEMP_WARM", | |
743 | .start = AB8500_INT_TEMP_WARM, | |
744 | .end = AB8500_INT_TEMP_WARM, | |
745 | .flags = IORESOURCE_IRQ, | |
746 | }, | |
747 | }; | |
748 | ||
d6255529 | 749 | static struct mfd_cell __devinitdata abx500_common_devs[] = { |
5814fc35 MW |
750 | #ifdef CONFIG_DEBUG_FS |
751 | { | |
752 | .name = "ab8500-debug", | |
e098aded MW |
753 | .num_resources = ARRAY_SIZE(ab8500_debug_resources), |
754 | .resources = ab8500_debug_resources, | |
5814fc35 MW |
755 | }, |
756 | #endif | |
e098aded MW |
757 | { |
758 | .name = "ab8500-sysctrl", | |
759 | }, | |
760 | { | |
761 | .name = "ab8500-regulator", | |
762 | }, | |
62579266 RV |
763 | { |
764 | .name = "ab8500-gpadc", | |
765 | .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), | |
766 | .resources = ab8500_gpadc_resources, | |
767 | }, | |
768 | { | |
769 | .name = "ab8500-rtc", | |
770 | .num_resources = ARRAY_SIZE(ab8500_rtc_resources), | |
771 | .resources = ab8500_rtc_resources, | |
772 | }, | |
e098aded | 773 | { |
6af75ecd LW |
774 | .name = "ab8500-charger", |
775 | .num_resources = ARRAY_SIZE(ab8500_charger_resources), | |
776 | .resources = ab8500_charger_resources, | |
777 | }, | |
778 | { | |
779 | .name = "ab8500-btemp", | |
780 | .num_resources = ARRAY_SIZE(ab8500_btemp_resources), | |
781 | .resources = ab8500_btemp_resources, | |
782 | }, | |
783 | { | |
784 | .name = "ab8500-fg", | |
785 | .num_resources = ARRAY_SIZE(ab8500_fg_resources), | |
786 | .resources = ab8500_fg_resources, | |
787 | }, | |
788 | { | |
789 | .name = "ab8500-chargalg", | |
790 | .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), | |
791 | .resources = ab8500_chargalg_resources, | |
792 | }, | |
793 | { | |
794 | .name = "ab8500-acc-det", | |
795 | .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), | |
796 | .resources = ab8500_av_acc_detect_resources, | |
797 | }, | |
798 | { | |
799 | .name = "ab8500-codec", | |
e098aded | 800 | }, |
d6255529 | 801 | |
e098aded MW |
802 | { |
803 | .name = "ab8500-poweron-key", | |
804 | .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), | |
805 | .resources = ab8500_poweronkey_db_resources, | |
806 | }, | |
f0f05b1c AM |
807 | { |
808 | .name = "ab8500-pwm", | |
809 | .id = 1, | |
810 | }, | |
811 | { | |
812 | .name = "ab8500-pwm", | |
813 | .id = 2, | |
814 | }, | |
815 | { | |
816 | .name = "ab8500-pwm", | |
817 | .id = 3, | |
818 | }, | |
e098aded | 819 | { .name = "ab8500-leds", }, |
77686517 | 820 | { |
e098aded MW |
821 | .name = "ab8500-denc", |
822 | }, | |
823 | { | |
824 | .name = "ab8500-temp", | |
825 | .num_resources = ARRAY_SIZE(ab8500_temp_resources), | |
826 | .resources = ab8500_temp_resources, | |
77686517 | 827 | }, |
62579266 RV |
828 | }; |
829 | ||
d6255529 LW |
830 | static struct mfd_cell __devinitdata ab8500_devs[] = { |
831 | { | |
832 | .name = "ab8500-gpio", | |
833 | .num_resources = ARRAY_SIZE(ab8500_gpio_resources), | |
834 | .resources = ab8500_gpio_resources, | |
835 | }, | |
836 | { | |
837 | .name = "ab8500-usb", | |
838 | .num_resources = ARRAY_SIZE(ab8500_usb_resources), | |
839 | .resources = ab8500_usb_resources, | |
840 | }, | |
841 | }; | |
842 | ||
843 | static struct mfd_cell __devinitdata ab9540_devs[] = { | |
844 | { | |
845 | .name = "ab8500-gpio", | |
846 | .num_resources = ARRAY_SIZE(ab9540_gpio_resources), | |
847 | .resources = ab9540_gpio_resources, | |
848 | }, | |
849 | { | |
850 | .name = "ab9540-usb", | |
851 | .num_resources = ARRAY_SIZE(ab8500_usb_resources), | |
852 | .resources = ab8500_usb_resources, | |
853 | }, | |
854 | }; | |
855 | ||
cca69b67 MW |
856 | static ssize_t show_chip_id(struct device *dev, |
857 | struct device_attribute *attr, char *buf) | |
858 | { | |
859 | struct ab8500 *ab8500; | |
860 | ||
861 | ab8500 = dev_get_drvdata(dev); | |
862 | return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); | |
863 | } | |
864 | ||
e5c238c3 MW |
865 | /* |
866 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
867 | * 0x01 Swoff bit programming | |
868 | * 0x02 Thermal protection activation | |
869 | * 0x04 Vbat lower then BattOk falling threshold | |
870 | * 0x08 Watchdog expired | |
871 | * 0x10 Non presence of 32kHz clock | |
872 | * 0x20 Battery level lower than power on reset threshold | |
873 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
874 | * 0x80 DB8500 thermal shutdown | |
875 | */ | |
876 | static ssize_t show_switch_off_status(struct device *dev, | |
877 | struct device_attribute *attr, char *buf) | |
878 | { | |
879 | int ret; | |
880 | u8 value; | |
881 | struct ab8500 *ab8500; | |
882 | ||
883 | ab8500 = dev_get_drvdata(dev); | |
884 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
885 | AB8500_SWITCH_OFF_STATUS, &value); | |
886 | if (ret < 0) | |
887 | return ret; | |
888 | return sprintf(buf, "%#x\n", value); | |
889 | } | |
890 | ||
b4a31037 AL |
891 | /* |
892 | * ab8500 has turned on due to (TURN_ON_STATUS): | |
893 | * 0x01 PORnVbat | |
894 | * 0x02 PonKey1dbF | |
895 | * 0x04 PonKey2dbF | |
896 | * 0x08 RTCAlarm | |
897 | * 0x10 MainChDet | |
898 | * 0x20 VbusDet | |
899 | * 0x40 UsbIDDetect | |
900 | * 0x80 Reserved | |
901 | */ | |
902 | static ssize_t show_turn_on_status(struct device *dev, | |
903 | struct device_attribute *attr, char *buf) | |
904 | { | |
905 | int ret; | |
906 | u8 value; | |
907 | struct ab8500 *ab8500; | |
908 | ||
909 | ab8500 = dev_get_drvdata(dev); | |
910 | ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, | |
911 | AB8500_TURN_ON_STATUS, &value); | |
912 | if (ret < 0) | |
913 | return ret; | |
914 | return sprintf(buf, "%#x\n", value); | |
915 | } | |
916 | ||
d6255529 LW |
917 | static ssize_t show_ab9540_dbbrstn(struct device *dev, |
918 | struct device_attribute *attr, char *buf) | |
919 | { | |
920 | struct ab8500 *ab8500; | |
921 | int ret; | |
922 | u8 value; | |
923 | ||
924 | ab8500 = dev_get_drvdata(dev); | |
925 | ||
926 | ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, | |
927 | AB9540_MODEM_CTRL2_REG, &value); | |
928 | if (ret < 0) | |
929 | return ret; | |
930 | ||
931 | return sprintf(buf, "%d\n", | |
932 | (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); | |
933 | } | |
934 | ||
935 | static ssize_t store_ab9540_dbbrstn(struct device *dev, | |
936 | struct device_attribute *attr, const char *buf, size_t count) | |
937 | { | |
938 | struct ab8500 *ab8500; | |
939 | int ret = count; | |
940 | int err; | |
941 | u8 bitvalues; | |
942 | ||
943 | ab8500 = dev_get_drvdata(dev); | |
944 | ||
945 | if (count > 0) { | |
946 | switch (buf[0]) { | |
947 | case '0': | |
948 | bitvalues = 0; | |
949 | break; | |
950 | case '1': | |
951 | bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; | |
952 | break; | |
953 | default: | |
954 | goto exit; | |
955 | } | |
956 | ||
957 | err = mask_and_set_register_interruptible(ab8500, | |
958 | AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, | |
959 | AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); | |
960 | if (err) | |
961 | dev_info(ab8500->dev, | |
962 | "Failed to set DBBRSTN %c, err %#x\n", | |
963 | buf[0], err); | |
964 | } | |
965 | ||
966 | exit: | |
967 | return ret; | |
968 | } | |
969 | ||
cca69b67 | 970 | static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); |
e5c238c3 | 971 | static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); |
b4a31037 | 972 | static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); |
d6255529 LW |
973 | static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, |
974 | show_ab9540_dbbrstn, store_ab9540_dbbrstn); | |
cca69b67 MW |
975 | |
976 | static struct attribute *ab8500_sysfs_entries[] = { | |
977 | &dev_attr_chip_id.attr, | |
e5c238c3 | 978 | &dev_attr_switch_off_status.attr, |
b4a31037 | 979 | &dev_attr_turn_on_status.attr, |
cca69b67 MW |
980 | NULL, |
981 | }; | |
982 | ||
d6255529 LW |
983 | static struct attribute *ab9540_sysfs_entries[] = { |
984 | &dev_attr_chip_id.attr, | |
985 | &dev_attr_switch_off_status.attr, | |
986 | &dev_attr_turn_on_status.attr, | |
987 | &dev_attr_dbbrstn.attr, | |
988 | NULL, | |
989 | }; | |
990 | ||
cca69b67 MW |
991 | static struct attribute_group ab8500_attr_group = { |
992 | .attrs = ab8500_sysfs_entries, | |
993 | }; | |
994 | ||
d6255529 LW |
995 | static struct attribute_group ab9540_attr_group = { |
996 | .attrs = ab9540_sysfs_entries, | |
997 | }; | |
998 | ||
0f620837 | 999 | int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) |
62579266 RV |
1000 | { |
1001 | struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); | |
1002 | int ret; | |
1003 | int i; | |
47c16975 | 1004 | u8 value; |
62579266 RV |
1005 | |
1006 | if (plat) | |
1007 | ab8500->irq_base = plat->irq_base; | |
1008 | ||
1009 | mutex_init(&ab8500->lock); | |
1010 | mutex_init(&ab8500->irq_lock); | |
1011 | ||
0f620837 LW |
1012 | if (version != AB8500_VERSION_UNDEFINED) |
1013 | ab8500->version = version; | |
1014 | else { | |
1015 | ret = get_register_interruptible(ab8500, AB8500_MISC, | |
1016 | AB8500_IC_NAME_REG, &value); | |
1017 | if (ret < 0) | |
1018 | return ret; | |
1019 | ||
1020 | ab8500->version = value; | |
1021 | } | |
1022 | ||
47c16975 MW |
1023 | ret = get_register_interruptible(ab8500, AB8500_MISC, |
1024 | AB8500_REV_REG, &value); | |
62579266 RV |
1025 | if (ret < 0) |
1026 | return ret; | |
1027 | ||
47c16975 | 1028 | ab8500->chip_id = value; |
62579266 | 1029 | |
0f620837 LW |
1030 | dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", |
1031 | ab8500_version_str[ab8500->version], | |
1032 | ab8500->chip_id >> 4, | |
1033 | ab8500->chip_id & 0x0F); | |
1034 | ||
d6255529 LW |
1035 | /* Configure AB8500 or AB9540 IRQ */ |
1036 | if (is_ab9540(ab8500)) { | |
1037 | ab8500->mask_size = AB9540_NUM_IRQ_REGS; | |
1038 | ab8500->irq_reg_offset = ab9540_irq_regoffset; | |
1039 | } else { | |
1040 | ab8500->mask_size = AB8500_NUM_IRQ_REGS; | |
1041 | ab8500->irq_reg_offset = ab8500_irq_regoffset; | |
1042 | } | |
2ced445e LW |
1043 | ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL); |
1044 | if (!ab8500->mask) | |
1045 | return -ENOMEM; | |
1046 | ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL); | |
1047 | if (!ab8500->oldmask) { | |
1048 | ret = -ENOMEM; | |
1049 | goto out_freemask; | |
1050 | } | |
e5c238c3 MW |
1051 | /* |
1052 | * ab8500 has switched off due to (SWITCH_OFF_STATUS): | |
1053 | * 0x01 Swoff bit programming | |
1054 | * 0x02 Thermal protection activation | |
1055 | * 0x04 Vbat lower then BattOk falling threshold | |
1056 | * 0x08 Watchdog expired | |
1057 | * 0x10 Non presence of 32kHz clock | |
1058 | * 0x20 Battery level lower than power on reset threshold | |
1059 | * 0x40 Power on key 1 pressed longer than 10 seconds | |
1060 | * 0x80 DB8500 thermal shutdown | |
1061 | */ | |
1062 | ||
1063 | ret = get_register_interruptible(ab8500, AB8500_RTC, | |
1064 | AB8500_SWITCH_OFF_STATUS, &value); | |
1065 | if (ret < 0) | |
1066 | return ret; | |
1067 | dev_info(ab8500->dev, "switch off status: %#x", value); | |
1068 | ||
62579266 RV |
1069 | if (plat && plat->init) |
1070 | plat->init(ab8500); | |
1071 | ||
1072 | /* Clear and mask all interrupts */ | |
2ced445e | 1073 | for (i = 0; i < ab8500->mask_size; i++) { |
0f620837 LW |
1074 | /* |
1075 | * Interrupt register 12 doesn't exist prior to AB8500 version | |
1076 | * 2.0 | |
1077 | */ | |
1078 | if (ab8500->irq_reg_offset[i] == 11 && | |
1079 | is_ab8500_1p1_or_earlier(ab8500)) | |
92d50a41 | 1080 | continue; |
62579266 | 1081 | |
47c16975 | 1082 | get_register_interruptible(ab8500, AB8500_INTERRUPT, |
2ced445e | 1083 | AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], |
92d50a41 | 1084 | &value); |
47c16975 | 1085 | set_register_interruptible(ab8500, AB8500_INTERRUPT, |
2ced445e | 1086 | AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); |
62579266 RV |
1087 | } |
1088 | ||
47c16975 MW |
1089 | ret = abx500_register_ops(ab8500->dev, &ab8500_ops); |
1090 | if (ret) | |
2ced445e | 1091 | goto out_freeoldmask; |
47c16975 | 1092 | |
2ced445e | 1093 | for (i = 0; i < ab8500->mask_size; i++) |
62579266 RV |
1094 | ab8500->mask[i] = ab8500->oldmask[i] = 0xff; |
1095 | ||
1096 | if (ab8500->irq_base) { | |
1097 | ret = ab8500_irq_init(ab8500); | |
1098 | if (ret) | |
2ced445e | 1099 | goto out_freeoldmask; |
62579266 RV |
1100 | |
1101 | ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, | |
4f079985 MW |
1102 | IRQF_ONESHOT | IRQF_NO_SUSPEND, |
1103 | "ab8500", ab8500); | |
62579266 RV |
1104 | if (ret) |
1105 | goto out_removeirq; | |
1106 | } | |
1107 | ||
d6255529 LW |
1108 | ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, |
1109 | ARRAY_SIZE(abx500_common_devs), NULL, | |
1110 | ab8500->irq_base); | |
1111 | ||
1112 | if (ret) | |
1113 | goto out_freeirq; | |
1114 | ||
1115 | if (is_ab9540(ab8500)) | |
1116 | ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, | |
1117 | ARRAY_SIZE(ab9540_devs), NULL, | |
1118 | ab8500->irq_base); | |
1119 | else | |
1120 | ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, | |
1121 | ARRAY_SIZE(ab9540_devs), NULL, | |
62579266 RV |
1122 | ab8500->irq_base); |
1123 | if (ret) | |
1124 | goto out_freeirq; | |
1125 | ||
d6255529 LW |
1126 | if (is_ab9540(ab8500)) |
1127 | ret = sysfs_create_group(&ab8500->dev->kobj, | |
1128 | &ab9540_attr_group); | |
1129 | else | |
1130 | ret = sysfs_create_group(&ab8500->dev->kobj, | |
1131 | &ab8500_attr_group); | |
cca69b67 MW |
1132 | if (ret) |
1133 | dev_err(ab8500->dev, "error creating sysfs entries\n"); | |
d6255529 LW |
1134 | else |
1135 | return ret; | |
62579266 RV |
1136 | |
1137 | out_freeirq: | |
6d95b7fd | 1138 | if (ab8500->irq_base) |
62579266 RV |
1139 | free_irq(ab8500->irq, ab8500); |
1140 | out_removeirq: | |
6d95b7fd | 1141 | if (ab8500->irq_base) |
62579266 | 1142 | ab8500_irq_remove(ab8500); |
2ced445e LW |
1143 | out_freeoldmask: |
1144 | kfree(ab8500->oldmask); | |
1145 | out_freemask: | |
1146 | kfree(ab8500->mask); | |
6d95b7fd | 1147 | |
62579266 RV |
1148 | return ret; |
1149 | } | |
1150 | ||
1151 | int __devexit ab8500_exit(struct ab8500 *ab8500) | |
1152 | { | |
d6255529 LW |
1153 | if (is_ab9540(ab8500)) |
1154 | sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); | |
1155 | else | |
1156 | sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); | |
62579266 RV |
1157 | mfd_remove_devices(ab8500->dev); |
1158 | if (ab8500->irq_base) { | |
1159 | free_irq(ab8500->irq, ab8500); | |
1160 | ab8500_irq_remove(ab8500); | |
1161 | } | |
2ced445e LW |
1162 | kfree(ab8500->oldmask); |
1163 | kfree(ab8500->mask); | |
62579266 RV |
1164 | |
1165 | return 0; | |
1166 | } | |
1167 | ||
adceed62 | 1168 | MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); |
62579266 RV |
1169 | MODULE_DESCRIPTION("AB8500 MFD core"); |
1170 | MODULE_LICENSE("GPL v2"); |