Merge tag 'v3.10.55' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / tuners / xc5000.c
CommitLineData
aacb9d31
ST
1/*
2 * Driver for Xceive XC5000 "QAM/8VSB single chip tuner"
3 *
4 * Copyright (c) 2007 Xceive Corporation
6d897616 5 * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
e80858e8 6 * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com>
aacb9d31
ST
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 *
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/moduleparam.h>
4917019d 26#include <linux/videodev2.h>
aacb9d31
ST
27#include <linux/delay.h>
28#include <linux/dvb/frontend.h>
29#include <linux/i2c.h>
30
31#include "dvb_frontend.h"
32
33#include "xc5000.h"
89fd2854 34#include "tuner-i2c.h"
aacb9d31
ST
35
36static int debug;
37module_param(debug, int, 0644);
38MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
39
b6bd5eb8
DH
40static int no_poweroff;
41module_param(no_poweroff, int, 0644);
42MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n"
43 "\t\t1 keep device energized and with tuner ready all the times.\n"
44 "\t\tFaster, but consumes more power and keeps the device hotter");
45
89fd2854
MK
46static DEFINE_MUTEX(xc5000_list_mutex);
47static LIST_HEAD(hybrid_tuner_instance_list);
48
8f3cd530 49#define dprintk(level, fmt, arg...) if (debug >= level) \
aacb9d31
ST
50 printk(KERN_INFO "%s: " fmt, "xc5000", ## arg)
51
ffb41234 52struct xc5000_priv {
89fd2854
MK
53 struct tuner_i2c_props i2c_props;
54 struct list_head hybrid_tuner_instance_list;
ffb41234 55
2a6003c2 56 u32 if_khz;
409328a4 57 u16 xtal_khz;
ce1c89d4 58 u32 freq_hz, freq_offset;
ffb41234
MK
59 u32 bandwidth;
60 u8 video_standard;
61 u8 rf_mode;
496e9057 62 u8 radio_input;
76efb0ba 63
6fab81df 64 int chip_id;
de49bc6e 65 u16 pll_register_no;
22d5c6f5
DH
66 u8 init_status_supported;
67 u8 fw_checksum_supported;
ffb41234
MK
68};
69
aacb9d31 70/* Misc Defines */
724dcbfa 71#define MAX_TV_STANDARD 24
aacb9d31
ST
72#define XC_MAX_I2C_WRITE_LENGTH 64
73
74/* Signal Types */
75#define XC_RF_MODE_AIR 0
76#define XC_RF_MODE_CABLE 1
77
78/* Result codes */
79#define XC_RESULT_SUCCESS 0
80#define XC_RESULT_RESET_FAILURE 1
81#define XC_RESULT_I2C_WRITE_FAILURE 2
82#define XC_RESULT_I2C_READ_FAILURE 3
83#define XC_RESULT_OUT_OF_RANGE 5
84
27c685a4
ST
85/* Product id */
86#define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000
87#define XC_PRODUCT_ID_FW_LOADED 0x1388
88
aacb9d31
ST
89/* Registers */
90#define XREG_INIT 0x00
91#define XREG_VIDEO_MODE 0x01
92#define XREG_AUDIO_MODE 0x02
93#define XREG_RF_FREQ 0x03
94#define XREG_D_CODE 0x04
95#define XREG_IF_OUT 0x05
96#define XREG_SEEK_MODE 0x07
7f05b530 97#define XREG_POWER_DOWN 0x0A /* Obsolete */
724dcbfa
DB
98/* Set the output amplitude - SIF for analog, DTVP/DTVN for digital */
99#define XREG_OUTPUT_AMP 0x0B
aacb9d31
ST
100#define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */
101#define XREG_SMOOTHEDCVBS 0x0E
102#define XREG_XTALFREQ 0x0F
81c4dfe7 103#define XREG_FINERFREQ 0x10
aacb9d31
ST
104#define XREG_DDIMODE 0x11
105
106#define XREG_ADC_ENV 0x00
107#define XREG_QUALITY 0x01
108#define XREG_FRAME_LINES 0x02
109#define XREG_HSYNC_FREQ 0x03
110#define XREG_LOCK 0x04
111#define XREG_FREQ_ERROR 0x05
112#define XREG_SNR 0x06
113#define XREG_VERSION 0x07
114#define XREG_PRODUCT_ID 0x08
115#define XREG_BUSY 0x09
bae7b7d7 116#define XREG_BUILD 0x0D
7c287f18 117#define XREG_TOTALGAIN 0x0F
22d5c6f5
DH
118#define XREG_FW_CHECKSUM 0x12
119#define XREG_INIT_STATUS 0x13
aacb9d31
ST
120
121/*
122 Basic firmware description. This will remain with
123 the driver for documentation purposes.
124
125 This represents an I2C firmware file encoded as a
126 string of unsigned char. Format is as follows:
127
128 char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB
129 char[1 ]=len0_LSB -> length of first write transaction
130 char[2 ]=data0 -> first byte to be sent
131 char[3 ]=data1
132 char[4 ]=data2
133 char[ ]=...
134 char[M ]=dataN -> last byte to be sent
135 char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB
136 char[M+2]=len1_LSB -> length of second write transaction
137 char[M+3]=data0
138 char[M+4]=data1
139 ...
140 etc.
141
142 The [len] value should be interpreted as follows:
143
144 len= len_MSB _ len_LSB
145 len=1111_1111_1111_1111 : End of I2C_SEQUENCE
146 len=0000_0000_0000_0000 : Reset command: Do hardware reset
147 len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767)
148 len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms
149
150 For the RESET and WAIT commands, the two following bytes will contain
151 immediately the length of the following transaction.
152
153*/
8f3cd530 154struct XC_TV_STANDARD {
aacb9d31 155 char *Name;
e12671cf
ST
156 u16 AudioMode;
157 u16 VideoMode;
8f3cd530 158};
aacb9d31
ST
159
160/* Tuner standards */
27c685a4
ST
161#define MN_NTSC_PAL_BTSC 0
162#define MN_NTSC_PAL_A2 1
163#define MN_NTSC_PAL_EIAJ 2
164#define MN_NTSC_PAL_Mono 3
165#define BG_PAL_A2 4
166#define BG_PAL_NICAM 5
167#define BG_PAL_MONO 6
168#define I_PAL_NICAM 7
169#define I_PAL_NICAM_MONO 8
170#define DK_PAL_A2 9
171#define DK_PAL_NICAM 10
172#define DK_PAL_MONO 11
173#define DK_SECAM_A2DK1 12
174#define DK_SECAM_A2LDK3 13
175#define DK_SECAM_A2MONO 14
176#define L_SECAM_NICAM 15
177#define LC_SECAM_NICAM 16
178#define DTV6 17
179#define DTV8 18
180#define DTV7_8 19
181#define DTV7 20
182#define FM_Radio_INPUT2 21
183#define FM_Radio_INPUT1 22
724dcbfa 184#define FM_Radio_INPUT1_MONO 23
aacb9d31 185
8f3cd530 186static struct XC_TV_STANDARD XC5000_Standard[MAX_TV_STANDARD] = {
aacb9d31
ST
187 {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020},
188 {"M/N-NTSC/PAL-A2", 0x0600, 0x8020},
189 {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020},
190 {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020},
191 {"B/G-PAL-A2", 0x0A00, 0x8049},
192 {"B/G-PAL-NICAM", 0x0C04, 0x8049},
193 {"B/G-PAL-MONO", 0x0878, 0x8059},
194 {"I-PAL-NICAM", 0x1080, 0x8009},
195 {"I-PAL-NICAM-MONO", 0x0E78, 0x8009},
196 {"D/K-PAL-A2", 0x1600, 0x8009},
197 {"D/K-PAL-NICAM", 0x0E80, 0x8009},
198 {"D/K-PAL-MONO", 0x1478, 0x8009},
199 {"D/K-SECAM-A2 DK1", 0x1200, 0x8009},
8f3cd530 200 {"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009},
aacb9d31
ST
201 {"D/K-SECAM-A2 MONO", 0x1478, 0x8009},
202 {"L-SECAM-NICAM", 0x8E82, 0x0009},
203 {"L'-SECAM-NICAM", 0x8E82, 0x4009},
204 {"DTV6", 0x00C0, 0x8002},
205 {"DTV8", 0x00C0, 0x800B},
206 {"DTV7/8", 0x00C0, 0x801B},
207 {"DTV7", 0x00C0, 0x8007},
208 {"FM Radio-INPUT2", 0x9802, 0x9002},
724dcbfa
DB
209 {"FM Radio-INPUT1", 0x0208, 0x9002},
210 {"FM Radio-INPUT1_MONO", 0x0278, 0x9002}
aacb9d31
ST
211};
212
ddea427f
MK
213
214struct xc5000_fw_cfg {
215 char *name;
216 u16 size;
de49bc6e 217 u16 pll_reg;
22d5c6f5
DH
218 u8 init_status_supported;
219 u8 fw_checksum_supported;
ddea427f
MK
220};
221
3422f2a6 222#define XC5000A_FIRMWARE "dvb-fe-xc5000-1.6.114.fw"
a3db60bc 223static const struct xc5000_fw_cfg xc5000a_1_6_114 = {
3422f2a6 224 .name = XC5000A_FIRMWARE,
76efb0ba 225 .size = 12401,
de49bc6e 226 .pll_reg = 0x806c,
76efb0ba
MK
227};
228
3de5bffd 229#define XC5000C_FIRMWARE "dvb-fe-xc5000c-4.1.30.7.fw"
7d3d0d8d 230static const struct xc5000_fw_cfg xc5000c_41_024_5 = {
3422f2a6 231 .name = XC5000C_FIRMWARE,
7d3d0d8d 232 .size = 16497,
de49bc6e 233 .pll_reg = 0x13,
22d5c6f5
DH
234 .init_status_supported = 1,
235 .fw_checksum_supported = 1,
d8398805
MK
236};
237
a3db60bc 238static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id)
ddea427f 239{
6fab81df 240 switch (chip_id) {
ddea427f 241 default:
6fab81df 242 case XC5000A:
ddea427f 243 return &xc5000a_1_6_114;
6fab81df 244 case XC5000C:
7d3d0d8d 245 return &xc5000c_41_024_5;
ddea427f
MK
246 }
247}
248
de49bc6e 249static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force);
91bd625e 250static int xc5000_is_firmware_loaded(struct dvb_frontend *fe);
bdd33563 251static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val);
91bd625e 252static int xc5000_TunerReset(struct dvb_frontend *fe);
aacb9d31 253
e12671cf 254static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
aacb9d31 255{
d7800d4e
DH
256 struct i2c_msg msg = { .addr = priv->i2c_props.addr,
257 .flags = 0, .buf = buf, .len = len };
258
259 if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
260 printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n", len);
261 return XC_RESULT_I2C_WRITE_FAILURE;
262 }
263 return XC_RESULT_SUCCESS;
aacb9d31
ST
264}
265
1cdffda7 266#if 0
bdd33563
DH
267/* This routine is never used because the only time we read data from the
268 i2c bus is when we read registers, and we want that to be an atomic i2c
269 transaction in case we are on a multi-master bus */
e12671cf 270static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
aacb9d31 271{
bdd33563
DH
272 struct i2c_msg msg = { .addr = priv->i2c_props.addr,
273 .flags = I2C_M_RD, .buf = buf, .len = len };
274
275 if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) {
276 printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n", len);
277 return -EREMOTEIO;
278 }
279 return 0;
aacb9d31 280}
1cdffda7 281#endif
aacb9d31 282
4743319f
DB
283static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
284{
285 u8 buf[2] = { reg >> 8, reg & 0xff };
286 u8 bval[2] = { 0, 0 };
287 struct i2c_msg msg[2] = {
288 { .addr = priv->i2c_props.addr,
289 .flags = 0, .buf = &buf[0], .len = 2 },
290 { .addr = priv->i2c_props.addr,
291 .flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
292 };
293
294 if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
295 printk(KERN_WARNING "xc5000: I2C read failed\n");
296 return -EREMOTEIO;
297 }
298
299 *val = (bval[0] << 8) | bval[1];
300 return XC_RESULT_SUCCESS;
301}
302
e12671cf 303static void xc_wait(int wait_ms)
aacb9d31 304{
e12671cf 305 msleep(wait_ms);
aacb9d31
ST
306}
307
91bd625e 308static int xc5000_TunerReset(struct dvb_frontend *fe)
aacb9d31
ST
309{
310 struct xc5000_priv *priv = fe->tuner_priv;
311 int ret;
312
271ddbf7 313 dprintk(1, "%s()\n", __func__);
aacb9d31 314
d7cba043
MK
315 if (fe->callback) {
316 ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ?
30650961
MK
317 fe->dvb->priv :
318 priv->i2c_props.adap->algo_data,
d7cba043 319 DVB_FRONTEND_COMPONENT_TUNER,
30650961 320 XC5000_TUNER_RESET, 0);
91bd625e 321 if (ret) {
aacb9d31 322 printk(KERN_ERR "xc5000: reset failed\n");
91bd625e
DH
323 return XC_RESULT_RESET_FAILURE;
324 }
325 } else {
27c685a4 326 printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n");
91bd625e
DH
327 return XC_RESULT_RESET_FAILURE;
328 }
329 return XC_RESULT_SUCCESS;
aacb9d31
ST
330}
331
e12671cf 332static int xc_write_reg(struct xc5000_priv *priv, u16 regAddr, u16 i2cData)
aacb9d31 333{
e12671cf 334 u8 buf[4];
a37791c5 335 int WatchDogTimer = 100;
aacb9d31
ST
336 int result;
337
338 buf[0] = (regAddr >> 8) & 0xFF;
339 buf[1] = regAddr & 0xFF;
340 buf[2] = (i2cData >> 8) & 0xFF;
341 buf[3] = i2cData & 0xFF;
342 result = xc_send_i2c_data(priv, buf, 4);
e12671cf 343 if (result == XC_RESULT_SUCCESS) {
aacb9d31
ST
344 /* wait for busy flag to clear */
345 while ((WatchDogTimer > 0) && (result == XC_RESULT_SUCCESS)) {
1cdffda7 346 result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf);
aacb9d31 347 if (result == XC_RESULT_SUCCESS) {
4743319f
DB
348 if ((buf[0] == 0) && (buf[1] == 0)) {
349 /* busy flag cleared */
aacb9d31 350 break;
4743319f
DB
351 } else {
352 xc_wait(5); /* wait 5 ms */
353 WatchDogTimer--;
aacb9d31
ST
354 }
355 }
356 }
357 }
0a3dabb1 358 if (WatchDogTimer <= 0)
aacb9d31
ST
359 result = XC_RESULT_I2C_WRITE_FAILURE;
360
361 return result;
362}
363
c63e87e9 364static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence)
aacb9d31
ST
365{
366 struct xc5000_priv *priv = fe->tuner_priv;
367
368 int i, nbytes_to_send, result;
369 unsigned int len, pos, index;
e12671cf 370 u8 buf[XC_MAX_I2C_WRITE_LENGTH];
aacb9d31 371
8f3cd530
ST
372 index = 0;
373 while ((i2c_sequence[index] != 0xFF) ||
374 (i2c_sequence[index + 1] != 0xFF)) {
375 len = i2c_sequence[index] * 256 + i2c_sequence[index+1];
e12671cf 376 if (len == 0x0000) {
aacb9d31 377 /* RESET command */
91bd625e 378 result = xc5000_TunerReset(fe);
aacb9d31 379 index += 2;
e12671cf 380 if (result != XC_RESULT_SUCCESS)
aacb9d31
ST
381 return result;
382 } else if (len & 0x8000) {
383 /* WAIT command */
384 xc_wait(len & 0x7FFF);
385 index += 2;
386 } else {
387 /* Send i2c data whilst ensuring individual transactions
388 * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes.
389 */
390 index += 2;
391 buf[0] = i2c_sequence[index];
392 buf[1] = i2c_sequence[index + 1];
393 pos = 2;
394 while (pos < len) {
8f3cd530
ST
395 if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2)
396 nbytes_to_send =
397 XC_MAX_I2C_WRITE_LENGTH;
398 else
aacb9d31 399 nbytes_to_send = (len - pos + 2);
8f3cd530
ST
400 for (i = 2; i < nbytes_to_send; i++) {
401 buf[i] = i2c_sequence[index + pos +
402 i - 2];
aacb9d31 403 }
8f3cd530
ST
404 result = xc_send_i2c_data(priv, buf,
405 nbytes_to_send);
aacb9d31 406
e12671cf 407 if (result != XC_RESULT_SUCCESS)
aacb9d31
ST
408 return result;
409
410 pos += nbytes_to_send - 2;
411 }
412 index += len;
413 }
414 }
415 return XC_RESULT_SUCCESS;
416}
417
e12671cf 418static int xc_initialize(struct xc5000_priv *priv)
aacb9d31 419{
271ddbf7 420 dprintk(1, "%s()\n", __func__);
aacb9d31
ST
421 return xc_write_reg(priv, XREG_INIT, 0);
422}
423
e12671cf 424static int xc_SetTVStandard(struct xc5000_priv *priv,
01ae7286 425 u16 VideoMode, u16 AudioMode, u8 RadioMode)
aacb9d31
ST
426{
427 int ret;
271ddbf7 428 dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, VideoMode, AudioMode);
01ae7286
DB
429 if (RadioMode) {
430 dprintk(1, "%s() Standard = %s\n",
431 __func__,
432 XC5000_Standard[RadioMode].Name);
433 } else {
434 dprintk(1, "%s() Standard = %s\n",
435 __func__,
436 XC5000_Standard[priv->video_standard].Name);
437 }
aacb9d31
ST
438
439 ret = xc_write_reg(priv, XREG_VIDEO_MODE, VideoMode);
440 if (ret == XC_RESULT_SUCCESS)
441 ret = xc_write_reg(priv, XREG_AUDIO_MODE, AudioMode);
442
443 return ret;
444}
445
e12671cf 446static int xc_SetSignalSource(struct xc5000_priv *priv, u16 rf_mode)
aacb9d31 447{
271ddbf7 448 dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode,
aacb9d31
ST
449 rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE");
450
8f3cd530 451 if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) {
aacb9d31
ST
452 rf_mode = XC_RF_MODE_CABLE;
453 printk(KERN_ERR
454 "%s(), Invalid mode, defaulting to CABLE",
271ddbf7 455 __func__);
aacb9d31
ST
456 }
457 return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode);
458}
459
e12671cf 460static const struct dvb_tuner_ops xc5000_tuner_ops;
aacb9d31 461
e12671cf
ST
462static int xc_set_RF_frequency(struct xc5000_priv *priv, u32 freq_hz)
463{
464 u16 freq_code;
aacb9d31 465
271ddbf7 466 dprintk(1, "%s(%u)\n", __func__, freq_hz);
aacb9d31 467
e12671cf
ST
468 if ((freq_hz > xc5000_tuner_ops.info.frequency_max) ||
469 (freq_hz < xc5000_tuner_ops.info.frequency_min))
aacb9d31
ST
470 return XC_RESULT_OUT_OF_RANGE;
471
e12671cf
ST
472 freq_code = (u16)(freq_hz / 15625);
473
81c4dfe7
DH
474 /* Starting in firmware version 1.1.44, Xceive recommends using the
475 FINERFREQ for all normal tuning (the doc indicates reg 0x03 should
476 only be used for fast scanning for channel lock) */
477 return xc_write_reg(priv, XREG_FINERFREQ, freq_code);
aacb9d31
ST
478}
479
aacb9d31 480
e12671cf
ST
481static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz)
482{
483 u32 freq_code = (freq_khz * 1024)/1000;
484 dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n",
271ddbf7 485 __func__, freq_khz, freq_code);
aacb9d31 486
e12671cf 487 return xc_write_reg(priv, XREG_IF_OUT, freq_code);
aacb9d31
ST
488}
489
aacb9d31 490
e12671cf 491static int xc_get_ADC_Envelope(struct xc5000_priv *priv, u16 *adc_envelope)
aacb9d31 492{
bdd33563 493 return xc5000_readreg(priv, XREG_ADC_ENV, adc_envelope);
aacb9d31
ST
494}
495
e12671cf 496static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz)
aacb9d31
ST
497{
498 int result;
e12671cf 499 u16 regData;
aacb9d31
ST
500 u32 tmp;
501
bdd33563 502 result = xc5000_readreg(priv, XREG_FREQ_ERROR, &regData);
7988fc21 503 if (result != XC_RESULT_SUCCESS)
aacb9d31
ST
504 return result;
505
506 tmp = (u32)regData;
e12671cf 507 (*freq_error_hz) = (tmp * 15625) / 1000;
aacb9d31
ST
508 return result;
509}
510
e12671cf 511static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status)
aacb9d31 512{
bdd33563 513 return xc5000_readreg(priv, XREG_LOCK, lock_status);
aacb9d31
ST
514}
515
e12671cf
ST
516static int xc_get_version(struct xc5000_priv *priv,
517 u8 *hw_majorversion, u8 *hw_minorversion,
518 u8 *fw_majorversion, u8 *fw_minorversion)
aacb9d31 519{
e12671cf 520 u16 data;
aacb9d31
ST
521 int result;
522
bdd33563 523 result = xc5000_readreg(priv, XREG_VERSION, &data);
7988fc21 524 if (result != XC_RESULT_SUCCESS)
aacb9d31
ST
525 return result;
526
e12671cf
ST
527 (*hw_majorversion) = (data >> 12) & 0x0F;
528 (*hw_minorversion) = (data >> 8) & 0x0F;
529 (*fw_majorversion) = (data >> 4) & 0x0F;
530 (*fw_minorversion) = data & 0x0F;
aacb9d31
ST
531
532 return 0;
533}
534
bae7b7d7
DH
535static int xc_get_buildversion(struct xc5000_priv *priv, u16 *buildrev)
536{
537 return xc5000_readreg(priv, XREG_BUILD, buildrev);
538}
539
e12671cf 540static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz)
aacb9d31 541{
e12671cf 542 u16 regData;
aacb9d31
ST
543 int result;
544
bdd33563 545 result = xc5000_readreg(priv, XREG_HSYNC_FREQ, &regData);
7988fc21 546 if (result != XC_RESULT_SUCCESS)
aacb9d31
ST
547 return result;
548
549 (*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100;
550 return result;
551}
552
e12671cf 553static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines)
aacb9d31 554{
bdd33563 555 return xc5000_readreg(priv, XREG_FRAME_LINES, frame_lines);
aacb9d31
ST
556}
557
e12671cf 558static int xc_get_quality(struct xc5000_priv *priv, u16 *quality)
aacb9d31 559{
bdd33563 560 return xc5000_readreg(priv, XREG_QUALITY, quality);
aacb9d31
ST
561}
562
7c287f18
DH
563static int xc_get_analogsnr(struct xc5000_priv *priv, u16 *snr)
564{
565 return xc5000_readreg(priv, XREG_SNR, snr);
566}
567
568static int xc_get_totalgain(struct xc5000_priv *priv, u16 *totalgain)
569{
570 return xc5000_readreg(priv, XREG_TOTALGAIN, totalgain);
571}
572
e12671cf 573static u16 WaitForLock(struct xc5000_priv *priv)
aacb9d31 574{
e12671cf 575 u16 lockState = 0;
aacb9d31 576 int watchDogCount = 40;
e12671cf
ST
577
578 while ((lockState == 0) && (watchDogCount > 0)) {
aacb9d31 579 xc_get_lock_status(priv, &lockState);
e12671cf 580 if (lockState != 1) {
aacb9d31
ST
581 xc_wait(5);
582 watchDogCount--;
583 }
584 }
585 return lockState;
586}
587
a78baacf
DH
588#define XC_TUNE_ANALOG 0
589#define XC_TUNE_DIGITAL 1
590static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode)
aacb9d31
ST
591{
592 int found = 0;
593
271ddbf7 594 dprintk(1, "%s(%u)\n", __func__, freq_hz);
aacb9d31 595
e12671cf 596 if (xc_set_RF_frequency(priv, freq_hz) != XC_RESULT_SUCCESS)
aacb9d31
ST
597 return 0;
598
a78baacf
DH
599 if (mode == XC_TUNE_ANALOG) {
600 if (WaitForLock(priv) == 1)
601 found = 1;
602 }
aacb9d31
ST
603
604 return found;
605}
606
7d3d0d8d
MK
607static int xc_set_xtal(struct dvb_frontend *fe)
608{
609 struct xc5000_priv *priv = fe->tuner_priv;
610 int ret = XC_RESULT_SUCCESS;
611
612 switch (priv->chip_id) {
613 default:
614 case XC5000A:
615 /* 32.000 MHz xtal is default */
616 break;
617 case XC5000C:
618 switch (priv->xtal_khz) {
619 default:
620 case 32000:
621 /* 32.000 MHz xtal is default */
622 break;
623 case 31875:
624 /* 31.875 MHz xtal configuration */
625 ret = xc_write_reg(priv, 0x000f, 0x8081);
626 break;
627 }
628 break;
629 }
630 return ret;
631}
aacb9d31 632
8f3cd530 633static int xc5000_fwupload(struct dvb_frontend *fe)
aacb9d31
ST
634{
635 struct xc5000_priv *priv = fe->tuner_priv;
636 const struct firmware *fw;
637 int ret;
a3db60bc
MK
638 const struct xc5000_fw_cfg *desired_fw =
639 xc5000_assign_firmware(priv->chip_id);
de49bc6e 640 priv->pll_register_no = desired_fw->pll_reg;
22d5c6f5
DH
641 priv->init_status_supported = desired_fw->init_status_supported;
642 priv->fw_checksum_supported = desired_fw->fw_checksum_supported;
aacb9d31 643
e12671cf
ST
644 /* request the firmware, this will block and timeout */
645 printk(KERN_INFO "xc5000: waiting for firmware upload (%s)...\n",
6fab81df 646 desired_fw->name);
e12671cf 647
6fab81df 648 ret = request_firmware(&fw, desired_fw->name,
e9785250 649 priv->i2c_props.adap->dev.parent);
aacb9d31
ST
650 if (ret) {
651 printk(KERN_ERR "xc5000: Upload failed. (file not found?)\n");
652 ret = XC_RESULT_RESET_FAILURE;
5ea60531 653 goto out;
aacb9d31 654 } else {
34a0db92 655 printk(KERN_DEBUG "xc5000: firmware read %Zu bytes.\n",
3f51451b 656 fw->size);
aacb9d31
ST
657 ret = XC_RESULT_SUCCESS;
658 }
659
6fab81df 660 if (fw->size != desired_fw->size) {
aacb9d31
ST
661 printk(KERN_ERR "xc5000: firmware incorrect size\n");
662 ret = XC_RESULT_RESET_FAILURE;
663 } else {
34a0db92 664 printk(KERN_INFO "xc5000: firmware uploading...\n");
8f3cd530 665 ret = xc_load_i2c_sequence(fe, fw->data);
7d3d0d8d
MK
666 if (XC_RESULT_SUCCESS == ret)
667 ret = xc_set_xtal(fe);
35320676
MK
668 if (XC_RESULT_SUCCESS == ret)
669 printk(KERN_INFO "xc5000: firmware upload complete...\n");
670 else
671 printk(KERN_ERR "xc5000: firmware upload failed...\n");
aacb9d31
ST
672 }
673
5ea60531 674out:
aacb9d31
ST
675 release_firmware(fw);
676 return ret;
677}
678
e12671cf 679static void xc_debug_dump(struct xc5000_priv *priv)
aacb9d31 680{
e12671cf
ST
681 u16 adc_envelope;
682 u32 freq_error_hz = 0;
683 u16 lock_status;
684 u32 hsync_freq_hz = 0;
685 u16 frame_lines;
686 u16 quality;
7c287f18
DH
687 u16 snr;
688 u16 totalgain;
e12671cf
ST
689 u8 hw_majorversion = 0, hw_minorversion = 0;
690 u8 fw_majorversion = 0, fw_minorversion = 0;
bae7b7d7 691 u16 fw_buildversion = 0;
de49bc6e 692 u16 regval;
aacb9d31
ST
693
694 /* Wait for stats to stabilize.
695 * Frame Lines needs two frame times after initial lock
696 * before it is valid.
697 */
e12671cf 698 xc_wait(100);
aacb9d31 699
e12671cf
ST
700 xc_get_ADC_Envelope(priv, &adc_envelope);
701 dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope);
aacb9d31 702
e12671cf
ST
703 xc_get_frequency_error(priv, &freq_error_hz);
704 dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz);
aacb9d31 705
e12671cf
ST
706 xc_get_lock_status(priv, &lock_status);
707 dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n",
aacb9d31
ST
708 lock_status);
709
710 xc_get_version(priv, &hw_majorversion, &hw_minorversion,
e12671cf 711 &fw_majorversion, &fw_minorversion);
bae7b7d7 712 xc_get_buildversion(priv, &fw_buildversion);
ca60a45d 713 dprintk(1, "*** HW: V%d.%d, FW: V %d.%d.%d\n",
aacb9d31 714 hw_majorversion, hw_minorversion,
bae7b7d7 715 fw_majorversion, fw_minorversion, fw_buildversion);
aacb9d31 716
e12671cf
ST
717 xc_get_hsync_freq(priv, &hsync_freq_hz);
718 dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz);
aacb9d31 719
e12671cf
ST
720 xc_get_frame_lines(priv, &frame_lines);
721 dprintk(1, "*** Frame lines = %d\n", frame_lines);
aacb9d31 722
e12671cf 723 xc_get_quality(priv, &quality);
1aa9c487 724 dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality & 0x07);
7c287f18
DH
725
726 xc_get_analogsnr(priv, &snr);
727 dprintk(1, "*** Unweighted analog SNR = %d dB\n", snr & 0x3f);
728
729 xc_get_totalgain(priv, &totalgain);
730 dprintk(1, "*** Total gain = %d.%d dB\n", totalgain / 256,
731 (totalgain % 256) * 100 / 256);
de49bc6e
DH
732
733 if (priv->pll_register_no) {
734 xc5000_readreg(priv, priv->pll_register_no, &regval);
735 dprintk(1, "*** PLL lock status = 0x%04x\n", regval);
736 }
aacb9d31
ST
737}
738
14d24d14 739static int xc5000_set_params(struct dvb_frontend *fe)
aacb9d31 740{
fd66c45d 741 int ret, b;
aacb9d31 742 struct xc5000_priv *priv = fe->tuner_priv;
fd66c45d
MCC
743 u32 bw = fe->dtv_property_cache.bandwidth_hz;
744 u32 freq = fe->dtv_property_cache.frequency;
745 u32 delsys = fe->dtv_property_cache.delivery_system;
aacb9d31 746
de49bc6e 747 if (xc_load_fw_and_init_tuner(fe, 0) != XC_RESULT_SUCCESS) {
fc7a74ba
DH
748 dprintk(1, "Unable to load firmware and init tuner\n");
749 return -EINVAL;
760c466c 750 }
8e4c6797 751
fd66c45d 752 dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq);
aacb9d31 753
fd66c45d
MCC
754 switch (delsys) {
755 case SYS_ATSC:
756 dprintk(1, "%s() VSB modulation\n", __func__);
757 priv->rf_mode = XC_RF_MODE_AIR;
ce1c89d4 758 priv->freq_offset = 1750000;
fd66c45d
MCC
759 priv->video_standard = DTV6;
760 break;
761 case SYS_DVBC_ANNEX_B:
762 dprintk(1, "%s() QAM modulation\n", __func__);
763 priv->rf_mode = XC_RF_MODE_CABLE;
ce1c89d4 764 priv->freq_offset = 1750000;
fd66c45d
MCC
765 priv->video_standard = DTV6;
766 break;
5cf73ce1
MCC
767 case SYS_ISDBT:
768 /* All ISDB-T are currently for 6 MHz bw */
769 if (!bw)
770 bw = 6000000;
771 /* fall to OFDM handling */
772 case SYS_DMBTH:
fd66c45d
MCC
773 case SYS_DVBT:
774 case SYS_DVBT2:
6c99080d 775 dprintk(1, "%s() OFDM\n", __func__);
fd66c45d
MCC
776 switch (bw) {
777 case 6000000:
6c99080d 778 priv->video_standard = DTV6;
ce1c89d4 779 priv->freq_offset = 1750000;
6c99080d 780 break;
fd66c45d 781 case 7000000:
0433cd28 782 priv->video_standard = DTV7;
ce1c89d4 783 priv->freq_offset = 2250000;
0433cd28 784 break;
fd66c45d 785 case 8000000:
6c99080d 786 priv->video_standard = DTV8;
ce1c89d4 787 priv->freq_offset = 2750000;
6c99080d
DW
788 break;
789 default:
790 printk(KERN_ERR "xc5000 bandwidth not set!\n");
791 return -EINVAL;
792 }
aacb9d31 793 priv->rf_mode = XC_RF_MODE_AIR;
cf1364b1 794 break;
fd66c45d
MCC
795 case SYS_DVBC_ANNEX_A:
796 case SYS_DVBC_ANNEX_C:
797 dprintk(1, "%s() QAM modulation\n", __func__);
798 priv->rf_mode = XC_RF_MODE_CABLE;
799 if (bw <= 6000000) {
fd66c45d 800 priv->video_standard = DTV6;
ce1c89d4 801 priv->freq_offset = 1750000;
fd66c45d
MCC
802 b = 6;
803 } else if (bw <= 7000000) {
fd66c45d 804 priv->video_standard = DTV7;
ce1c89d4 805 priv->freq_offset = 2250000;
fd66c45d
MCC
806 b = 7;
807 } else {
fd66c45d 808 priv->video_standard = DTV7_8;
ce1c89d4 809 priv->freq_offset = 2750000;
fd66c45d 810 b = 8;
e80edce1 811 }
fd66c45d
MCC
812 dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__,
813 b, bw);
814 break;
815 default:
816 printk(KERN_ERR "xc5000: delivery system is not supported!\n");
aacb9d31
ST
817 return -EINVAL;
818 }
819
ce1c89d4
MCC
820 priv->freq_hz = freq - priv->freq_offset;
821
fd66c45d
MCC
822 dprintk(1, "%s() frequency=%d (compensated to %d)\n",
823 __func__, freq, priv->freq_hz);
aacb9d31 824
e12671cf
ST
825 ret = xc_SetSignalSource(priv, priv->rf_mode);
826 if (ret != XC_RESULT_SUCCESS) {
827 printk(KERN_ERR
828 "xc5000: xc_SetSignalSource(%d) failed\n",
829 priv->rf_mode);
830 return -EREMOTEIO;
831 }
aacb9d31 832
e12671cf 833 ret = xc_SetTVStandard(priv,
aacb9d31 834 XC5000_Standard[priv->video_standard].VideoMode,
01ae7286 835 XC5000_Standard[priv->video_standard].AudioMode, 0);
e12671cf
ST
836 if (ret != XC_RESULT_SUCCESS) {
837 printk(KERN_ERR "xc5000: xc_SetTVStandard failed\n");
838 return -EREMOTEIO;
839 }
840
2a6003c2 841 ret = xc_set_IF_frequency(priv, priv->if_khz);
e12671cf
ST
842 if (ret != XC_RESULT_SUCCESS) {
843 printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n",
2a6003c2 844 priv->if_khz);
e12671cf
ST
845 return -EIO;
846 }
847
724dcbfa
DB
848 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x8a);
849
a78baacf 850 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL);
aacb9d31 851
e12671cf
ST
852 if (debug)
853 xc_debug_dump(priv);
aacb9d31 854
c6f56e7d
MCC
855 priv->bandwidth = bw;
856
aacb9d31
ST
857 return 0;
858}
859
e470d817
ST
860static int xc5000_is_firmware_loaded(struct dvb_frontend *fe)
861{
862 struct xc5000_priv *priv = fe->tuner_priv;
863 int ret;
864 u16 id;
865
866 ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id);
867 if (ret == XC_RESULT_SUCCESS) {
868 if (id == XC_PRODUCT_ID_FW_NOT_LOADED)
869 ret = XC_RESULT_RESET_FAILURE;
870 else
871 ret = XC_RESULT_SUCCESS;
872 }
873
874 dprintk(1, "%s() returns %s id = 0x%x\n", __func__,
875 ret == XC_RESULT_SUCCESS ? "True" : "False", id);
876 return ret;
877}
878
d7009cdc 879static int xc5000_set_tv_freq(struct dvb_frontend *fe,
27c685a4
ST
880 struct analog_parameters *params)
881{
882 struct xc5000_priv *priv = fe->tuner_priv;
de49bc6e 883 u16 pll_lock_status;
27c685a4
ST
884 int ret;
885
27c685a4 886 dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n",
271ddbf7 887 __func__, params->frequency);
27c685a4 888
1fab14ed
MCC
889 /* Fix me: it could be air. */
890 priv->rf_mode = params->mode;
891 if (params->mode > XC_RF_MODE_CABLE)
892 priv->rf_mode = XC_RF_MODE_CABLE;
27c685a4
ST
893
894 /* params->frequency is in units of 62.5khz */
895 priv->freq_hz = params->frequency * 62500;
896
897 /* FIX ME: Some video standards may have several possible audio
898 standards. We simply default to one of them here.
899 */
8f3cd530 900 if (params->std & V4L2_STD_MN) {
27c685a4
ST
901 /* default to BTSC audio standard */
902 priv->video_standard = MN_NTSC_PAL_BTSC;
903 goto tune_channel;
904 }
905
8f3cd530 906 if (params->std & V4L2_STD_PAL_BG) {
27c685a4
ST
907 /* default to NICAM audio standard */
908 priv->video_standard = BG_PAL_NICAM;
909 goto tune_channel;
910 }
911
8f3cd530 912 if (params->std & V4L2_STD_PAL_I) {
27c685a4
ST
913 /* default to NICAM audio standard */
914 priv->video_standard = I_PAL_NICAM;
915 goto tune_channel;
916 }
917
8f3cd530 918 if (params->std & V4L2_STD_PAL_DK) {
27c685a4
ST
919 /* default to NICAM audio standard */
920 priv->video_standard = DK_PAL_NICAM;
921 goto tune_channel;
922 }
923
8f3cd530 924 if (params->std & V4L2_STD_SECAM_DK) {
27c685a4
ST
925 /* default to A2 DK1 audio standard */
926 priv->video_standard = DK_SECAM_A2DK1;
927 goto tune_channel;
928 }
929
8f3cd530 930 if (params->std & V4L2_STD_SECAM_L) {
27c685a4
ST
931 priv->video_standard = L_SECAM_NICAM;
932 goto tune_channel;
933 }
934
8f3cd530 935 if (params->std & V4L2_STD_SECAM_LC) {
27c685a4
ST
936 priv->video_standard = LC_SECAM_NICAM;
937 goto tune_channel;
938 }
939
940tune_channel:
941 ret = xc_SetSignalSource(priv, priv->rf_mode);
942 if (ret != XC_RESULT_SUCCESS) {
8f3cd530 943 printk(KERN_ERR
27c685a4
ST
944 "xc5000: xc_SetSignalSource(%d) failed\n",
945 priv->rf_mode);
946 return -EREMOTEIO;
947 }
948
949 ret = xc_SetTVStandard(priv,
950 XC5000_Standard[priv->video_standard].VideoMode,
01ae7286 951 XC5000_Standard[priv->video_standard].AudioMode, 0);
27c685a4
ST
952 if (ret != XC_RESULT_SUCCESS) {
953 printk(KERN_ERR "xc5000: xc_SetTVStandard failed\n");
954 return -EREMOTEIO;
955 }
956
724dcbfa
DB
957 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
958
a78baacf 959 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
27c685a4
ST
960
961 if (debug)
962 xc_debug_dump(priv);
963
de49bc6e
DH
964 if (priv->pll_register_no != 0) {
965 msleep(20);
966 xc5000_readreg(priv, priv->pll_register_no, &pll_lock_status);
967 if (pll_lock_status > 63) {
968 /* PLL is unlocked, force reload of the firmware */
969 dprintk(1, "xc5000: PLL not locked (0x%x). Reloading...\n",
970 pll_lock_status);
971 if (xc_load_fw_and_init_tuner(fe, 1) != XC_RESULT_SUCCESS) {
972 printk(KERN_ERR "xc5000: Unable to reload fw\n");
973 return -EREMOTEIO;
974 }
975 goto tune_channel;
976 }
977 }
978
27c685a4
ST
979 return 0;
980}
981
d7009cdc
BILDB
982static int xc5000_set_radio_freq(struct dvb_frontend *fe,
983 struct analog_parameters *params)
984{
985 struct xc5000_priv *priv = fe->tuner_priv;
986 int ret = -EINVAL;
496e9057 987 u8 radio_input;
d7009cdc
BILDB
988
989 dprintk(1, "%s() frequency=%d (in units of khz)\n",
990 __func__, params->frequency);
991
496e9057
DH
992 if (priv->radio_input == XC5000_RADIO_NOT_CONFIGURED) {
993 dprintk(1, "%s() radio input not configured\n", __func__);
994 return -EINVAL;
995 }
996
997 if (priv->radio_input == XC5000_RADIO_FM1)
998 radio_input = FM_Radio_INPUT1;
999 else if (priv->radio_input == XC5000_RADIO_FM2)
1000 radio_input = FM_Radio_INPUT2;
724dcbfa
DB
1001 else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
1002 radio_input = FM_Radio_INPUT1_MONO;
496e9057
DH
1003 else {
1004 dprintk(1, "%s() unknown radio input %d\n", __func__,
1005 priv->radio_input);
1006 return -EINVAL;
1007 }
1008
d7009cdc
BILDB
1009 priv->freq_hz = params->frequency * 125 / 2;
1010
1011 priv->rf_mode = XC_RF_MODE_AIR;
1012
496e9057 1013 ret = xc_SetTVStandard(priv, XC5000_Standard[radio_input].VideoMode,
01ae7286 1014 XC5000_Standard[radio_input].AudioMode, radio_input);
d7009cdc
BILDB
1015
1016 if (ret != XC_RESULT_SUCCESS) {
1017 printk(KERN_ERR "xc5000: xc_SetTVStandard failed\n");
1018 return -EREMOTEIO;
1019 }
1020
1021 ret = xc_SetSignalSource(priv, priv->rf_mode);
1022 if (ret != XC_RESULT_SUCCESS) {
1023 printk(KERN_ERR
1024 "xc5000: xc_SetSignalSource(%d) failed\n",
1025 priv->rf_mode);
1026 return -EREMOTEIO;
1027 }
1028
724dcbfa
DB
1029 if ((priv->radio_input == XC5000_RADIO_FM1) ||
1030 (priv->radio_input == XC5000_RADIO_FM2))
1031 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09);
1032 else if (priv->radio_input == XC5000_RADIO_FM1_MONO)
1033 xc_write_reg(priv, XREG_OUTPUT_AMP, 0x06);
1034
d7009cdc
BILDB
1035 xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG);
1036
1037 return 0;
1038}
1039
1040static int xc5000_set_analog_params(struct dvb_frontend *fe,
1041 struct analog_parameters *params)
1042{
1043 struct xc5000_priv *priv = fe->tuner_priv;
1044 int ret = -EINVAL;
1045
1046 if (priv->i2c_props.adap == NULL)
1047 return -EINVAL;
1048
de49bc6e 1049 if (xc_load_fw_and_init_tuner(fe, 0) != XC_RESULT_SUCCESS) {
fc7a74ba
DH
1050 dprintk(1, "Unable to load firmware and init tuner\n");
1051 return -EINVAL;
760c466c 1052 }
d7009cdc
BILDB
1053
1054 switch (params->mode) {
1055 case V4L2_TUNER_RADIO:
1056 ret = xc5000_set_radio_freq(fe, params);
1057 break;
1058 case V4L2_TUNER_ANALOG_TV:
1059 case V4L2_TUNER_DIGITAL_TV:
1060 ret = xc5000_set_tv_freq(fe, params);
1061 break;
1062 }
1063
1064 return ret;
1065}
1066
1067
aacb9d31
ST
1068static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq)
1069{
1070 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1071 dprintk(1, "%s()\n", __func__);
ce1c89d4 1072 *freq = priv->freq_hz + priv->freq_offset;
aacb9d31
ST
1073 return 0;
1074}
1075
35621030
MCC
1076static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq)
1077{
1078 struct xc5000_priv *priv = fe->tuner_priv;
1079 dprintk(1, "%s()\n", __func__);
1080 *freq = priv->if_khz * 1000;
1081 return 0;
1082}
1083
aacb9d31
ST
1084static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
1085{
1086 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1087 dprintk(1, "%s()\n", __func__);
27c685a4 1088
aacb9d31
ST
1089 *bw = priv->bandwidth;
1090 return 0;
1091}
1092
1093static int xc5000_get_status(struct dvb_frontend *fe, u32 *status)
1094{
1095 struct xc5000_priv *priv = fe->tuner_priv;
e12671cf 1096 u16 lock_status = 0;
aacb9d31
ST
1097
1098 xc_get_lock_status(priv, &lock_status);
1099
271ddbf7 1100 dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status);
aacb9d31
ST
1101
1102 *status = lock_status;
1103
1104 return 0;
1105}
1106
de49bc6e 1107static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force)
aacb9d31
ST
1108{
1109 struct xc5000_priv *priv = fe->tuner_priv;
fc7a74ba 1110 int ret = XC_RESULT_SUCCESS;
de49bc6e 1111 u16 pll_lock_status;
22d5c6f5 1112 u16 fw_ck;
de49bc6e
DH
1113
1114 if (force || xc5000_is_firmware_loaded(fe) != XC_RESULT_SUCCESS) {
1115
1116fw_retry:
aacb9d31 1117
aacb9d31 1118 ret = xc5000_fwupload(fe);
e12671cf
ST
1119 if (ret != XC_RESULT_SUCCESS)
1120 return ret;
aacb9d31 1121
de49bc6e
DH
1122 msleep(20);
1123
22d5c6f5
DH
1124 if (priv->fw_checksum_supported) {
1125 if (xc5000_readreg(priv, XREG_FW_CHECKSUM, &fw_ck)
1126 != XC_RESULT_SUCCESS) {
1127 dprintk(1, "%s() FW checksum reading failed.\n",
1128 __func__);
1129 goto fw_retry;
1130 }
1131
1132 if (fw_ck == 0) {
1133 dprintk(1, "%s() FW checksum failed = 0x%04x\n",
1134 __func__, fw_ck);
1135 goto fw_retry;
1136 }
1137 }
1138
fc7a74ba
DH
1139 /* Start the tuner self-calibration process */
1140 ret |= xc_initialize(priv);
aacb9d31 1141
de49bc6e
DH
1142 if (ret != XC_RESULT_SUCCESS)
1143 goto fw_retry;
1144
fc7a74ba
DH
1145 /* Wait for calibration to complete.
1146 * We could continue but XC5000 will clock stretch subsequent
1147 * I2C transactions until calibration is complete. This way we
1148 * don't have to rely on clock stretching working.
1149 */
1150 xc_wait(100);
aacb9d31 1151
22d5c6f5
DH
1152 if (priv->init_status_supported) {
1153 if (xc5000_readreg(priv, XREG_INIT_STATUS, &fw_ck) != XC_RESULT_SUCCESS) {
1154 dprintk(1, "%s() FW failed reading init status.\n",
1155 __func__);
1156 goto fw_retry;
1157 }
1158
1159 if (fw_ck == 0) {
1160 dprintk(1, "%s() FW init status failed = 0x%04x\n", __func__, fw_ck);
1161 goto fw_retry;
1162 }
1163 }
1164
de49bc6e
DH
1165 if (priv->pll_register_no) {
1166 xc5000_readreg(priv, priv->pll_register_no,
1167 &pll_lock_status);
1168 if (pll_lock_status > 63) {
1169 /* PLL is unlocked, force reload of the firmware */
1170 printk(KERN_ERR "xc5000: PLL not running after fwload.\n");
1171 goto fw_retry;
1172 }
1173 }
1174
fc7a74ba
DH
1175 /* Default to "CABLE" mode */
1176 ret |= xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE);
1177 }
aacb9d31
ST
1178
1179 return ret;
1180}
1181
e12671cf
ST
1182static int xc5000_sleep(struct dvb_frontend *fe)
1183{
27c685a4
ST
1184 int ret;
1185
271ddbf7 1186 dprintk(1, "%s()\n", __func__);
e12671cf 1187
b6bd5eb8
DH
1188 /* Avoid firmware reload on slow devices */
1189 if (no_poweroff)
1190 return 0;
1191
7f05b530
DH
1192 /* According to Xceive technical support, the "powerdown" register
1193 was removed in newer versions of the firmware. The "supported"
1194 way to sleep the tuner is to pull the reset pin low for 10ms */
1195 ret = xc5000_TunerReset(fe);
8f3cd530 1196 if (ret != XC_RESULT_SUCCESS) {
27c685a4
ST
1197 printk(KERN_ERR
1198 "xc5000: %s() unable to shutdown tuner\n",
271ddbf7 1199 __func__);
27c685a4 1200 return -EREMOTEIO;
8f3cd530 1201 } else
27c685a4 1202 return XC_RESULT_SUCCESS;
e12671cf
ST
1203}
1204
aacb9d31
ST
1205static int xc5000_init(struct dvb_frontend *fe)
1206{
1207 struct xc5000_priv *priv = fe->tuner_priv;
271ddbf7 1208 dprintk(1, "%s()\n", __func__);
aacb9d31 1209
de49bc6e 1210 if (xc_load_fw_and_init_tuner(fe, 0) != XC_RESULT_SUCCESS) {
e12671cf
ST
1211 printk(KERN_ERR "xc5000: Unable to initialise tuner\n");
1212 return -EREMOTEIO;
1213 }
1214
1215 if (debug)
1216 xc_debug_dump(priv);
aacb9d31
ST
1217
1218 return 0;
1219}
1220
1221static int xc5000_release(struct dvb_frontend *fe)
1222{
89fd2854
MK
1223 struct xc5000_priv *priv = fe->tuner_priv;
1224
271ddbf7 1225 dprintk(1, "%s()\n", __func__);
89fd2854
MK
1226
1227 mutex_lock(&xc5000_list_mutex);
1228
1229 if (priv)
1230 hybrid_tuner_release_state(priv);
1231
1232 mutex_unlock(&xc5000_list_mutex);
1233
aacb9d31 1234 fe->tuner_priv = NULL;
89fd2854 1235
aacb9d31
ST
1236 return 0;
1237}
1238
724dcbfa
DB
1239static int xc5000_set_config(struct dvb_frontend *fe, void *priv_cfg)
1240{
1241 struct xc5000_priv *priv = fe->tuner_priv;
1242 struct xc5000_config *p = priv_cfg;
1243
1244 dprintk(1, "%s()\n", __func__);
1245
1246 if (p->if_khz)
1247 priv->if_khz = p->if_khz;
1248
1249 if (p->radio_input)
1250 priv->radio_input = p->radio_input;
1251
1252 return 0;
1253}
1254
1255
aacb9d31
ST
1256static const struct dvb_tuner_ops xc5000_tuner_ops = {
1257 .info = {
1258 .name = "Xceive XC5000",
1259 .frequency_min = 1000000,
1260 .frequency_max = 1023000000,
1261 .frequency_step = 50000,
1262 },
1263
27c685a4
ST
1264 .release = xc5000_release,
1265 .init = xc5000_init,
1266 .sleep = xc5000_sleep,
aacb9d31 1267
724dcbfa 1268 .set_config = xc5000_set_config,
27c685a4
ST
1269 .set_params = xc5000_set_params,
1270 .set_analog_params = xc5000_set_analog_params,
1271 .get_frequency = xc5000_get_frequency,
35621030 1272 .get_if_frequency = xc5000_get_if_frequency,
27c685a4
ST
1273 .get_bandwidth = xc5000_get_bandwidth,
1274 .get_status = xc5000_get_status
aacb9d31
ST
1275};
1276
48723543
MK
1277struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe,
1278 struct i2c_adapter *i2c,
2e4e98e7 1279 const struct xc5000_config *cfg)
aacb9d31
ST
1280{
1281 struct xc5000_priv *priv = NULL;
89fd2854 1282 int instance;
aacb9d31
ST
1283 u16 id = 0;
1284
89fd2854
MK
1285 dprintk(1, "%s(%d-%04x)\n", __func__,
1286 i2c ? i2c_adapter_id(i2c) : -1,
1287 cfg ? cfg->i2c_address : -1);
aacb9d31 1288
89fd2854 1289 mutex_lock(&xc5000_list_mutex);
aacb9d31 1290
89fd2854
MK
1291 instance = hybrid_tuner_request_state(struct xc5000_priv, priv,
1292 hybrid_tuner_instance_list,
1293 i2c, cfg->i2c_address, "xc5000");
1294 switch (instance) {
1295 case 0:
1296 goto fail;
1297 break;
1298 case 1:
1299 /* new tuner instance */
c6f56e7d 1300 priv->bandwidth = 6000000;
89fd2854
MK
1301 fe->tuner_priv = priv;
1302 break;
1303 default:
1304 /* existing tuner instance */
1305 fe->tuner_priv = priv;
1306 break;
1307 }
aacb9d31 1308
ea227863
DH
1309 if (priv->if_khz == 0) {
1310 /* If the IF hasn't been set yet, use the value provided by
1311 the caller (occurs in hybrid devices where the analog
1312 call to xc5000_attach occurs before the digital side) */
1313 priv->if_khz = cfg->if_khz;
1314 }
1315
7d3d0d8d
MK
1316 if (priv->xtal_khz == 0)
1317 priv->xtal_khz = cfg->xtal_khz;
1318
496e9057
DH
1319 if (priv->radio_input == 0)
1320 priv->radio_input = cfg->radio_input;
1321
6fab81df 1322 /* don't override chip id if it's already been set
76efb0ba 1323 unless explicitly specified */
6fab81df
MK
1324 if ((priv->chip_id == 0) || (cfg->chip_id))
1325 /* use default chip id if none specified, set to 0 so
1326 it can be overridden if this is a hybrid driver */
1327 priv->chip_id = (cfg->chip_id) ? cfg->chip_id : 0;
76efb0ba 1328
27c685a4
ST
1329 /* Check if firmware has been loaded. It is possible that another
1330 instance of the driver has loaded the firmware.
1331 */
7988fc21 1332 if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != XC_RESULT_SUCCESS)
89fd2854 1333 goto fail;
aacb9d31 1334
8f3cd530 1335 switch (id) {
27c685a4
ST
1336 case XC_PRODUCT_ID_FW_LOADED:
1337 printk(KERN_INFO
1338 "xc5000: Successfully identified at address 0x%02x\n",
1339 cfg->i2c_address);
1340 printk(KERN_INFO
1341 "xc5000: Firmware has been loaded previously\n");
27c685a4
ST
1342 break;
1343 case XC_PRODUCT_ID_FW_NOT_LOADED:
1344 printk(KERN_INFO
1345 "xc5000: Successfully identified at address 0x%02x\n",
1346 cfg->i2c_address);
1347 printk(KERN_INFO
1348 "xc5000: Firmware has not been loaded previously\n");
27c685a4
ST
1349 break;
1350 default:
aacb9d31
ST
1351 printk(KERN_ERR
1352 "xc5000: Device not found at addr 0x%02x (0x%x)\n",
1353 cfg->i2c_address, id);
89fd2854 1354 goto fail;
aacb9d31
ST
1355 }
1356
89fd2854
MK
1357 mutex_unlock(&xc5000_list_mutex);
1358
aacb9d31
ST
1359 memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops,
1360 sizeof(struct dvb_tuner_ops));
1361
aacb9d31 1362 return fe;
89fd2854
MK
1363fail:
1364 mutex_unlock(&xc5000_list_mutex);
1365
1366 xc5000_release(fe);
1367 return NULL;
aacb9d31
ST
1368}
1369EXPORT_SYMBOL(xc5000_attach);
1370
1371MODULE_AUTHOR("Steven Toth");
e12671cf 1372MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver");
aacb9d31 1373MODULE_LICENSE("GPL");
3422f2a6
TG
1374MODULE_FIRMWARE(XC5000A_FIRMWARE);
1375MODULE_FIRMWARE(XC5000C_FIRMWARE);