Commit | Line | Data |
---|---|---|
6cb45879 MCC |
1 | /* tuner-xc2028 |
2 | * | |
33e53161 | 3 | * Copyright (c) 2007-2008 Mauro Carvalho Chehab (mchehab@infradead.org) |
983d214e | 4 | * |
701672eb ML |
5 | * Copyright (c) 2007 Michel Ludwig (michel.ludwig@gmail.com) |
6 | * - frontend interface | |
983d214e | 7 | * |
6cb45879 MCC |
8 | * This code is placed under the terms of the GNU General Public License v2 |
9 | */ | |
10 | ||
11 | #include <linux/i2c.h> | |
12 | #include <asm/div64.h> | |
13 | #include <linux/firmware.h> | |
ab0b9fc6 | 14 | #include <linux/videodev2.h> |
6cb45879 | 15 | #include <linux/delay.h> |
701672eb | 16 | #include <media/tuner.h> |
3b20532c | 17 | #include <linux/mutex.h> |
5a0e3ad6 | 18 | #include <linux/slab.h> |
84a9f336 | 19 | #include <asm/unaligned.h> |
215b95ba | 20 | #include "tuner-i2c.h" |
6cb45879 | 21 | #include "tuner-xc2028.h" |
de3fe21b | 22 | #include "tuner-xc2028-types.h" |
6cb45879 | 23 | |
701672eb ML |
24 | #include <linux/dvb/frontend.h> |
25 | #include "dvb_frontend.h" | |
26 | ||
e4b95ceb MCC |
27 | /* Max transfer size done by I2C transfer functions */ |
28 | #define MAX_XFER_SIZE 80 | |
29 | ||
304bce41 MS |
30 | /* Registers (Write-only) */ |
31 | #define XREG_INIT 0x00 | |
32 | #define XREG_RF_FREQ 0x02 | |
33 | #define XREG_POWER_DOWN 0x08 | |
34 | ||
35 | /* Registers (Read-only) */ | |
36 | #define XREG_FREQ_ERROR 0x01 | |
37 | #define XREG_LOCK 0x02 | |
38 | #define XREG_VERSION 0x04 | |
39 | #define XREG_PRODUCT_ID 0x08 | |
40 | #define XREG_HSYNC_FREQ 0x10 | |
41 | #define XREG_FRAME_LINES 0x20 | |
42 | #define XREG_SNR 0x40 | |
43 | ||
44 | #define XREG_ADC_ENV 0x0100 | |
ef8c1888 | 45 | |
83fb340b MCC |
46 | static int debug; |
47 | module_param(debug, int, 0644); | |
48 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); | |
49 | ||
74a89b2a MCC |
50 | static int no_poweroff; |
51 | module_param(no_poweroff, int, 0644); | |
4900877b | 52 | MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n" |
74a89b2a MCC |
53 | "1 keep device energized and with tuner ready all the times.\n" |
54 | " Faster, but consumes more power and keeps the device hotter\n"); | |
55 | ||
a82200fb MCC |
56 | static char audio_std[8]; |
57 | module_param_string(audio_std, audio_std, sizeof(audio_std), 0); | |
58 | MODULE_PARM_DESC(audio_std, | |
59 | "Audio standard. XC3028 audio decoder explicitly " | |
60 | "needs to know what audio\n" | |
61 | "standard is needed for some video standards with audio A2 or NICAM.\n" | |
62 | "The valid values are:\n" | |
63 | "A2\n" | |
64 | "A2/A\n" | |
65 | "A2/B\n" | |
66 | "NICAM\n" | |
67 | "NICAM/A\n" | |
68 | "NICAM/B\n"); | |
69 | ||
4327b77e | 70 | static char firmware_name[30]; |
5c913c05 MCC |
71 | module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0); |
72 | MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the " | |
73 | "default firmware name\n"); | |
74 | ||
c663d035 | 75 | static LIST_HEAD(hybrid_tuner_instance_list); |
aa501be9 CP |
76 | static DEFINE_MUTEX(xc2028_list_mutex); |
77 | ||
de3fe21b MCC |
78 | /* struct for storing firmware table */ |
79 | struct firmware_description { | |
80 | unsigned int type; | |
81 | v4l2_std_id id; | |
66c2d53d | 82 | __u16 int_freq; |
de3fe21b MCC |
83 | unsigned char *ptr; |
84 | unsigned int size; | |
85 | }; | |
6cb45879 | 86 | |
e0f0b37a CP |
87 | struct firmware_properties { |
88 | unsigned int type; | |
89 | v4l2_std_id id; | |
90 | v4l2_std_id std_req; | |
66c2d53d | 91 | __u16 int_freq; |
e0f0b37a CP |
92 | unsigned int scode_table; |
93 | int scode_nr; | |
94 | }; | |
95 | ||
61a96113 MCC |
96 | enum xc2028_state { |
97 | XC2028_NO_FIRMWARE = 0, | |
98 | XC2028_WAITING_FIRMWARE, | |
99 | XC2028_ACTIVE, | |
100 | XC2028_SLEEP, | |
101 | XC2028_NODEV, | |
102 | }; | |
103 | ||
6cb45879 | 104 | struct xc2028_data { |
c663d035 | 105 | struct list_head hybrid_tuner_instance_list; |
215b95ba | 106 | struct tuner_i2c_props i2c_props; |
de3fe21b MCC |
107 | __u32 frequency; |
108 | ||
61a96113 MCC |
109 | enum xc2028_state state; |
110 | const char *fname; | |
111 | ||
de3fe21b MCC |
112 | struct firmware_description *firm; |
113 | int firm_size; | |
06fd82dc | 114 | __u16 firm_version; |
de3fe21b | 115 | |
8bf799a6 CP |
116 | __u16 hwmodel; |
117 | __u16 hwvers; | |
118 | ||
de3fe21b | 119 | struct xc2028_ctrl ctrl; |
215b95ba | 120 | |
e0f0b37a | 121 | struct firmware_properties cur_fw; |
215b95ba MCC |
122 | |
123 | struct mutex lock; | |
6cb45879 MCC |
124 | }; |
125 | ||
47cc5b78 CP |
126 | #define i2c_send(priv, buf, size) ({ \ |
127 | int _rc; \ | |
128 | _rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \ | |
129 | if (size != _rc) \ | |
130 | tuner_info("i2c output error: rc = %d (should be %d)\n",\ | |
131 | _rc, (int)size); \ | |
70ca3c4b DH |
132 | if (priv->ctrl.msleep) \ |
133 | msleep(priv->ctrl.msleep); \ | |
47cc5b78 CP |
134 | _rc; \ |
135 | }) | |
136 | ||
137 | #define i2c_rcv(priv, buf, size) ({ \ | |
138 | int _rc; \ | |
139 | _rc = tuner_i2c_xfer_recv(&priv->i2c_props, buf, size); \ | |
140 | if (size != _rc) \ | |
83fb340b | 141 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ |
47cc5b78 CP |
142 | _rc, (int)size); \ |
143 | _rc; \ | |
144 | }) | |
ab0b9fc6 | 145 | |
7d58d111 CP |
146 | #define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \ |
147 | int _rc; \ | |
148 | _rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \ | |
149 | ibuf, isize); \ | |
150 | if (isize != _rc) \ | |
151 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ | |
152 | _rc, (int)isize); \ | |
70ca3c4b DH |
153 | if (priv->ctrl.msleep) \ |
154 | msleep(priv->ctrl.msleep); \ | |
7d58d111 CP |
155 | _rc; \ |
156 | }) | |
157 | ||
47cc5b78 | 158 | #define send_seq(priv, data...) ({ \ |
215b95ba | 159 | static u8 _val[] = data; \ |
47cc5b78 | 160 | int _rc; \ |
6cb45879 | 161 | if (sizeof(_val) != \ |
47cc5b78 | 162 | (_rc = tuner_i2c_xfer_send(&priv->i2c_props, \ |
215b95ba | 163 | _val, sizeof(_val)))) { \ |
47cc5b78 | 164 | tuner_err("Error on line %d: %d\n", __LINE__, _rc); \ |
70ca3c4b | 165 | } else if (priv->ctrl.msleep) \ |
e5cc2bf4 | 166 | msleep(priv->ctrl.msleep); \ |
47cc5b78 CP |
167 | _rc; \ |
168 | }) | |
6cb45879 | 169 | |
83244025 | 170 | static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val) |
6cb45879 | 171 | { |
b873e1a3 | 172 | unsigned char buf[2]; |
7d58d111 | 173 | unsigned char ibuf[2]; |
215b95ba | 174 | |
7e28adb2 | 175 | tuner_dbg("%s %04x called\n", __func__, reg); |
6cb45879 | 176 | |
7d58d111 | 177 | buf[0] = reg >> 8; |
80b52208 | 178 | buf[1] = (unsigned char) reg; |
6cb45879 | 179 | |
7d58d111 CP |
180 | if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2) |
181 | return -EIO; | |
6cb45879 | 182 | |
7d58d111 CP |
183 | *val = (ibuf[1]) | (ibuf[0] << 8); |
184 | return 0; | |
6cb45879 MCC |
185 | } |
186 | ||
e0262688 | 187 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) |
29bec0bf | 188 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) |
43efe702 MCC |
189 | { |
190 | if (type & BASE) | |
191 | printk("BASE "); | |
f380e1d2 MCC |
192 | if (type & INIT1) |
193 | printk("INIT1 "); | |
43efe702 MCC |
194 | if (type & F8MHZ) |
195 | printk("F8MHZ "); | |
196 | if (type & MTS) | |
197 | printk("MTS "); | |
198 | if (type & D2620) | |
199 | printk("D2620 "); | |
200 | if (type & D2633) | |
201 | printk("D2633 "); | |
202 | if (type & DTV6) | |
203 | printk("DTV6 "); | |
204 | if (type & QAM) | |
205 | printk("QAM "); | |
206 | if (type & DTV7) | |
207 | printk("DTV7 "); | |
208 | if (type & DTV78) | |
209 | printk("DTV78 "); | |
210 | if (type & DTV8) | |
211 | printk("DTV8 "); | |
212 | if (type & FM) | |
213 | printk("FM "); | |
214 | if (type & INPUT1) | |
215 | printk("INPUT1 "); | |
216 | if (type & LCD) | |
217 | printk("LCD "); | |
218 | if (type & NOGD) | |
219 | printk("NOGD "); | |
220 | if (type & MONO) | |
221 | printk("MONO "); | |
222 | if (type & ATSC) | |
223 | printk("ATSC "); | |
224 | if (type & IF) | |
225 | printk("IF "); | |
226 | if (type & LG60) | |
227 | printk("LG60 "); | |
228 | if (type & ATI638) | |
229 | printk("ATI638 "); | |
230 | if (type & OREN538) | |
231 | printk("OREN538 "); | |
232 | if (type & OREN36) | |
233 | printk("OREN36 "); | |
234 | if (type & TOYOTA388) | |
235 | printk("TOYOTA388 "); | |
236 | if (type & TOYOTA794) | |
237 | printk("TOYOTA794 "); | |
238 | if (type & DIBCOM52) | |
239 | printk("DIBCOM52 "); | |
240 | if (type & ZARLINK456) | |
241 | printk("ZARLINK456 "); | |
242 | if (type & CHINA) | |
243 | printk("CHINA "); | |
244 | if (type & F6MHZ) | |
245 | printk("F6MHZ "); | |
246 | if (type & INPUT2) | |
247 | printk("INPUT2 "); | |
248 | if (type & SCODE) | |
249 | printk("SCODE "); | |
e0262688 CP |
250 | if (type & HAS_IF) |
251 | printk("HAS_IF_%d ", int_freq); | |
43efe702 MCC |
252 | } |
253 | ||
ef8c1888 | 254 | static v4l2_std_id parse_audio_std_option(void) |
a82200fb | 255 | { |
e155d908 | 256 | if (strcasecmp(audio_std, "A2") == 0) |
a82200fb | 257 | return V4L2_STD_A2; |
e155d908 | 258 | if (strcasecmp(audio_std, "A2/A") == 0) |
a82200fb | 259 | return V4L2_STD_A2_A; |
e155d908 | 260 | if (strcasecmp(audio_std, "A2/B") == 0) |
a82200fb | 261 | return V4L2_STD_A2_B; |
e155d908 | 262 | if (strcasecmp(audio_std, "NICAM") == 0) |
a82200fb | 263 | return V4L2_STD_NICAM; |
e155d908 | 264 | if (strcasecmp(audio_std, "NICAM/A") == 0) |
a82200fb | 265 | return V4L2_STD_NICAM_A; |
e155d908 | 266 | if (strcasecmp(audio_std, "NICAM/B") == 0) |
a82200fb MCC |
267 | return V4L2_STD_NICAM_B; |
268 | ||
269 | return 0; | |
270 | } | |
271 | ||
61a96113 MCC |
272 | static int check_device_status(struct xc2028_data *priv) |
273 | { | |
274 | switch (priv->state) { | |
275 | case XC2028_NO_FIRMWARE: | |
276 | case XC2028_WAITING_FIRMWARE: | |
277 | return -EAGAIN; | |
278 | case XC2028_ACTIVE: | |
279 | case XC2028_SLEEP: | |
280 | return 0; | |
281 | case XC2028_NODEV: | |
282 | return -ENODEV; | |
283 | } | |
284 | return 0; | |
285 | } | |
286 | ||
ab0b9fc6 | 287 | static void free_firmware(struct xc2028_data *priv) |
6cb45879 | 288 | { |
de3fe21b | 289 | int i; |
92b75ab0 | 290 | tuner_dbg("%s called\n", __func__); |
de3fe21b MCC |
291 | |
292 | if (!priv->firm) | |
293 | return; | |
294 | ||
ab0b9fc6 MCC |
295 | for (i = 0; i < priv->firm_size; i++) |
296 | kfree(priv->firm[i].ptr); | |
297 | ||
de3fe21b MCC |
298 | kfree(priv->firm); |
299 | ||
ab0b9fc6 | 300 | priv->firm = NULL; |
06fd82dc | 301 | priv->firm_size = 0; |
61a96113 | 302 | priv->state = XC2028_NO_FIRMWARE; |
e0f0b37a CP |
303 | |
304 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
de3fe21b MCC |
305 | } |
306 | ||
61a96113 MCC |
307 | static int load_all_firmwares(struct dvb_frontend *fe, |
308 | const struct firmware *fw) | |
de3fe21b MCC |
309 | { |
310 | struct xc2028_data *priv = fe->tuner_priv; | |
c63e87e9 | 311 | const unsigned char *p, *endp; |
ab0b9fc6 MCC |
312 | int rc = 0; |
313 | int n, n_array; | |
de3fe21b | 314 | char name[33]; |
6cb45879 | 315 | |
7e28adb2 | 316 | tuner_dbg("%s called\n", __func__); |
215b95ba | 317 | |
ab0b9fc6 MCC |
318 | p = fw->data; |
319 | endp = p + fw->size; | |
6cb45879 | 320 | |
06fd82dc CP |
321 | if (fw->size < sizeof(name) - 1 + 2 + 2) { |
322 | tuner_err("Error: firmware file %s has invalid size!\n", | |
61a96113 | 323 | priv->fname); |
06fd82dc | 324 | goto corrupt; |
6cb45879 | 325 | } |
de3fe21b | 326 | |
ab0b9fc6 MCC |
327 | memcpy(name, p, sizeof(name) - 1); |
328 | name[sizeof(name) - 1] = 0; | |
329 | p += sizeof(name) - 1; | |
de3fe21b | 330 | |
84a9f336 | 331 | priv->firm_version = get_unaligned_le16(p); |
de3fe21b MCC |
332 | p += 2; |
333 | ||
84a9f336 | 334 | n_array = get_unaligned_le16(p); |
de3fe21b MCC |
335 | p += 2; |
336 | ||
06fd82dc | 337 | tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n", |
61a96113 | 338 | n_array, priv->fname, name, |
06fd82dc | 339 | priv->firm_version >> 8, priv->firm_version & 0xff); |
de3fe21b | 340 | |
1b7acf0c | 341 | priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL); |
06fd82dc CP |
342 | if (priv->firm == NULL) { |
343 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 344 | rc = -ENOMEM; |
06fd82dc | 345 | goto err; |
6cb45879 | 346 | } |
de3fe21b | 347 | priv->firm_size = n_array; |
06fd82dc | 348 | |
ab0b9fc6 MCC |
349 | n = -1; |
350 | while (p < endp) { | |
de3fe21b MCC |
351 | __u32 type, size; |
352 | v4l2_std_id id; | |
66c2d53d | 353 | __u16 int_freq = 0; |
de3fe21b MCC |
354 | |
355 | n++; | |
356 | if (n >= n_array) { | |
06fd82dc CP |
357 | tuner_err("More firmware images in file than " |
358 | "were expected!\n"); | |
de3fe21b MCC |
359 | goto corrupt; |
360 | } | |
361 | ||
362 | /* Checks if there's enough bytes to read */ | |
84a9f336 AV |
363 | if (endp - p < sizeof(type) + sizeof(id) + sizeof(size)) |
364 | goto header; | |
de3fe21b | 365 | |
84a9f336 | 366 | type = get_unaligned_le32(p); |
de3fe21b MCC |
367 | p += sizeof(type); |
368 | ||
84a9f336 | 369 | id = get_unaligned_le64(p); |
de3fe21b MCC |
370 | p += sizeof(id); |
371 | ||
66c2d53d | 372 | if (type & HAS_IF) { |
84a9f336 | 373 | int_freq = get_unaligned_le16(p); |
66c2d53d | 374 | p += sizeof(int_freq); |
84a9f336 AV |
375 | if (endp - p < sizeof(size)) |
376 | goto header; | |
66c2d53d MCC |
377 | } |
378 | ||
84a9f336 | 379 | size = get_unaligned_le32(p); |
de3fe21b MCC |
380 | p += sizeof(size); |
381 | ||
84a9f336 | 382 | if (!size || size > endp - p) { |
83fb340b | 383 | tuner_err("Firmware type "); |
43efe702 | 384 | dump_firm_type(type); |
ef8c1888 MCC |
385 | printk("(%x), id %llx is corrupted " |
386 | "(size=%d, expected %d)\n", | |
91240dd9 | 387 | type, (unsigned long long)id, |
ef8c1888 | 388 | (unsigned)(endp - p), size); |
de3fe21b MCC |
389 | goto corrupt; |
390 | } | |
391 | ||
ab0b9fc6 | 392 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); |
06fd82dc CP |
393 | if (priv->firm[n].ptr == NULL) { |
394 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 395 | rc = -ENOMEM; |
de3fe21b MCC |
396 | goto err; |
397 | } | |
06fd82dc CP |
398 | tuner_dbg("Reading firmware type "); |
399 | if (debug) { | |
e0262688 | 400 | dump_firm_type_and_int_freq(type, int_freq); |
06fd82dc | 401 | printk("(%x), id %llx, size=%d.\n", |
e0262688 | 402 | type, (unsigned long long)id, size); |
06fd82dc | 403 | } |
de3fe21b MCC |
404 | |
405 | memcpy(priv->firm[n].ptr, p, size); | |
406 | priv->firm[n].type = type; | |
407 | priv->firm[n].id = id; | |
408 | priv->firm[n].size = size; | |
66c2d53d | 409 | priv->firm[n].int_freq = int_freq; |
de3fe21b MCC |
410 | |
411 | p += size; | |
412 | } | |
413 | ||
ab0b9fc6 | 414 | if (n + 1 != priv->firm_size) { |
83fb340b | 415 | tuner_err("Firmware file is incomplete!\n"); |
de3fe21b MCC |
416 | goto corrupt; |
417 | } | |
418 | ||
419 | goto done; | |
420 | ||
84a9f336 AV |
421 | header: |
422 | tuner_err("Firmware header is incomplete!\n"); | |
de3fe21b | 423 | corrupt: |
ab0b9fc6 | 424 | rc = -EINVAL; |
83fb340b | 425 | tuner_err("Error: firmware file is corrupted!\n"); |
de3fe21b MCC |
426 | |
427 | err: | |
06fd82dc | 428 | tuner_info("Releasing partially loaded firmware file.\n"); |
de3fe21b MCC |
429 | free_firmware(priv); |
430 | ||
431 | done: | |
06fd82dc CP |
432 | if (rc == 0) |
433 | tuner_dbg("Firmware files loaded.\n"); | |
61a96113 MCC |
434 | else |
435 | priv->state = XC2028_NODEV; | |
de3fe21b MCC |
436 | |
437 | return rc; | |
438 | } | |
439 | ||
f380e1d2 MCC |
440 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, |
441 | v4l2_std_id *id) | |
de3fe21b MCC |
442 | { |
443 | struct xc2028_data *priv = fe->tuner_priv; | |
b1535293 | 444 | int i, best_i = -1, best_nr_matches = 0; |
33e53161 | 445 | unsigned int type_mask = 0; |
de3fe21b | 446 | |
7e28adb2 | 447 | tuner_dbg("%s called, want type=", __func__); |
b1535293 CP |
448 | if (debug) { |
449 | dump_firm_type(type); | |
450 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); | |
451 | } | |
de3fe21b MCC |
452 | |
453 | if (!priv->firm) { | |
83fb340b | 454 | tuner_err("Error! firmware not loaded\n"); |
de3fe21b MCC |
455 | return -EINVAL; |
456 | } | |
457 | ||
f380e1d2 | 458 | if (((type & ~SCODE) == 0) && (*id == 0)) |
ab0b9fc6 | 459 | *id = V4L2_STD_PAL; |
de3fe21b | 460 | |
e0f0b37a | 461 | if (type & BASE) |
33e53161 | 462 | type_mask = BASE_TYPES; |
ef207fed | 463 | else if (type & SCODE) { |
e0f0b37a | 464 | type &= SCODE_TYPES; |
33e53161 | 465 | type_mask = SCODE_TYPES & ~HAS_IF; |
ef207fed | 466 | } else if (type & DTV_TYPES) |
33e53161 | 467 | type_mask = DTV_TYPES; |
11a9eff9 | 468 | else if (type & STD_SPECIFIC_TYPES) |
33e53161 MCC |
469 | type_mask = STD_SPECIFIC_TYPES; |
470 | ||
471 | type &= type_mask; | |
472 | ||
8367fe24 | 473 | if (!(type & SCODE)) |
33e53161 | 474 | type_mask = ~0; |
e0f0b37a | 475 | |
de3fe21b | 476 | /* Seek for exact match */ |
ab0b9fc6 | 477 | for (i = 0; i < priv->firm_size; i++) { |
33e53161 | 478 | if ((type == (priv->firm[i].type & type_mask)) && |
ef207fed | 479 | (*id == priv->firm[i].id)) |
de3fe21b MCC |
480 | goto found; |
481 | } | |
482 | ||
483 | /* Seek for generic video standard match */ | |
ab0b9fc6 | 484 | for (i = 0; i < priv->firm_size; i++) { |
b1535293 CP |
485 | v4l2_std_id match_mask; |
486 | int nr_matches; | |
487 | ||
33e53161 | 488 | if (type != (priv->firm[i].type & type_mask)) |
b1535293 CP |
489 | continue; |
490 | ||
491 | match_mask = *id & priv->firm[i].id; | |
492 | if (!match_mask) | |
493 | continue; | |
494 | ||
495 | if ((*id & match_mask) == *id) | |
496 | goto found; /* Supports all the requested standards */ | |
497 | ||
498 | nr_matches = hweight64(match_mask); | |
499 | if (nr_matches > best_nr_matches) { | |
500 | best_nr_matches = nr_matches; | |
501 | best_i = i; | |
502 | } | |
503 | } | |
504 | ||
505 | if (best_nr_matches > 0) { | |
506 | tuner_dbg("Selecting best matching firmware (%d bits) for " | |
507 | "type=", best_nr_matches); | |
508 | dump_firm_type(type); | |
509 | printk("(%x), id %016llx:\n", type, (unsigned long long)*id); | |
510 | i = best_i; | |
511 | goto found; | |
de3fe21b MCC |
512 | } |
513 | ||
514 | /*FIXME: Would make sense to seek for type "hint" match ? */ | |
515 | ||
b1535293 | 516 | i = -ENOENT; |
f380e1d2 | 517 | goto ret; |
de3fe21b MCC |
518 | |
519 | found: | |
520 | *id = priv->firm[i].id; | |
de3fe21b | 521 | |
f380e1d2 | 522 | ret: |
b1535293 | 523 | tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found"); |
83fb340b MCC |
524 | if (debug) { |
525 | dump_firm_type(type); | |
91240dd9 | 526 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); |
83fb340b | 527 | } |
f380e1d2 MCC |
528 | return i; |
529 | } | |
530 | ||
d7cba043 MK |
531 | static inline int do_tuner_callback(struct dvb_frontend *fe, int cmd, int arg) |
532 | { | |
533 | struct xc2028_data *priv = fe->tuner_priv; | |
534 | ||
535 | /* analog side (tuner-core) uses i2c_adap->algo_data. | |
536 | * digital side is not guaranteed to have algo_data defined. | |
537 | * | |
538 | * digital side will always have fe->dvb defined. | |
539 | * analog side (tuner-core) doesn't (yet) define fe->dvb. | |
540 | */ | |
541 | ||
542 | return (!fe->callback) ? -EINVAL : | |
543 | fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
544 | fe->dvb->priv : priv->i2c_props.adap->algo_data, | |
545 | DVB_FRONTEND_COMPONENT_TUNER, cmd, arg); | |
546 | } | |
547 | ||
f380e1d2 MCC |
548 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, |
549 | v4l2_std_id *id) | |
550 | { | |
551 | struct xc2028_data *priv = fe->tuner_priv; | |
552 | int pos, rc; | |
e4b95ceb MCC |
553 | unsigned char *p, *endp, buf[MAX_XFER_SIZE]; |
554 | ||
555 | if (priv->ctrl.max_len > sizeof(buf)) | |
556 | priv->ctrl.max_len = sizeof(buf); | |
f380e1d2 | 557 | |
7e28adb2 | 558 | tuner_dbg("%s called\n", __func__); |
f380e1d2 MCC |
559 | |
560 | pos = seek_firmware(fe, type, id); | |
561 | if (pos < 0) | |
562 | return pos; | |
563 | ||
83fb340b | 564 | tuner_info("Loading firmware for type="); |
b1535293 CP |
565 | dump_firm_type(priv->firm[pos].type); |
566 | printk("(%x), id %016llx.\n", priv->firm[pos].type, | |
567 | (unsigned long long)*id); | |
83fb340b | 568 | |
f380e1d2 | 569 | p = priv->firm[pos].ptr; |
f380e1d2 | 570 | endp = p + priv->firm[pos].size; |
6cb45879 | 571 | |
ab0b9fc6 | 572 | while (p < endp) { |
de3fe21b MCC |
573 | __u16 size; |
574 | ||
575 | /* Checks if there's enough bytes to read */ | |
ab0b9fc6 | 576 | if (p + sizeof(size) > endp) { |
83fb340b | 577 | tuner_err("Firmware chunk size is wrong\n"); |
de3fe21b MCC |
578 | return -EINVAL; |
579 | } | |
580 | ||
ab0b9fc6 | 581 | size = le16_to_cpu(*(__u16 *) p); |
de3fe21b MCC |
582 | p += sizeof(size); |
583 | ||
584 | if (size == 0xffff) | |
585 | return 0; | |
586 | ||
587 | if (!size) { | |
6cb45879 | 588 | /* Special callback command received */ |
d7cba043 | 589 | rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0); |
ab0b9fc6 | 590 | if (rc < 0) { |
83fb340b | 591 | tuner_err("Error at RESET code %d\n", |
ab0b9fc6 | 592 | (*p) & 0x7f); |
de3fe21b | 593 | return -EINVAL; |
6cb45879 | 594 | } |
6cb45879 MCC |
595 | continue; |
596 | } | |
5403bbae ML |
597 | if (size >= 0xff00) { |
598 | switch (size) { | |
599 | case 0xff00: | |
d7cba043 | 600 | rc = do_tuner_callback(fe, XC2028_RESET_CLK, 0); |
5403bbae ML |
601 | if (rc < 0) { |
602 | tuner_err("Error at RESET code %d\n", | |
603 | (*p) & 0x7f); | |
604 | return -EINVAL; | |
605 | } | |
b32f9fb9 | 606 | break; |
5403bbae ML |
607 | default: |
608 | tuner_info("Invalid RESET code %d\n", | |
609 | size & 0x7f); | |
610 | return -EINVAL; | |
611 | ||
612 | } | |
2d4c0ac6 | 613 | continue; |
5403bbae | 614 | } |
de3fe21b MCC |
615 | |
616 | /* Checks for a sleep command */ | |
617 | if (size & 0x8000) { | |
ab0b9fc6 | 618 | msleep(size & 0x7fff); |
de3fe21b | 619 | continue; |
6cb45879 MCC |
620 | } |
621 | ||
de3fe21b | 622 | if ((size + p > endp)) { |
83fb340b | 623 | tuner_err("missing bytes: need %d, have %d\n", |
ab0b9fc6 | 624 | size, (int)(endp - p)); |
de3fe21b MCC |
625 | return -EINVAL; |
626 | } | |
6cb45879 | 627 | |
de3fe21b | 628 | buf[0] = *p; |
6cb45879 | 629 | p++; |
de3fe21b | 630 | size--; |
6cb45879 | 631 | |
de3fe21b | 632 | /* Sends message chunks */ |
ab0b9fc6 | 633 | while (size > 0) { |
0a196b6f CP |
634 | int len = (size < priv->ctrl.max_len - 1) ? |
635 | size : priv->ctrl.max_len - 1; | |
6cb45879 | 636 | |
ab0b9fc6 | 637 | memcpy(buf + 1, p, len); |
6cb45879 | 638 | |
47cc5b78 | 639 | rc = i2c_send(priv, buf, len + 1); |
ab0b9fc6 | 640 | if (rc < 0) { |
83fb340b | 641 | tuner_err("%d returned from send\n", rc); |
de3fe21b MCC |
642 | return -EINVAL; |
643 | } | |
644 | ||
645 | p += len; | |
646 | size -= len; | |
647 | } | |
4d37ece7 TR |
648 | |
649 | /* silently fail if the frontend doesn't support I2C flush */ | |
650 | rc = do_tuner_callback(fe, XC2028_I2C_FLUSH, 0); | |
651 | if ((rc < 0) && (rc != -EINVAL)) { | |
652 | tuner_err("error executing flush: %d\n", rc); | |
653 | return rc; | |
654 | } | |
de3fe21b | 655 | } |
43efe702 | 656 | return 0; |
6cb45879 MCC |
657 | } |
658 | ||
f380e1d2 | 659 | static int load_scode(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 660 | v4l2_std_id *id, __u16 int_freq, int scode) |
f380e1d2 MCC |
661 | { |
662 | struct xc2028_data *priv = fe->tuner_priv; | |
663 | int pos, rc; | |
664 | unsigned char *p; | |
665 | ||
7e28adb2 | 666 | tuner_dbg("%s called\n", __func__); |
f380e1d2 | 667 | |
66c2d53d MCC |
668 | if (!int_freq) { |
669 | pos = seek_firmware(fe, type, id); | |
670 | if (pos < 0) | |
671 | return pos; | |
672 | } else { | |
673 | for (pos = 0; pos < priv->firm_size; pos++) { | |
674 | if ((priv->firm[pos].int_freq == int_freq) && | |
9ca01e78 | 675 | (priv->firm[pos].type & HAS_IF)) |
66c2d53d MCC |
676 | break; |
677 | } | |
678 | if (pos == priv->firm_size) | |
679 | return -ENOENT; | |
680 | } | |
f380e1d2 MCC |
681 | |
682 | p = priv->firm[pos].ptr; | |
683 | ||
9ca01e78 | 684 | if (priv->firm[pos].type & HAS_IF) { |
66c2d53d MCC |
685 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) |
686 | return -EINVAL; | |
687 | p += 12 * scode; | |
688 | } else { | |
689 | /* 16 SCODE entries per file; each SCODE entry is 12 bytes and | |
690 | * has a 2-byte size header in the firmware format. */ | |
691 | if (priv->firm[pos].size != 14 * 16 || scode >= 16 || | |
692 | le16_to_cpu(*(__u16 *)(p + 14 * scode)) != 12) | |
693 | return -EINVAL; | |
694 | p += 14 * scode + 2; | |
695 | } | |
f380e1d2 | 696 | |
d7b22c5c | 697 | tuner_info("Loading SCODE for type="); |
e0262688 CP |
698 | dump_firm_type_and_int_freq(priv->firm[pos].type, |
699 | priv->firm[pos].int_freq); | |
d7b22c5c CP |
700 | printk("(%x), id %016llx.\n", priv->firm[pos].type, |
701 | (unsigned long long)*id); | |
702 | ||
06fd82dc | 703 | if (priv->firm_version < 0x0202) |
47cc5b78 CP |
704 | rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00}); |
705 | else | |
706 | rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00}); | |
707 | if (rc < 0) | |
708 | return -EIO; | |
f380e1d2 | 709 | |
66c2d53d | 710 | rc = i2c_send(priv, p, 12); |
47cc5b78 CP |
711 | if (rc < 0) |
712 | return -EIO; | |
f380e1d2 | 713 | |
47cc5b78 CP |
714 | rc = send_seq(priv, {0x00, 0x8c}); |
715 | if (rc < 0) | |
716 | return -EIO; | |
f380e1d2 MCC |
717 | |
718 | return 0; | |
719 | } | |
720 | ||
00deff1a | 721 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 722 | v4l2_std_id std, __u16 int_freq) |
6cb45879 | 723 | { |
00deff1a | 724 | struct xc2028_data *priv = fe->tuner_priv; |
e0f0b37a | 725 | struct firmware_properties new_fw; |
61a96113 | 726 | int rc, retry_count = 0; |
00deff1a MCC |
727 | u16 version, hwmodel; |
728 | v4l2_std_id std0; | |
6cb45879 | 729 | |
7e28adb2 | 730 | tuner_dbg("%s called\n", __func__); |
6cb45879 | 731 | |
61a96113 MCC |
732 | rc = check_device_status(priv); |
733 | if (rc < 0) | |
734 | return rc; | |
de3fe21b | 735 | |
0f6dac18 | 736 | if (priv->ctrl.mts && !(type & FM)) |
e0f0b37a | 737 | type |= MTS; |
6cb45879 | 738 | |
8bf799a6 | 739 | retry: |
e0f0b37a CP |
740 | new_fw.type = type; |
741 | new_fw.id = std; | |
742 | new_fw.std_req = std; | |
743 | new_fw.scode_table = SCODE | priv->ctrl.scode_table; | |
744 | new_fw.scode_nr = 0; | |
66c2d53d | 745 | new_fw.int_freq = int_freq; |
e0f0b37a CP |
746 | |
747 | tuner_dbg("checking firmware, user requested type="); | |
748 | if (debug) { | |
749 | dump_firm_type(new_fw.type); | |
e0262688 | 750 | printk("(%x), id %016llx, ", new_fw.type, |
e0f0b37a | 751 | (unsigned long long)new_fw.std_req); |
e0262688 CP |
752 | if (!int_freq) { |
753 | printk("scode_tbl "); | |
754 | dump_firm_type(priv->ctrl.scode_table); | |
755 | printk("(%x), ", priv->ctrl.scode_table); | |
756 | } else | |
757 | printk("int_freq %d, ", new_fw.int_freq); | |
758 | printk("scode_nr %d\n", new_fw.scode_nr); | |
e0f0b37a CP |
759 | } |
760 | ||
61a96113 MCC |
761 | /* |
762 | * No need to reload base firmware if it matches and if the tuner | |
763 | * is not at sleep mode | |
764 | */ | |
3a495ed7 | 765 | if ((priv->state == XC2028_ACTIVE) && |
61a96113 MCC |
766 | (((BASE | new_fw.type) & BASE_TYPES) == |
767 | (priv->cur_fw.type & BASE_TYPES))) { | |
e0f0b37a CP |
768 | tuner_dbg("BASE firmware not changed.\n"); |
769 | goto skip_base; | |
770 | } | |
771 | ||
772 | /* Updating BASE - forget about all currently loaded firmware */ | |
773 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
774 | ||
775 | /* Reset is needed before loading firmware */ | |
d7cba043 | 776 | rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0); |
e0f0b37a CP |
777 | if (rc < 0) |
778 | goto fail; | |
779 | ||
47bd5bc6 CP |
780 | /* BASE firmwares are all std0 */ |
781 | std0 = 0; | |
782 | rc = load_firmware(fe, BASE | new_fw.type, &std0); | |
e0f0b37a CP |
783 | if (rc < 0) { |
784 | tuner_err("Error %d while loading base firmware\n", | |
785 | rc); | |
786 | goto fail; | |
787 | } | |
5403bbae | 788 | |
de3fe21b | 789 | /* Load INIT1, if needed */ |
83fb340b | 790 | tuner_dbg("Load init1 firmware, if exists\n"); |
de3fe21b | 791 | |
47bd5bc6 | 792 | rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0); |
1ad0b796 CP |
793 | if (rc == -ENOENT) |
794 | rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ, | |
795 | &std0); | |
e0f0b37a CP |
796 | if (rc < 0 && rc != -ENOENT) { |
797 | tuner_err("Error %d while loading init1 firmware\n", | |
798 | rc); | |
799 | goto fail; | |
800 | } | |
de3fe21b | 801 | |
e0f0b37a CP |
802 | skip_base: |
803 | /* | |
804 | * No need to reload standard specific firmware if base firmware | |
805 | * was not reloaded and requested video standards have not changed. | |
de3fe21b | 806 | */ |
e0f0b37a CP |
807 | if (priv->cur_fw.type == (BASE | new_fw.type) && |
808 | priv->cur_fw.std_req == std) { | |
83fb340b | 809 | tuner_dbg("Std-specific firmware already loaded.\n"); |
e0f0b37a | 810 | goto skip_std_specific; |
2e4160ca | 811 | } |
6cb45879 | 812 | |
e0f0b37a CP |
813 | /* Reloading std-specific firmware forces a SCODE update */ |
814 | priv->cur_fw.scode_table = 0; | |
815 | ||
e0f0b37a | 816 | rc = load_firmware(fe, new_fw.type, &new_fw.id); |
cca83798 MCC |
817 | if (rc == -ENOENT) |
818 | rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id); | |
819 | ||
ab0b9fc6 | 820 | if (rc < 0) |
e0f0b37a CP |
821 | goto fail; |
822 | ||
823 | skip_std_specific: | |
824 | if (priv->cur_fw.scode_table == new_fw.scode_table && | |
825 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | |
826 | tuner_dbg("SCODE firmware already loaded.\n"); | |
827 | goto check_device; | |
828 | } | |
6cb45879 | 829 | |
40ae91a7 MCC |
830 | if (new_fw.type & FM) |
831 | goto check_device; | |
832 | ||
f380e1d2 | 833 | /* Load SCODE firmware, if exists */ |
e0f0b37a | 834 | tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr); |
f380e1d2 | 835 | |
66c2d53d MCC |
836 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, |
837 | new_fw.int_freq, new_fw.scode_nr); | |
43efe702 | 838 | |
e0f0b37a | 839 | check_device: |
8bf799a6 CP |
840 | if (xc2028_get_reg(priv, 0x0004, &version) < 0 || |
841 | xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) { | |
842 | tuner_err("Unable to read tuner registers.\n"); | |
843 | goto fail; | |
844 | } | |
80b52208 | 845 | |
b37f2d6a DH |
846 | tuner_dbg("Device is Xceive %d version %d.%d, " |
847 | "firmware version %d.%d\n", | |
848 | hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8, | |
849 | (version & 0xf0) >> 4, version & 0xf); | |
6cb45879 | 850 | |
0fb84ce0 MCC |
851 | |
852 | if (priv->ctrl.read_not_reliable) | |
853 | goto read_not_reliable; | |
854 | ||
8bf799a6 CP |
855 | /* Check firmware version against what we downloaded. */ |
856 | if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) { | |
2d5024a9 MCC |
857 | if (!priv->ctrl.read_not_reliable) { |
858 | tuner_err("Incorrect readback of firmware version.\n"); | |
859 | goto fail; | |
860 | } else { | |
861 | tuner_err("Returned an incorrect version. However, " | |
862 | "read is not reliable enough. Ignoring it.\n"); | |
863 | hwmodel = 3028; | |
864 | } | |
8bf799a6 CP |
865 | } |
866 | ||
867 | /* Check that the tuner hardware model remains consistent over time. */ | |
868 | if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) { | |
869 | priv->hwmodel = hwmodel; | |
870 | priv->hwvers = version & 0xff00; | |
871 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || | |
872 | priv->hwvers != (version & 0xff00)) { | |
873 | tuner_err("Read invalid device hardware information - tuner " | |
874 | "hung?\n"); | |
875 | goto fail; | |
876 | } | |
877 | ||
0fb84ce0 | 878 | read_not_reliable: |
03c42001 | 879 | priv->cur_fw = new_fw; |
e0f0b37a CP |
880 | |
881 | /* | |
882 | * By setting BASE in cur_fw.type only after successfully loading all | |
883 | * firmwares, we can: | |
884 | * 1. Identify that BASE firmware with type=0 has been loaded; | |
885 | * 2. Tell whether BASE firmware was just changed the next time through. | |
886 | */ | |
887 | priv->cur_fw.type |= BASE; | |
61a96113 | 888 | priv->state = XC2028_ACTIVE; |
6cb45879 MCC |
889 | |
890 | return 0; | |
e0f0b37a CP |
891 | |
892 | fail: | |
61a96113 MCC |
893 | priv->state = XC2028_SLEEP; |
894 | ||
e0f0b37a | 895 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); |
b8bc77db | 896 | if (retry_count < 8) { |
8bf799a6 | 897 | msleep(50); |
b8bc77db | 898 | retry_count++; |
8bf799a6 CP |
899 | tuner_dbg("Retrying firmware load\n"); |
900 | goto retry; | |
901 | } | |
902 | ||
e0f0b37a CP |
903 | if (rc == -ENOENT) |
904 | rc = -EINVAL; | |
905 | return rc; | |
6cb45879 MCC |
906 | } |
907 | ||
215b95ba | 908 | static int xc2028_signal(struct dvb_frontend *fe, u16 *strength) |
6cb45879 | 909 | { |
215b95ba | 910 | struct xc2028_data *priv = fe->tuner_priv; |
7d58d111 | 911 | u16 frq_lock, signal = 0; |
90acb85f | 912 | int rc, i; |
3b20532c | 913 | |
7e28adb2 | 914 | tuner_dbg("%s called\n", __func__); |
6cb45879 | 915 | |
61a96113 MCC |
916 | rc = check_device_status(priv); |
917 | if (rc < 0) | |
918 | return rc; | |
919 | ||
215b95ba | 920 | mutex_lock(&priv->lock); |
6cb45879 | 921 | |
80b52208 | 922 | /* Sync Lock Indicator */ |
90acb85f MCC |
923 | for (i = 0; i < 3; i++) { |
924 | rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock); | |
925 | if (rc < 0) | |
926 | goto ret; | |
927 | ||
928 | if (frq_lock) | |
929 | break; | |
930 | msleep(6); | |
931 | } | |
6cb45879 | 932 | |
1d432a3d | 933 | /* Frequency didn't lock */ |
90acb85f MCC |
934 | if (frq_lock == 2) |
935 | goto ret; | |
6cb45879 | 936 | |
80b52208 | 937 | /* Get SNR of the video signal */ |
304bce41 | 938 | rc = xc2028_get_reg(priv, XREG_SNR, &signal); |
7d58d111 | 939 | if (rc < 0) |
b0166ab3 MCC |
940 | goto ret; |
941 | ||
90acb85f MCC |
942 | /* Signal level is 3 bits only */ |
943 | ||
944 | signal = ((1 << 12) - 1) | ((signal & 0x07) << 12); | |
3b20532c MCC |
945 | |
946 | ret: | |
215b95ba MCC |
947 | mutex_unlock(&priv->lock); |
948 | ||
949 | *strength = signal; | |
6cb45879 | 950 | |
b0166ab3 MCC |
951 | tuner_dbg("signal strength is %d\n", signal); |
952 | ||
7d58d111 | 953 | return rc; |
6cb45879 MCC |
954 | } |
955 | ||
1d432a3d MCC |
956 | static int xc2028_get_afc(struct dvb_frontend *fe, s32 *afc) |
957 | { | |
958 | struct xc2028_data *priv = fe->tuner_priv; | |
959 | int i, rc; | |
960 | u16 frq_lock = 0; | |
961 | s16 afc_reg = 0; | |
962 | ||
963 | rc = check_device_status(priv); | |
964 | if (rc < 0) | |
965 | return rc; | |
966 | ||
967 | mutex_lock(&priv->lock); | |
968 | ||
969 | /* Sync Lock Indicator */ | |
970 | for (i = 0; i < 3; i++) { | |
971 | rc = xc2028_get_reg(priv, XREG_LOCK, &frq_lock); | |
972 | if (rc < 0) | |
973 | goto ret; | |
974 | ||
975 | if (frq_lock) | |
976 | break; | |
977 | msleep(6); | |
978 | } | |
979 | ||
980 | /* Frequency didn't lock */ | |
981 | if (frq_lock == 2) | |
982 | goto ret; | |
983 | ||
984 | /* Get AFC */ | |
985 | rc = xc2028_get_reg(priv, XREG_FREQ_ERROR, &afc_reg); | |
986 | if (rc < 0) | |
f088ccd6 | 987 | goto ret; |
1d432a3d MCC |
988 | |
989 | *afc = afc_reg * 15625; /* Hz */ | |
990 | ||
991 | tuner_dbg("AFC is %d Hz\n", *afc); | |
992 | ||
993 | ret: | |
994 | mutex_unlock(&priv->lock); | |
995 | ||
996 | return rc; | |
997 | } | |
998 | ||
6cb45879 MCC |
999 | #define DIV 15625 |
1000 | ||
00deff1a | 1001 | static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */, |
aa40d194 | 1002 | enum v4l2_tuner_type new_type, |
66c2d53d MCC |
1003 | unsigned int type, |
1004 | v4l2_std_id std, | |
1005 | u16 int_freq) | |
6cb45879 | 1006 | { |
215b95ba | 1007 | struct xc2028_data *priv = fe->tuner_priv; |
ab0b9fc6 | 1008 | int rc = -EINVAL; |
2ce4b3aa | 1009 | unsigned char buf[4]; |
ab0b9fc6 | 1010 | u32 div, offset = 0; |
6cb45879 | 1011 | |
7e28adb2 | 1012 | tuner_dbg("%s called\n", __func__); |
215b95ba | 1013 | |
de3fe21b MCC |
1014 | mutex_lock(&priv->lock); |
1015 | ||
2ce4b3aa | 1016 | tuner_dbg("should set frequency %d kHz\n", freq / 1000); |
6cb45879 | 1017 | |
66c2d53d | 1018 | if (check_firmware(fe, type, std, int_freq) < 0) |
3b20532c | 1019 | goto ret; |
2e4160ca | 1020 | |
2800ae9c MCC |
1021 | /* On some cases xc2028 can disable video output, if |
1022 | * very weak signals are received. By sending a soft | |
1023 | * reset, this is re-enabled. So, it is better to always | |
1024 | * send a soft reset before changing channels, to be sure | |
1025 | * that xc2028 will be in a safe state. | |
1026 | * Maybe this might also be needed for DTV. | |
1027 | */ | |
fd34cb08 MCC |
1028 | switch (new_type) { |
1029 | case V4L2_TUNER_ANALOG_TV: | |
2800ae9c | 1030 | rc = send_seq(priv, {0x00, 0x00}); |
0a863975 | 1031 | |
fd34cb08 MCC |
1032 | /* Analog mode requires offset = 0 */ |
1033 | break; | |
1034 | case V4L2_TUNER_RADIO: | |
1035 | /* Radio mode requires offset = 0 */ | |
1036 | break; | |
1037 | case V4L2_TUNER_DIGITAL_TV: | |
7f2199c0 MCC |
1038 | /* |
1039 | * Digital modes require an offset to adjust to the | |
1040 | * proper frequency. The offset depends on what | |
1041 | * firmware version is used. | |
1042 | */ | |
1043 | ||
1044 | /* | |
1045 | * Adjust to the center frequency. This is calculated by the | |
1046 | * formula: offset = 1.25MHz - BW/2 | |
1047 | * For DTV 7/8, the firmware uses BW = 8000, so it needs a | |
1048 | * further adjustment to get the frequency center on VHF | |
1049 | */ | |
98ab8550 GG |
1050 | |
1051 | /* | |
1052 | * The firmware DTV78 used to work fine in UHF band (8 MHz | |
1053 | * bandwidth) but not at all in VHF band (7 MHz bandwidth). | |
1054 | * The real problem was connected to the formula used to | |
1055 | * calculate the center frequency offset in VHF band. | |
1056 | * In fact, removing the 500KHz adjustment fixed the problem. | |
1057 | * This is coherent to what was implemented for the DTV7 | |
1058 | * firmware. | |
1059 | * In the end, now the center frequency is the same for all 3 | |
1060 | * firmwares (DTV7, DTV8, DTV78) and doesn't depend on channel | |
1061 | * bandwidth. | |
1062 | */ | |
1063 | ||
0a863975 MCC |
1064 | if (priv->cur_fw.type & DTV6) |
1065 | offset = 1750000; | |
98ab8550 | 1066 | else /* DTV7 or DTV8 or DTV78 */ |
0a863975 MCC |
1067 | offset = 2750000; |
1068 | ||
897b8422 | 1069 | /* |
7f2199c0 MCC |
1070 | * xc3028 additional "magic" |
1071 | * Depending on the firmware version, it needs some adjustments | |
1072 | * to properly centralize the frequency. This seems to be | |
1073 | * needed to compensate the SCODE table adjustments made by | |
1074 | * newer firmwares | |
897b8422 | 1075 | */ |
7f2199c0 | 1076 | |
7f2199c0 MCC |
1077 | /* |
1078 | * The proper adjustment would be to do it at s-code table. | |
1079 | * However, this didn't work, as reported by | |
1080 | * Robert Lowery <rglowery@exemail.com.au> | |
1081 | */ | |
1082 | ||
98ab8550 | 1083 | #if 0 |
7f2199c0 MCC |
1084 | /* |
1085 | * Still need tests for XC3028L (firmware 3.2 or upper) | |
1086 | * So, for now, let's just comment the per-firmware | |
1087 | * version of this change. Reports with xc3028l working | |
1088 | * with and without the lines bellow are welcome | |
1089 | */ | |
1090 | ||
1091 | if (priv->firm_version < 0x0302) { | |
1092 | if (priv->cur_fw.type & DTV7) | |
1093 | offset += 500000; | |
1094 | } else { | |
1095 | if (priv->cur_fw.type & DTV7) | |
1096 | offset -= 300000; | |
1097 | else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */ | |
1098 | offset += 200000; | |
1099 | } | |
1100 | #endif | |
a44f1c43 | 1101 | } |
2e4160ca | 1102 | |
ab0b9fc6 | 1103 | div = (freq - offset + DIV / 2) / DIV; |
2e4160ca | 1104 | |
6cb45879 | 1105 | /* CMD= Set frequency */ |
06fd82dc | 1106 | if (priv->firm_version < 0x0202) |
304bce41 | 1107 | rc = send_seq(priv, {0x00, XREG_RF_FREQ, 0x00, 0x00}); |
47cc5b78 | 1108 | else |
304bce41 | 1109 | rc = send_seq(priv, {0x80, XREG_RF_FREQ, 0x00, 0x00}); |
47cc5b78 CP |
1110 | if (rc < 0) |
1111 | goto ret; | |
de3fe21b | 1112 | |
1fe87369 MCC |
1113 | /* Return code shouldn't be checked. |
1114 | The reset CLK is needed only with tm6000. | |
1115 | Driver should work fine even if this fails. | |
1116 | */ | |
70ca3c4b DH |
1117 | if (priv->ctrl.msleep) |
1118 | msleep(priv->ctrl.msleep); | |
d7cba043 | 1119 | do_tuner_callback(fe, XC2028_RESET_CLK, 1); |
6cb45879 MCC |
1120 | |
1121 | msleep(10); | |
701672eb | 1122 | |
ab0b9fc6 MCC |
1123 | buf[0] = 0xff & (div >> 24); |
1124 | buf[1] = 0xff & (div >> 16); | |
1125 | buf[2] = 0xff & (div >> 8); | |
1126 | buf[3] = 0xff & (div); | |
6cb45879 | 1127 | |
47cc5b78 | 1128 | rc = i2c_send(priv, buf, sizeof(buf)); |
ab0b9fc6 | 1129 | if (rc < 0) |
3b20532c | 1130 | goto ret; |
6cb45879 MCC |
1131 | msleep(100); |
1132 | ||
ab0b9fc6 | 1133 | priv->frequency = freq; |
215b95ba | 1134 | |
c6480ccc | 1135 | tuner_dbg("divisor= %*ph (freq=%d.%03d)\n", 4, buf, |
2ce4b3aa | 1136 | freq / 1000000, (freq % 1000000) / 1000); |
3b20532c | 1137 | |
ab0b9fc6 | 1138 | rc = 0; |
6cb45879 | 1139 | |
215b95ba MCC |
1140 | ret: |
1141 | mutex_unlock(&priv->lock); | |
6cb45879 | 1142 | |
215b95ba | 1143 | return rc; |
701672eb ML |
1144 | } |
1145 | ||
00deff1a | 1146 | static int xc2028_set_analog_freq(struct dvb_frontend *fe, |
ab0b9fc6 | 1147 | struct analog_parameters *p) |
6cb45879 | 1148 | { |
215b95ba | 1149 | struct xc2028_data *priv = fe->tuner_priv; |
00deff1a MCC |
1150 | unsigned int type=0; |
1151 | ||
7e28adb2 | 1152 | tuner_dbg("%s called\n", __func__); |
c71d4bc5 | 1153 | |
d74cb25e MCC |
1154 | if (p->mode == V4L2_TUNER_RADIO) { |
1155 | type |= FM; | |
1156 | if (priv->ctrl.input1) | |
1157 | type |= INPUT1; | |
1158 | return generic_set_freq(fe, (625l * p->frequency) / 10, | |
437f5fa3 | 1159 | V4L2_TUNER_RADIO, type, 0, 0); |
d74cb25e MCC |
1160 | } |
1161 | ||
a5e9fe14 MCC |
1162 | /* if std is not defined, choose one */ |
1163 | if (!p->std) | |
1164 | p->std = V4L2_STD_MN; | |
1165 | ||
1166 | /* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */ | |
00deff1a MCC |
1167 | if (!(p->std & V4L2_STD_MN)) |
1168 | type |= F8MHZ; | |
6cb45879 | 1169 | |
00deff1a MCC |
1170 | /* Add audio hack to std mask */ |
1171 | p->std |= parse_audio_std_option(); | |
6cb45879 | 1172 | |
00deff1a | 1173 | return generic_set_freq(fe, 62500l * p->frequency, |
437f5fa3 | 1174 | V4L2_TUNER_ANALOG_TV, type, p->std, 0); |
215b95ba | 1175 | } |
6cb45879 | 1176 | |
14d24d14 | 1177 | static int xc2028_set_params(struct dvb_frontend *fe) |
6cb45879 | 1178 | { |
506cd714 MCC |
1179 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
1180 | u32 delsys = c->delivery_system; | |
1181 | u32 bw = c->bandwidth_hz; | |
215b95ba | 1182 | struct xc2028_data *priv = fe->tuner_priv; |
61a96113 MCC |
1183 | int rc; |
1184 | unsigned int type = 0; | |
ad35ce9e | 1185 | u16 demod = 0; |
6cb45879 | 1186 | |
7e28adb2 | 1187 | tuner_dbg("%s called\n", __func__); |
701672eb | 1188 | |
61a96113 MCC |
1189 | rc = check_device_status(priv); |
1190 | if (rc < 0) | |
1191 | return rc; | |
1192 | ||
506cd714 MCC |
1193 | switch (delsys) { |
1194 | case SYS_DVBT: | |
1195 | case SYS_DVBT2: | |
a1014d70 MCC |
1196 | /* |
1197 | * The only countries with 6MHz seem to be Taiwan/Uruguay. | |
1198 | * Both seem to require QAM firmware for OFDM decoding | |
1199 | * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com> | |
1200 | */ | |
506cd714 | 1201 | if (bw <= 6000000) |
a1014d70 | 1202 | type |= QAM; |
00deff1a | 1203 | |
0975fc68 MCC |
1204 | switch (priv->ctrl.type) { |
1205 | case XC2028_D2633: | |
1206 | type |= D2633; | |
1207 | break; | |
1208 | case XC2028_D2620: | |
1209 | type |= D2620; | |
1210 | break; | |
1211 | case XC2028_AUTO: | |
1212 | default: | |
1213 | /* Zarlink seems to need D2633 */ | |
1214 | if (priv->ctrl.demod == XC3028_FE_ZARLINK456) | |
1215 | type |= D2633; | |
1216 | else | |
1217 | type |= D2620; | |
1218 | } | |
506cd714 MCC |
1219 | break; |
1220 | case SYS_ATSC: | |
1221 | /* The only ATSC firmware (at least on v2.7) is D2633 */ | |
1222 | type |= ATSC | D2633; | |
1223 | break; | |
1224 | /* DVB-S and pure QAM (FE_QAM) are not supported */ | |
1225 | default: | |
1226 | return -EINVAL; | |
1227 | } | |
1228 | ||
1229 | if (bw <= 6000000) { | |
1230 | type |= DTV6; | |
1231 | priv->ctrl.vhfbw7 = 0; | |
1232 | priv->ctrl.uhfbw8 = 0; | |
1233 | } else if (bw <= 7000000) { | |
1234 | if (c->frequency < 470000000) | |
1235 | priv->ctrl.vhfbw7 = 1; | |
1236 | else | |
1237 | priv->ctrl.uhfbw8 = 0; | |
1238 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7; | |
1239 | type |= F8MHZ; | |
1240 | } else { | |
1241 | if (c->frequency < 470000000) | |
1242 | priv->ctrl.vhfbw7 = 0; | |
1243 | else | |
1244 | priv->ctrl.uhfbw8 = 1; | |
1245 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8; | |
1246 | type |= F8MHZ; | |
0975fc68 MCC |
1247 | } |
1248 | ||
66c2d53d | 1249 | /* All S-code tables need a 200kHz shift */ |
6e707b4c | 1250 | if (priv->ctrl.demod) { |
7d350284 MCC |
1251 | demod = priv->ctrl.demod; |
1252 | ||
7f2199c0 MCC |
1253 | /* |
1254 | * Newer firmwares require a 200 kHz offset only for ATSC | |
1255 | */ | |
1256 | if (type == ATSC || priv->firm_version < 0x0302) | |
7d350284 | 1257 | demod += 200; |
6e707b4c AW |
1258 | /* |
1259 | * The DTV7 S-code table needs a 700 kHz shift. | |
6e707b4c AW |
1260 | * |
1261 | * DTV7 is only used in Australia. Germany or Italy may also | |
1262 | * use this firmware after initialization, but a tune to a UHF | |
1263 | * channel should then cause DTV78 to be used. | |
7f2199c0 MCC |
1264 | * |
1265 | * Unfortunately, on real-field tests, the s-code offset | |
1266 | * didn't work as expected, as reported by | |
1267 | * Robert Lowery <rglowery@exemail.com.au> | |
6e707b4c | 1268 | */ |
6e707b4c | 1269 | } |
b542dfdc | 1270 | |
506cd714 | 1271 | return generic_set_freq(fe, c->frequency, |
437f5fa3 | 1272 | V4L2_TUNER_DIGITAL_TV, type, 0, demod); |
6cb45879 | 1273 | } |
701672eb | 1274 | |
74a89b2a MCC |
1275 | static int xc2028_sleep(struct dvb_frontend *fe) |
1276 | { | |
1277 | struct xc2028_data *priv = fe->tuner_priv; | |
61a96113 MCC |
1278 | int rc; |
1279 | ||
1280 | rc = check_device_status(priv); | |
1281 | if (rc < 0) | |
1282 | return rc; | |
74a89b2a | 1283 | |
93b99923 DH |
1284 | /* Avoid firmware reload on slow devices or if PM disabled */ |
1285 | if (no_poweroff || priv->ctrl.disable_power_mgmt) | |
10f201af | 1286 | return 0; |
74a89b2a MCC |
1287 | |
1288 | tuner_dbg("Putting xc2028/3028 into poweroff mode.\n"); | |
e278e746 MCC |
1289 | if (debug > 1) { |
1290 | tuner_dbg("Printing sleep stack trace:\n"); | |
1291 | dump_stack(); | |
1292 | } | |
74a89b2a MCC |
1293 | |
1294 | mutex_lock(&priv->lock); | |
1295 | ||
1296 | if (priv->firm_version < 0x0202) | |
304bce41 | 1297 | rc = send_seq(priv, {0x00, XREG_POWER_DOWN, 0x00, 0x00}); |
74a89b2a | 1298 | else |
304bce41 | 1299 | rc = send_seq(priv, {0x80, XREG_POWER_DOWN, 0x00, 0x00}); |
74a89b2a | 1300 | |
61a96113 | 1301 | priv->state = XC2028_SLEEP; |
74a89b2a MCC |
1302 | |
1303 | mutex_unlock(&priv->lock); | |
1304 | ||
1305 | return rc; | |
1306 | } | |
45819c38 | 1307 | |
215b95ba | 1308 | static int xc2028_dvb_release(struct dvb_frontend *fe) |
701672eb | 1309 | { |
215b95ba MCC |
1310 | struct xc2028_data *priv = fe->tuner_priv; |
1311 | ||
7e28adb2 | 1312 | tuner_dbg("%s called\n", __func__); |
701672eb | 1313 | |
aa501be9 CP |
1314 | mutex_lock(&xc2028_list_mutex); |
1315 | ||
c663d035 MK |
1316 | /* only perform final cleanup if this is the last instance */ |
1317 | if (hybrid_tuner_report_instance_count(priv) == 1) { | |
de3fe21b | 1318 | free_firmware(priv); |
61a96113 MCC |
1319 | kfree(priv->ctrl.fname); |
1320 | priv->ctrl.fname = NULL; | |
de3fe21b | 1321 | } |
701672eb | 1322 | |
c663d035 MK |
1323 | if (priv) |
1324 | hybrid_tuner_release_state(priv); | |
1325 | ||
aa501be9 CP |
1326 | mutex_unlock(&xc2028_list_mutex); |
1327 | ||
c663d035 MK |
1328 | fe->tuner_priv = NULL; |
1329 | ||
701672eb ML |
1330 | return 0; |
1331 | } | |
1332 | ||
215b95ba | 1333 | static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
701672eb | 1334 | { |
215b95ba | 1335 | struct xc2028_data *priv = fe->tuner_priv; |
61a96113 | 1336 | int rc; |
701672eb | 1337 | |
7e28adb2 | 1338 | tuner_dbg("%s called\n", __func__); |
701672eb | 1339 | |
61a96113 MCC |
1340 | rc = check_device_status(priv); |
1341 | if (rc < 0) | |
1342 | return rc; | |
1343 | ||
215b95ba | 1344 | *frequency = priv->frequency; |
701672eb ML |
1345 | |
1346 | return 0; | |
1347 | } | |
1348 | ||
61a96113 MCC |
1349 | static void load_firmware_cb(const struct firmware *fw, |
1350 | void *context) | |
1351 | { | |
1352 | struct dvb_frontend *fe = context; | |
1353 | struct xc2028_data *priv = fe->tuner_priv; | |
1354 | int rc; | |
1355 | ||
1356 | tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error"); | |
1357 | if (!fw) { | |
1358 | tuner_err("Could not load firmware %s.\n", priv->fname); | |
1359 | priv->state = XC2028_NODEV; | |
1360 | return; | |
1361 | } | |
1362 | ||
1363 | rc = load_all_firmwares(fe, fw); | |
1364 | ||
1365 | release_firmware(fw); | |
1366 | ||
1367 | if (rc < 0) | |
1368 | return; | |
1369 | priv->state = XC2028_SLEEP; | |
1370 | } | |
1371 | ||
ab0b9fc6 | 1372 | static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg) |
de3fe21b MCC |
1373 | { |
1374 | struct xc2028_data *priv = fe->tuner_priv; | |
1375 | struct xc2028_ctrl *p = priv_cfg; | |
0a196b6f | 1376 | int rc = 0; |
de3fe21b | 1377 | |
7e28adb2 | 1378 | tuner_dbg("%s called\n", __func__); |
de3fe21b | 1379 | |
06fd82dc CP |
1380 | mutex_lock(&priv->lock); |
1381 | ||
61a96113 MCC |
1382 | /* |
1383 | * Copy the config data. | |
1384 | * For the firmware name, keep a local copy of the string, | |
1385 | * in order to avoid troubles during device release. | |
1386 | */ | |
f1065c96 | 1387 | kfree(priv->ctrl.fname); |
4b9e9796 | 1388 | priv->ctrl.fname = NULL; |
0a196b6f | 1389 | memcpy(&priv->ctrl, p, sizeof(priv->ctrl)); |
0a196b6f CP |
1390 | if (p->fname) { |
1391 | priv->ctrl.fname = kstrdup(p->fname, GFP_KERNEL); | |
1392 | if (priv->ctrl.fname == NULL) | |
4b9e9796 | 1393 | return -ENOMEM; |
de3fe21b MCC |
1394 | } |
1395 | ||
61a96113 MCC |
1396 | /* |
1397 | * If firmware name changed, frees firmware. As free_firmware will | |
1398 | * reset the status to NO_FIRMWARE, this forces a new request_firmware | |
1399 | */ | |
1400 | if (!firmware_name[0] && p->fname && | |
1401 | priv->fname && strcmp(p->fname, priv->fname)) | |
1402 | free_firmware(priv); | |
1403 | ||
1404 | if (priv->ctrl.max_len < 9) | |
1405 | priv->ctrl.max_len = 13; | |
1406 | ||
1407 | if (priv->state == XC2028_NO_FIRMWARE) { | |
1408 | if (!firmware_name[0]) | |
1409 | priv->fname = priv->ctrl.fname; | |
1410 | else | |
1411 | priv->fname = firmware_name; | |
1412 | ||
1413 | rc = request_firmware_nowait(THIS_MODULE, 1, | |
1414 | priv->fname, | |
1415 | priv->i2c_props.adap->dev.parent, | |
1416 | GFP_KERNEL, | |
1417 | fe, load_firmware_cb); | |
1418 | if (rc < 0) { | |
1419 | tuner_err("Failed to request firmware %s\n", | |
1420 | priv->fname); | |
1421 | priv->state = XC2028_NODEV; | |
1e9c14f7 HPS |
1422 | } else |
1423 | priv->state = XC2028_WAITING_FIRMWARE; | |
61a96113 | 1424 | } |
06fd82dc CP |
1425 | mutex_unlock(&priv->lock); |
1426 | ||
0a196b6f | 1427 | return rc; |
de3fe21b MCC |
1428 | } |
1429 | ||
215b95ba | 1430 | static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = { |
701672eb | 1431 | .info = { |
ab0b9fc6 MCC |
1432 | .name = "Xceive XC3028", |
1433 | .frequency_min = 42000000, | |
1434 | .frequency_max = 864000000, | |
1435 | .frequency_step = 50000, | |
1436 | }, | |
701672eb | 1437 | |
de3fe21b | 1438 | .set_config = xc2028_set_config, |
00deff1a | 1439 | .set_analog_params = xc2028_set_analog_freq, |
215b95ba MCC |
1440 | .release = xc2028_dvb_release, |
1441 | .get_frequency = xc2028_get_frequency, | |
1442 | .get_rf_strength = xc2028_signal, | |
1d432a3d | 1443 | .get_afc = xc2028_get_afc, |
215b95ba | 1444 | .set_params = xc2028_set_params, |
74a89b2a | 1445 | .sleep = xc2028_sleep, |
701672eb ML |
1446 | }; |
1447 | ||
7972f988 MK |
1448 | struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe, |
1449 | struct xc2028_config *cfg) | |
701672eb | 1450 | { |
215b95ba | 1451 | struct xc2028_data *priv; |
c663d035 | 1452 | int instance; |
701672eb | 1453 | |
83fb340b | 1454 | if (debug) |
2756665c | 1455 | printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n"); |
701672eb | 1456 | |
b412ba78 | 1457 | if (NULL == cfg) |
a37b4c9b | 1458 | return NULL; |
215b95ba | 1459 | |
a37b4c9b | 1460 | if (!fe) { |
2756665c | 1461 | printk(KERN_ERR "xc2028: No frontend!\n"); |
a37b4c9b | 1462 | return NULL; |
215b95ba MCC |
1463 | } |
1464 | ||
aa501be9 CP |
1465 | mutex_lock(&xc2028_list_mutex); |
1466 | ||
c663d035 MK |
1467 | instance = hybrid_tuner_request_state(struct xc2028_data, priv, |
1468 | hybrid_tuner_instance_list, | |
1469 | cfg->i2c_adap, cfg->i2c_addr, | |
1470 | "xc2028"); | |
1471 | switch (instance) { | |
1472 | case 0: | |
1473 | /* memory allocation failure */ | |
1474 | goto fail; | |
1475 | break; | |
1476 | case 1: | |
1477 | /* new tuner instance */ | |
0a196b6f | 1478 | priv->ctrl.max_len = 13; |
de3fe21b | 1479 | |
215b95ba MCC |
1480 | mutex_init(&priv->lock); |
1481 | ||
c663d035 MK |
1482 | fe->tuner_priv = priv; |
1483 | break; | |
1484 | case 2: | |
1485 | /* existing tuner instance */ | |
1486 | fe->tuner_priv = priv; | |
1487 | break; | |
1488 | } | |
b412ba78 | 1489 | |
215b95ba | 1490 | memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops, |
ab0b9fc6 | 1491 | sizeof(xc2028_dvb_tuner_ops)); |
215b95ba MCC |
1492 | |
1493 | tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner"); | |
1494 | ||
71a2ee37 MCC |
1495 | if (cfg->ctrl) |
1496 | xc2028_set_config(fe, cfg->ctrl); | |
1497 | ||
aa501be9 CP |
1498 | mutex_unlock(&xc2028_list_mutex); |
1499 | ||
a37b4c9b | 1500 | return fe; |
c663d035 MK |
1501 | fail: |
1502 | mutex_unlock(&xc2028_list_mutex); | |
1503 | ||
1504 | xc2028_dvb_release(fe); | |
1505 | return NULL; | |
215b95ba | 1506 | } |
a37b4c9b | 1507 | |
701672eb ML |
1508 | EXPORT_SYMBOL(xc2028_attach); |
1509 | ||
215b95ba | 1510 | MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver"); |
983d214e | 1511 | MODULE_AUTHOR("Michel Ludwig <michel.ludwig@gmail.com>"); |
215b95ba MCC |
1512 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); |
1513 | MODULE_LICENSE("GPL"); | |
ab9cbcd3 MCC |
1514 | MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE); |
1515 | MODULE_FIRMWARE(XC3028L_DEFAULT_FIRMWARE); |