Merge tag 'for-linus-20130509' of git://git.infradead.org/linux-mtd
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / macintosh / smu.c
CommitLineData
1da177e4
LT
1/*
2 * PowerMac G5 SMU driver
3 *
4 * Copyright 2004 J. Mayer <l_indien@magic.fr>
5 * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
6 *
7 * Released under the term of the GNU GPL v2.
8 */
9
10/*
1da177e4 11 * TODO:
0365ba7f
BH
12 * - maybe add timeout to commands ?
13 * - blocking version of time functions
14 * - polling version of i2c commands (including timer that works with
f18816ba 15 * interrupts off)
0365ba7f
BH
16 * - maybe avoid some data copies with i2c by directly using the smu cmd
17 * buffer and a lower level internal interface
18 * - understand SMU -> CPU events and implement reception of them via
19 * the userland interface
1da177e4
LT
20 */
21
1da177e4
LT
22#include <linux/types.h>
23#include <linux/kernel.h>
24#include <linux/device.h>
25#include <linux/dmapool.h>
26#include <linux/bootmem.h>
27#include <linux/vmalloc.h>
28#include <linux/highmem.h>
29#include <linux/jiffies.h>
30#include <linux/interrupt.h>
31#include <linux/rtc.h>
0365ba7f
BH
32#include <linux/completion.h>
33#include <linux/miscdevice.h>
34#include <linux/delay.h>
0365ba7f 35#include <linux/poll.h>
14cc3e2b 36#include <linux/mutex.h>
ad9e05ae
SR
37#include <linux/of_device.h>
38#include <linux/of_platform.h>
5a0e3ad6 39#include <linux/slab.h>
1da177e4
LT
40
41#include <asm/byteorder.h>
42#include <asm/io.h>
43#include <asm/prom.h>
44#include <asm/machdep.h>
45#include <asm/pmac_feature.h>
46#include <asm/smu.h>
47#include <asm/sections.h>
0365ba7f 48#include <asm/uaccess.h>
0365ba7f 49
183d0202 50#define VERSION "0.7"
0365ba7f 51#define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
1da177e4 52
0365ba7f 53#undef DEBUG_SMU
1da177e4
LT
54
55#ifdef DEBUG_SMU
1beb6a7d 56#define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
1da177e4
LT
57#else
58#define DPRINTK(fmt, args...) do { } while (0)
59#endif
60
61/*
62 * This is the command buffer passed to the SMU hardware
63 */
0365ba7f
BH
64#define SMU_MAX_DATA 254
65
1da177e4
LT
66struct smu_cmd_buf {
67 u8 cmd;
68 u8 length;
0365ba7f 69 u8 data[SMU_MAX_DATA];
1da177e4
LT
70};
71
72struct smu_device {
73 spinlock_t lock;
74 struct device_node *of_node;
2dc11581 75 struct platform_device *of_dev;
0365ba7f 76 int doorbell; /* doorbell gpio */
1da177e4 77 u32 __iomem *db_buf; /* doorbell buffer */
f620753b
BH
78 struct device_node *db_node;
79 unsigned int db_irq;
0365ba7f 80 int msg;
f620753b
BH
81 struct device_node *msg_node;
82 unsigned int msg_irq;
1da177e4
LT
83 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
84 u32 cmd_buf_abs; /* command buffer absolute */
0365ba7f
BH
85 struct list_head cmd_list;
86 struct smu_cmd *cmd_cur; /* pending command */
592a607b 87 int broken_nap;
0365ba7f
BH
88 struct list_head cmd_i2c_list;
89 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
90 struct timer_list i2c_timer;
1da177e4
LT
91};
92
93/*
94 * I don't think there will ever be more than one SMU, so
95 * for now, just hard code that
96 */
d851b6e0 97static DEFINE_MUTEX(smu_mutex);
1da177e4 98static struct smu_device *smu;
14cc3e2b 99static DEFINE_MUTEX(smu_part_access);
f620753b 100static int smu_irq_inited;
0365ba7f 101
730745a5
BH
102static void smu_i2c_retry(unsigned long data);
103
1da177e4 104/*
0365ba7f 105 * SMU driver low level stuff
1da177e4 106 */
1da177e4 107
0365ba7f 108static void smu_start_cmd(void)
1da177e4 109{
0365ba7f
BH
110 unsigned long faddr, fend;
111 struct smu_cmd *cmd;
1da177e4 112
0365ba7f
BH
113 if (list_empty(&smu->cmd_list))
114 return;
115
116 /* Fetch first command in queue */
117 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
118 smu->cmd_cur = cmd;
119 list_del(&cmd->link);
120
121 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
122 cmd->data_len);
ebd004e4 123 DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
0365ba7f
BH
124
125 /* Fill the SMU command buffer */
126 smu->cmd_buf->cmd = cmd->cmd;
127 smu->cmd_buf->length = cmd->data_len;
128 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
129
130 /* Flush command and data to RAM */
131 faddr = (unsigned long)smu->cmd_buf;
132 fend = faddr + smu->cmd_buf->length + 2;
133 flush_inval_dcache_range(faddr, fend);
134
592a607b
BH
135
136 /* We also disable NAP mode for the duration of the command
137 * on U3 based machines.
138 * This is slightly racy as it can be written back to 1 by a sysctl
139 * but that never happens in practice. There seem to be an issue with
140 * U3 based machines such as the iMac G5 where napping for the
141 * whole duration of the command prevents the SMU from fetching it
142 * from memory. This might be related to the strange i2c based
143 * mechanism the SMU uses to access memory.
144 */
145 if (smu->broken_nap)
146 powersave_nap = 0;
147
0365ba7f 148 /* This isn't exactly a DMA mapping here, I suspect
1da177e4
LT
149 * the SMU is actually communicating with us via i2c to the
150 * northbridge or the CPU to access RAM.
151 */
0365ba7f 152 writel(smu->cmd_buf_abs, smu->db_buf);
1da177e4
LT
153
154 /* Ring the SMU doorbell */
0365ba7f 155 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
1da177e4
LT
156}
157
0365ba7f 158
7d12e780 159static irqreturn_t smu_db_intr(int irq, void *arg)
1da177e4 160{
0365ba7f
BH
161 unsigned long flags;
162 struct smu_cmd *cmd;
163 void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
164 void *misc = NULL;
165 u8 gpio;
166 int rc = 0;
1da177e4 167
0365ba7f
BH
168 /* SMU completed the command, well, we hope, let's make sure
169 * of it
170 */
171 spin_lock_irqsave(&smu->lock, flags);
1da177e4 172
0365ba7f 173 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
a44fe13e
BH
174 if ((gpio & 7) != 7) {
175 spin_unlock_irqrestore(&smu->lock, flags);
0365ba7f 176 return IRQ_HANDLED;
a44fe13e 177 }
0365ba7f
BH
178
179 cmd = smu->cmd_cur;
180 smu->cmd_cur = NULL;
181 if (cmd == NULL)
182 goto bail;
183
184 if (rc == 0) {
185 unsigned long faddr;
186 int reply_len;
187 u8 ack;
188
189 /* CPU might have brought back the cache line, so we need
190 * to flush again before peeking at the SMU response. We
191 * flush the entire buffer for now as we haven't read the
efad798b 192 * reply length (it's only 2 cache lines anyway)
0365ba7f
BH
193 */
194 faddr = (unsigned long)smu->cmd_buf;
195 flush_inval_dcache_range(faddr, faddr + 256);
196
197 /* Now check ack */
198 ack = (~cmd->cmd) & 0xff;
199 if (ack != smu->cmd_buf->cmd) {
200 DPRINTK("SMU: incorrect ack, want %x got %x\n",
201 ack, smu->cmd_buf->cmd);
202 rc = -EIO;
203 }
204 reply_len = rc == 0 ? smu->cmd_buf->length : 0;
205 DPRINTK("SMU: reply len: %d\n", reply_len);
206 if (reply_len > cmd->reply_len) {
207 printk(KERN_WARNING "SMU: reply buffer too small,"
208 "got %d bytes for a %d bytes buffer\n",
209 reply_len, cmd->reply_len);
210 reply_len = cmd->reply_len;
211 }
212 cmd->reply_len = reply_len;
213 if (cmd->reply_buf && reply_len)
214 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
215 }
216
217 /* Now complete the command. Write status last in order as we lost
218 * ownership of the command structure as soon as it's no longer -1
219 */
220 done = cmd->done;
221 misc = cmd->misc;
222 mb();
223 cmd->status = rc;
592a607b
BH
224
225 /* Re-enable NAP mode */
226 if (smu->broken_nap)
227 powersave_nap = 1;
0365ba7f
BH
228 bail:
229 /* Start next command if any */
230 smu_start_cmd();
231 spin_unlock_irqrestore(&smu->lock, flags);
232
233 /* Call command completion handler if any */
234 if (done)
235 done(cmd, misc);
236
237 /* It's an edge interrupt, nothing to do */
238 return IRQ_HANDLED;
1da177e4
LT
239}
240
0365ba7f 241
7d12e780 242static irqreturn_t smu_msg_intr(int irq, void *arg)
1da177e4 243{
0365ba7f
BH
244 /* I don't quite know what to do with this one, we seem to never
245 * receive it, so I suspect we have to arm it someway in the SMU
246 * to start getting events that way.
247 */
248
249 printk(KERN_INFO "SMU: message interrupt !\n");
1da177e4 250
0365ba7f
BH
251 /* It's an edge interrupt, nothing to do */
252 return IRQ_HANDLED;
253}
1da177e4 254
1da177e4 255
0365ba7f
BH
256/*
257 * Queued command management.
258 *
259 */
1da177e4 260
0365ba7f
BH
261int smu_queue_cmd(struct smu_cmd *cmd)
262{
263 unsigned long flags;
1da177e4 264
0365ba7f
BH
265 if (smu == NULL)
266 return -ENODEV;
267 if (cmd->data_len > SMU_MAX_DATA ||
268 cmd->reply_len > SMU_MAX_DATA)
269 return -EINVAL;
270
271 cmd->status = 1;
272 spin_lock_irqsave(&smu->lock, flags);
273 list_add_tail(&cmd->link, &smu->cmd_list);
274 if (smu->cmd_cur == NULL)
275 smu_start_cmd();
276 spin_unlock_irqrestore(&smu->lock, flags);
277
f620753b
BH
278 /* Workaround for early calls when irq isn't available */
279 if (!smu_irq_inited || smu->db_irq == NO_IRQ)
280 smu_spinwait_cmd(cmd);
281
0365ba7f 282 return 0;
1da177e4 283}
0365ba7f 284EXPORT_SYMBOL(smu_queue_cmd);
1da177e4 285
0365ba7f
BH
286
287int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
288 unsigned int data_len,
289 void (*done)(struct smu_cmd *cmd, void *misc),
290 void *misc, ...)
1da177e4 291{
0365ba7f
BH
292 struct smu_cmd *cmd = &scmd->cmd;
293 va_list list;
294 int i;
295
296 if (data_len > sizeof(scmd->buffer))
297 return -EINVAL;
298
299 memset(scmd, 0, sizeof(*scmd));
300 cmd->cmd = command;
301 cmd->data_len = data_len;
302 cmd->data_buf = scmd->buffer;
303 cmd->reply_len = sizeof(scmd->buffer);
304 cmd->reply_buf = scmd->buffer;
305 cmd->done = done;
306 cmd->misc = misc;
307
308 va_start(list, misc);
309 for (i = 0; i < data_len; ++i)
310 scmd->buffer[i] = (u8)va_arg(list, int);
311 va_end(list);
312
313 return smu_queue_cmd(cmd);
1da177e4 314}
0365ba7f 315EXPORT_SYMBOL(smu_queue_simple);
1da177e4 316
0365ba7f
BH
317
318void smu_poll(void)
1da177e4 319{
0365ba7f
BH
320 u8 gpio;
321
322 if (smu == NULL)
323 return;
324
325 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
326 if ((gpio & 7) == 7)
7d12e780 327 smu_db_intr(smu->db_irq, smu);
1da177e4 328}
0365ba7f
BH
329EXPORT_SYMBOL(smu_poll);
330
1da177e4 331
0365ba7f 332void smu_done_complete(struct smu_cmd *cmd, void *misc)
1da177e4 333{
0365ba7f
BH
334 struct completion *comp = misc;
335
336 complete(comp);
1da177e4 337}
0365ba7f
BH
338EXPORT_SYMBOL(smu_done_complete);
339
1da177e4 340
0365ba7f 341void smu_spinwait_cmd(struct smu_cmd *cmd)
1da177e4 342{
0365ba7f
BH
343 while(cmd->status == 1)
344 smu_poll();
345}
346EXPORT_SYMBOL(smu_spinwait_cmd);
347
348
349/* RTC low level commands */
350static inline int bcd2hex (int n)
351{
352 return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
1da177e4
LT
353}
354
0365ba7f
BH
355
356static inline int hex2bcd (int n)
1da177e4 357{
0365ba7f 358 return ((n / 10) << 4) + (n % 10);
1da177e4 359}
0365ba7f 360
1da177e4
LT
361
362static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
363 struct rtc_time *time)
364{
365 cmd_buf->cmd = 0x8e;
366 cmd_buf->length = 8;
367 cmd_buf->data[0] = 0x80;
368 cmd_buf->data[1] = hex2bcd(time->tm_sec);
369 cmd_buf->data[2] = hex2bcd(time->tm_min);
370 cmd_buf->data[3] = hex2bcd(time->tm_hour);
371 cmd_buf->data[4] = time->tm_wday;
372 cmd_buf->data[5] = hex2bcd(time->tm_mday);
373 cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
374 cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
375}
376
1da177e4 377
0365ba7f 378int smu_get_rtc_time(struct rtc_time *time, int spinwait)
1da177e4 379{
0365ba7f 380 struct smu_simple_cmd cmd;
1da177e4
LT
381 int rc;
382
383 if (smu == NULL)
384 return -ENODEV;
385
386 memset(time, 0, sizeof(struct rtc_time));
0365ba7f
BH
387 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
388 SMU_CMD_RTC_GET_DATETIME);
389 if (rc)
390 return rc;
391 smu_spinwait_simple(&cmd);
1da177e4 392
0365ba7f
BH
393 time->tm_sec = bcd2hex(cmd.buffer[0]);
394 time->tm_min = bcd2hex(cmd.buffer[1]);
395 time->tm_hour = bcd2hex(cmd.buffer[2]);
396 time->tm_wday = bcd2hex(cmd.buffer[3]);
397 time->tm_mday = bcd2hex(cmd.buffer[4]);
398 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
399 time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
400
401 return 0;
1da177e4
LT
402}
403
0365ba7f
BH
404
405int smu_set_rtc_time(struct rtc_time *time, int spinwait)
1da177e4 406{
0365ba7f 407 struct smu_simple_cmd cmd;
1da177e4
LT
408 int rc;
409
410 if (smu == NULL)
411 return -ENODEV;
412
0365ba7f
BH
413 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
414 SMU_CMD_RTC_SET_DATETIME,
415 hex2bcd(time->tm_sec),
416 hex2bcd(time->tm_min),
417 hex2bcd(time->tm_hour),
418 time->tm_wday,
419 hex2bcd(time->tm_mday),
420 hex2bcd(time->tm_mon) + 1,
421 hex2bcd(time->tm_year - 100));
422 if (rc)
423 return rc;
424 smu_spinwait_simple(&cmd);
1da177e4 425
0365ba7f 426 return 0;
1da177e4
LT
427}
428
0365ba7f 429
1da177e4
LT
430void smu_shutdown(void)
431{
0365ba7f 432 struct smu_simple_cmd cmd;
1da177e4
LT
433
434 if (smu == NULL)
435 return;
436
0365ba7f
BH
437 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
438 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
439 return;
440 smu_spinwait_simple(&cmd);
1da177e4
LT
441 for (;;)
442 ;
1da177e4
LT
443}
444
0365ba7f 445
1da177e4
LT
446void smu_restart(void)
447{
0365ba7f 448 struct smu_simple_cmd cmd;
1da177e4
LT
449
450 if (smu == NULL)
451 return;
452
0365ba7f
BH
453 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
454 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
455 return;
456 smu_spinwait_simple(&cmd);
1da177e4
LT
457 for (;;)
458 ;
1da177e4
LT
459}
460
0365ba7f 461
1da177e4
LT
462int smu_present(void)
463{
464 return smu != NULL;
465}
0365ba7f 466EXPORT_SYMBOL(smu_present);
1da177e4
LT
467
468
183d0202 469int __init smu_init (void)
1da177e4
LT
470{
471 struct device_node *np;
018a3d1d 472 const u32 *data;
73f38fe1 473 int ret = 0;
1da177e4
LT
474
475 np = of_find_node_by_type(NULL, "smu");
476 if (np == NULL)
477 return -ENODEV;
478
592a607b 479 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
0365ba7f 480
1da177e4
LT
481 if (smu_cmdbuf_abs == 0) {
482 printk(KERN_ERR "SMU: Command buffer not allocated !\n");
73f38fe1
JL
483 ret = -EINVAL;
484 goto fail_np;
1da177e4
LT
485 }
486
487 smu = alloc_bootmem(sizeof(struct smu_device));
1da177e4
LT
488
489 spin_lock_init(&smu->lock);
0365ba7f
BH
490 INIT_LIST_HEAD(&smu->cmd_list);
491 INIT_LIST_HEAD(&smu->cmd_i2c_list);
1da177e4 492 smu->of_node = np;
0365ba7f
BH
493 smu->db_irq = NO_IRQ;
494 smu->msg_irq = NO_IRQ;
0365ba7f 495
1da177e4
LT
496 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
497 * 32 bits value safely
498 */
499 smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
48817c58 500 smu->cmd_buf = __va(smu_cmdbuf_abs);
1da177e4 501
f620753b
BH
502 smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
503 if (smu->db_node == NULL) {
1da177e4 504 printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
73f38fe1
JL
505 ret = -ENXIO;
506 goto fail_bootmem;
1da177e4 507 }
01b2726d 508 data = of_get_property(smu->db_node, "reg", NULL);
1da177e4
LT
509 if (data == NULL) {
510 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
73f38fe1
JL
511 ret = -ENXIO;
512 goto fail_db_node;
1da177e4
LT
513 }
514
515 /* Current setup has one doorbell GPIO that does both doorbell
516 * and ack. GPIOs are at 0x50, best would be to find that out
517 * in the device-tree though.
518 */
0365ba7f
BH
519 smu->doorbell = *data;
520 if (smu->doorbell < 0x50)
521 smu->doorbell += 0x50;
0365ba7f
BH
522
523 /* Now look for the smu-interrupt GPIO */
524 do {
f620753b
BH
525 smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
526 if (smu->msg_node == NULL)
0365ba7f 527 break;
01b2726d 528 data = of_get_property(smu->msg_node, "reg", NULL);
0365ba7f 529 if (data == NULL) {
f620753b
BH
530 of_node_put(smu->msg_node);
531 smu->msg_node = NULL;
0365ba7f
BH
532 break;
533 }
534 smu->msg = *data;
535 if (smu->msg < 0x50)
536 smu->msg += 0x50;
0365ba7f 537 } while(0);
1da177e4
LT
538
539 /* Doorbell buffer is currently hard-coded, I didn't find a proper
540 * device-tree entry giving the address. Best would probably to use
541 * an offset for K2 base though, but let's do it that way for now.
542 */
543 smu->db_buf = ioremap(0x8000860c, 0x1000);
544 if (smu->db_buf == NULL) {
545 printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
73f38fe1
JL
546 ret = -ENXIO;
547 goto fail_msg_node;
1da177e4
LT
548 }
549
592a607b
BH
550 /* U3 has an issue with NAP mode when issuing SMU commands */
551 smu->broken_nap = pmac_get_uninorth_variant() < 4;
552 if (smu->broken_nap)
553 printk(KERN_INFO "SMU: using NAP mode workaround\n");
554
1da177e4
LT
555 sys_ctrler = SYS_CTRLER_SMU;
556 return 0;
557
73f38fe1
JL
558fail_msg_node:
559 if (smu->msg_node)
560 of_node_put(smu->msg_node);
561fail_db_node:
562 of_node_put(smu->db_node);
563fail_bootmem:
81df9bff 564 free_bootmem(__pa(smu), sizeof(struct smu_device));
1da177e4 565 smu = NULL;
73f38fe1
JL
566fail_np:
567 of_node_put(np);
568 return ret;
1da177e4 569}
0365ba7f
BH
570
571
572static int smu_late_init(void)
573{
574 if (!smu)
575 return 0;
576
730745a5
BH
577 init_timer(&smu->i2c_timer);
578 smu->i2c_timer.function = smu_i2c_retry;
579 smu->i2c_timer.data = (unsigned long)smu;
580
f620753b
BH
581 if (smu->db_node) {
582 smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
583 if (smu->db_irq == NO_IRQ)
584 printk(KERN_ERR "smu: failed to map irq for node %s\n",
585 smu->db_node->full_name);
586 }
587 if (smu->msg_node) {
588 smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
589 if (smu->msg_irq == NO_IRQ)
590 printk(KERN_ERR "smu: failed to map irq for node %s\n",
591 smu->msg_node->full_name);
592 }
593
0365ba7f
BH
594 /*
595 * Try to request the interrupts
596 */
597
598 if (smu->db_irq != NO_IRQ) {
599 if (request_irq(smu->db_irq, smu_db_intr,
dace1453 600 IRQF_SHARED, "SMU doorbell", smu) < 0) {
0365ba7f
BH
601 printk(KERN_WARNING "SMU: can't "
602 "request interrupt %d\n",
603 smu->db_irq);
604 smu->db_irq = NO_IRQ;
605 }
606 }
607
608 if (smu->msg_irq != NO_IRQ) {
609 if (request_irq(smu->msg_irq, smu_msg_intr,
dace1453 610 IRQF_SHARED, "SMU message", smu) < 0) {
0365ba7f
BH
611 printk(KERN_WARNING "SMU: can't "
612 "request interrupt %d\n",
613 smu->msg_irq);
614 smu->msg_irq = NO_IRQ;
615 }
616 }
617
f620753b 618 smu_irq_inited = 1;
0365ba7f
BH
619 return 0;
620}
730745a5
BH
621/* This has to be before arch_initcall as the low i2c stuff relies on the
622 * above having been done before we reach arch_initcalls
623 */
624core_initcall(smu_late_init);
0365ba7f
BH
625
626/*
627 * sysfs visibility
628 */
629
c4028958 630static void smu_expose_childs(struct work_struct *unused)
0365ba7f 631{
a28d3af2
BH
632 struct device_node *np;
633
634 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
55b61fec 635 if (of_device_is_compatible(np, "smu-sensors"))
730745a5
BH
636 of_platform_device_create(np, "smu-sensors",
637 &smu->of_dev->dev);
0365ba7f
BH
638}
639
c4028958 640static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
0365ba7f 641
00006124 642static int smu_platform_probe(struct platform_device* dev)
0365ba7f
BH
643{
644 if (!smu)
645 return -ENODEV;
646 smu->of_dev = dev;
647
648 /*
649 * Ok, we are matched, now expose all i2c busses. We have to defer
650 * that unfortunately or it would deadlock inside the device model
651 */
652 schedule_work(&smu_expose_childs_work);
653
654 return 0;
655}
656
46759a7c 657static const struct of_device_id smu_platform_match[] =
0365ba7f
BH
658{
659 {
660 .type = "smu",
661 },
662 {},
663};
664
00006124 665static struct platform_driver smu_of_platform_driver =
0365ba7f 666{
4018294b
GL
667 .driver = {
668 .name = "smu",
669 .owner = THIS_MODULE,
670 .of_match_table = smu_platform_match,
671 },
0365ba7f
BH
672 .probe = smu_platform_probe,
673};
674
675static int __init smu_init_sysfs(void)
676{
0365ba7f 677 /*
0365ba7f
BH
678 * For now, we don't power manage machines with an SMU chip,
679 * I'm a bit too far from figuring out how that works with those
680 * new chipsets, but that will come back and bite us
681 */
00006124 682 platform_driver_register(&smu_of_platform_driver);
0365ba7f
BH
683 return 0;
684}
685
686device_initcall(smu_init_sysfs);
687
2dc11581 688struct platform_device *smu_get_ofdev(void)
0365ba7f
BH
689{
690 if (!smu)
691 return NULL;
692 return smu->of_dev;
693}
694
695EXPORT_SYMBOL_GPL(smu_get_ofdev);
696
697/*
698 * i2c interface
699 */
700
701static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
702{
703 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
704 void *misc = cmd->misc;
705 unsigned long flags;
706
707 /* Check for read case */
708 if (!fail && cmd->read) {
709 if (cmd->pdata[0] < 1)
710 fail = 1;
711 else
712 memcpy(cmd->info.data, &cmd->pdata[1],
713 cmd->info.datalen);
714 }
715
716 DPRINTK("SMU: completing, success: %d\n", !fail);
717
718 /* Update status and mark no pending i2c command with lock
719 * held so nobody comes in while we dequeue an eventual
720 * pending next i2c command
721 */
722 spin_lock_irqsave(&smu->lock, flags);
723 smu->cmd_i2c_cur = NULL;
724 wmb();
725 cmd->status = fail ? -EIO : 0;
726
727 /* Is there another i2c command waiting ? */
728 if (!list_empty(&smu->cmd_i2c_list)) {
729 struct smu_i2c_cmd *newcmd;
730
731 /* Fetch it, new current, remove from list */
732 newcmd = list_entry(smu->cmd_i2c_list.next,
733 struct smu_i2c_cmd, link);
734 smu->cmd_i2c_cur = newcmd;
735 list_del(&cmd->link);
736
737 /* Queue with low level smu */
738 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
739 if (smu->cmd_cur == NULL)
740 smu_start_cmd();
741 }
742 spin_unlock_irqrestore(&smu->lock, flags);
743
744 /* Call command completion handler if any */
745 if (done)
746 done(cmd, misc);
747
748}
749
750
751static void smu_i2c_retry(unsigned long data)
752{
730745a5 753 struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
0365ba7f
BH
754
755 DPRINTK("SMU: i2c failure, requeuing...\n");
756
757 /* requeue command simply by resetting reply_len */
758 cmd->pdata[0] = 0xff;
730745a5 759 cmd->scmd.reply_len = sizeof(cmd->pdata);
0365ba7f
BH
760 smu_queue_cmd(&cmd->scmd);
761}
762
763
764static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
765{
766 struct smu_i2c_cmd *cmd = misc;
767 int fail = 0;
768
769 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
770 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
771
772 /* Check for possible status */
773 if (scmd->status < 0)
774 fail = 1;
775 else if (cmd->read) {
776 if (cmd->stage == 0)
777 fail = cmd->pdata[0] != 0;
778 else
779 fail = cmd->pdata[0] >= 0x80;
780 } else {
781 fail = cmd->pdata[0] != 0;
782 }
783
784 /* Handle failures by requeuing command, after 5ms interval
785 */
786 if (fail && --cmd->retries > 0) {
787 DPRINTK("SMU: i2c failure, starting timer...\n");
730745a5 788 BUG_ON(cmd != smu->cmd_i2c_cur);
f620753b
BH
789 if (!smu_irq_inited) {
790 mdelay(5);
791 smu_i2c_retry(0);
792 return;
793 }
730745a5 794 mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
0365ba7f
BH
795 return;
796 }
797
798 /* If failure or stage 1, command is complete */
799 if (fail || cmd->stage != 0) {
800 smu_i2c_complete_command(cmd, fail);
801 return;
802 }
803
804 DPRINTK("SMU: going to stage 1\n");
805
806 /* Ok, initial command complete, now poll status */
807 scmd->reply_buf = cmd->pdata;
730745a5 808 scmd->reply_len = sizeof(cmd->pdata);
0365ba7f
BH
809 scmd->data_buf = cmd->pdata;
810 scmd->data_len = 1;
811 cmd->pdata[0] = 0;
812 cmd->stage = 1;
813 cmd->retries = 20;
814 smu_queue_cmd(scmd);
815}
816
817
818int smu_queue_i2c(struct smu_i2c_cmd *cmd)
819{
820 unsigned long flags;
821
822 if (smu == NULL)
823 return -ENODEV;
824
825 /* Fill most fields of scmd */
826 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
827 cmd->scmd.done = smu_i2c_low_completion;
828 cmd->scmd.misc = cmd;
829 cmd->scmd.reply_buf = cmd->pdata;
730745a5 830 cmd->scmd.reply_len = sizeof(cmd->pdata);
0365ba7f
BH
831 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
832 cmd->scmd.status = 1;
833 cmd->stage = 0;
834 cmd->pdata[0] = 0xff;
835 cmd->retries = 20;
836 cmd->status = 1;
837
838 /* Check transfer type, sanitize some "info" fields
839 * based on transfer type and do more checking
840 */
841 cmd->info.caddr = cmd->info.devaddr;
842 cmd->read = cmd->info.devaddr & 0x01;
843 switch(cmd->info.type) {
844 case SMU_I2C_TRANSFER_SIMPLE:
845 memset(&cmd->info.sublen, 0, 4);
846 break;
847 case SMU_I2C_TRANSFER_COMBINED:
848 cmd->info.devaddr &= 0xfe;
849 case SMU_I2C_TRANSFER_STDSUB:
850 if (cmd->info.sublen > 3)
851 return -EINVAL;
852 break;
853 default:
854 return -EINVAL;
855 }
856
857 /* Finish setting up command based on transfer direction
858 */
859 if (cmd->read) {
860 if (cmd->info.datalen > SMU_I2C_READ_MAX)
861 return -EINVAL;
862 memset(cmd->info.data, 0xff, cmd->info.datalen);
863 cmd->scmd.data_len = 9;
864 } else {
865 if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
866 return -EINVAL;
867 cmd->scmd.data_len = 9 + cmd->info.datalen;
868 }
869
870 DPRINTK("SMU: i2c enqueuing command\n");
871 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
872 cmd->read ? "read" : "write", cmd->info.datalen,
873 cmd->info.bus, cmd->info.caddr,
874 cmd->info.subaddr[0], cmd->info.type);
875
876
877 /* Enqueue command in i2c list, and if empty, enqueue also in
878 * main command list
879 */
880 spin_lock_irqsave(&smu->lock, flags);
881 if (smu->cmd_i2c_cur == NULL) {
882 smu->cmd_i2c_cur = cmd;
883 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
884 if (smu->cmd_cur == NULL)
885 smu_start_cmd();
886 } else
887 list_add_tail(&cmd->link, &smu->cmd_i2c_list);
888 spin_unlock_irqrestore(&smu->lock, flags);
889
890 return 0;
891}
892
183d0202
BH
893/*
894 * Handling of "partitions"
895 */
896
897static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
898{
6e9a4738 899 DECLARE_COMPLETION_ONSTACK(comp);
183d0202
BH
900 unsigned int chunk;
901 struct smu_cmd cmd;
902 int rc;
903 u8 params[8];
904
905 /* We currently use a chunk size of 0xe. We could check the
906 * SMU firmware version and use bigger sizes though
907 */
908 chunk = 0xe;
909
910 while (len) {
911 unsigned int clen = min(len, chunk);
912
913 cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
914 cmd.data_len = 7;
915 cmd.data_buf = params;
916 cmd.reply_len = chunk;
917 cmd.reply_buf = dest;
918 cmd.done = smu_done_complete;
919 cmd.misc = &comp;
920 params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
921 params[1] = 0x4;
922 *((u32 *)&params[2]) = addr;
923 params[6] = clen;
924
925 rc = smu_queue_cmd(&cmd);
926 if (rc)
927 return rc;
928 wait_for_completion(&comp);
929 if (cmd.status != 0)
930 return rc;
931 if (cmd.reply_len != clen) {
932 printk(KERN_DEBUG "SMU: short read in "
933 "smu_read_datablock, got: %d, want: %d\n",
934 cmd.reply_len, clen);
935 return -EIO;
936 }
937 len -= clen;
938 addr += clen;
939 dest += clen;
940 }
941 return 0;
942}
943
944static struct smu_sdbp_header *smu_create_sdb_partition(int id)
945{
6e9a4738 946 DECLARE_COMPLETION_ONSTACK(comp);
183d0202
BH
947 struct smu_simple_cmd cmd;
948 unsigned int addr, len, tlen;
949 struct smu_sdbp_header *hdr;
950 struct property *prop;
951
952 /* First query the partition info */
1beb6a7d 953 DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
183d0202
BH
954 smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
955 smu_done_complete, &comp,
956 SMU_CMD_PARTITION_LATEST, id);
957 wait_for_completion(&comp);
1beb6a7d
BH
958 DPRINTK("SMU: done, status: %d, reply_len: %d\n",
959 cmd.cmd.status, cmd.cmd.reply_len);
183d0202
BH
960
961 /* Partition doesn't exist (or other error) */
962 if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
963 return NULL;
964
965 /* Fetch address and length from reply */
966 addr = *((u16 *)cmd.buffer);
967 len = cmd.buffer[3] << 2;
968 /* Calucluate total length to allocate, including the 17 bytes
969 * for "sdb-partition-XX" that we append at the end of the buffer
970 */
971 tlen = sizeof(struct property) + len + 18;
972
cd861280 973 prop = kzalloc(tlen, GFP_KERNEL);
183d0202
BH
974 if (prop == NULL)
975 return NULL;
976 hdr = (struct smu_sdbp_header *)(prop + 1);
977 prop->name = ((char *)prop) + tlen - 18;
978 sprintf(prop->name, "sdb-partition-%02x", id);
979 prop->length = len;
1a38147e 980 prop->value = hdr;
183d0202
BH
981 prop->next = NULL;
982
983 /* Read the datablock */
984 if (smu_read_datablock((u8 *)hdr, addr, len)) {
985 printk(KERN_DEBUG "SMU: datablock read failed while reading "
986 "partition %02x !\n", id);
987 goto failure;
988 }
989
990 /* Got it, check a few things and create the property */
991 if (hdr->id != id) {
992 printk(KERN_DEBUG "SMU: Reading partition %02x and got "
993 "%02x !\n", id, hdr->id);
994 goto failure;
995 }
79d1c712 996 if (of_add_property(smu->of_node, prop)) {
183d0202
BH
997 printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
998 "property !\n", id);
999 goto failure;
1000 }
1001
1002 return hdr;
1003 failure:
1004 kfree(prop);
1005 return NULL;
1006}
1007
1008/* Note: Only allowed to return error code in pointers (using ERR_PTR)
1009 * when interruptible is 1
1010 */
018a3d1d
JK
1011const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
1012 unsigned int *size, int interruptible)
4350147a
BH
1013{
1014 char pname[32];
018a3d1d 1015 const struct smu_sdbp_header *part;
4350147a
BH
1016
1017 if (!smu)
1018 return NULL;
1019
1020 sprintf(pname, "sdb-partition-%02x", id);
183d0202 1021
1beb6a7d
BH
1022 DPRINTK("smu_get_sdb_partition(%02x)\n", id);
1023
183d0202
BH
1024 if (interruptible) {
1025 int rc;
14cc3e2b 1026 rc = mutex_lock_interruptible(&smu_part_access);
183d0202
BH
1027 if (rc)
1028 return ERR_PTR(rc);
1029 } else
14cc3e2b 1030 mutex_lock(&smu_part_access);
183d0202 1031
01b2726d 1032 part = of_get_property(smu->of_node, pname, size);
183d0202 1033 if (part == NULL) {
1beb6a7d 1034 DPRINTK("trying to extract from SMU ...\n");
183d0202
BH
1035 part = smu_create_sdb_partition(id);
1036 if (part != NULL && size)
1037 *size = part->len << 2;
1038 }
14cc3e2b 1039 mutex_unlock(&smu_part_access);
183d0202
BH
1040 return part;
1041}
1042
018a3d1d 1043const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
183d0202
BH
1044{
1045 return __smu_get_sdb_partition(id, size, 0);
4350147a
BH
1046}
1047EXPORT_SYMBOL(smu_get_sdb_partition);
0365ba7f
BH
1048
1049
1050/*
1051 * Userland driver interface
1052 */
1053
1054
1055static LIST_HEAD(smu_clist);
1056static DEFINE_SPINLOCK(smu_clist_lock);
1057
1058enum smu_file_mode {
1059 smu_file_commands,
1060 smu_file_events,
1061 smu_file_closing
1062};
1063
1064struct smu_private
1065{
1066 struct list_head list;
1067 enum smu_file_mode mode;
1068 int busy;
1069 struct smu_cmd cmd;
1070 spinlock_t lock;
1071 wait_queue_head_t wait;
1072 u8 buffer[SMU_MAX_DATA];
1073};
1074
1075
1076static int smu_open(struct inode *inode, struct file *file)
1077{
1078 struct smu_private *pp;
1079 unsigned long flags;
1080
dd00cc48 1081 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
0365ba7f
BH
1082 if (pp == 0)
1083 return -ENOMEM;
0365ba7f
BH
1084 spin_lock_init(&pp->lock);
1085 pp->mode = smu_file_commands;
1086 init_waitqueue_head(&pp->wait);
1087
d851b6e0 1088 mutex_lock(&smu_mutex);
0365ba7f
BH
1089 spin_lock_irqsave(&smu_clist_lock, flags);
1090 list_add(&pp->list, &smu_clist);
1091 spin_unlock_irqrestore(&smu_clist_lock, flags);
1092 file->private_data = pp;
d851b6e0 1093 mutex_unlock(&smu_mutex);
0365ba7f
BH
1094
1095 return 0;
1096}
1097
1098
1099static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
1100{
1101 struct smu_private *pp = misc;
1102
1103 wake_up_all(&pp->wait);
1104}
1105
1106
1107static ssize_t smu_write(struct file *file, const char __user *buf,
1108 size_t count, loff_t *ppos)
1109{
1110 struct smu_private *pp = file->private_data;
1111 unsigned long flags;
1112 struct smu_user_cmd_hdr hdr;
1113 int rc = 0;
1114
1115 if (pp->busy)
1116 return -EBUSY;
1117 else if (copy_from_user(&hdr, buf, sizeof(hdr)))
1118 return -EFAULT;
1119 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
1120 pp->mode = smu_file_events;
1121 return 0;
183d0202 1122 } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
018a3d1d 1123 const struct smu_sdbp_header *part;
183d0202
BH
1124 part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
1125 if (part == NULL)
1126 return -EINVAL;
1127 else if (IS_ERR(part))
1128 return PTR_ERR(part);
1129 return 0;
0365ba7f
BH
1130 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
1131 return -EINVAL;
1132 else if (pp->mode != smu_file_commands)
1133 return -EBADFD;
1134 else if (hdr.data_len > SMU_MAX_DATA)
1135 return -EINVAL;
1136
1137 spin_lock_irqsave(&pp->lock, flags);
1138 if (pp->busy) {
1139 spin_unlock_irqrestore(&pp->lock, flags);
1140 return -EBUSY;
1141 }
1142 pp->busy = 1;
1143 pp->cmd.status = 1;
1144 spin_unlock_irqrestore(&pp->lock, flags);
1145
1146 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
1147 pp->busy = 0;
1148 return -EFAULT;
1149 }
1150
1151 pp->cmd.cmd = hdr.cmd;
1152 pp->cmd.data_len = hdr.data_len;
1153 pp->cmd.reply_len = SMU_MAX_DATA;
1154 pp->cmd.data_buf = pp->buffer;
1155 pp->cmd.reply_buf = pp->buffer;
1156 pp->cmd.done = smu_user_cmd_done;
1157 pp->cmd.misc = pp;
1158 rc = smu_queue_cmd(&pp->cmd);
1159 if (rc < 0)
1160 return rc;
1161 return count;
1162}
1163
1164
1165static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
1166 char __user *buf, size_t count)
1167{
1168 DECLARE_WAITQUEUE(wait, current);
1169 struct smu_user_reply_hdr hdr;
1170 unsigned long flags;
1171 int size, rc = 0;
1172
1173 if (!pp->busy)
1174 return 0;
1175 if (count < sizeof(struct smu_user_reply_hdr))
1176 return -EOVERFLOW;
1177 spin_lock_irqsave(&pp->lock, flags);
1178 if (pp->cmd.status == 1) {
86e4754a
JL
1179 if (file->f_flags & O_NONBLOCK) {
1180 spin_unlock_irqrestore(&pp->lock, flags);
0365ba7f 1181 return -EAGAIN;
86e4754a 1182 }
0365ba7f
BH
1183 add_wait_queue(&pp->wait, &wait);
1184 for (;;) {
1185 set_current_state(TASK_INTERRUPTIBLE);
1186 rc = 0;
1187 if (pp->cmd.status != 1)
1188 break;
1189 rc = -ERESTARTSYS;
1190 if (signal_pending(current))
1191 break;
1192 spin_unlock_irqrestore(&pp->lock, flags);
1193 schedule();
1194 spin_lock_irqsave(&pp->lock, flags);
1195 }
1196 set_current_state(TASK_RUNNING);
1197 remove_wait_queue(&pp->wait, &wait);
1198 }
1199 spin_unlock_irqrestore(&pp->lock, flags);
1200 if (rc)
1201 return rc;
1202 if (pp->cmd.status != 0)
1203 pp->cmd.reply_len = 0;
1204 size = sizeof(hdr) + pp->cmd.reply_len;
1205 if (count < size)
1206 size = count;
1207 rc = size;
1208 hdr.status = pp->cmd.status;
1209 hdr.reply_len = pp->cmd.reply_len;
1210 if (copy_to_user(buf, &hdr, sizeof(hdr)))
1211 return -EFAULT;
1212 size -= sizeof(hdr);
1213 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
1214 return -EFAULT;
1215 pp->busy = 0;
1216
1217 return rc;
1218}
1219
1220
1221static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
1222 char __user *buf, size_t count)
1223{
1224 /* Not implemented */
1225 msleep_interruptible(1000);
1226 return 0;
1227}
1228
1229
1230static ssize_t smu_read(struct file *file, char __user *buf,
1231 size_t count, loff_t *ppos)
1232{
1233 struct smu_private *pp = file->private_data;
1234
1235 if (pp->mode == smu_file_commands)
1236 return smu_read_command(file, pp, buf, count);
1237 if (pp->mode == smu_file_events)
1238 return smu_read_events(file, pp, buf, count);
1239
1240 return -EBADFD;
1241}
1242
1243static unsigned int smu_fpoll(struct file *file, poll_table *wait)
1244{
1245 struct smu_private *pp = file->private_data;
1246 unsigned int mask = 0;
1247 unsigned long flags;
1248
1249 if (pp == 0)
1250 return 0;
1251
1252 if (pp->mode == smu_file_commands) {
1253 poll_wait(file, &pp->wait, wait);
1254
1255 spin_lock_irqsave(&pp->lock, flags);
1256 if (pp->busy && pp->cmd.status != 1)
1257 mask |= POLLIN;
1258 spin_unlock_irqrestore(&pp->lock, flags);
1259 } if (pp->mode == smu_file_events) {
1260 /* Not yet implemented */
1261 }
1262 return mask;
1263}
1264
1265static int smu_release(struct inode *inode, struct file *file)
1266{
1267 struct smu_private *pp = file->private_data;
1268 unsigned long flags;
1269 unsigned int busy;
1270
1271 if (pp == 0)
1272 return 0;
1273
1274 file->private_data = NULL;
1275
1276 /* Mark file as closing to avoid races with new request */
1277 spin_lock_irqsave(&pp->lock, flags);
1278 pp->mode = smu_file_closing;
1279 busy = pp->busy;
1280
1281 /* Wait for any pending request to complete */
1282 if (busy && pp->cmd.status == 1) {
1283 DECLARE_WAITQUEUE(wait, current);
1284
1285 add_wait_queue(&pp->wait, &wait);
1286 for (;;) {
1287 set_current_state(TASK_UNINTERRUPTIBLE);
1288 if (pp->cmd.status != 1)
1289 break;
0365ba7f 1290 spin_unlock_irqrestore(&pp->lock, flags);
94256dd6
AM
1291 schedule();
1292 spin_lock_irqsave(&pp->lock, flags);
0365ba7f
BH
1293 }
1294 set_current_state(TASK_RUNNING);
1295 remove_wait_queue(&pp->wait, &wait);
1296 }
1297 spin_unlock_irqrestore(&pp->lock, flags);
1298
1299 spin_lock_irqsave(&smu_clist_lock, flags);
1300 list_del(&pp->list);
1301 spin_unlock_irqrestore(&smu_clist_lock, flags);
1302 kfree(pp);
1303
1304 return 0;
1305}
1306
1307
fa027c2a 1308static const struct file_operations smu_device_fops = {
0365ba7f
BH
1309 .llseek = no_llseek,
1310 .read = smu_read,
1311 .write = smu_write,
1312 .poll = smu_fpoll,
1313 .open = smu_open,
1314 .release = smu_release,
1315};
1316
6b67f62c 1317static struct miscdevice pmu_device = {
0365ba7f
BH
1318 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
1319};
1320
1321static int smu_device_init(void)
1322{
1323 if (!smu)
1324 return -ENODEV;
1325 if (misc_register(&pmu_device) < 0)
1326 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
1327 return 0;
1328}
1329device_initcall(smu_device_init);