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da2272c9 KK |
1 | /* |
2 | * mISDNisar.c ISAR (Siemens PSB 7110) specific functions | |
3 | * | |
4 | * Author Karsten Keil (keil@isdn4linux.de) | |
5 | * | |
6 | * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | * | |
21 | */ | |
22 | ||
23 | /* define this to enable static debug messages, if you kernel supports | |
24 | * dynamic debugging, you should use debugfs for this | |
25 | */ | |
26 | /* #define DEBUG */ | |
27 | ||
5a0e3ad6 | 28 | #include <linux/gfp.h> |
da2272c9 KK |
29 | #include <linux/delay.h> |
30 | #include <linux/vmalloc.h> | |
31 | #include <linux/mISDNhw.h> | |
32 | #include "isar.h" | |
33 | ||
34 | #define ISAR_REV "2.1" | |
35 | ||
36 | MODULE_AUTHOR("Karsten Keil"); | |
37 | MODULE_LICENSE("GPL v2"); | |
38 | MODULE_VERSION(ISAR_REV); | |
39 | ||
40 | #define DEBUG_HW_FIRMWARE_FIFO 0x10000 | |
41 | ||
42 | static const u8 faxmodulation_s[] = "3,24,48,72,73,74,96,97,98,121,122,145,146"; | |
43 | static const u8 faxmodulation[] = {3, 24, 48, 72, 73, 74, 96, 97, 98, 121, | |
44 | 122, 145, 146}; | |
45 | #define FAXMODCNT 13 | |
46 | ||
47 | static void isar_setup(struct isar_hw *); | |
48 | ||
49 | static inline int | |
50 | waitforHIA(struct isar_hw *isar, int timeout) | |
51 | { | |
52 | int t = timeout; | |
53 | u8 val = isar->read_reg(isar->hw, ISAR_HIA); | |
54 | ||
55 | while ((val & 1) && t) { | |
56 | udelay(1); | |
57 | t--; | |
58 | val = isar->read_reg(isar->hw, ISAR_HIA); | |
59 | } | |
60 | pr_debug("%s: HIA after %dus\n", isar->name, timeout - t); | |
61 | return timeout; | |
62 | } | |
63 | ||
64 | /* | |
65 | * send msg to ISAR mailbox | |
66 | * if msg is NULL use isar->buf | |
67 | */ | |
68 | static int | |
69 | send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg) | |
70 | { | |
71 | if (!waitforHIA(isar, 1000)) | |
72 | return 0; | |
73 | pr_debug("send_mbox(%02x,%02x,%d)\n", his, creg, len); | |
74 | isar->write_reg(isar->hw, ISAR_CTRL_H, creg); | |
75 | isar->write_reg(isar->hw, ISAR_CTRL_L, len); | |
76 | isar->write_reg(isar->hw, ISAR_WADR, 0); | |
77 | if (!msg) | |
78 | msg = isar->buf; | |
79 | if (msg && len) { | |
80 | isar->write_fifo(isar->hw, ISAR_MBOX, msg, len); | |
81 | if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { | |
82 | int l = 0; | |
83 | ||
84 | while (l < (int)len) { | |
85 | hex_dump_to_buffer(msg + l, len - l, 32, 1, | |
86 | isar->log, 256, 1); | |
87 | pr_debug("%s: %s %02x: %s\n", isar->name, | |
88 | __func__, l, isar->log); | |
89 | l += 32; | |
90 | } | |
91 | } | |
92 | } | |
93 | isar->write_reg(isar->hw, ISAR_HIS, his); | |
94 | waitforHIA(isar, 1000); | |
95 | return 1; | |
96 | } | |
97 | ||
98 | /* | |
99 | * receive message from ISAR mailbox | |
100 | * if msg is NULL use isar->buf | |
101 | */ | |
102 | static void | |
103 | rcv_mbox(struct isar_hw *isar, u8 *msg) | |
104 | { | |
105 | if (!msg) | |
106 | msg = isar->buf; | |
107 | isar->write_reg(isar->hw, ISAR_RADR, 0); | |
108 | if (msg && isar->clsb) { | |
109 | isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb); | |
110 | if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { | |
111 | int l = 0; | |
112 | ||
113 | while (l < (int)isar->clsb) { | |
114 | hex_dump_to_buffer(msg + l, isar->clsb - l, 32, | |
115 | 1, isar->log, 256, 1); | |
116 | pr_debug("%s: %s %02x: %s\n", isar->name, | |
117 | __func__, l, isar->log); | |
118 | l += 32; | |
119 | } | |
120 | } | |
121 | } | |
122 | isar->write_reg(isar->hw, ISAR_IIA, 0); | |
123 | } | |
124 | ||
125 | static inline void | |
126 | get_irq_infos(struct isar_hw *isar) | |
127 | { | |
128 | isar->iis = isar->read_reg(isar->hw, ISAR_IIS); | |
129 | isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H); | |
130 | isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L); | |
131 | pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name, | |
132 | isar->iis, isar->cmsb, isar->clsb); | |
133 | } | |
134 | ||
135 | /* | |
136 | * poll answer message from ISAR mailbox | |
137 | * should be used only with ISAR IRQs disabled before DSP was started | |
138 | * | |
139 | */ | |
140 | static int | |
141 | poll_mbox(struct isar_hw *isar, int maxdelay) | |
142 | { | |
143 | int t = maxdelay; | |
144 | u8 irq; | |
145 | ||
146 | irq = isar->read_reg(isar->hw, ISAR_IRQBIT); | |
147 | while (t && !(irq & ISAR_IRQSTA)) { | |
148 | udelay(1); | |
149 | t--; | |
150 | } | |
151 | if (t) { | |
152 | get_irq_infos(isar); | |
153 | rcv_mbox(isar, NULL); | |
154 | } | |
155 | pr_debug("%s: pulled %d bytes after %d us\n", | |
156 | isar->name, isar->clsb, maxdelay - t); | |
157 | return t; | |
158 | } | |
159 | ||
160 | static int | |
161 | ISARVersion(struct isar_hw *isar) | |
162 | { | |
163 | int ver; | |
164 | ||
165 | /* disable ISAR IRQ */ | |
166 | isar->write_reg(isar->hw, ISAR_IRQBIT, 0); | |
167 | isar->buf[0] = ISAR_MSG_HWVER; | |
168 | isar->buf[1] = 0; | |
169 | isar->buf[2] = 1; | |
170 | if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL)) | |
171 | return -1; | |
172 | if (!poll_mbox(isar, 1000)) | |
173 | return -2; | |
174 | if (isar->iis == ISAR_IIS_VNR) { | |
175 | if (isar->clsb == 1) { | |
176 | ver = isar->buf[0] & 0xf; | |
177 | return ver; | |
178 | } | |
179 | return -3; | |
180 | } | |
181 | return -4; | |
182 | } | |
183 | ||
184 | static int | |
185 | load_firmware(struct isar_hw *isar, const u8 *buf, int size) | |
186 | { | |
187 | u32 saved_debug = isar->ch[0].bch.debug; | |
188 | int ret, cnt; | |
189 | u8 nom, noc; | |
190 | u16 left, val, *sp = (u16 *)buf; | |
191 | u8 *mp; | |
192 | u_long flags; | |
193 | ||
194 | struct { | |
195 | u16 sadr; | |
196 | u16 len; | |
197 | u16 d_key; | |
198 | } blk_head; | |
199 | ||
200 | if (1 != isar->version) { | |
201 | pr_err("%s: ISAR wrong version %d firmware download aborted\n", | |
202 | isar->name, isar->version); | |
203 | return -EINVAL; | |
204 | } | |
205 | if (!(saved_debug & DEBUG_HW_FIRMWARE_FIFO)) | |
206 | isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO; | |
207 | pr_debug("%s: load firmware %d words (%d bytes)\n", | |
208 | isar->name, size/2, size); | |
209 | cnt = 0; | |
210 | size /= 2; | |
211 | /* disable ISAR IRQ */ | |
212 | spin_lock_irqsave(isar->hwlock, flags); | |
213 | isar->write_reg(isar->hw, ISAR_IRQBIT, 0); | |
214 | spin_unlock_irqrestore(isar->hwlock, flags); | |
215 | while (cnt < size) { | |
216 | blk_head.sadr = le16_to_cpu(*sp++); | |
217 | blk_head.len = le16_to_cpu(*sp++); | |
218 | blk_head.d_key = le16_to_cpu(*sp++); | |
219 | cnt += 3; | |
220 | pr_debug("ISAR firmware block (%#x,%d,%#x)\n", | |
221 | blk_head.sadr, blk_head.len, blk_head.d_key & 0xff); | |
222 | left = blk_head.len; | |
223 | if (cnt + left > size) { | |
224 | pr_info("%s: firmware error have %d need %d words\n", | |
225 | isar->name, size, cnt + left); | |
226 | ret = -EINVAL; | |
227 | goto reterrflg; | |
228 | } | |
229 | spin_lock_irqsave(isar->hwlock, flags); | |
230 | if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff, | |
231 | 0, NULL)) { | |
232 | pr_info("ISAR send_mbox dkey failed\n"); | |
233 | ret = -ETIME; | |
234 | goto reterror; | |
235 | } | |
236 | if (!poll_mbox(isar, 1000)) { | |
237 | pr_warning("ISAR poll_mbox dkey failed\n"); | |
238 | ret = -ETIME; | |
239 | goto reterror; | |
240 | } | |
241 | spin_unlock_irqrestore(isar->hwlock, flags); | |
242 | if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) { | |
243 | pr_info("ISAR wrong dkey response (%x,%x,%x)\n", | |
244 | isar->iis, isar->cmsb, isar->clsb); | |
245 | ret = 1; | |
246 | goto reterrflg; | |
247 | } | |
248 | while (left > 0) { | |
249 | if (left > 126) | |
250 | noc = 126; | |
251 | else | |
252 | noc = left; | |
253 | nom = (2 * noc) + 3; | |
254 | mp = isar->buf; | |
255 | /* the ISAR is big endian */ | |
256 | *mp++ = blk_head.sadr >> 8; | |
257 | *mp++ = blk_head.sadr & 0xFF; | |
258 | left -= noc; | |
259 | cnt += noc; | |
260 | *mp++ = noc; | |
261 | pr_debug("%s: load %3d words at %04x\n", isar->name, | |
262 | noc, blk_head.sadr); | |
263 | blk_head.sadr += noc; | |
264 | while (noc) { | |
265 | val = le16_to_cpu(*sp++); | |
266 | *mp++ = val >> 8; | |
267 | *mp++ = val & 0xFF;; | |
268 | noc--; | |
269 | } | |
270 | spin_lock_irqsave(isar->hwlock, flags); | |
271 | if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) { | |
272 | pr_info("ISAR send_mbox prog failed\n"); | |
273 | ret = -ETIME; | |
274 | goto reterror; | |
275 | } | |
276 | if (!poll_mbox(isar, 1000)) { | |
277 | pr_info("ISAR poll_mbox prog failed\n"); | |
278 | ret = -ETIME; | |
279 | goto reterror; | |
280 | } | |
281 | spin_unlock_irqrestore(isar->hwlock, flags); | |
282 | if ((isar->iis != ISAR_IIS_FIRM) || | |
283 | isar->cmsb || isar->clsb) { | |
284 | pr_info("ISAR wrong prog response (%x,%x,%x)\n", | |
285 | isar->iis, isar->cmsb, isar->clsb); | |
286 | ret = -EIO; | |
287 | goto reterrflg; | |
288 | } | |
289 | } | |
290 | pr_debug("%s: ISAR firmware block %d words loaded\n", | |
291 | isar->name, blk_head.len); | |
292 | } | |
293 | isar->ch[0].bch.debug = saved_debug; | |
294 | /* 10ms delay */ | |
295 | cnt = 10; | |
296 | while (cnt--) | |
297 | mdelay(1); | |
298 | isar->buf[0] = 0xff; | |
299 | isar->buf[1] = 0xfe; | |
300 | isar->bstat = 0; | |
301 | spin_lock_irqsave(isar->hwlock, flags); | |
302 | if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) { | |
303 | pr_info("ISAR send_mbox start dsp failed\n"); | |
304 | ret = -ETIME; | |
305 | goto reterror; | |
306 | } | |
307 | if (!poll_mbox(isar, 1000)) { | |
308 | pr_info("ISAR poll_mbox start dsp failed\n"); | |
309 | ret = -ETIME; | |
310 | goto reterror; | |
311 | } | |
312 | if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) { | |
313 | pr_info("ISAR wrong start dsp response (%x,%x,%x)\n", | |
314 | isar->iis, isar->cmsb, isar->clsb); | |
315 | ret = -EIO; | |
316 | goto reterror; | |
317 | } else | |
318 | pr_debug("%s: ISAR start dsp success\n", isar->name); | |
319 | ||
320 | /* NORMAL mode entered */ | |
321 | /* Enable IRQs of ISAR */ | |
322 | isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA); | |
323 | spin_unlock_irqrestore(isar->hwlock, flags); | |
324 | cnt = 1000; /* max 1s */ | |
325 | while ((!isar->bstat) && cnt) { | |
326 | mdelay(1); | |
327 | cnt--; | |
328 | } | |
329 | if (!cnt) { | |
330 | pr_info("ISAR no general status event received\n"); | |
331 | ret = -ETIME; | |
332 | goto reterrflg; | |
333 | } else | |
334 | pr_debug("%s: ISAR general status event %x\n", | |
335 | isar->name, isar->bstat); | |
336 | /* 10ms delay */ | |
337 | cnt = 10; | |
338 | while (cnt--) | |
339 | mdelay(1); | |
340 | isar->iis = 0; | |
341 | spin_lock_irqsave(isar->hwlock, flags); | |
342 | if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) { | |
343 | pr_info("ISAR send_mbox self tst failed\n"); | |
344 | ret = -ETIME; | |
345 | goto reterror; | |
346 | } | |
347 | spin_unlock_irqrestore(isar->hwlock, flags); | |
348 | cnt = 10000; /* max 100 ms */ | |
349 | while ((isar->iis != ISAR_IIS_DIAG) && cnt) { | |
350 | udelay(10); | |
351 | cnt--; | |
352 | } | |
353 | mdelay(1); | |
354 | if (!cnt) { | |
355 | pr_info("ISAR no self tst response\n"); | |
356 | ret = -ETIME; | |
357 | goto reterrflg; | |
358 | } | |
359 | if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1) | |
360 | && (isar->buf[0] == 0)) | |
361 | pr_debug("%s: ISAR selftest OK\n", isar->name); | |
362 | else { | |
363 | pr_info("ISAR selftest not OK %x/%x/%x\n", | |
364 | isar->cmsb, isar->clsb, isar->buf[0]); | |
365 | ret = -EIO; | |
366 | goto reterrflg; | |
367 | } | |
368 | spin_lock_irqsave(isar->hwlock, flags); | |
369 | isar->iis = 0; | |
370 | if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) { | |
371 | pr_info("ISAR RQST SVN failed\n"); | |
372 | ret = -ETIME; | |
373 | goto reterror; | |
374 | } | |
375 | spin_unlock_irqrestore(isar->hwlock, flags); | |
376 | cnt = 30000; /* max 300 ms */ | |
377 | while ((isar->iis != ISAR_IIS_DIAG) && cnt) { | |
378 | udelay(10); | |
379 | cnt--; | |
380 | } | |
381 | mdelay(1); | |
382 | if (!cnt) { | |
383 | pr_info("ISAR no SVN response\n"); | |
384 | ret = -ETIME; | |
385 | goto reterrflg; | |
386 | } else { | |
387 | if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) { | |
388 | pr_notice("%s: ISAR software version %#x\n", | |
389 | isar->name, isar->buf[0]); | |
390 | } else { | |
391 | pr_info("%s: ISAR wrong swver response (%x,%x)" | |
392 | " cnt(%d)\n", isar->name, isar->cmsb, | |
393 | isar->clsb, cnt); | |
394 | ret = -EIO; | |
395 | goto reterrflg; | |
396 | } | |
397 | } | |
398 | spin_lock_irqsave(isar->hwlock, flags); | |
399 | isar_setup(isar); | |
400 | spin_unlock_irqrestore(isar->hwlock, flags); | |
401 | ret = 0; | |
402 | reterrflg: | |
403 | spin_lock_irqsave(isar->hwlock, flags); | |
404 | reterror: | |
405 | isar->ch[0].bch.debug = saved_debug; | |
406 | if (ret) | |
407 | /* disable ISAR IRQ */ | |
408 | isar->write_reg(isar->hw, ISAR_IRQBIT, 0); | |
409 | spin_unlock_irqrestore(isar->hwlock, flags); | |
410 | return ret; | |
411 | } | |
412 | ||
413 | static inline void | |
414 | deliver_status(struct isar_ch *ch, int status) | |
415 | { | |
416 | pr_debug("%s: HL->LL FAXIND %x\n", ch->is->name, status); | |
417 | _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC); | |
418 | } | |
419 | ||
420 | static inline void | |
421 | isar_rcv_frame(struct isar_ch *ch) | |
422 | { | |
423 | u8 *ptr; | |
424 | ||
425 | if (!ch->is->clsb) { | |
426 | pr_debug("%s; ISAR zero len frame\n", ch->is->name); | |
427 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
428 | return; | |
429 | } | |
430 | switch (ch->bch.state) { | |
431 | case ISDN_P_NONE: | |
432 | pr_debug("%s: ISAR protocol 0 spurious IIS_RDATA %x/%x/%x\n", | |
433 | ch->is->name, ch->is->iis, ch->is->cmsb, ch->is->clsb); | |
434 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
435 | break; | |
436 | case ISDN_P_B_RAW: | |
437 | case ISDN_P_B_L2DTMF: | |
438 | case ISDN_P_B_MODEM_ASYNC: | |
439 | if (!ch->bch.rx_skb) { | |
440 | ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen, | |
441 | GFP_ATOMIC); | |
442 | if (unlikely(!ch->bch.rx_skb)) { | |
443 | pr_info("%s: B receive out of memory\n", | |
444 | ch->is->name); | |
445 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
446 | break; | |
447 | } | |
448 | } | |
449 | rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb)); | |
450 | recv_Bchannel(&ch->bch, 0); | |
451 | break; | |
452 | case ISDN_P_B_HDLC: | |
453 | if (!ch->bch.rx_skb) { | |
454 | ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen, | |
455 | GFP_ATOMIC); | |
456 | if (unlikely(!ch->bch.rx_skb)) { | |
457 | pr_info("%s: B receive out of memory\n", | |
458 | ch->is->name); | |
459 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
460 | break; | |
461 | } | |
462 | } | |
463 | if ((ch->bch.rx_skb->len + ch->is->clsb) > | |
464 | (ch->bch.maxlen + 2)) { | |
465 | pr_debug("%s: incoming packet too large\n", | |
466 | ch->is->name); | |
467 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
468 | skb_trim(ch->bch.rx_skb, 0); | |
469 | break; | |
470 | } | |
471 | if (ch->is->cmsb & HDLC_ERROR) { | |
472 | pr_debug("%s: ISAR frame error %x len %d\n", | |
473 | ch->is->name, ch->is->cmsb, ch->is->clsb); | |
474 | #ifdef ERROR_STATISTIC | |
475 | if (ch->is->cmsb & HDLC_ERR_RER) | |
476 | ch->bch.err_inv++; | |
477 | if (ch->is->cmsb & HDLC_ERR_CER) | |
478 | ch->bch.err_crc++; | |
479 | #endif | |
480 | skb_trim(ch->bch.rx_skb, 0); | |
481 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
482 | break; | |
483 | } | |
484 | if (ch->is->cmsb & HDLC_FSD) | |
485 | skb_trim(ch->bch.rx_skb, 0); | |
486 | ptr = skb_put(ch->bch.rx_skb, ch->is->clsb); | |
487 | rcv_mbox(ch->is, ptr); | |
488 | if (ch->is->cmsb & HDLC_FED) { | |
489 | if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */ | |
490 | pr_debug("%s: ISAR frame to short %d\n", | |
491 | ch->is->name, ch->bch.rx_skb->len); | |
492 | skb_trim(ch->bch.rx_skb, 0); | |
493 | break; | |
494 | } | |
495 | skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2); | |
496 | recv_Bchannel(&ch->bch, 0); | |
497 | } | |
498 | break; | |
499 | case ISDN_P_B_T30_FAX: | |
500 | if (ch->state != STFAX_ACTIV) { | |
501 | pr_debug("%s: isar_rcv_frame: not ACTIV\n", | |
502 | ch->is->name); | |
503 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
504 | if (ch->bch.rx_skb) | |
505 | skb_trim(ch->bch.rx_skb, 0); | |
506 | break; | |
507 | } | |
508 | if (!ch->bch.rx_skb) { | |
509 | ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen, | |
510 | GFP_ATOMIC); | |
511 | if (unlikely(!ch->bch.rx_skb)) { | |
512 | pr_info("%s: B receive out of memory\n", | |
513 | __func__); | |
514 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
515 | break; | |
516 | } | |
517 | } | |
518 | if (ch->cmd == PCTRL_CMD_FRM) { | |
519 | rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb)); | |
520 | pr_debug("%s: isar_rcv_frame: %d\n", | |
521 | ch->is->name, ch->bch.rx_skb->len); | |
522 | if (ch->is->cmsb & SART_NMD) { /* ABORT */ | |
523 | pr_debug("%s: isar_rcv_frame: no more data\n", | |
524 | ch->is->name); | |
525 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
526 | send_mbox(ch->is, SET_DPS(ch->dpath) | | |
527 | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, | |
528 | 0, NULL); | |
529 | ch->state = STFAX_ESCAPE; | |
530 | /* set_skb_flag(skb, DF_NOMOREDATA); */ | |
531 | } | |
532 | recv_Bchannel(&ch->bch, 0); | |
533 | if (ch->is->cmsb & SART_NMD) | |
534 | deliver_status(ch, HW_MOD_NOCARR); | |
535 | break; | |
536 | } | |
537 | if (ch->cmd != PCTRL_CMD_FRH) { | |
538 | pr_debug("%s: isar_rcv_frame: unknown fax mode %x\n", | |
539 | ch->is->name, ch->cmd); | |
540 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
541 | if (ch->bch.rx_skb) | |
542 | skb_trim(ch->bch.rx_skb, 0); | |
543 | break; | |
544 | } | |
545 | /* PCTRL_CMD_FRH */ | |
546 | if ((ch->bch.rx_skb->len + ch->is->clsb) > | |
547 | (ch->bch.maxlen + 2)) { | |
548 | pr_info("%s: %s incoming packet too large\n", | |
549 | ch->is->name, __func__); | |
550 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
551 | skb_trim(ch->bch.rx_skb, 0); | |
552 | break; | |
553 | } else if (ch->is->cmsb & HDLC_ERROR) { | |
554 | pr_info("%s: ISAR frame error %x len %d\n", | |
555 | ch->is->name, ch->is->cmsb, ch->is->clsb); | |
556 | skb_trim(ch->bch.rx_skb, 0); | |
557 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
558 | break; | |
559 | } | |
560 | if (ch->is->cmsb & HDLC_FSD) | |
561 | skb_trim(ch->bch.rx_skb, 0); | |
562 | ptr = skb_put(ch->bch.rx_skb, ch->is->clsb); | |
563 | rcv_mbox(ch->is, ptr); | |
564 | if (ch->is->cmsb & HDLC_FED) { | |
565 | if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */ | |
566 | pr_info("%s: ISAR frame to short %d\n", | |
567 | ch->is->name, ch->bch.rx_skb->len); | |
568 | skb_trim(ch->bch.rx_skb, 0); | |
569 | break; | |
570 | } | |
571 | skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2); | |
572 | recv_Bchannel(&ch->bch, 0); | |
573 | } | |
574 | if (ch->is->cmsb & SART_NMD) { /* ABORT */ | |
575 | pr_debug("%s: isar_rcv_frame: no more data\n", | |
576 | ch->is->name); | |
577 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
578 | if (ch->bch.rx_skb) | |
579 | skb_trim(ch->bch.rx_skb, 0); | |
580 | send_mbox(ch->is, SET_DPS(ch->dpath) | | |
581 | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL); | |
582 | ch->state = STFAX_ESCAPE; | |
583 | deliver_status(ch, HW_MOD_NOCARR); | |
584 | } | |
585 | break; | |
586 | default: | |
587 | pr_info("isar_rcv_frame protocol (%x)error\n", ch->bch.state); | |
588 | ch->is->write_reg(ch->is->hw, ISAR_IIA, 0); | |
589 | break; | |
590 | } | |
591 | } | |
592 | ||
593 | static void | |
594 | isar_fill_fifo(struct isar_ch *ch) | |
595 | { | |
596 | int count; | |
597 | u8 msb; | |
598 | u8 *ptr; | |
599 | ||
600 | pr_debug("%s: ch%d tx_skb %p tx_idx %d\n", | |
601 | ch->is->name, ch->bch.nr, ch->bch.tx_skb, ch->bch.tx_idx); | |
602 | if (!ch->bch.tx_skb) | |
603 | return; | |
604 | count = ch->bch.tx_skb->len - ch->bch.tx_idx; | |
605 | if (count <= 0) | |
606 | return; | |
607 | if (!(ch->is->bstat & | |
608 | (ch->dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2))) | |
609 | return; | |
610 | if (count > ch->mml) { | |
611 | msb = 0; | |
612 | count = ch->mml; | |
613 | } else { | |
614 | msb = HDLC_FED; | |
615 | } | |
616 | ptr = ch->bch.tx_skb->data + ch->bch.tx_idx; | |
617 | if (!ch->bch.tx_idx) { | |
618 | pr_debug("%s: frame start\n", ch->is->name); | |
619 | if ((ch->bch.state == ISDN_P_B_T30_FAX) && | |
620 | (ch->cmd == PCTRL_CMD_FTH)) { | |
621 | if (count > 1) { | |
622 | if ((ptr[0] == 0xff) && (ptr[1] == 0x13)) { | |
623 | /* last frame */ | |
624 | test_and_set_bit(FLG_LASTDATA, | |
625 | &ch->bch.Flags); | |
626 | pr_debug("%s: set LASTDATA\n", | |
627 | ch->is->name); | |
628 | if (msb == HDLC_FED) | |
629 | test_and_set_bit(FLG_DLEETX, | |
630 | &ch->bch.Flags); | |
631 | } | |
632 | } | |
633 | } | |
634 | msb |= HDLC_FST; | |
635 | } | |
636 | ch->bch.tx_idx += count; | |
637 | switch (ch->bch.state) { | |
638 | case ISDN_P_NONE: | |
639 | pr_info("%s: wrong protocol 0\n", __func__); | |
640 | break; | |
641 | case ISDN_P_B_RAW: | |
642 | case ISDN_P_B_L2DTMF: | |
643 | case ISDN_P_B_MODEM_ASYNC: | |
644 | send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA, | |
645 | 0, count, ptr); | |
646 | break; | |
647 | case ISDN_P_B_HDLC: | |
648 | send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA, | |
649 | msb, count, ptr); | |
650 | break; | |
651 | case ISDN_P_B_T30_FAX: | |
652 | if (ch->state != STFAX_ACTIV) | |
653 | pr_debug("%s: not ACTIV\n", ch->is->name); | |
654 | else if (ch->cmd == PCTRL_CMD_FTH) | |
655 | send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA, | |
656 | msb, count, ptr); | |
657 | else if (ch->cmd == PCTRL_CMD_FTM) | |
658 | send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA, | |
659 | 0, count, ptr); | |
660 | else | |
661 | pr_debug("%s: not FTH/FTM\n", ch->is->name); | |
662 | break; | |
663 | default: | |
664 | pr_info("%s: protocol(%x) error\n", | |
665 | __func__, ch->bch.state); | |
666 | break; | |
667 | } | |
668 | } | |
669 | ||
670 | static inline struct isar_ch * | |
671 | sel_bch_isar(struct isar_hw *isar, u8 dpath) | |
672 | { | |
673 | struct isar_ch *base = &isar->ch[0]; | |
674 | ||
675 | if ((!dpath) || (dpath > 2)) | |
676 | return NULL; | |
677 | if (base->dpath == dpath) | |
678 | return base; | |
679 | base++; | |
680 | if (base->dpath == dpath) | |
681 | return base; | |
682 | return NULL; | |
683 | } | |
684 | ||
685 | static void | |
686 | send_next(struct isar_ch *ch) | |
687 | { | |
688 | pr_debug("%s: %s ch%d tx_skb %p tx_idx %d\n", | |
689 | ch->is->name, __func__, ch->bch.nr, | |
690 | ch->bch.tx_skb, ch->bch.tx_idx); | |
691 | if (ch->bch.state == ISDN_P_B_T30_FAX) { | |
692 | if (ch->cmd == PCTRL_CMD_FTH) { | |
693 | if (test_bit(FLG_LASTDATA, &ch->bch.Flags)) { | |
694 | pr_debug("set NMD_DATA\n"); | |
695 | test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags); | |
696 | } | |
697 | } else if (ch->cmd == PCTRL_CMD_FTM) { | |
698 | if (test_bit(FLG_DLEETX, &ch->bch.Flags)) { | |
699 | test_and_set_bit(FLG_LASTDATA, &ch->bch.Flags); | |
700 | test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags); | |
701 | } | |
702 | } | |
703 | } | |
704 | if (ch->bch.tx_skb) { | |
705 | /* send confirm, on trans, free on hdlc. */ | |
706 | if (test_bit(FLG_TRANSPARENT, &ch->bch.Flags)) | |
707 | confirm_Bsend(&ch->bch); | |
708 | dev_kfree_skb(ch->bch.tx_skb); | |
709 | } | |
710 | if (get_next_bframe(&ch->bch)) | |
711 | isar_fill_fifo(ch); | |
712 | else { | |
713 | if (test_and_clear_bit(FLG_DLEETX, &ch->bch.Flags)) { | |
714 | if (test_and_clear_bit(FLG_LASTDATA, | |
715 | &ch->bch.Flags)) { | |
716 | if (test_and_clear_bit(FLG_NMD_DATA, | |
717 | &ch->bch.Flags)) { | |
718 | u8 zd = 0; | |
719 | send_mbox(ch->is, SET_DPS(ch->dpath) | | |
720 | ISAR_HIS_SDATA, 0x01, 1, &zd); | |
721 | } | |
722 | test_and_set_bit(FLG_LL_OK, &ch->bch.Flags); | |
723 | } else { | |
724 | deliver_status(ch, HW_MOD_CONNECT); | |
725 | } | |
726 | } | |
727 | } | |
728 | } | |
729 | ||
730 | static void | |
731 | check_send(struct isar_hw *isar, u8 rdm) | |
732 | { | |
733 | struct isar_ch *ch; | |
734 | ||
735 | pr_debug("%s: rdm %x\n", isar->name, rdm); | |
736 | if (rdm & BSTAT_RDM1) { | |
737 | ch = sel_bch_isar(isar, 1); | |
738 | if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) { | |
739 | if (ch->bch.tx_skb && (ch->bch.tx_skb->len > | |
740 | ch->bch.tx_idx)) | |
741 | isar_fill_fifo(ch); | |
742 | else | |
743 | send_next(ch); | |
744 | } | |
745 | } | |
746 | if (rdm & BSTAT_RDM2) { | |
747 | ch = sel_bch_isar(isar, 2); | |
748 | if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) { | |
749 | if (ch->bch.tx_skb && (ch->bch.tx_skb->len > | |
750 | ch->bch.tx_idx)) | |
751 | isar_fill_fifo(ch); | |
752 | else | |
753 | send_next(ch); | |
754 | } | |
755 | } | |
756 | } | |
757 | ||
758 | const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4", | |
759 | "300", "600", "1200", "2400", "4800", "7200", | |
760 | "9600nt", "9600t", "12000", "14400", "WRONG"}; | |
761 | const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21", | |
762 | "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"}; | |
763 | ||
764 | static void | |
765 | isar_pump_status_rsp(struct isar_ch *ch) { | |
766 | u8 ril = ch->is->buf[0]; | |
767 | u8 rim; | |
768 | ||
769 | if (!test_and_clear_bit(ISAR_RATE_REQ, &ch->is->Flags)) | |
770 | return; | |
771 | if (ril > 14) { | |
772 | pr_info("%s: wrong pstrsp ril=%d\n", ch->is->name, ril); | |
773 | ril = 15; | |
774 | } | |
775 | switch (ch->is->buf[1]) { | |
776 | case 0: | |
777 | rim = 0; | |
778 | break; | |
779 | case 0x20: | |
780 | rim = 2; | |
781 | break; | |
782 | case 0x40: | |
783 | rim = 3; | |
784 | break; | |
785 | case 0x41: | |
786 | rim = 4; | |
787 | break; | |
788 | case 0x51: | |
789 | rim = 5; | |
790 | break; | |
791 | case 0x61: | |
792 | rim = 6; | |
793 | break; | |
794 | case 0x71: | |
795 | rim = 7; | |
796 | break; | |
797 | case 0x82: | |
798 | rim = 8; | |
799 | break; | |
800 | case 0x92: | |
801 | rim = 9; | |
802 | break; | |
803 | case 0xa2: | |
804 | rim = 10; | |
805 | break; | |
806 | default: | |
807 | rim = 1; | |
808 | break; | |
809 | } | |
810 | sprintf(ch->conmsg, "%s %s", dmril[ril], dmrim[rim]); | |
811 | pr_debug("%s: pump strsp %s\n", ch->is->name, ch->conmsg); | |
812 | } | |
813 | ||
814 | static void | |
815 | isar_pump_statev_modem(struct isar_ch *ch, u8 devt) { | |
816 | u8 dps = SET_DPS(ch->dpath); | |
817 | ||
818 | switch (devt) { | |
819 | case PSEV_10MS_TIMER: | |
820 | pr_debug("%s: pump stev TIMER\n", ch->is->name); | |
821 | break; | |
822 | case PSEV_CON_ON: | |
823 | pr_debug("%s: pump stev CONNECT\n", ch->is->name); | |
824 | deliver_status(ch, HW_MOD_CONNECT); | |
825 | break; | |
826 | case PSEV_CON_OFF: | |
827 | pr_debug("%s: pump stev NO CONNECT\n", ch->is->name); | |
828 | send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); | |
829 | deliver_status(ch, HW_MOD_NOCARR); | |
830 | break; | |
831 | case PSEV_V24_OFF: | |
832 | pr_debug("%s: pump stev V24 OFF\n", ch->is->name); | |
833 | break; | |
834 | case PSEV_CTS_ON: | |
835 | pr_debug("%s: pump stev CTS ON\n", ch->is->name); | |
836 | break; | |
837 | case PSEV_CTS_OFF: | |
838 | pr_debug("%s pump stev CTS OFF\n", ch->is->name); | |
839 | break; | |
840 | case PSEV_DCD_ON: | |
841 | pr_debug("%s: pump stev CARRIER ON\n", ch->is->name); | |
842 | test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags); | |
843 | send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); | |
844 | break; | |
845 | case PSEV_DCD_OFF: | |
846 | pr_debug("%s: pump stev CARRIER OFF\n", ch->is->name); | |
847 | break; | |
848 | case PSEV_DSR_ON: | |
849 | pr_debug("%s: pump stev DSR ON\n", ch->is->name); | |
850 | break; | |
851 | case PSEV_DSR_OFF: | |
852 | pr_debug("%s: pump stev DSR_OFF\n", ch->is->name); | |
853 | break; | |
854 | case PSEV_REM_RET: | |
855 | pr_debug("%s: pump stev REMOTE RETRAIN\n", ch->is->name); | |
856 | break; | |
857 | case PSEV_REM_REN: | |
858 | pr_debug("%s: pump stev REMOTE RENEGOTIATE\n", ch->is->name); | |
859 | break; | |
860 | case PSEV_GSTN_CLR: | |
861 | pr_debug("%s: pump stev GSTN CLEAR\n", ch->is->name); | |
862 | break; | |
863 | default: | |
af901ca1 | 864 | pr_info("u%s: unknown pump stev %x\n", ch->is->name, devt); |
da2272c9 KK |
865 | break; |
866 | } | |
867 | } | |
868 | ||
869 | static void | |
870 | isar_pump_statev_fax(struct isar_ch *ch, u8 devt) { | |
871 | u8 dps = SET_DPS(ch->dpath); | |
872 | u8 p1; | |
873 | ||
874 | switch (devt) { | |
875 | case PSEV_10MS_TIMER: | |
876 | pr_debug("%s: pump stev TIMER\n", ch->is->name); | |
877 | break; | |
878 | case PSEV_RSP_READY: | |
879 | pr_debug("%s: pump stev RSP_READY\n", ch->is->name); | |
880 | ch->state = STFAX_READY; | |
881 | deliver_status(ch, HW_MOD_READY); | |
882 | #ifdef AUTOCON | |
883 | if (test_bit(BC_FLG_ORIG, &ch->bch.Flags)) | |
884 | isar_pump_cmd(bch, HW_MOD_FRH, 3); | |
885 | else | |
886 | isar_pump_cmd(bch, HW_MOD_FTH, 3); | |
887 | #endif | |
888 | break; | |
889 | case PSEV_LINE_TX_H: | |
890 | if (ch->state == STFAX_LINE) { | |
891 | pr_debug("%s: pump stev LINE_TX_H\n", ch->is->name); | |
892 | ch->state = STFAX_CONT; | |
893 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, | |
894 | PCTRL_CMD_CONT, 0, NULL); | |
895 | } else { | |
896 | pr_debug("%s: pump stev LINE_TX_H wrong st %x\n", | |
897 | ch->is->name, ch->state); | |
898 | } | |
899 | break; | |
900 | case PSEV_LINE_RX_H: | |
901 | if (ch->state == STFAX_LINE) { | |
902 | pr_debug("%s: pump stev LINE_RX_H\n", ch->is->name); | |
903 | ch->state = STFAX_CONT; | |
904 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, | |
905 | PCTRL_CMD_CONT, 0, NULL); | |
906 | } else { | |
907 | pr_debug("%s: pump stev LINE_RX_H wrong st %x\n", | |
908 | ch->is->name, ch->state); | |
909 | } | |
910 | break; | |
911 | case PSEV_LINE_TX_B: | |
912 | if (ch->state == STFAX_LINE) { | |
913 | pr_debug("%s: pump stev LINE_TX_B\n", ch->is->name); | |
914 | ch->state = STFAX_CONT; | |
915 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, | |
916 | PCTRL_CMD_CONT, 0, NULL); | |
917 | } else { | |
918 | pr_debug("%s: pump stev LINE_TX_B wrong st %x\n", | |
919 | ch->is->name, ch->state); | |
920 | } | |
921 | break; | |
922 | case PSEV_LINE_RX_B: | |
923 | if (ch->state == STFAX_LINE) { | |
924 | pr_debug("%s: pump stev LINE_RX_B\n", ch->is->name); | |
925 | ch->state = STFAX_CONT; | |
926 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, | |
927 | PCTRL_CMD_CONT, 0, NULL); | |
928 | } else { | |
929 | pr_debug("%s: pump stev LINE_RX_B wrong st %x\n", | |
930 | ch->is->name, ch->state); | |
931 | } | |
932 | break; | |
933 | case PSEV_RSP_CONN: | |
934 | if (ch->state == STFAX_CONT) { | |
935 | pr_debug("%s: pump stev RSP_CONN\n", ch->is->name); | |
936 | ch->state = STFAX_ACTIV; | |
937 | test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags); | |
938 | send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); | |
939 | if (ch->cmd == PCTRL_CMD_FTH) { | |
940 | int delay = (ch->mod == 3) ? 1000 : 200; | |
941 | /* 1s (200 ms) Flags before data */ | |
942 | if (test_and_set_bit(FLG_FTI_RUN, | |
943 | &ch->bch.Flags)) | |
944 | del_timer(&ch->ftimer); | |
945 | ch->ftimer.expires = | |
946 | jiffies + ((delay * HZ)/1000); | |
947 | test_and_set_bit(FLG_LL_CONN, | |
948 | &ch->bch.Flags); | |
949 | add_timer(&ch->ftimer); | |
950 | } else { | |
951 | deliver_status(ch, HW_MOD_CONNECT); | |
952 | } | |
953 | } else { | |
954 | pr_debug("%s: pump stev RSP_CONN wrong st %x\n", | |
955 | ch->is->name, ch->state); | |
956 | } | |
957 | break; | |
958 | case PSEV_FLAGS_DET: | |
959 | pr_debug("%s: pump stev FLAGS_DET\n", ch->is->name); | |
960 | break; | |
961 | case PSEV_RSP_DISC: | |
962 | pr_debug("%s: pump stev RSP_DISC state(%d)\n", | |
963 | ch->is->name, ch->state); | |
964 | if (ch->state == STFAX_ESCAPE) { | |
965 | p1 = 5; | |
966 | switch (ch->newcmd) { | |
967 | case 0: | |
968 | ch->state = STFAX_READY; | |
969 | break; | |
970 | case PCTRL_CMD_FTM: | |
971 | p1 = 2; | |
972 | case PCTRL_CMD_FTH: | |
973 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, | |
974 | PCTRL_CMD_SILON, 1, &p1); | |
975 | ch->state = STFAX_SILDET; | |
976 | break; | |
977 | case PCTRL_CMD_FRH: | |
978 | case PCTRL_CMD_FRM: | |
979 | ch->mod = ch->newmod; | |
980 | p1 = ch->newmod; | |
981 | ch->newmod = 0; | |
982 | ch->cmd = ch->newcmd; | |
983 | ch->newcmd = 0; | |
984 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, | |
985 | ch->cmd, 1, &p1); | |
986 | ch->state = STFAX_LINE; | |
987 | ch->try_mod = 3; | |
988 | break; | |
989 | default: | |
990 | pr_debug("%s: RSP_DISC unknown newcmd %x\n", | |
991 | ch->is->name, ch->newcmd); | |
992 | break; | |
993 | } | |
994 | } else if (ch->state == STFAX_ACTIV) { | |
995 | if (test_and_clear_bit(FLG_LL_OK, &ch->bch.Flags)) | |
996 | deliver_status(ch, HW_MOD_OK); | |
997 | else if (ch->cmd == PCTRL_CMD_FRM) | |
998 | deliver_status(ch, HW_MOD_NOCARR); | |
999 | else | |
1000 | deliver_status(ch, HW_MOD_FCERROR); | |
1001 | ch->state = STFAX_READY; | |
1002 | } else if (ch->state != STFAX_SILDET) { | |
1003 | /* ignore in STFAX_SILDET */ | |
1004 | ch->state = STFAX_READY; | |
1005 | deliver_status(ch, HW_MOD_FCERROR); | |
1006 | } | |
1007 | break; | |
1008 | case PSEV_RSP_SILDET: | |
1009 | pr_debug("%s: pump stev RSP_SILDET\n", ch->is->name); | |
1010 | if (ch->state == STFAX_SILDET) { | |
1011 | ch->mod = ch->newmod; | |
1012 | p1 = ch->newmod; | |
1013 | ch->newmod = 0; | |
1014 | ch->cmd = ch->newcmd; | |
1015 | ch->newcmd = 0; | |
1016 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, | |
1017 | ch->cmd, 1, &p1); | |
1018 | ch->state = STFAX_LINE; | |
1019 | ch->try_mod = 3; | |
1020 | } | |
1021 | break; | |
1022 | case PSEV_RSP_SILOFF: | |
1023 | pr_debug("%s: pump stev RSP_SILOFF\n", ch->is->name); | |
1024 | break; | |
1025 | case PSEV_RSP_FCERR: | |
1026 | if (ch->state == STFAX_LINE) { | |
1027 | pr_debug("%s: pump stev RSP_FCERR try %d\n", | |
1028 | ch->is->name, ch->try_mod); | |
1029 | if (ch->try_mod--) { | |
1030 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, | |
1031 | ch->cmd, 1, &ch->mod); | |
1032 | break; | |
1033 | } | |
1034 | } | |
1035 | pr_debug("%s: pump stev RSP_FCERR\n", ch->is->name); | |
1036 | ch->state = STFAX_ESCAPE; | |
1037 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, | |
1038 | 0, NULL); | |
1039 | deliver_status(ch, HW_MOD_FCERROR); | |
1040 | break; | |
1041 | default: | |
1042 | break; | |
1043 | } | |
1044 | } | |
1045 | ||
1046 | void | |
1047 | mISDNisar_irq(struct isar_hw *isar) | |
1048 | { | |
1049 | struct isar_ch *ch; | |
1050 | ||
1051 | get_irq_infos(isar); | |
1052 | switch (isar->iis & ISAR_IIS_MSCMSD) { | |
1053 | case ISAR_IIS_RDATA: | |
1054 | ch = sel_bch_isar(isar, isar->iis >> 6); | |
1055 | if (ch) | |
1056 | isar_rcv_frame(ch); | |
1057 | else { | |
1058 | pr_debug("%s: ISAR spurious IIS_RDATA %x/%x/%x\n", | |
1059 | isar->name, isar->iis, isar->cmsb, | |
1060 | isar->clsb); | |
1061 | isar->write_reg(isar->hw, ISAR_IIA, 0); | |
1062 | } | |
1063 | break; | |
1064 | case ISAR_IIS_GSTEV: | |
1065 | isar->write_reg(isar->hw, ISAR_IIA, 0); | |
1066 | isar->bstat |= isar->cmsb; | |
1067 | check_send(isar, isar->cmsb); | |
1068 | break; | |
1069 | case ISAR_IIS_BSTEV: | |
1070 | #ifdef ERROR_STATISTIC | |
1071 | ch = sel_bch_isar(isar, isar->iis >> 6); | |
1072 | if (ch) { | |
1073 | if (isar->cmsb == BSTEV_TBO) | |
1074 | ch->bch.err_tx++; | |
1075 | if (isar->cmsb == BSTEV_RBO) | |
1076 | ch->bch.err_rdo++; | |
1077 | } | |
1078 | #endif | |
1079 | pr_debug("%s: Buffer STEV dpath%d msb(%x)\n", | |
1080 | isar->name, isar->iis>>6, isar->cmsb); | |
1081 | isar->write_reg(isar->hw, ISAR_IIA, 0); | |
1082 | break; | |
1083 | case ISAR_IIS_PSTEV: | |
1084 | ch = sel_bch_isar(isar, isar->iis >> 6); | |
1085 | if (ch) { | |
1086 | rcv_mbox(isar, NULL); | |
1087 | if (ch->bch.state == ISDN_P_B_MODEM_ASYNC) | |
1088 | isar_pump_statev_modem(ch, isar->cmsb); | |
1089 | else if (ch->bch.state == ISDN_P_B_T30_FAX) | |
1090 | isar_pump_statev_fax(ch, isar->cmsb); | |
1091 | else if (ch->bch.state == ISDN_P_B_RAW) { | |
1092 | int tt; | |
1093 | tt = isar->cmsb | 0x30; | |
1094 | if (tt == 0x3e) | |
1095 | tt = '*'; | |
1096 | else if (tt == 0x3f) | |
1097 | tt = '#'; | |
1098 | else if (tt > '9') | |
1099 | tt += 7; | |
1100 | tt |= DTMF_TONE_VAL; | |
1101 | _queue_data(&ch->bch.ch, PH_CONTROL_IND, | |
1102 | MISDN_ID_ANY, sizeof(tt), &tt, | |
1103 | GFP_ATOMIC); | |
1104 | } else | |
1105 | pr_debug("%s: ISAR IIS_PSTEV pm %d sta %x\n", | |
1106 | isar->name, ch->bch.state, | |
1107 | isar->cmsb); | |
1108 | } else { | |
1109 | pr_debug("%s: ISAR spurious IIS_PSTEV %x/%x/%x\n", | |
1110 | isar->name, isar->iis, isar->cmsb, | |
1111 | isar->clsb); | |
1112 | isar->write_reg(isar->hw, ISAR_IIA, 0); | |
1113 | } | |
1114 | break; | |
1115 | case ISAR_IIS_PSTRSP: | |
1116 | ch = sel_bch_isar(isar, isar->iis >> 6); | |
1117 | if (ch) { | |
1118 | rcv_mbox(isar, NULL); | |
1119 | isar_pump_status_rsp(ch); | |
1120 | } else { | |
1121 | pr_debug("%s: ISAR spurious IIS_PSTRSP %x/%x/%x\n", | |
1122 | isar->name, isar->iis, isar->cmsb, | |
1123 | isar->clsb); | |
1124 | isar->write_reg(isar->hw, ISAR_IIA, 0); | |
1125 | } | |
1126 | break; | |
1127 | case ISAR_IIS_DIAG: | |
1128 | case ISAR_IIS_BSTRSP: | |
1129 | case ISAR_IIS_IOM2RSP: | |
1130 | rcv_mbox(isar, NULL); | |
1131 | break; | |
1132 | case ISAR_IIS_INVMSG: | |
1133 | rcv_mbox(isar, NULL); | |
1134 | pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb); | |
1135 | break; | |
1136 | default: | |
1137 | rcv_mbox(isar, NULL); | |
1138 | pr_debug("%s: unhandled msg iis(%x) ctrl(%x/%x)\n", | |
1139 | isar->name, isar->iis, isar->cmsb, isar->clsb); | |
1140 | break; | |
1141 | } | |
1142 | } | |
1143 | EXPORT_SYMBOL(mISDNisar_irq); | |
1144 | ||
1145 | static void | |
1146 | ftimer_handler(unsigned long data) | |
1147 | { | |
1148 | struct isar_ch *ch = (struct isar_ch *)data; | |
1149 | ||
1150 | pr_debug("%s: ftimer flags %lx\n", ch->is->name, ch->bch.Flags); | |
1151 | test_and_clear_bit(FLG_FTI_RUN, &ch->bch.Flags); | |
1152 | if (test_and_clear_bit(FLG_LL_CONN, &ch->bch.Flags)) | |
1153 | deliver_status(ch, HW_MOD_CONNECT); | |
1154 | } | |
1155 | ||
1156 | static void | |
1157 | setup_pump(struct isar_ch *ch) { | |
1158 | u8 dps = SET_DPS(ch->dpath); | |
1159 | u8 ctrl, param[6]; | |
1160 | ||
1161 | switch (ch->bch.state) { | |
1162 | case ISDN_P_NONE: | |
1163 | case ISDN_P_B_RAW: | |
1164 | case ISDN_P_B_HDLC: | |
1165 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL); | |
1166 | break; | |
1167 | case ISDN_P_B_L2DTMF: | |
1168 | if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) { | |
1169 | param[0] = 5; /* TOA 5 db */ | |
1170 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, | |
1171 | PMOD_DTMF_TRANS, 1, param); | |
1172 | } else { | |
1173 | param[0] = 40; /* REL -46 dbm */ | |
1174 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, | |
1175 | PMOD_DTMF, 1, param); | |
1176 | } | |
1177 | case ISDN_P_B_MODEM_ASYNC: | |
1178 | ctrl = PMOD_DATAMODEM; | |
1179 | if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) { | |
1180 | ctrl |= PCTRL_ORIG; | |
1181 | param[5] = PV32P6_CTN; | |
1182 | } else { | |
1183 | param[5] = PV32P6_ATN; | |
1184 | } | |
1185 | param[0] = 6; /* 6 db */ | |
1186 | param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B | | |
1187 | PV32P2_V22C | PV32P2_V21 | PV32P2_BEL; | |
1188 | param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B; | |
1189 | param[3] = PV32P4_UT144; | |
1190 | param[4] = PV32P5_UT144; | |
1191 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param); | |
1192 | break; | |
1193 | case ISDN_P_B_T30_FAX: | |
1194 | ctrl = PMOD_FAX; | |
1195 | if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) { | |
1196 | ctrl |= PCTRL_ORIG; | |
1197 | param[1] = PFAXP2_CTN; | |
1198 | } else { | |
1199 | param[1] = PFAXP2_ATN; | |
1200 | } | |
1201 | param[0] = 6; /* 6 db */ | |
1202 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param); | |
1203 | ch->state = STFAX_NULL; | |
1204 | ch->newcmd = 0; | |
1205 | ch->newmod = 0; | |
1206 | test_and_set_bit(FLG_FTI_RUN, &ch->bch.Flags); | |
1207 | break; | |
1208 | } | |
1209 | udelay(1000); | |
1210 | send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); | |
1211 | udelay(1000); | |
1212 | } | |
1213 | ||
1214 | static void | |
1215 | setup_sart(struct isar_ch *ch) { | |
1216 | u8 dps = SET_DPS(ch->dpath); | |
1217 | u8 ctrl, param[2] = {0, 0}; | |
1218 | ||
1219 | switch (ch->bch.state) { | |
1220 | case ISDN_P_NONE: | |
1221 | send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE, | |
1222 | 0, NULL); | |
1223 | break; | |
1224 | case ISDN_P_B_RAW: | |
1225 | case ISDN_P_B_L2DTMF: | |
1226 | send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_BINARY, | |
1227 | 2, param); | |
1228 | break; | |
1229 | case ISDN_P_B_HDLC: | |
1230 | case ISDN_P_B_T30_FAX: | |
1231 | send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_HDLC, | |
1232 | 1, param); | |
1233 | break; | |
1234 | case ISDN_P_B_MODEM_ASYNC: | |
1235 | ctrl = SMODE_V14 | SCTRL_HDMC_BOTH; | |
1236 | param[0] = S_P1_CHS_8; | |
1237 | param[1] = S_P2_BFT_DEF; | |
1238 | send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, ctrl, 2, param); | |
1239 | break; | |
1240 | } | |
1241 | udelay(1000); | |
1242 | send_mbox(ch->is, dps | ISAR_HIS_BSTREQ, 0, 0, NULL); | |
1243 | udelay(1000); | |
1244 | } | |
1245 | ||
1246 | static void | |
1247 | setup_iom2(struct isar_ch *ch) { | |
1248 | u8 dps = SET_DPS(ch->dpath); | |
1249 | u8 cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD, 0, 0, 0, 0}; | |
1250 | ||
1251 | if (ch->bch.nr == 2) { | |
1252 | msg[1] = 1; | |
1253 | msg[3] = 1; | |
1254 | } | |
1255 | switch (ch->bch.state) { | |
1256 | case ISDN_P_NONE: | |
1257 | cmsb = 0; | |
1258 | /* dummy slot */ | |
1259 | msg[1] = ch->dpath + 2; | |
1260 | msg[3] = ch->dpath + 2; | |
1261 | break; | |
1262 | case ISDN_P_B_RAW: | |
1263 | case ISDN_P_B_HDLC: | |
1264 | break; | |
1265 | case ISDN_P_B_MODEM_ASYNC: | |
1266 | case ISDN_P_B_T30_FAX: | |
1267 | cmsb |= IOM_CTRL_RCV; | |
1268 | case ISDN_P_B_L2DTMF: | |
1269 | if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) | |
1270 | cmsb |= IOM_CTRL_RCV; | |
1271 | cmsb |= IOM_CTRL_ALAW; | |
1272 | break; | |
1273 | } | |
1274 | send_mbox(ch->is, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg); | |
1275 | udelay(1000); | |
1276 | send_mbox(ch->is, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL); | |
1277 | udelay(1000); | |
1278 | } | |
1279 | ||
1280 | static int | |
1281 | modeisar(struct isar_ch *ch, u32 bprotocol) | |
1282 | { | |
1283 | /* Here we are selecting the best datapath for requested protocol */ | |
1284 | if (ch->bch.state == ISDN_P_NONE) { /* New Setup */ | |
1285 | switch (bprotocol) { | |
1286 | case ISDN_P_NONE: /* init */ | |
1287 | if (!ch->dpath) | |
1288 | /* no init for dpath 0 */ | |
1289 | return 0; | |
1290 | test_and_clear_bit(FLG_HDLC, &ch->bch.Flags); | |
1291 | test_and_clear_bit(FLG_TRANSPARENT, &ch->bch.Flags); | |
1292 | break; | |
1293 | case ISDN_P_B_RAW: | |
1294 | case ISDN_P_B_HDLC: | |
1295 | /* best is datapath 2 */ | |
1296 | if (!test_and_set_bit(ISAR_DP2_USE, &ch->is->Flags)) | |
1297 | ch->dpath = 2; | |
1298 | else if (!test_and_set_bit(ISAR_DP1_USE, | |
1299 | &ch->is->Flags)) | |
1300 | ch->dpath = 1; | |
1301 | else { | |
1302 | pr_info("modeisar both pathes in use\n"); | |
1303 | return -EBUSY; | |
1304 | } | |
1305 | if (bprotocol == ISDN_P_B_HDLC) | |
1306 | test_and_set_bit(FLG_HDLC, &ch->bch.Flags); | |
1307 | else | |
1308 | test_and_set_bit(FLG_TRANSPARENT, | |
1309 | &ch->bch.Flags); | |
1310 | break; | |
1311 | case ISDN_P_B_MODEM_ASYNC: | |
1312 | case ISDN_P_B_T30_FAX: | |
1313 | case ISDN_P_B_L2DTMF: | |
1314 | /* only datapath 1 */ | |
1315 | if (!test_and_set_bit(ISAR_DP1_USE, &ch->is->Flags)) | |
1316 | ch->dpath = 1; | |
1317 | else { | |
1318 | pr_info("%s: ISAR modeisar analog functions" | |
1319 | "only with DP1\n", ch->is->name); | |
1320 | return -EBUSY; | |
1321 | } | |
1322 | break; | |
1323 | default: | |
1324 | pr_info("%s: protocol not known %x\n", ch->is->name, | |
1325 | bprotocol); | |
1326 | return -ENOPROTOOPT; | |
1327 | } | |
1328 | } | |
1329 | pr_debug("%s: ISAR ch%d dp%d protocol %x->%x\n", ch->is->name, | |
1330 | ch->bch.nr, ch->dpath, ch->bch.state, bprotocol); | |
1331 | ch->bch.state = bprotocol; | |
1332 | setup_pump(ch); | |
1333 | setup_iom2(ch); | |
1334 | setup_sart(ch); | |
1335 | if (ch->bch.state == ISDN_P_NONE) { | |
1336 | /* Clear resources */ | |
1337 | if (ch->dpath == 1) | |
1338 | test_and_clear_bit(ISAR_DP1_USE, &ch->is->Flags); | |
1339 | else if (ch->dpath == 2) | |
1340 | test_and_clear_bit(ISAR_DP2_USE, &ch->is->Flags); | |
1341 | ch->dpath = 0; | |
1342 | ch->is->ctrl(ch->is->hw, HW_DEACT_IND, ch->bch.nr); | |
1343 | } else | |
1344 | ch->is->ctrl(ch->is->hw, HW_ACTIVATE_IND, ch->bch.nr); | |
1345 | return 0; | |
1346 | } | |
1347 | ||
1348 | static void | |
1349 | isar_pump_cmd(struct isar_ch *ch, u32 cmd, u8 para) | |
1350 | { | |
1351 | u8 dps = SET_DPS(ch->dpath); | |
1352 | u8 ctrl = 0, nom = 0, p1 = 0; | |
1353 | ||
1354 | pr_debug("%s: isar_pump_cmd %x/%x state(%x)\n", | |
1355 | ch->is->name, cmd, para, ch->bch.state); | |
1356 | switch (cmd) { | |
1357 | case HW_MOD_FTM: | |
1358 | if (ch->state == STFAX_READY) { | |
1359 | p1 = para; | |
1360 | ctrl = PCTRL_CMD_FTM; | |
1361 | nom = 1; | |
1362 | ch->state = STFAX_LINE; | |
1363 | ch->cmd = ctrl; | |
1364 | ch->mod = para; | |
1365 | ch->newmod = 0; | |
1366 | ch->newcmd = 0; | |
1367 | ch->try_mod = 3; | |
1368 | } else if ((ch->state == STFAX_ACTIV) && | |
1369 | (ch->cmd == PCTRL_CMD_FTM) && (ch->mod == para)) | |
1370 | deliver_status(ch, HW_MOD_CONNECT); | |
1371 | else { | |
1372 | ch->newmod = para; | |
1373 | ch->newcmd = PCTRL_CMD_FTM; | |
1374 | nom = 0; | |
1375 | ctrl = PCTRL_CMD_ESC; | |
1376 | ch->state = STFAX_ESCAPE; | |
1377 | } | |
1378 | break; | |
1379 | case HW_MOD_FTH: | |
1380 | if (ch->state == STFAX_READY) { | |
1381 | p1 = para; | |
1382 | ctrl = PCTRL_CMD_FTH; | |
1383 | nom = 1; | |
1384 | ch->state = STFAX_LINE; | |
1385 | ch->cmd = ctrl; | |
1386 | ch->mod = para; | |
1387 | ch->newmod = 0; | |
1388 | ch->newcmd = 0; | |
1389 | ch->try_mod = 3; | |
1390 | } else if ((ch->state == STFAX_ACTIV) && | |
1391 | (ch->cmd == PCTRL_CMD_FTH) && (ch->mod == para)) | |
1392 | deliver_status(ch, HW_MOD_CONNECT); | |
1393 | else { | |
1394 | ch->newmod = para; | |
1395 | ch->newcmd = PCTRL_CMD_FTH; | |
1396 | nom = 0; | |
1397 | ctrl = PCTRL_CMD_ESC; | |
1398 | ch->state = STFAX_ESCAPE; | |
1399 | } | |
1400 | break; | |
1401 | case HW_MOD_FRM: | |
1402 | if (ch->state == STFAX_READY) { | |
1403 | p1 = para; | |
1404 | ctrl = PCTRL_CMD_FRM; | |
1405 | nom = 1; | |
1406 | ch->state = STFAX_LINE; | |
1407 | ch->cmd = ctrl; | |
1408 | ch->mod = para; | |
1409 | ch->newmod = 0; | |
1410 | ch->newcmd = 0; | |
1411 | ch->try_mod = 3; | |
1412 | } else if ((ch->state == STFAX_ACTIV) && | |
1413 | (ch->cmd == PCTRL_CMD_FRM) && (ch->mod == para)) | |
1414 | deliver_status(ch, HW_MOD_CONNECT); | |
1415 | else { | |
1416 | ch->newmod = para; | |
1417 | ch->newcmd = PCTRL_CMD_FRM; | |
1418 | nom = 0; | |
1419 | ctrl = PCTRL_CMD_ESC; | |
1420 | ch->state = STFAX_ESCAPE; | |
1421 | } | |
1422 | break; | |
1423 | case HW_MOD_FRH: | |
1424 | if (ch->state == STFAX_READY) { | |
1425 | p1 = para; | |
1426 | ctrl = PCTRL_CMD_FRH; | |
1427 | nom = 1; | |
1428 | ch->state = STFAX_LINE; | |
1429 | ch->cmd = ctrl; | |
1430 | ch->mod = para; | |
1431 | ch->newmod = 0; | |
1432 | ch->newcmd = 0; | |
1433 | ch->try_mod = 3; | |
1434 | } else if ((ch->state == STFAX_ACTIV) && | |
1435 | (ch->cmd == PCTRL_CMD_FRH) && (ch->mod == para)) | |
1436 | deliver_status(ch, HW_MOD_CONNECT); | |
1437 | else { | |
1438 | ch->newmod = para; | |
1439 | ch->newcmd = PCTRL_CMD_FRH; | |
1440 | nom = 0; | |
1441 | ctrl = PCTRL_CMD_ESC; | |
1442 | ch->state = STFAX_ESCAPE; | |
1443 | } | |
1444 | break; | |
1445 | case PCTRL_CMD_TDTMF: | |
1446 | p1 = para; | |
1447 | nom = 1; | |
1448 | ctrl = PCTRL_CMD_TDTMF; | |
1449 | break; | |
1450 | } | |
1451 | if (ctrl) | |
1452 | send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1); | |
1453 | } | |
1454 | ||
1455 | static void | |
1456 | isar_setup(struct isar_hw *isar) | |
1457 | { | |
1458 | u8 msg; | |
1459 | int i; | |
1460 | ||
1461 | /* Dpath 1, 2 */ | |
1462 | msg = 61; | |
1463 | for (i = 0; i < 2; i++) { | |
1464 | /* Buffer Config */ | |
1465 | send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) | | |
1466 | ISAR_HIS_P12CFG, 4, 1, &msg); | |
1467 | isar->ch[i].mml = msg; | |
1468 | isar->ch[i].bch.state = 0; | |
1469 | isar->ch[i].dpath = i + 1; | |
1470 | modeisar(&isar->ch[i], ISDN_P_NONE); | |
1471 | } | |
1472 | } | |
1473 | ||
1474 | static int | |
1475 | isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb) | |
1476 | { | |
1477 | struct bchannel *bch = container_of(ch, struct bchannel, ch); | |
1478 | struct isar_ch *ich = container_of(bch, struct isar_ch, bch); | |
1479 | int ret = -EINVAL; | |
1480 | struct mISDNhead *hh = mISDN_HEAD_P(skb); | |
1481 | u32 id, *val; | |
1482 | u_long flags; | |
1483 | ||
1484 | switch (hh->prim) { | |
1485 | case PH_DATA_REQ: | |
1486 | spin_lock_irqsave(ich->is->hwlock, flags); | |
1487 | ret = bchannel_senddata(bch, skb); | |
1488 | if (ret > 0) { /* direct TX */ | |
1489 | id = hh->id; /* skb can be freed */ | |
1490 | ret = 0; | |
1491 | isar_fill_fifo(ich); | |
1492 | spin_unlock_irqrestore(ich->is->hwlock, flags); | |
1493 | if (!test_bit(FLG_TRANSPARENT, &bch->Flags)) | |
1494 | queue_ch_frame(ch, PH_DATA_CNF, id, NULL); | |
1495 | } else | |
1496 | spin_unlock_irqrestore(ich->is->hwlock, flags); | |
1497 | return ret; | |
1498 | case PH_ACTIVATE_REQ: | |
1499 | spin_lock_irqsave(ich->is->hwlock, flags); | |
1500 | if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) | |
1501 | ret = modeisar(ich, ch->protocol); | |
1502 | else | |
1503 | ret = 0; | |
1504 | spin_unlock_irqrestore(ich->is->hwlock, flags); | |
1505 | if (!ret) | |
1506 | _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0, | |
1507 | NULL, GFP_KERNEL); | |
1508 | break; | |
1509 | case PH_DEACTIVATE_REQ: | |
1510 | spin_lock_irqsave(ich->is->hwlock, flags); | |
1511 | mISDN_clear_bchannel(bch); | |
1512 | modeisar(ich, ISDN_P_NONE); | |
1513 | spin_unlock_irqrestore(ich->is->hwlock, flags); | |
1514 | _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0, | |
1515 | NULL, GFP_KERNEL); | |
1516 | ret = 0; | |
1517 | break; | |
1518 | case PH_CONTROL_REQ: | |
1519 | val = (u32 *)skb->data; | |
1520 | pr_debug("%s: PH_CONTROL | REQUEST %x/%x\n", ich->is->name, | |
1521 | hh->id, *val); | |
1522 | if ((hh->id == 0) && ((*val & ~DTMF_TONE_MASK) == | |
1523 | DTMF_TONE_VAL)) { | |
1524 | if (bch->state == ISDN_P_B_L2DTMF) { | |
1525 | char tt = *val & DTMF_TONE_MASK; | |
1526 | ||
1527 | if (tt == '*') | |
1528 | tt = 0x1e; | |
1529 | else if (tt == '#') | |
1530 | tt = 0x1f; | |
1531 | else if (tt > '9') | |
1532 | tt -= 7; | |
1533 | tt &= 0x1f; | |
1534 | spin_lock_irqsave(ich->is->hwlock, flags); | |
1535 | isar_pump_cmd(ich, PCTRL_CMD_TDTMF, tt); | |
1536 | spin_unlock_irqrestore(ich->is->hwlock, flags); | |
1537 | } else { | |
1538 | pr_info("%s: DTMF send wrong protocol %x\n", | |
1539 | __func__, bch->state); | |
1540 | return -EINVAL; | |
1541 | } | |
1542 | } else if ((hh->id == HW_MOD_FRM) || (hh->id == HW_MOD_FRH) || | |
1543 | (hh->id == HW_MOD_FTM) || (hh->id == HW_MOD_FTH)) { | |
1544 | for (id = 0; id < FAXMODCNT; id++) | |
1545 | if (faxmodulation[id] == *val) | |
1546 | break; | |
1547 | if ((FAXMODCNT > id) && | |
1548 | test_bit(FLG_INITIALIZED, &bch->Flags)) { | |
1549 | pr_debug("%s: isar: new mod\n", ich->is->name); | |
1550 | isar_pump_cmd(ich, hh->id, *val); | |
1551 | ret = 0; | |
1552 | } else { | |
1553 | pr_info("%s: wrong modulation\n", | |
1554 | ich->is->name); | |
1555 | ret = -EINVAL; | |
1556 | } | |
1557 | } else if (hh->id == HW_MOD_LASTDATA) | |
1558 | test_and_set_bit(FLG_DLEETX, &bch->Flags); | |
1559 | else { | |
1560 | pr_info("%s: unknown PH_CONTROL_REQ %x\n", | |
1561 | ich->is->name, hh->id); | |
1562 | ret = -EINVAL; | |
1563 | } | |
1564 | default: | |
1565 | pr_info("%s: %s unknown prim(%x,%x)\n", | |
1566 | ich->is->name, __func__, hh->prim, hh->id); | |
1567 | ret = -EINVAL; | |
1568 | } | |
1569 | if (!ret) | |
1570 | dev_kfree_skb(skb); | |
1571 | return ret; | |
1572 | } | |
1573 | ||
1574 | static int | |
1575 | channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq) | |
1576 | { | |
1577 | int ret = 0; | |
1578 | ||
1579 | switch (cq->op) { | |
1580 | case MISDN_CTRL_GETOP: | |
1581 | cq->op = 0; | |
1582 | break; | |
1583 | /* Nothing implemented yet */ | |
1584 | case MISDN_CTRL_FILL_EMPTY: | |
1585 | default: | |
1586 | pr_info("%s: unknown Op %x\n", __func__, cq->op); | |
1587 | ret = -EINVAL; | |
1588 | break; | |
1589 | } | |
1590 | return ret; | |
1591 | } | |
1592 | ||
1593 | static int | |
1594 | isar_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg) | |
1595 | { | |
1596 | struct bchannel *bch = container_of(ch, struct bchannel, ch); | |
1597 | struct isar_ch *ich = container_of(bch, struct isar_ch, bch); | |
1598 | int ret = -EINVAL; | |
1599 | u_long flags; | |
1600 | ||
1601 | pr_debug("%s: %s cmd:%x %p\n", ich->is->name, __func__, cmd, arg); | |
1602 | switch (cmd) { | |
1603 | case CLOSE_CHANNEL: | |
1604 | test_and_clear_bit(FLG_OPEN, &bch->Flags); | |
1605 | if (test_bit(FLG_ACTIVE, &bch->Flags)) { | |
1606 | spin_lock_irqsave(ich->is->hwlock, flags); | |
1607 | mISDN_freebchannel(bch); | |
1608 | modeisar(ich, ISDN_P_NONE); | |
1609 | spin_unlock_irqrestore(ich->is->hwlock, flags); | |
1610 | } else { | |
1611 | skb_queue_purge(&bch->rqueue); | |
1612 | bch->rcount = 0; | |
1613 | } | |
1614 | ch->protocol = ISDN_P_NONE; | |
1615 | ch->peer = NULL; | |
1616 | module_put(ich->is->owner); | |
1617 | ret = 0; | |
1618 | break; | |
1619 | case CONTROL_CHANNEL: | |
1620 | ret = channel_bctrl(bch, arg); | |
1621 | break; | |
1622 | default: | |
1623 | pr_info("%s: %s unknown prim(%x)\n", | |
1624 | ich->is->name, __func__, cmd); | |
1625 | } | |
1626 | return ret; | |
1627 | } | |
1628 | ||
1629 | static void | |
1630 | free_isar(struct isar_hw *isar) | |
1631 | { | |
1632 | modeisar(&isar->ch[0], ISDN_P_NONE); | |
1633 | modeisar(&isar->ch[1], ISDN_P_NONE); | |
1634 | del_timer(&isar->ch[0].ftimer); | |
1635 | del_timer(&isar->ch[1].ftimer); | |
1636 | test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags); | |
1637 | test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags); | |
1638 | } | |
1639 | ||
1640 | static int | |
1641 | init_isar(struct isar_hw *isar) | |
1642 | { | |
1643 | int cnt = 3; | |
1644 | ||
1645 | while (cnt--) { | |
1646 | isar->version = ISARVersion(isar); | |
1647 | if (isar->ch[0].bch.debug & DEBUG_HW) | |
1648 | pr_notice("%s: Testing version %d (%d time)\n", | |
1649 | isar->name, isar->version, 3 - cnt); | |
1650 | if (isar->version == 1) | |
1651 | break; | |
1652 | isar->ctrl(isar->hw, HW_RESET_REQ, 0); | |
1653 | } | |
1654 | if (isar->version != 1) | |
1655 | return -EINVAL; | |
1656 | isar->ch[0].ftimer.function = &ftimer_handler; | |
1657 | isar->ch[0].ftimer.data = (long)&isar->ch[0]; | |
1658 | init_timer(&isar->ch[0].ftimer); | |
1659 | test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags); | |
1660 | isar->ch[1].ftimer.function = &ftimer_handler; | |
1661 | isar->ch[1].ftimer.data = (long)&isar->ch[1]; | |
1662 | init_timer(&isar->ch[1].ftimer); | |
1663 | test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags); | |
1664 | return 0; | |
1665 | } | |
1666 | ||
1667 | static int | |
1668 | isar_open(struct isar_hw *isar, struct channel_req *rq) | |
1669 | { | |
1670 | struct bchannel *bch; | |
1671 | ||
1672 | if (rq->adr.channel > 2) | |
1673 | return -EINVAL; | |
1674 | if (rq->protocol == ISDN_P_NONE) | |
1675 | return -EINVAL; | |
1676 | bch = &isar->ch[rq->adr.channel - 1].bch; | |
1677 | if (test_and_set_bit(FLG_OPEN, &bch->Flags)) | |
1678 | return -EBUSY; /* b-channel can be only open once */ | |
1679 | test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags); | |
1680 | bch->ch.protocol = rq->protocol; | |
1681 | rq->ch = &bch->ch; | |
1682 | return 0; | |
1683 | } | |
1684 | ||
1685 | u32 | |
1686 | mISDNisar_init(struct isar_hw *isar, void *hw) | |
1687 | { | |
1688 | u32 ret, i; | |
1689 | ||
1690 | isar->hw = hw; | |
1691 | for (i = 0; i < 2; i++) { | |
1692 | isar->ch[i].bch.nr = i + 1; | |
1693 | mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM); | |
1694 | isar->ch[i].bch.ch.nr = i + 1; | |
1695 | isar->ch[i].bch.ch.send = &isar_l2l1; | |
1696 | isar->ch[i].bch.ch.ctrl = isar_bctrl; | |
1697 | isar->ch[i].bch.hw = hw; | |
1698 | isar->ch[i].is = isar; | |
1699 | } | |
1700 | ||
1701 | isar->init = &init_isar; | |
1702 | isar->release = &free_isar; | |
1703 | isar->firmware = &load_firmware; | |
1704 | isar->open = &isar_open; | |
1705 | ||
1706 | ret = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | | |
1707 | (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)) | | |
1708 | (1 << (ISDN_P_B_L2DTMF & ISDN_P_B_MASK)) | | |
1709 | (1 << (ISDN_P_B_MODEM_ASYNC & ISDN_P_B_MASK)) | | |
1710 | (1 << (ISDN_P_B_T30_FAX & ISDN_P_B_MASK)); | |
1711 | ||
1712 | return ret; | |
1713 | } | |
1714 | EXPORT_SYMBOL(mISDNisar_init); | |
1715 | ||
88850740 | 1716 | static int __init isar_mod_init(void) |
da2272c9 KK |
1717 | { |
1718 | pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV); | |
1719 | return 0; | |
1720 | } | |
1721 | ||
88850740 | 1722 | static void __exit isar_mod_cleanup(void) |
da2272c9 KK |
1723 | { |
1724 | pr_notice("mISDN: ISAR module unloaded\n"); | |
1725 | } | |
1726 | module_init(isar_mod_init); | |
1727 | module_exit(isar_mod_cleanup); |