[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ide / ide-pci-generic.c

/*
 *  Copyright (C) 2001-2002	Andre Hedrick <andre@linux-ide.org>
 *  Portions (C) Copyright 2002  Red Hat Inc
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2, or (at your option) any
 * later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * For the avoidance of doubt the "preferred form" of this code is one which
 * is in an open non patent encumbered format. Where cryptographic key signing
 * forms part of the process of creating an executable the information
 * including keys needed to generate an equivalently functional executable
 * are deemed to be part of the source code.
 */

#include <linux/types.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/ide.h>
#include <linux/init.h>

#define DRV_NAME "ide_pci_generic"

static bool ide_generic_all;		/* Set to claim all devices */

module_param_named(all_generic_ide, ide_generic_all, bool, 0444);
MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers.");

static void netcell_quirkproc(ide_drive_t *drive)
{
	/* mark words 85-87 as valid */
	drive->id[ATA_ID_CSF_DEFAULT] |= 0x4000;
}

static const struct ide_port_ops netcell_port_ops = {
	.quirkproc		= netcell_quirkproc,
};

#define DECLARE_GENERIC_PCI_DEV(extra_flags) \
	{ \
		.name		= DRV_NAME, \
		.host_flags	= IDE_HFLAG_TRUST_BIOS_FOR_DMA | \
				  extra_flags, \
		.swdma_mask	= ATA_SWDMA2, \
		.mwdma_mask	= ATA_MWDMA2, \
		.udma_mask	= ATA_UDMA6, \
	}

static const struct ide_port_info generic_chipsets[] = {
	/*  0: Unknown */
	DECLARE_GENERIC_PCI_DEV(0),

	{	/* 1: NS87410 */
		.name		= DRV_NAME,
		.enablebits	= { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} },
		.host_flags	= IDE_HFLAG_TRUST_BIOS_FOR_DMA,
		.swdma_mask	= ATA_SWDMA2,
		.mwdma_mask	= ATA_MWDMA2,
		.udma_mask	= ATA_UDMA6,
	},

	/*  2: SAMURAI / HT6565 / HINT_IDE */
	DECLARE_GENERIC_PCI_DEV(0),
	/*  3: UM8673F / UM8886A / UM8886BF */
	DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_DMA),
	/*  4: VIA_IDE / OPTI621V / Piccolo010{2,3,5} */
	DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_AUTODMA),

	{	/* 5: VIA8237SATA */
		.name		= DRV_NAME,
		.host_flags	= IDE_HFLAG_TRUST_BIOS_FOR_DMA |
				  IDE_HFLAG_OFF_BOARD,
		.swdma_mask	= ATA_SWDMA2,
		.mwdma_mask	= ATA_MWDMA2,
		.udma_mask	= ATA_UDMA6,
	},

	{	/* 6: Revolution */
		.name		= DRV_NAME,
		.port_ops	= &netcell_port_ops,
		.host_flags	= IDE_HFLAG_CLEAR_SIMPLEX |
				  IDE_HFLAG_TRUST_BIOS_FOR_DMA |
				  IDE_HFLAG_OFF_BOARD,
		.swdma_mask	= ATA_SWDMA2,
		.mwdma_mask	= ATA_MWDMA2,
		.udma_mask	= ATA_UDMA6,
	}
};

/**
 *	generic_init_one	-	called when a PIIX is found
 *	@dev: the generic device
 *	@id: the matching pci id
 *
 *	Called when the PCI registration layer (or the IDE initialization)
 *	finds a device matching our IDE device tables.
 */

static int generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	const struct ide_port_info *d = &generic_chipsets[id->driver_data];
	int ret = -ENODEV;

	/* Don't use the generic entry unless instructed to do so */
	if (id->driver_data == 0 && ide_generic_all == 0)
			goto out;

	switch (dev->vendor) {
	case PCI_VENDOR_ID_UMC:
		if (dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
				!(PCI_FUNC(dev->devfn) & 1))
			goto out; /* UM8886A/BF pair */
		break;
	case PCI_VENDOR_ID_OPTI:
		if (dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
				!(PCI_FUNC(dev->devfn) & 1))
			goto out;
		break;
	case PCI_VENDOR_ID_JMICRON:
		if (dev->device != PCI_DEVICE_ID_JMICRON_JMB368 &&
				PCI_FUNC(dev->devfn) != 1)
			goto out;
		break;
	case PCI_VENDOR_ID_NS:
		if (dev->device == PCI_DEVICE_ID_NS_87410 &&
				(dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
			goto out;
		break;
	}

	if (dev->vendor != PCI_VENDOR_ID_JMICRON) {
		u16 command;
		pci_read_config_word(dev, PCI_COMMAND, &command);
		if (!(command & PCI_COMMAND_IO)) {
			printk(KERN_INFO "%s %s: skipping disabled "
				"controller\n", d->name, pci_name(dev));
			goto out;
		}
	}
	ret = ide_pci_init_one(dev, d, NULL);
out:
	return ret;
}

static const struct pci_device_id generic_pci_tbl[] = {
	{ PCI_VDEVICE(NS,	PCI_DEVICE_ID_NS_87410),		 1 },
	{ PCI_VDEVICE(PCTECH,	PCI_DEVICE_ID_PCTECH_SAMURAI_IDE),	 2 },
	{ PCI_VDEVICE(HOLTEK,	PCI_DEVICE_ID_HOLTEK_6565),		 2 },
	{ PCI_VDEVICE(UMC,	PCI_DEVICE_ID_UMC_UM8673F),		 3 },
	{ PCI_VDEVICE(UMC,	PCI_DEVICE_ID_UMC_UM8886A),		 3 },
	{ PCI_VDEVICE(UMC,	PCI_DEVICE_ID_UMC_UM8886BF),		 3 },
	{ PCI_VDEVICE(HINT,	PCI_DEVICE_ID_HINT_VXPROII_IDE),	 2 },
	{ PCI_VDEVICE(VIA,	PCI_DEVICE_ID_VIA_82C561),		 4 },
	{ PCI_VDEVICE(OPTI,	PCI_DEVICE_ID_OPTI_82C558),		 4 },
#ifdef CONFIG_BLK_DEV_IDE_SATA
	{ PCI_VDEVICE(VIA,	PCI_DEVICE_ID_VIA_8237_SATA),		 5 },
#endif
	{ PCI_VDEVICE(TOSHIBA,	PCI_DEVICE_ID_TOSHIBA_PICCOLO_1),	 4 },
	{ PCI_VDEVICE(TOSHIBA,	PCI_DEVICE_ID_TOSHIBA_PICCOLO_2),	 4 },
	{ PCI_VDEVICE(TOSHIBA,	PCI_DEVICE_ID_TOSHIBA_PICCOLO_3),	 4 },
	{ PCI_VDEVICE(TOSHIBA,	PCI_DEVICE_ID_TOSHIBA_PICCOLO_5),	 4 },
	{ PCI_VDEVICE(NETCELL,	PCI_DEVICE_ID_REVOLUTION),		 6 },
	/*
	 * Must come last.  If you add entries adjust
	 * this table and generic_chipsets[] appropriately.
	 */
	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 0 },
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, generic_pci_tbl);

static struct pci_driver generic_pci_driver = {
	.name		= "PCI_IDE",
	.id_table	= generic_pci_tbl,
	.probe		= generic_init_one,
	.remove		= ide_pci_remove,
	.suspend	= ide_pci_suspend,
	.resume		= ide_pci_resume,
};

static int __init generic_ide_init(void)
{
	return ide_pci_register_driver(&generic_pci_driver);
}

static void __exit generic_ide_exit(void)
{
	pci_unregister_driver(&generic_pci_driver);
}

module_init(generic_ide_init);
module_exit(generic_ide_exit);

MODULE_AUTHOR("Andre Hedrick");
MODULE_DESCRIPTION("PCI driver module for generic PCI IDE");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4	2	* Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
ccd32e22	3	* Portions (C) Copyright 2002 Red Hat Inc
1da177e4 LT	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License as published by the
	7	* Free Software Foundation; either version 2, or (at your option) any
	8	* later version.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	* General Public License for more details.
	14	*
	15	* For the avoidance of doubt the "preferred form" of this code is one which
	16	* is in an open non patent encumbered format. Where cryptographic key signing
	17	* forms part of the process of creating an executable the information
	18	* including keys needed to generate an equivalently functional executable
	19	* are deemed to be part of the source code.
	20	*/
	21
1da177e4 LT	22	#include <linux/types.h>
	23	#include <linux/module.h>
	24	#include <linux/kernel.h>
1da177e4 LT	25	#include <linux/pci.h>
	26	#include <linux/ide.h>
	27	#include <linux/init.h>
	28
ced3ec8a BZ	29	#define DRV_NAME "ide_pci_generic"
ced3ec8a BZ	30
90ab5ee9	31	static bool ide_generic_all; /* Set to claim all devices */
b189346c	32
a4bea10e PJ	33	module_param_named(all_generic_ide, ide_generic_all, bool, 0444);
a4bea10e PJ	34	MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers.");
b189346c	35
c339dfdd BZ	36	static void netcell_quirkproc(ide_drive_t *drive)
	37	{
	38	/* mark words 85-87 as valid */
	39	drive->id[ATA_ID_CSF_DEFAULT] \|= 0x4000;
	40	}
	41
	42	static const struct ide_port_ops netcell_port_ops = {
	43	.quirkproc = netcell_quirkproc,
	44	};
	45
ced3ec8a	46	#define DECLARE_GENERIC_PCI_DEV(extra_flags) \
1c3dd326	47	{ \
ced3ec8a	48	.name = DRV_NAME, \
7cab14a7	49	.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA \| \
5e71d9c5	50	extra_flags, \
5f8b6c34 BZ	51	.swdma_mask = ATA_SWDMA2, \
	52	.mwdma_mask = ATA_MWDMA2, \
	53	.udma_mask = ATA_UDMA6, \
1da177e4	54	}
1da177e4	55
fe31edc8	56	static const struct ide_port_info generic_chipsets[] = {
ced3ec8a BZ	57	/* 0: Unknown */
ced3ec8a BZ	58	DECLARE_GENERIC_PCI_DEV(0),
1c3dd326	59
ced3ec8a BZ	60	{ /* 1: NS87410 */
ced3ec8a BZ	61	.name = DRV_NAME,
17deabdc	62	.enablebits = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} },
5e71d9c5	63	.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
5f8b6c34 BZ	64	.swdma_mask = ATA_SWDMA2,
	65	.mwdma_mask = ATA_MWDMA2,
	66	.udma_mask = ATA_UDMA6,
1c3dd326 BZ	67	},
1c3dd326 BZ	68
ced3ec8a BZ	69	/* 2: SAMURAI / HT6565 / HINT_IDE */
	70	DECLARE_GENERIC_PCI_DEV(0),
	71	/* 3: UM8673F / UM8886A / UM8886BF */
2467922a	72	DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_DMA),
ced3ec8a BZ	73	/* 4: VIA_IDE / OPTI621V / Piccolo010{2,3,5} */
	74	DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_AUTODMA),
	75
	76	{ /* 5: VIA8237SATA */
	77	.name = DRV_NAME,
7cab14a7 BZ	78	.host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA \|
7cab14a7 BZ	79	IDE_HFLAG_OFF_BOARD,
5f8b6c34 BZ	80	.swdma_mask = ATA_SWDMA2,
	81	.mwdma_mask = ATA_MWDMA2,
	82	.udma_mask = ATA_UDMA6,
1c3dd326 BZ	83	},
1c3dd326 BZ	84
ced3ec8a BZ	85	{ /* 6: Revolution */
ced3ec8a BZ	86	.name = DRV_NAME,
c339dfdd	87	.port_ops = &netcell_port_ops,
8ac2b42a BZ	88	.host_flags = IDE_HFLAG_CLEAR_SIMPLEX \|
8ac2b42a BZ	89	IDE_HFLAG_TRUST_BIOS_FOR_DMA \|
7cab14a7	90	IDE_HFLAG_OFF_BOARD,
5f8b6c34 BZ	91	.swdma_mask = ATA_SWDMA2,
	92	.mwdma_mask = ATA_MWDMA2,
	93	.udma_mask = ATA_UDMA6,
1da177e4 LT	94	}
	95	};
	96
	97	/**
	98	* generic_init_one - called when a PIIX is found
	99	* @dev: the generic device
	100	* @id: the matching pci id
	101	*
	102	* Called when the PCI registration layer (or the IDE initialization)
	103	* finds a device matching our IDE device tables.
	104	*/
17deabdc	105
fe31edc8	106	static int generic_init_one(struct pci_dev dev, const struct pci_device_id id)
1da177e4	107	{
85620436	108	const struct ide_port_info *d = &generic_chipsets[id->driver_data];
1da177e4 LT	109	int ret = -ENODEV;
1da177e4 LT	110
b189346c AC	111	/* Don't use the generic entry unless instructed to do so */
	112	if (id->driver_data == 0 && ide_generic_all == 0)
	113	goto out;
	114
ea307596 JS	115	switch (dev->vendor) {
	116	case PCI_VENDOR_ID_UMC:
	117	if (dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
	118	!(PCI_FUNC(dev->devfn) & 1))
	119	goto out; /* UM8886A/BF pair */
	120	break;
	121	case PCI_VENDOR_ID_OPTI:
	122	if (dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
	123	!(PCI_FUNC(dev->devfn) & 1))
	124	goto out;
	125	break;
	126	case PCI_VENDOR_ID_JMICRON:
	127	if (dev->device != PCI_DEVICE_ID_JMICRON_JMB368 &&
	128	PCI_FUNC(dev->devfn) != 1)
	129	goto out;
	130	break;
	131	case PCI_VENDOR_ID_NS:
	132	if (dev->device == PCI_DEVICE_ID_NS_87410 &&
	133	(dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
c333526f	134	goto out;
ea307596	135	break;
c333526f	136	}
15e0c694	137
3719bc5c	138	if (dev->vendor != PCI_VENDOR_ID_JMICRON) {
ea307596	139	u16 command;
3719bc5c AC	140	pci_read_config_word(dev, PCI_COMMAND, &command);
3719bc5c AC	141	if (!(command & PCI_COMMAND_IO)) {
28cfd8af BZ	142	printk(KERN_INFO "%s %s: skipping disabled "
28cfd8af BZ	143	"controller\n", d->name, pci_name(dev));
3719bc5c AC	144	goto out;
3719bc5c AC	145	}
1da177e4	146	}
6cdf6eb3	147	ret = ide_pci_init_one(dev, d, NULL);
1da177e4 LT	148	out:
	149	return ret;
	150	}
	151
9cbcc5e3 BZ	152	static const struct pci_device_id generic_pci_tbl[] = {
	153	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), 1 },
	154	{ PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), 2 },
ced3ec8a BZ	155	{ PCI_VDEVICE(HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), 2 },
	156	{ PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8673F), 3 },
	157	{ PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886A), 3 },
	158	{ PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886BF), 3 },
	159	{ PCI_VDEVICE(HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), 2 },
	160	{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C561), 4 },
	161	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C558), 4 },
1da177e4	162	#ifdef CONFIG_BLK_DEV_IDE_SATA
ced3ec8a	163	{ PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8237_SATA), 5 },
1da177e4	164	#endif
ced3ec8a BZ	165	{ PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), 4 },
ced3ec8a BZ	166	{ PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), 4 },
8e182a90 AC	167	{ PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), 4 },
8e182a90 AC	168	{ PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), 4 },
ced3ec8a	169	{ PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), 6 },
9cbcc5e3 BZ	170	/*
	171	* Must come last. If you add entries adjust
	172	* this table and generic_chipsets[] appropriately.
	173	*/
	174	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 0 },
1da177e4 LT	175	{ 0, },
	176	};
	177	MODULE_DEVICE_TABLE(pci, generic_pci_tbl);
	178
a9ab09e2	179	static struct pci_driver generic_pci_driver = {
1da177e4 LT	180	.name = "PCI_IDE",
	181	.id_table = generic_pci_tbl,
	182	.probe = generic_init_one,
f566bcae	183	.remove = ide_pci_remove,
feb22b7f BZ	184	.suspend = ide_pci_suspend,
feb22b7f BZ	185	.resume = ide_pci_resume,
1da177e4 LT	186	};
1da177e4 LT	187
82ab1eec	188	static int __init generic_ide_init(void)
1da177e4	189	{
a9ab09e2	190	return ide_pci_register_driver(&generic_pci_driver);
1da177e4 LT	191	}
1da177e4 LT	192
f566bcae BZ	193	static void __exit generic_ide_exit(void)
f566bcae BZ	194	{
a9ab09e2	195	pci_unregister_driver(&generic_pci_driver);
f566bcae BZ	196	}
f566bcae BZ	197
1da177e4	198	module_init(generic_ide_init);
f566bcae	199	module_exit(generic_ide_exit);
1da177e4 LT	200
	201	MODULE_AUTHOR("Andre Hedrick");
	202	MODULE_DESCRIPTION("PCI driver module for generic PCI IDE");
	203	MODULE_LICENSE("GPL");