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Merge tag 'v3.10.69' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / w83791d.c
CommitLineData
9873964d 1/*
ec1c3194
GR		 2 * w83791d.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 *
5 * Copyright (C) 2006-2007 Charles Spirakis <bezaur@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
9873964d
CS		 21
22/*
ec1c3194
GR		 23 * Supports following chips:
24 *
4101ece3 25 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
ec1c3194
GR		 26 * w83791d 10 5 5 3 0x71 0x5ca3 yes no
27 *
28 * The w83791d chip appears to be part way between the 83781d and the
29 * 83792d. Thus, this file is derived from both the w83792d.c and
30 * w83781d.c files.
31 *
32 * The w83791g chip is the same as the w83791d but lead-free.
33 */
9873964d 34
9873964d
CS		 35#include <linux/module.h>
36#include <linux/init.h>
37#include <linux/slab.h>
38#include <linux/i2c.h>
39#include <linux/hwmon.h>
40#include <linux/hwmon-vid.h>
41#include <linux/hwmon-sysfs.h>
42#include <linux/err.h>
43#include <linux/mutex.h>
dcd8f392 44#include <linux/jiffies.h>
9873964d
CS		 45
46#define NUMBER_OF_VIN 10
47#define NUMBER_OF_FANIN 5
48#define NUMBER_OF_TEMPIN 3
6495ce18 49#define NUMBER_OF_PWM 5
9873964d
CS		 50
51/* Addresses to scan */
25e9c86d
MH		 52static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
53 I2C_CLIENT_END };
9873964d
CS		 54
55/* Insmod parameters */
3aed198c
JD		 56
57static unsigned short force_subclients[4];
58module_param_array(force_subclients, short, NULL, 0);
b55f3757
GR		 59MODULE_PARM_DESC(force_subclients,
60 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
9873964d 61
90ab5ee9 62static bool reset;
9873964d
CS		 63module_param(reset, bool, 0);
64MODULE_PARM_DESC(reset, "Set to one to force a hardware chip reset");
65
90ab5ee9 66static bool init;
9873964d
CS		 67module_param(init, bool, 0);
68MODULE_PARM_DESC(init, "Set to one to force extra software initialization");
69
70/* The W83791D registers */
71static const u8 W83791D_REG_IN[NUMBER_OF_VIN] = {
72 0x20, /* VCOREA in DataSheet */
73 0x21, /* VINR0 in DataSheet */
74 0x22, /* +3.3VIN in DataSheet */
75 0x23, /* VDD5V in DataSheet */
76 0x24, /* +12VIN in DataSheet */
77 0x25, /* -12VIN in DataSheet */
78 0x26, /* -5VIN in DataSheet */
79 0xB0, /* 5VSB in DataSheet */
80 0xB1, /* VBAT in DataSheet */
81 0xB2 /* VINR1 in DataSheet */
82};
83
84static const u8 W83791D_REG_IN_MAX[NUMBER_OF_VIN] = {
85 0x2B, /* VCOREA High Limit in DataSheet */
86 0x2D, /* VINR0 High Limit in DataSheet */
87 0x2F, /* +3.3VIN High Limit in DataSheet */
88 0x31, /* VDD5V High Limit in DataSheet */
89 0x33, /* +12VIN High Limit in DataSheet */
90 0x35, /* -12VIN High Limit in DataSheet */
91 0x37, /* -5VIN High Limit in DataSheet */
92 0xB4, /* 5VSB High Limit in DataSheet */
93 0xB6, /* VBAT High Limit in DataSheet */
94 0xB8 /* VINR1 High Limit in DataSheet */
95};
96static const u8 W83791D_REG_IN_MIN[NUMBER_OF_VIN] = {
97 0x2C, /* VCOREA Low Limit in DataSheet */
98 0x2E, /* VINR0 Low Limit in DataSheet */
99 0x30, /* +3.3VIN Low Limit in DataSheet */
100 0x32, /* VDD5V Low Limit in DataSheet */
101 0x34, /* +12VIN Low Limit in DataSheet */
102 0x36, /* -12VIN Low Limit in DataSheet */
103 0x38, /* -5VIN Low Limit in DataSheet */
104 0xB5, /* 5VSB Low Limit in DataSheet */
105 0xB7, /* VBAT Low Limit in DataSheet */
106 0xB9 /* VINR1 Low Limit in DataSheet */
107};
108static const u8 W83791D_REG_FAN[NUMBER_OF_FANIN] = {
109 0x28, /* FAN 1 Count in DataSheet */
110 0x29, /* FAN 2 Count in DataSheet */
111 0x2A, /* FAN 3 Count in DataSheet */
112 0xBA, /* FAN 4 Count in DataSheet */
113 0xBB, /* FAN 5 Count in DataSheet */
114};
115static const u8 W83791D_REG_FAN_MIN[NUMBER_OF_FANIN] = {
116 0x3B, /* FAN 1 Count Low Limit in DataSheet */
117 0x3C, /* FAN 2 Count Low Limit in DataSheet */
118 0x3D, /* FAN 3 Count Low Limit in DataSheet */
119 0xBC, /* FAN 4 Count Low Limit in DataSheet */
120 0xBD, /* FAN 5 Count Low Limit in DataSheet */
121};
122
6495ce18
MH		 123static const u8 W83791D_REG_PWM[NUMBER_OF_PWM] = {
124 0x81, /* PWM 1 duty cycle register in DataSheet */
125 0x83, /* PWM 2 duty cycle register in DataSheet */
126 0x94, /* PWM 3 duty cycle register in DataSheet */
127 0xA0, /* PWM 4 duty cycle register in DataSheet */
128 0xA1, /* PWM 5 duty cycle register in DataSheet */
129};
130
a5a4598c
MH		 131static const u8 W83791D_REG_TEMP_TARGET[3] = {
132 0x85, /* PWM 1 target temperature for temp 1 */
133 0x86, /* PWM 2 target temperature for temp 2 */
134 0x96, /* PWM 3 target temperature for temp 3 */
135};
136
137static const u8 W83791D_REG_TEMP_TOL[2] = {
138 0x87, /* PWM 1/2 temperature tolerance */
139 0x97, /* PWM 3 temperature tolerance */
140};
141
9873964d
CS		 142static const u8 W83791D_REG_FAN_CFG[2] = {
143 0x84, /* FAN 1/2 configuration */
144 0x95, /* FAN 3 configuration */
145};
146
147static const u8 W83791D_REG_FAN_DIV[3] = {
148 0x47, /* contains FAN1 and FAN2 Divisor */
149 0x4b, /* contains FAN3 Divisor */
150 0x5C, /* contains FAN4 and FAN5 Divisor */
151};
152
153#define W83791D_REG_BANK 0x4E
154#define W83791D_REG_TEMP2_CONFIG 0xC2
155#define W83791D_REG_TEMP3_CONFIG 0xCA
156
157static const u8 W83791D_REG_TEMP1[3] = {
158 0x27, /* TEMP 1 in DataSheet */
159 0x39, /* TEMP 1 Over in DataSheet */
160 0x3A, /* TEMP 1 Hyst in DataSheet */
161};
162
163static const u8 W83791D_REG_TEMP_ADD[2][6] = {
164 {0xC0, /* TEMP 2 in DataSheet */
165 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
166 0xC5, /* TEMP 2 Over High part in DataSheet */
167 0xC6, /* TEMP 2 Over Low part in DataSheet */
168 0xC3, /* TEMP 2 Thyst High part in DataSheet */
169 0xC4}, /* TEMP 2 Thyst Low part in DataSheet */
170 {0xC8, /* TEMP 3 in DataSheet */
171 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
172 0xCD, /* TEMP 3 Over High part in DataSheet */
173 0xCE, /* TEMP 3 Over Low part in DataSheet */
174 0xCB, /* TEMP 3 Thyst High part in DataSheet */
175 0xCC} /* TEMP 3 Thyst Low part in DataSheet */
176};
177
178#define W83791D_REG_BEEP_CONFIG 0x4D
179
180static const u8 W83791D_REG_BEEP_CTRL[3] = {
181 0x56, /* BEEP Control Register 1 */
182 0x57, /* BEEP Control Register 2 */
183 0xA3, /* BEEP Control Register 3 */
184};
185
6e1ecd9b 186#define W83791D_REG_GPIO 0x15
9873964d
CS		 187#define W83791D_REG_CONFIG 0x40
188#define W83791D_REG_VID_FANDIV 0x47
189#define W83791D_REG_DID_VID4 0x49
190#define W83791D_REG_WCHIPID 0x58
191#define W83791D_REG_CHIPMAN 0x4F
192#define W83791D_REG_PIN 0x4B
193#define W83791D_REG_I2C_SUBADDR 0x4A
194
195#define W83791D_REG_ALARM1 0xA9 /* realtime status register1 */
196#define W83791D_REG_ALARM2 0xAA /* realtime status register2 */
197#define W83791D_REG_ALARM3 0xAB /* realtime status register3 */
198
199#define W83791D_REG_VBAT 0x5D
200#define W83791D_REG_I2C_ADDR 0x48
201
ec1c3194
GR		 202/*
203 * The SMBus locks itself. The Winbond W83791D has a bank select register
204 * (index 0x4e), but the driver only accesses registers in bank 0. Since
205 * we don't switch banks, we don't need any special code to handle
206 * locking access between bank switches
207 */
9873964d
CS		 208static inline int w83791d_read(struct i2c_client *client, u8 reg)
209{
210 return i2c_smbus_read_byte_data(client, reg);
211}
212
213static inline int w83791d_write(struct i2c_client *client, u8 reg, u8 value)
214{
215 return i2c_smbus_write_byte_data(client, reg, value);
216}
217
ec1c3194
GR		 218/*
219 * The analog voltage inputs have 16mV LSB. Since the sysfs output is
220 * in mV as would be measured on the chip input pin, need to just
221 * multiply/divide by 16 to translate from/to register values.
222 */
2a844c14 223#define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
9873964d
CS		 224#define IN_FROM_REG(val) ((val) * 16)
225
226static u8 fan_to_reg(long rpm, int div)
227{
228 if (rpm == 0)
229 return 255;
2a844c14
GR		 230 rpm = clamp_val(rpm, 1, 1000000);
231 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
9873964d
CS		 232}
233
ec1c3194 234#define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : \
9873964d
CS		 235 ((val) == 255 ? 0 : \
236 1350000 / ((val) * (div))))
237
238/* for temp1 which is 8-bit resolution, LSB = 1 degree Celsius */
239#define TEMP1_FROM_REG(val) ((val) * 1000)
240#define TEMP1_TO_REG(val) ((val) <= -128000 ? -128 : \
241 (val) >= 127000 ? 127 : \
242 (val) < 0 ? ((val) - 500) / 1000 : \
243 ((val) + 500) / 1000)
244
ec1c3194
GR		 245/*
246 * for temp2 and temp3 which are 9-bit resolution, LSB = 0.5 degree Celsius
247 * Assumes the top 8 bits are the integral amount and the bottom 8 bits
248 * are the fractional amount. Since we only have 0.5 degree resolution,
249 * the bottom 7 bits will always be zero
250 */
9873964d
CS		 251#define TEMP23_FROM_REG(val) ((val) / 128 * 500)
252#define TEMP23_TO_REG(val) ((val) <= -128000 ? 0x8000 : \
253 (val) >= 127500 ? 0x7F80 : \
254 (val) < 0 ? ((val) - 250) / 500 * 128 : \
255 ((val) + 250) / 500 * 128)
256
a5a4598c
MH		 257/* for thermal cruise target temp, 7-bits, LSB = 1 degree Celsius */
258#define TARGET_TEMP_TO_REG(val) ((val) < 0 ? 0 : \
259 (val) >= 127000 ? 127 : \
260 ((val) + 500) / 1000)
261
262/* for thermal cruise temp tolerance, 4-bits, LSB = 1 degree Celsius */
a9169813 263#define TOL_TEMP_TO_REG(val) ((val) >= 15000 ? 15 : \
a5a4598c 264 ((val) + 500) / 1000)
9873964d
CS		 265
266#define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
267#define BEEP_MASK_FROM_REG(val) ((val) & 0xffffff)
268
269#define DIV_FROM_REG(val) (1 << (val))
270
271static u8 div_to_reg(int nr, long val)
272{
273 int i;
9873964d 274
ad02ad85 275 /* fan divisors max out at 128 */
2a844c14 276 val = clamp_val(val, 1, 128) >> 1;
9873964d
CS		 277 for (i = 0; i < 7; i++) {
278 if (val == 0)
279 break;
280 val >>= 1;
281 }
282 return (u8) i;
283}
284
285struct w83791d_data {
1beeffe4 286 struct device *hwmon_dev;
9873964d
CS		 287 struct mutex update_lock;
288
289 char valid; /* !=0 if following fields are valid */
290 unsigned long last_updated; /* In jiffies */
291
292 /* array of 2 pointers to subclients */
293 struct i2c_client *lm75[2];
294
295 /* volts */
296 u8 in[NUMBER_OF_VIN]; /* Register value */
297 u8 in_max[NUMBER_OF_VIN]; /* Register value */
298 u8 in_min[NUMBER_OF_VIN]; /* Register value */
299
300 /* fans */
301 u8 fan[NUMBER_OF_FANIN]; /* Register value */
302 u8 fan_min[NUMBER_OF_FANIN]; /* Register value */
303 u8 fan_div[NUMBER_OF_FANIN]; /* Register encoding, shifted right */
304
305 /* Temperature sensors */
306
307 s8 temp1[3]; /* current, over, thyst */
308 s16 temp_add[2][3]; /* fixed point value. Top 8 bits are the
ec1c3194
GR		 309 * integral part, bottom 8 bits are the
310 * fractional part. We only use the top
311 * 9 bits as the resolution is only
312 * to the 0.5 degree C...
313 * two sensors with three values
314 * (cur, over, hyst)
315 */
9873964d 316
6495ce18
MH		 317 /* PWMs */
318 u8 pwm[5]; /* pwm duty cycle */
b5938f8c 319 u8 pwm_enable[3]; /* pwm enable status for fan 1-3
ec1c3194
GR		 320 * (fan 4-5 only support manual mode)
321 */
6495ce18 322
a5a4598c
MH		 323 u8 temp_target[3]; /* pwm 1-3 target temperature */
324 u8 temp_tolerance[3]; /* pwm 1-3 temperature tolerance */
325
9873964d
CS		 326 /* Misc */
327 u32 alarms; /* realtime status register encoding,combined */
328 u8 beep_enable; /* Global beep enable */
329 u32 beep_mask; /* Mask off specific beeps */
330 u8 vid; /* Register encoding, combined */
331 u8 vrm; /* hwmon-vid */
332};
333
cb0c1af3
JD		 334static int w83791d_probe(struct i2c_client *client,
335 const struct i2c_device_id *id);
310ec792 336static int w83791d_detect(struct i2c_client *client,
cb0c1af3
JD		 337 struct i2c_board_info *info);
338static int w83791d_remove(struct i2c_client *client);
9873964d 339
7cbe1cee
CP		 340static int w83791d_read(struct i2c_client *client, u8 reg);
341static int w83791d_write(struct i2c_client *client, u8 reg, u8 value);
9873964d
CS		 342static struct w83791d_data *w83791d_update_device(struct device *dev);
343
344#ifdef DEBUG
345static void w83791d_print_debug(struct w83791d_data *data, struct device *dev);
346#endif
347
348static void w83791d_init_client(struct i2c_client *client);
349
cb0c1af3 350static const struct i2c_device_id w83791d_id[] = {
1f86df49 351 { "w83791d", 0 },
cb0c1af3
JD		 352 { }
353};
354MODULE_DEVICE_TABLE(i2c, w83791d_id);
355
9873964d 356static struct i2c_driver w83791d_driver = {
cb0c1af3 357 .class = I2C_CLASS_HWMON,
9873964d
CS		 358 .driver = {
359 .name = "w83791d",
360 },
cb0c1af3
JD		 361 .probe = w83791d_probe,
362 .remove = w83791d_remove,
363 .id_table = w83791d_id,
364 .detect = w83791d_detect,
c3813d6a 365 .address_list = normal_i2c,
9873964d
CS		 366};
367
368/* following are the sysfs callback functions */
369#define show_in_reg(reg) \
370static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
371 char *buf) \
372{ \
373 struct sensor_device_attribute *sensor_attr = \
374 to_sensor_dev_attr(attr); \
375 struct w83791d_data *data = w83791d_update_device(dev); \
376 int nr = sensor_attr->index; \
ec1c3194 377 return sprintf(buf, "%d\n", IN_FROM_REG(data->reg[nr])); \
9873964d
CS		 378}
379
380show_in_reg(in);
381show_in_reg(in_min);
382show_in_reg(in_max);
383
384#define store_in_reg(REG, reg) \
385static ssize_t store_in_##reg(struct device *dev, \
386 struct device_attribute *attr, \
387 const char *buf, size_t count) \
388{ \
389 struct sensor_device_attribute *sensor_attr = \
390 to_sensor_dev_attr(attr); \
391 struct i2c_client *client = to_i2c_client(dev); \
392 struct w83791d_data *data = i2c_get_clientdata(client); \
9873964d 393 int nr = sensor_attr->index; \
ec1c3194
GR		 394 unsigned long val; \
395 int err = kstrtoul(buf, 10, &val); \
396 if (err) \
397 return err; \
9873964d
CS		 398 mutex_lock(&data->update_lock); \
399 data->in_##reg[nr] = IN_TO_REG(val); \
400 w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \
401 mutex_unlock(&data->update_lock); \
402 \
403 return count; \
404}
405store_in_reg(MIN, min);
406store_in_reg(MAX, max);
407
408static struct sensor_device_attribute sda_in_input[] = {
409 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
410 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
411 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
412 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
413 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
414 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
415 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
416 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
417 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
418 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
419};
420
421static struct sensor_device_attribute sda_in_min[] = {
422 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
423 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
424 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
425 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
426 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
427 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
428 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
429 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
430 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
431 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
432};
433
434static struct sensor_device_attribute sda_in_max[] = {
435 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
436 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
437 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
438 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
439 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
440 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
441 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
442 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
443 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
444 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
445};
446
64383123
CS		 447
448static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
449 char *buf)
450{
451 struct sensor_device_attribute *sensor_attr =
452 to_sensor_dev_attr(attr);
453 struct w83791d_data *data = w83791d_update_device(dev);
454 int bitnr = sensor_attr->index;
455
456 return sprintf(buf, "%d\n", (data->beep_mask >> bitnr) & 1);
457}
458
459static ssize_t store_beep(struct device *dev, struct device_attribute *attr,
460 const char *buf, size_t count)
461{
462 struct sensor_device_attribute *sensor_attr =
463 to_sensor_dev_attr(attr);
464 struct i2c_client *client = to_i2c_client(dev);
465 struct w83791d_data *data = i2c_get_clientdata(client);
466 int bitnr = sensor_attr->index;
467 int bytenr = bitnr / 8;
ec1c3194
GR		 468 unsigned long val;
469 int err;
470
471 err = kstrtoul(buf, 10, &val);
472 if (err)
473 return err;
474
475 val = val ? 1 : 0;
64383123
CS		 476
477 mutex_lock(&data->update_lock);
478
479 data->beep_mask &= ~(0xff << (bytenr * 8));
480 data->beep_mask |= w83791d_read(client, W83791D_REG_BEEP_CTRL[bytenr])
481 << (bytenr * 8);
482
483 data->beep_mask &= ~(1 << bitnr);
484 data->beep_mask |= val << bitnr;
485
486 w83791d_write(client, W83791D_REG_BEEP_CTRL[bytenr],
487 (data->beep_mask >> (bytenr * 8)) & 0xff);
488
489 mutex_unlock(&data->update_lock);
490
491 return count;
492}
493
494static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
495 char *buf)
496{
497 struct sensor_device_attribute *sensor_attr =
498 to_sensor_dev_attr(attr);
499 struct w83791d_data *data = w83791d_update_device(dev);
500 int bitnr = sensor_attr->index;
501
502 return sprintf(buf, "%d\n", (data->alarms >> bitnr) & 1);
503}
504
ec1c3194
GR		 505/*
506 * Note: The bitmask for the beep enable/disable is different than
507 * the bitmask for the alarm.
508 */
64383123
CS		 509static struct sensor_device_attribute sda_in_beep[] = {
510 SENSOR_ATTR(in0_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 0),
511 SENSOR_ATTR(in1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 13),
512 SENSOR_ATTR(in2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 2),
513 SENSOR_ATTR(in3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 3),
514 SENSOR_ATTR(in4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 8),
515 SENSOR_ATTR(in5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 9),
516 SENSOR_ATTR(in6_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 10),
517 SENSOR_ATTR(in7_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 16),
518 SENSOR_ATTR(in8_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 17),
519 SENSOR_ATTR(in9_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 14),
520};
521
522static struct sensor_device_attribute sda_in_alarm[] = {
523 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
524 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
525 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
526 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
527 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
528 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9),
529 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10),
530 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 19),
531 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 20),
532 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 14),
533};
534
9873964d
CS		 535#define show_fan_reg(reg) \
536static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
537 char *buf) \
538{ \
539 struct sensor_device_attribute *sensor_attr = \
540 to_sensor_dev_attr(attr); \
541 struct w83791d_data *data = w83791d_update_device(dev); \
542 int nr = sensor_attr->index; \
ec1c3194 543 return sprintf(buf, "%d\n", \
9873964d
CS		 544 FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
545}
546
547show_fan_reg(fan);
548show_fan_reg(fan_min);
549
550static ssize_t store_fan_min(struct device *dev, struct device_attribute *attr,
551 const char *buf, size_t count)
552{
553 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
554 struct i2c_client *client = to_i2c_client(dev);
555 struct w83791d_data *data = i2c_get_clientdata(client);
9873964d 556 int nr = sensor_attr->index;
ec1c3194
GR		 557 unsigned long val;
558 int err;
559
560 err = kstrtoul(buf, 10, &val);
561 if (err)
562 return err;
9873964d
CS		 563
564 mutex_lock(&data->update_lock);
565 data->fan_min[nr] = fan_to_reg(val, DIV_FROM_REG(data->fan_div[nr]));
566 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
567 mutex_unlock(&data->update_lock);
568
569 return count;
570}
571
572static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
573 char *buf)
574{
575 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
576 int nr = sensor_attr->index;
577 struct w83791d_data *data = w83791d_update_device(dev);
578 return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr]));
579}
580
ec1c3194
GR		 581/*
582 * Note: we save and restore the fan minimum here, because its value is
583 * determined in part by the fan divisor. This follows the principle of
584 * least surprise; the user doesn't expect the fan minimum to change just
585 * because the divisor changed.
586 */
9873964d
CS		 587static ssize_t store_fan_div(struct device *dev, struct device_attribute *attr,
588 const char *buf, size_t count)
589{
590 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
591 struct i2c_client *client = to_i2c_client(dev);
592 struct w83791d_data *data = i2c_get_clientdata(client);
593 int nr = sensor_attr->index;
594 unsigned long min;
595 u8 tmp_fan_div;
596 u8 fan_div_reg;
ad02ad85 597 u8 vbat_reg;
9873964d
CS		 598 int indx = 0;
599 u8 keep_mask = 0;
600 u8 new_shift = 0;
ec1c3194
GR		 601 unsigned long val;
602 int err;
603
604 err = kstrtoul(buf, 10, &val);
605 if (err)
606 return err;
9873964d
CS		 607
608 /* Save fan_min */
609 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
610
611 mutex_lock(&data->update_lock);
ec1c3194 612 data->fan_div[nr] = div_to_reg(nr, val);
9873964d
CS		 613
614 switch (nr) {
615 case 0:
616 indx = 0;
617 keep_mask = 0xcf;
618 new_shift = 4;
619 break;
620 case 1:
621 indx = 0;
622 keep_mask = 0x3f;
623 new_shift = 6;
624 break;
625 case 2:
626 indx = 1;
627 keep_mask = 0x3f;
628 new_shift = 6;
629 break;
630 case 3:
631 indx = 2;
632 keep_mask = 0xf8;
633 new_shift = 0;
634 break;
635 case 4:
636 indx = 2;
637 keep_mask = 0x8f;
638 new_shift = 4;
639 break;
640#ifdef DEBUG
641 default:
642 dev_warn(dev, "store_fan_div: Unexpected nr seen: %d\n", nr);
643 count = -EINVAL;
644 goto err_exit;
645#endif
646 }
647
648 fan_div_reg = w83791d_read(client, W83791D_REG_FAN_DIV[indx])
649 & keep_mask;
650 tmp_fan_div = (data->fan_div[nr] << new_shift) & ~keep_mask;
651
652 w83791d_write(client, W83791D_REG_FAN_DIV[indx],
653 fan_div_reg | tmp_fan_div);
654
ad02ad85
MH		 655 /* Bit 2 of fans 0-2 is stored in the vbat register (bits 5-7) */
656 if (nr < 3) {
657 keep_mask = ~(1 << (nr + 5));
658 vbat_reg = w83791d_read(client, W83791D_REG_VBAT)
659 & keep_mask;
660 tmp_fan_div = (data->fan_div[nr] << (3 + nr)) & ~keep_mask;
661 w83791d_write(client, W83791D_REG_VBAT,
662 vbat_reg | tmp_fan_div);
663 }
664
9873964d
CS		 665 /* Restore fan_min */
666 data->fan_min[nr] = fan_to_reg(min, DIV_FROM_REG(data->fan_div[nr]));
667 w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
668
669#ifdef DEBUG
670err_exit:
671#endif
672 mutex_unlock(&data->update_lock);
673
674 return count;
675}
676
677static struct sensor_device_attribute sda_fan_input[] = {
678 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
679 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
680 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
681 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
682 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
683};
684
685static struct sensor_device_attribute sda_fan_min[] = {
686 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO,
687 show_fan_min, store_fan_min, 0),
688 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO,
689 show_fan_min, store_fan_min, 1),
690 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO,
691 show_fan_min, store_fan_min, 2),
692 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO,
693 show_fan_min, store_fan_min, 3),
694 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO,
695 show_fan_min, store_fan_min, 4),
696};
697
698static struct sensor_device_attribute sda_fan_div[] = {
699 SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO,
700 show_fan_div, store_fan_div, 0),
701 SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO,
702 show_fan_div, store_fan_div, 1),
703 SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO,
704 show_fan_div, store_fan_div, 2),
705 SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO,
706 show_fan_div, store_fan_div, 3),
707 SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO,
708 show_fan_div, store_fan_div, 4),
709};
710
64383123
CS		 711static struct sensor_device_attribute sda_fan_beep[] = {
712 SENSOR_ATTR(fan1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 6),
713 SENSOR_ATTR(fan2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 7),
714 SENSOR_ATTR(fan3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 11),
715 SENSOR_ATTR(fan4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 21),
716 SENSOR_ATTR(fan5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 22),
717};
718
719static struct sensor_device_attribute sda_fan_alarm[] = {
720 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
721 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
722 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
723 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 21),
724 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 22),
725};
726
6495ce18
MH		 727/* read/write PWMs */
728static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
729 char *buf)
730{
731 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
732 int nr = sensor_attr->index;
733 struct w83791d_data *data = w83791d_update_device(dev);
734 return sprintf(buf, "%u\n", data->pwm[nr]);
735}
736
737static ssize_t store_pwm(struct device *dev, struct device_attribute *attr,
738 const char *buf, size_t count)
739{
740 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
741 struct i2c_client *client = to_i2c_client(dev);
742 struct w83791d_data *data = i2c_get_clientdata(client);
743 int nr = sensor_attr->index;
744 unsigned long val;
745
179c4fdb 746 if (kstrtoul(buf, 10, &val))
6495ce18
MH		 747 return -EINVAL;
748
749 mutex_lock(&data->update_lock);
2a844c14 750 data->pwm[nr] = clamp_val(val, 0, 255);
6495ce18
MH		 751 w83791d_write(client, W83791D_REG_PWM[nr], data->pwm[nr]);
752 mutex_unlock(&data->update_lock);
753 return count;
754}
755
756static struct sensor_device_attribute sda_pwm[] = {
757 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO,
758 show_pwm, store_pwm, 0),
759 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO,
760 show_pwm, store_pwm, 1),
761 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO,
762 show_pwm, store_pwm, 2),
763 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO,
764 show_pwm, store_pwm, 3),
765 SENSOR_ATTR(pwm5, S_IWUSR | S_IRUGO,
766 show_pwm, store_pwm, 4),
767};
768
b5938f8c
MH		 769static ssize_t show_pwmenable(struct device *dev, struct device_attribute *attr,
770 char *buf)
771{
772 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
773 int nr = sensor_attr->index;
774 struct w83791d_data *data = w83791d_update_device(dev);
775 return sprintf(buf, "%u\n", data->pwm_enable[nr] + 1);
776}
777
778static ssize_t store_pwmenable(struct device *dev,
779 struct device_attribute *attr, const char *buf, size_t count)
780{
781 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
782 struct i2c_client *client = to_i2c_client(dev);
783 struct w83791d_data *data = i2c_get_clientdata(client);
784 int nr = sensor_attr->index;
785 unsigned long val;
786 u8 reg_cfg_tmp;
787 u8 reg_idx = 0;
788 u8 val_shift = 0;
789 u8 keep_mask = 0;
790
179c4fdb 791 int ret = kstrtoul(buf, 10, &val);
b5938f8c
MH		 792
793 if (ret || val < 1 || val > 3)
794 return -EINVAL;
795
796 mutex_lock(&data->update_lock);
797 data->pwm_enable[nr] = val - 1;
798 switch (nr) {
799 case 0:
800 reg_idx = 0;
801 val_shift = 2;
802 keep_mask = 0xf3;
803 break;
804 case 1:
805 reg_idx = 0;
806 val_shift = 4;
807 keep_mask = 0xcf;
808 break;
809 case 2:
810 reg_idx = 1;
811 val_shift = 2;
812 keep_mask = 0xf3;
813 break;
814 }
815
816 reg_cfg_tmp = w83791d_read(client, W83791D_REG_FAN_CFG[reg_idx]);
817 reg_cfg_tmp = (reg_cfg_tmp & keep_mask) |
818 data->pwm_enable[nr] << val_shift;
819
820 w83791d_write(client, W83791D_REG_FAN_CFG[reg_idx], reg_cfg_tmp);
821 mutex_unlock(&data->update_lock);
822
823 return count;
824}
825static struct sensor_device_attribute sda_pwmenable[] = {
826 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
827 show_pwmenable, store_pwmenable, 0),
828 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
829 show_pwmenable, store_pwmenable, 1),
830 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
831 show_pwmenable, store_pwmenable, 2),
832};
833
a5a4598c
MH		 834/* For Smart Fan I / Thermal Cruise */
835static ssize_t show_temp_target(struct device *dev,
836 struct device_attribute *attr, char *buf)
837{
838 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
839 struct w83791d_data *data = w83791d_update_device(dev);
840 int nr = sensor_attr->index;
841 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_target[nr]));
842}
843
844static ssize_t store_temp_target(struct device *dev,
845 struct device_attribute *attr, const char *buf, size_t count)
846{
847 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
848 struct i2c_client *client = to_i2c_client(dev);
849 struct w83791d_data *data = i2c_get_clientdata(client);
850 int nr = sensor_attr->index;
a9169813 851 long val;
a5a4598c
MH		 852 u8 target_mask;
853
a9169813 854 if (kstrtol(buf, 10, &val))
a5a4598c
MH		 855 return -EINVAL;
856
857 mutex_lock(&data->update_lock);
858 data->temp_target[nr] = TARGET_TEMP_TO_REG(val);
859 target_mask = w83791d_read(client,
860 W83791D_REG_TEMP_TARGET[nr]) & 0x80;
861 w83791d_write(client, W83791D_REG_TEMP_TARGET[nr],
862 data->temp_target[nr] | target_mask);
863 mutex_unlock(&data->update_lock);
864 return count;
865}
866
867static struct sensor_device_attribute sda_temp_target[] = {
868 SENSOR_ATTR(temp1_target, S_IWUSR | S_IRUGO,
869 show_temp_target, store_temp_target, 0),
870 SENSOR_ATTR(temp2_target, S_IWUSR | S_IRUGO,
871 show_temp_target, store_temp_target, 1),
872 SENSOR_ATTR(temp3_target, S_IWUSR | S_IRUGO,
873 show_temp_target, store_temp_target, 2),
874};
875
876static ssize_t show_temp_tolerance(struct device *dev,
877 struct device_attribute *attr, char *buf)
878{
879 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
880 struct w83791d_data *data = w83791d_update_device(dev);
881 int nr = sensor_attr->index;
882 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_tolerance[nr]));
883}
884
885static ssize_t store_temp_tolerance(struct device *dev,
886 struct device_attribute *attr, const char *buf, size_t count)
887{
888 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
889 struct i2c_client *client = to_i2c_client(dev);
890 struct w83791d_data *data = i2c_get_clientdata(client);
891 int nr = sensor_attr->index;
892 unsigned long val;
893 u8 target_mask;
894 u8 reg_idx = 0;
895 u8 val_shift = 0;
896 u8 keep_mask = 0;
897
179c4fdb 898 if (kstrtoul(buf, 10, &val))
a5a4598c
MH		 899 return -EINVAL;
900
901 switch (nr) {
902 case 0:
903 reg_idx = 0;
904 val_shift = 0;
905 keep_mask = 0xf0;
906 break;
907 case 1:
908 reg_idx = 0;
909 val_shift = 4;
910 keep_mask = 0x0f;
911 break;
912 case 2:
913 reg_idx = 1;
914 val_shift = 0;
915 keep_mask = 0xf0;
916 break;
917 }
918
919 mutex_lock(&data->update_lock);
920 data->temp_tolerance[nr] = TOL_TEMP_TO_REG(val);
921 target_mask = w83791d_read(client,
922 W83791D_REG_TEMP_TOL[reg_idx]) & keep_mask;
923 w83791d_write(client, W83791D_REG_TEMP_TOL[reg_idx],
924 (data->temp_tolerance[nr] << val_shift) | target_mask);
925 mutex_unlock(&data->update_lock);
926 return count;
927}
928
929static struct sensor_device_attribute sda_temp_tolerance[] = {
930 SENSOR_ATTR(temp1_tolerance, S_IWUSR | S_IRUGO,
931 show_temp_tolerance, store_temp_tolerance, 0),
932 SENSOR_ATTR(temp2_tolerance, S_IWUSR | S_IRUGO,
933 show_temp_tolerance, store_temp_tolerance, 1),
934 SENSOR_ATTR(temp3_tolerance, S_IWUSR | S_IRUGO,
935 show_temp_tolerance, store_temp_tolerance, 2),
936};
937
9873964d
CS		 938/* read/write the temperature1, includes measured value and limits */
939static ssize_t show_temp1(struct device *dev, struct device_attribute *devattr,
940 char *buf)
941{
942 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
943 struct w83791d_data *data = w83791d_update_device(dev);
944 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[attr->index]));
945}
946
947static ssize_t store_temp1(struct device *dev, struct device_attribute *devattr,
948 const char *buf, size_t count)
949{
950 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
951 struct i2c_client *client = to_i2c_client(dev);
952 struct w83791d_data *data = i2c_get_clientdata(client);
9873964d 953 int nr = attr->index;
ec1c3194
GR		 954 long val;
955 int err;
956
957 err = kstrtol(buf, 10, &val);
958 if (err)
959 return err;
9873964d
CS		 960
961 mutex_lock(&data->update_lock);
962 data->temp1[nr] = TEMP1_TO_REG(val);
963 w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]);
964 mutex_unlock(&data->update_lock);
965 return count;
966}
967
968/* read/write temperature2-3, includes measured value and limits */
969static ssize_t show_temp23(struct device *dev, struct device_attribute *devattr,
970 char *buf)
971{
972 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
973 struct w83791d_data *data = w83791d_update_device(dev);
974 int nr = attr->nr;
975 int index = attr->index;
976 return sprintf(buf, "%d\n", TEMP23_FROM_REG(data->temp_add[nr][index]));
977}
978
979static ssize_t store_temp23(struct device *dev,
980 struct device_attribute *devattr,
981 const char *buf, size_t count)
982{
983 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
984 struct i2c_client *client = to_i2c_client(dev);
985 struct w83791d_data *data = i2c_get_clientdata(client);
ec1c3194
GR		 986 long val;
987 int err;
9873964d
CS		 988 int nr = attr->nr;
989 int index = attr->index;
990
ec1c3194
GR		 991 err = kstrtol(buf, 10, &val);
992 if (err)
993 return err;
994
9873964d
CS		 995 mutex_lock(&data->update_lock);
996 data->temp_add[nr][index] = TEMP23_TO_REG(val);
997 w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2],
998 data->temp_add[nr][index] >> 8);
999 w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2 + 1],
1000 data->temp_add[nr][index] & 0x80);
1001 mutex_unlock(&data->update_lock);
1002
1003 return count;
1004}
1005
1006static struct sensor_device_attribute_2 sda_temp_input[] = {
1007 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0),
1008 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0),
1009 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0),
1010};
1011
1012static struct sensor_device_attribute_2 sda_temp_max[] = {
1013 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR,
1014 show_temp1, store_temp1, 0, 1),
1015 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR,
1016 show_temp23, store_temp23, 0, 1),
1017 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR,
1018 show_temp23, store_temp23, 1, 1),
1019};
1020
1021static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1022 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR,
1023 show_temp1, store_temp1, 0, 2),
1024 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR,
1025 show_temp23, store_temp23, 0, 2),
1026 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR,
1027 show_temp23, store_temp23, 1, 2),
1028};
1029
ec1c3194
GR		 1030/*
1031 * Note: The bitmask for the beep enable/disable is different than
1032 * the bitmask for the alarm.
1033 */
64383123
CS		 1034static struct sensor_device_attribute sda_temp_beep[] = {
1035 SENSOR_ATTR(temp1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 4),
1036 SENSOR_ATTR(temp2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 5),
1037 SENSOR_ATTR(temp3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 1),
1038};
1039
1040static struct sensor_device_attribute sda_temp_alarm[] = {
1041 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1042 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1043 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1044};
9873964d
CS		 1045
1046/* get reatime status of all sensors items: voltage, temp, fan */
1047static ssize_t show_alarms_reg(struct device *dev,
1048 struct device_attribute *attr, char *buf)
1049{
1050 struct w83791d_data *data = w83791d_update_device(dev);
1051 return sprintf(buf, "%u\n", data->alarms);
1052}
1053
1054static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
1055
1056/* Beep control */
1057
1058#define GLOBAL_BEEP_ENABLE_SHIFT 15
1059#define GLOBAL_BEEP_ENABLE_MASK (1 << GLOBAL_BEEP_ENABLE_SHIFT)
1060
1061static ssize_t show_beep_enable(struct device *dev,
1062 struct device_attribute *attr, char *buf)
1063{
1064 struct w83791d_data *data = w83791d_update_device(dev);
1065 return sprintf(buf, "%d\n", data->beep_enable);
1066}
1067
1068static ssize_t show_beep_mask(struct device *dev,
1069 struct device_attribute *attr, char *buf)
1070{
1071 struct w83791d_data *data = w83791d_update_device(dev);
1072 return sprintf(buf, "%d\n", BEEP_MASK_FROM_REG(data->beep_mask));
1073}
1074
1075
1076static ssize_t store_beep_mask(struct device *dev,
1077 struct device_attribute *attr,
1078 const char *buf, size_t count)
1079{
1080 struct i2c_client *client = to_i2c_client(dev);
1081 struct w83791d_data *data = i2c_get_clientdata(client);
9873964d 1082 int i;
ec1c3194
GR		 1083 long val;
1084 int err;
1085
1086 err = kstrtol(buf, 10, &val);
1087 if (err)
1088 return err;
9873964d
CS		 1089
1090 mutex_lock(&data->update_lock);
1091
ec1c3194
GR		 1092 /*
1093 * The beep_enable state overrides any enabling request from
1094 * the masks
1095 */
9873964d
CS		 1096 data->beep_mask = BEEP_MASK_TO_REG(val) & ~GLOBAL_BEEP_ENABLE_MASK;
1097 data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT);
1098
1099 val = data->beep_mask;
1100
1101 for (i = 0; i < 3; i++) {
1102 w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff));
1103 val >>= 8;
1104 }
1105
1106 mutex_unlock(&data->update_lock);
1107
1108 return count;
1109}
1110
1111static ssize_t store_beep_enable(struct device *dev,
1112 struct device_attribute *attr,
1113 const char *buf, size_t count)
1114{
1115 struct i2c_client *client = to_i2c_client(dev);
1116 struct w83791d_data *data = i2c_get_clientdata(client);
ec1c3194
GR		 1117 long val;
1118 int err;
1119
1120 err = kstrtol(buf, 10, &val);
1121 if (err)
1122 return err;
9873964d
CS		 1123
1124 mutex_lock(&data->update_lock);
1125
1126 data->beep_enable = val ? 1 : 0;
1127
1128 /* Keep the full mask value in sync with the current enable */
1129 data->beep_mask &= ~GLOBAL_BEEP_ENABLE_MASK;
1130 data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT);
1131
ec1c3194
GR		 1132 /*
1133 * The global control is in the second beep control register
1134 * so only need to update that register
1135 */
9873964d
CS		 1136 val = (data->beep_mask >> 8) & 0xff;
1137
1138 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], val);
1139
1140 mutex_unlock(&data->update_lock);
1141
1142 return count;
1143}
1144
1145static struct sensor_device_attribute sda_beep_ctrl[] = {
1146 SENSOR_ATTR(beep_enable, S_IRUGO | S_IWUSR,
1147 show_beep_enable, store_beep_enable, 0),
1148 SENSOR_ATTR(beep_mask, S_IRUGO | S_IWUSR,
1149 show_beep_mask, store_beep_mask, 1)
1150};
1151
1152/* cpu voltage regulation information */
1153static ssize_t show_vid_reg(struct device *dev,
1154 struct device_attribute *attr, char *buf)
1155{
1156 struct w83791d_data *data = w83791d_update_device(dev);
1157 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1158}
1159
1160static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1161
1162static ssize_t show_vrm_reg(struct device *dev,
1163 struct device_attribute *attr, char *buf)
1164{
90d6619a 1165 struct w83791d_data *data = dev_get_drvdata(dev);
9873964d
CS		 1166 return sprintf(buf, "%d\n", data->vrm);
1167}
1168
1169static ssize_t store_vrm_reg(struct device *dev,
1170 struct device_attribute *attr,
1171 const char *buf, size_t count)
1172{
8f74efe8 1173 struct w83791d_data *data = dev_get_drvdata(dev);
ec1c3194
GR		 1174 unsigned long val;
1175 int err;
9873964d 1176
ec1c3194
GR		 1177 /*
1178 * No lock needed as vrm is internal to the driver
1179 * (not read from a chip register) and so is not
1180 * updated in w83791d_update_device()
1181 */
9873964d 1182
ec1c3194
GR		 1183 err = kstrtoul(buf, 10, &val);
1184 if (err)
1185 return err;
1186
1187 data->vrm = val;
9873964d
CS		 1188 return count;
1189}
1190
1191static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1192
34fc921a 1193#define IN_UNIT_ATTRS(X) \
ec1c3194
GR		 1194 &sda_in_input[X].dev_attr.attr, \
1195 &sda_in_min[X].dev_attr.attr, \
1196 &sda_in_max[X].dev_attr.attr, \
1197 &sda_in_beep[X].dev_attr.attr, \
64383123 1198 &sda_in_alarm[X].dev_attr.attr
34fc921a
JC		 1199
1200#define FAN_UNIT_ATTRS(X) \
ec1c3194
GR		 1201 &sda_fan_input[X].dev_attr.attr, \
1202 &sda_fan_min[X].dev_attr.attr, \
1203 &sda_fan_div[X].dev_attr.attr, \
1204 &sda_fan_beep[X].dev_attr.attr, \
64383123 1205 &sda_fan_alarm[X].dev_attr.attr
34fc921a
JC		 1206
1207#define TEMP_UNIT_ATTRS(X) \
ec1c3194
GR		 1208 &sda_temp_input[X].dev_attr.attr, \
1209 &sda_temp_max[X].dev_attr.attr, \
1210 &sda_temp_max_hyst[X].dev_attr.attr, \
1211 &sda_temp_beep[X].dev_attr.attr, \
64383123 1212 &sda_temp_alarm[X].dev_attr.attr
34fc921a
JC		 1213
1214static struct attribute *w83791d_attributes[] = {
1215 IN_UNIT_ATTRS(0),
1216 IN_UNIT_ATTRS(1),
1217 IN_UNIT_ATTRS(2),
1218 IN_UNIT_ATTRS(3),
1219 IN_UNIT_ATTRS(4),
1220 IN_UNIT_ATTRS(5),
1221 IN_UNIT_ATTRS(6),
1222 IN_UNIT_ATTRS(7),
1223 IN_UNIT_ATTRS(8),
1224 IN_UNIT_ATTRS(9),
1225 FAN_UNIT_ATTRS(0),
1226 FAN_UNIT_ATTRS(1),
1227 FAN_UNIT_ATTRS(2),
34fc921a
JC		 1228 TEMP_UNIT_ATTRS(0),
1229 TEMP_UNIT_ATTRS(1),
1230 TEMP_UNIT_ATTRS(2),
1231 &dev_attr_alarms.attr,
1232 &sda_beep_ctrl[0].dev_attr.attr,
1233 &sda_beep_ctrl[1].dev_attr.attr,
1234 &dev_attr_cpu0_vid.attr,
1235 &dev_attr_vrm.attr,
6495ce18
MH		 1236 &sda_pwm[0].dev_attr.attr,
1237 &sda_pwm[1].dev_attr.attr,
1238 &sda_pwm[2].dev_attr.attr,
b5938f8c
MH		 1239 &sda_pwmenable[0].dev_attr.attr,
1240 &sda_pwmenable[1].dev_attr.attr,
1241 &sda_pwmenable[2].dev_attr.attr,
a5a4598c
MH		 1242 &sda_temp_target[0].dev_attr.attr,
1243 &sda_temp_target[1].dev_attr.attr,
1244 &sda_temp_target[2].dev_attr.attr,
1245 &sda_temp_tolerance[0].dev_attr.attr,
1246 &sda_temp_tolerance[1].dev_attr.attr,
1247 &sda_temp_tolerance[2].dev_attr.attr,
34fc921a
JC		 1248 NULL
1249};
1250
1251static const struct attribute_group w83791d_group = {
1252 .attrs = w83791d_attributes,
1253};
1254
ec1c3194
GR		 1255/*
1256 * Separate group of attributes for fan/pwm 4-5. Their pins can also be
1257 * in use for GPIO in which case their sysfs-interface should not be made
1258 * available
1259 */
6e1ecd9b
MH		 1260static struct attribute *w83791d_attributes_fanpwm45[] = {
1261 FAN_UNIT_ATTRS(3),
1262 FAN_UNIT_ATTRS(4),
6495ce18
MH		 1263 &sda_pwm[3].dev_attr.attr,
1264 &sda_pwm[4].dev_attr.attr,
6e1ecd9b
MH		 1265 NULL
1266};
1267
1268static const struct attribute_group w83791d_group_fanpwm45 = {
1269 .attrs = w83791d_attributes_fanpwm45,
1270};
9873964d 1271
cb0c1af3 1272static int w83791d_detect_subclients(struct i2c_client *client)
9873964d 1273{
cb0c1af3 1274 struct i2c_adapter *adapter = client->adapter;
9873964d 1275 struct w83791d_data *data = i2c_get_clientdata(client);
cb0c1af3 1276 int address = client->addr;
9873964d
CS		 1277 int i, id, err;
1278 u8 val;
1279
1280 id = i2c_adapter_id(adapter);
1281 if (force_subclients[0] == id && force_subclients[1] == address) {
1282 for (i = 2; i <= 3; i++) {
1283 if (force_subclients[i] < 0x48 ||
1284 force_subclients[i] > 0x4f) {
1285 dev_err(&client->dev,
1286 "invalid subclient "
1287 "address %d; must be 0x48-0x4f\n",
1288 force_subclients[i]);
1289 err = -ENODEV;
1290 goto error_sc_0;
1291 }
1292 }
1293 w83791d_write(client, W83791D_REG_I2C_SUBADDR,
1294 (force_subclients[2] & 0x07) |
1295 ((force_subclients[3] & 0x07) << 4));
1296 }
1297
1298 val = w83791d_read(client, W83791D_REG_I2C_SUBADDR);
ec1c3194 1299 if (!(val & 0x08))
cb0c1af3 1300 data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (val & 0x7));
9873964d
CS		 1301 if (!(val & 0x80)) {
1302 if ((data->lm75[0] != NULL) &&
1303 ((val & 0x7) == ((val >> 4) & 0x7))) {
1304 dev_err(&client->dev,
1305 "duplicate addresses 0x%x, "
1306 "use force_subclient\n",
1307 data->lm75[0]->addr);
1308 err = -ENODEV;
1309 goto error_sc_1;
1310 }
cb0c1af3
JD		 1311 data->lm75[1] = i2c_new_dummy(adapter,
1312 0x48 + ((val >> 4) & 0x7));
9873964d
CS		 1313 }
1314
1315 return 0;
1316
1317/* Undo inits in case of errors */
1318
1319error_sc_1:
cb0c1af3
JD		 1320 if (data->lm75[0] != NULL)
1321 i2c_unregister_device(data->lm75[0]);
9873964d
CS		 1322error_sc_0:
1323 return err;
1324}
1325
1326
cb0c1af3 1327/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1328static int w83791d_detect(struct i2c_client *client,
cb0c1af3 1329 struct i2c_board_info *info)
9873964d 1330{
cb0c1af3
JD		 1331 struct i2c_adapter *adapter = client->adapter;
1332 int val1, val2;
1333 unsigned short address = client->addr;
9873964d 1334
ec1c3194 1335 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
cb0c1af3 1336 return -ENODEV;
9873964d 1337
3f8b8459
JD		 1338 if (w83791d_read(client, W83791D_REG_CONFIG) & 0x80)
1339 return -ENODEV;
1340
1341 val1 = w83791d_read(client, W83791D_REG_BANK);
1342 val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
1343 /* Check for Winbond ID if in bank 0 */
1344 if (!(val1 & 0x07)) {
1345 if ((!(val1 & 0x80) && val2 != 0xa3) ||
ec1c3194 1346 ((val1 & 0x80) && val2 != 0x5c)) {
cb0c1af3 1347 return -ENODEV;
9873964d
CS		 1348 }
1349 }
ec1c3194
GR		 1350 /*
1351 * If Winbond chip, address of chip and W83791D_REG_I2C_ADDR
1352 * should match
1353 */
3f8b8459
JD		 1354 if (w83791d_read(client, W83791D_REG_I2C_ADDR) != address)
1355 return -ENODEV;
9873964d 1356
3f8b8459 1357 /* We want bank 0 and Vendor ID high byte */
9873964d
CS		 1358 val1 = w83791d_read(client, W83791D_REG_BANK) & 0x78;
1359 w83791d_write(client, W83791D_REG_BANK, val1 | 0x80);
1360
1361 /* Verify it is a Winbond w83791d */
3f8b8459
JD		 1362 val1 = w83791d_read(client, W83791D_REG_WCHIPID);
1363 val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
1364 if (val1 != 0x71 || val2 != 0x5c)
1365 return -ENODEV;
9873964d 1366
cb0c1af3
JD		 1367 strlcpy(info->type, "w83791d", I2C_NAME_SIZE);
1368
1369 return 0;
1370}
1371
1372static int w83791d_probe(struct i2c_client *client,
1373 const struct i2c_device_id *id)
1374{
1375 struct w83791d_data *data;
1376 struct device *dev = &client->dev;
16a515fd 1377 int i, err;
6e1ecd9b 1378 u8 has_fanpwm45;
9873964d
CS		 1379
1380#ifdef DEBUG
16a515fd 1381 int val1;
9873964d
CS		 1382 val1 = w83791d_read(client, W83791D_REG_DID_VID4);
1383 dev_dbg(dev, "Device ID version: %d.%d (0x%02x)\n",
1384 (val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1);
1385#endif
1386
6e13bb06
GR		 1387 data = devm_kzalloc(&client->dev, sizeof(struct w83791d_data),
1388 GFP_KERNEL);
1389 if (!data)
1390 return -ENOMEM;
9873964d 1391
cb0c1af3
JD		 1392 i2c_set_clientdata(client, data);
1393 mutex_init(&data->update_lock);
9873964d 1394
cb0c1af3
JD		 1395 err = w83791d_detect_subclients(client);
1396 if (err)
6e13bb06 1397 return err;
9873964d
CS		 1398
1399 /* Initialize the chip */
1400 w83791d_init_client(client);
1401
ec1c3194
GR		 1402 /*
1403 * If the fan_div is changed, make sure there is a rational
1404 * fan_min in place
1405 */
1406 for (i = 0; i < NUMBER_OF_FANIN; i++)
9873964d 1407 data->fan_min[i] = w83791d_read(client, W83791D_REG_FAN_MIN[i]);
9873964d
CS		 1408
1409 /* Register sysfs hooks */
ec1c3194
GR		 1410 err = sysfs_create_group(&client->dev.kobj, &w83791d_group);
1411 if (err)
34fc921a
JC		 1412 goto error3;
1413
6e1ecd9b
MH		 1414 /* Check if pins of fan/pwm 4-5 are in use as GPIO */
1415 has_fanpwm45 = w83791d_read(client, W83791D_REG_GPIO) & 0x10;
1416 if (has_fanpwm45) {
1417 err = sysfs_create_group(&client->dev.kobj,
1418 &w83791d_group_fanpwm45);
1419 if (err)
1420 goto error4;
1421 }
1422
34fc921a 1423 /* Everything is ready, now register the working device */
1beeffe4
TJ		 1424 data->hwmon_dev = hwmon_device_register(dev);
1425 if (IS_ERR(data->hwmon_dev)) {
1426 err = PTR_ERR(data->hwmon_dev);
6e1ecd9b 1427 goto error5;
9873964d
CS		 1428 }
1429
9873964d
CS		 1430 return 0;
1431
6e1ecd9b
MH		 1432error5:
1433 if (has_fanpwm45)
1434 sysfs_remove_group(&client->dev.kobj, &w83791d_group_fanpwm45);
34fc921a
JC		 1435error4:
1436 sysfs_remove_group(&client->dev.kobj, &w83791d_group);
9873964d 1437error3:
cb0c1af3
JD		 1438 if (data->lm75[0] != NULL)
1439 i2c_unregister_device(data->lm75[0]);
1440 if (data->lm75[1] != NULL)
1441 i2c_unregister_device(data->lm75[1]);
9873964d
CS		 1442 return err;
1443}
1444
cb0c1af3 1445static int w83791d_remove(struct i2c_client *client)
9873964d
CS		 1446{
1447 struct w83791d_data *data = i2c_get_clientdata(client);
9873964d 1448
cb0c1af3
JD		 1449 hwmon_device_unregister(data->hwmon_dev);
1450 sysfs_remove_group(&client->dev.kobj, &w83791d_group);
9873964d 1451
cb0c1af3
JD		 1452 if (data->lm75[0] != NULL)
1453 i2c_unregister_device(data->lm75[0]);
1454 if (data->lm75[1] != NULL)
1455 i2c_unregister_device(data->lm75[1]);
9873964d
CS		 1456
1457 return 0;
1458}
1459
1460static void w83791d_init_client(struct i2c_client *client)
1461{
1462 struct w83791d_data *data = i2c_get_clientdata(client);
1463 u8 tmp;
1464 u8 old_beep;
1465
ec1c3194
GR		 1466 /*
1467 * The difference between reset and init is that reset
1468 * does a hard reset of the chip via index 0x40, bit 7,
1469 * but init simply forces certain registers to have "sane"
1470 * values. The hope is that the BIOS has done the right
1471 * thing (which is why the default is reset=0, init=0),
1472 * but if not, reset is the hard hammer and init
1473 * is the soft mallet both of which are trying to whack
1474 * things into place...
1475 * NOTE: The data sheet makes a distinction between
1476 * "power on defaults" and "reset by MR". As far as I can tell,
1477 * the hard reset puts everything into a power-on state so I'm
1478 * not sure what "reset by MR" means or how it can happen.
1479 */
9873964d
CS		 1480 if (reset || init) {
1481 /* keep some BIOS settings when we... */
1482 old_beep = w83791d_read(client, W83791D_REG_BEEP_CONFIG);
1483
1484 if (reset) {
1485 /* ... reset the chip and ... */
1486 w83791d_write(client, W83791D_REG_CONFIG, 0x80);
1487 }
1488
1489 /* ... disable power-on abnormal beep */
1490 w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80);
1491
1492 /* disable the global beep (not done by hard reset) */
1493 tmp = w83791d_read(client, W83791D_REG_BEEP_CTRL[1]);
1494 w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef);
1495
1496 if (init) {
1497 /* Make sure monitoring is turned on for add-ons */
1498 tmp = w83791d_read(client, W83791D_REG_TEMP2_CONFIG);
1499 if (tmp & 1) {
1500 w83791d_write(client, W83791D_REG_TEMP2_CONFIG,
1501 tmp & 0xfe);
1502 }
1503
1504 tmp = w83791d_read(client, W83791D_REG_TEMP3_CONFIG);
1505 if (tmp & 1) {
1506 w83791d_write(client, W83791D_REG_TEMP3_CONFIG,
1507 tmp & 0xfe);
1508 }
1509
1510 /* Start monitoring */
1511 tmp = w83791d_read(client, W83791D_REG_CONFIG) & 0xf7;
1512 w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01);
1513 }
1514 }
1515
1516 data->vrm = vid_which_vrm();
1517}
1518
1519static struct w83791d_data *w83791d_update_device(struct device *dev)
1520{
1521 struct i2c_client *client = to_i2c_client(dev);
1522 struct w83791d_data *data = i2c_get_clientdata(client);
1523 int i, j;
1524 u8 reg_array_tmp[3];
ad02ad85 1525 u8 vbat_reg;
9873964d
CS		 1526
1527 mutex_lock(&data->update_lock);
1528
1529 if (time_after(jiffies, data->last_updated + (HZ * 3))
1530 || !data->valid) {
1531 dev_dbg(dev, "Starting w83791d device update\n");
1532
1533 /* Update the voltages measured value and limits */
1534 for (i = 0; i < NUMBER_OF_VIN; i++) {
1535 data->in[i] = w83791d_read(client,
1536 W83791D_REG_IN[i]);
1537 data->in_max[i] = w83791d_read(client,
1538 W83791D_REG_IN_MAX[i]);
1539 data->in_min[i] = w83791d_read(client,
1540 W83791D_REG_IN_MIN[i]);
1541 }
1542
1543 /* Update the fan counts and limits */
1544 for (i = 0; i < NUMBER_OF_FANIN; i++) {
1545 /* Update the Fan measured value and limits */
1546 data->fan[i] = w83791d_read(client,
1547 W83791D_REG_FAN[i]);
1548 data->fan_min[i] = w83791d_read(client,
1549 W83791D_REG_FAN_MIN[i]);
1550 }
1551
1552 /* Update the fan divisor */
1553 for (i = 0; i < 3; i++) {
1554 reg_array_tmp[i] = w83791d_read(client,
1555 W83791D_REG_FAN_DIV[i]);
1556 }
1557 data->fan_div[0] = (reg_array_tmp[0] >> 4) & 0x03;
1558 data->fan_div[1] = (reg_array_tmp[0] >> 6) & 0x03;
1559 data->fan_div[2] = (reg_array_tmp[1] >> 6) & 0x03;
1560 data->fan_div[3] = reg_array_tmp[2] & 0x07;
1561 data->fan_div[4] = (reg_array_tmp[2] >> 4) & 0x07;
1562
ec1c3194
GR		 1563 /*
1564 * The fan divisor for fans 0-2 get bit 2 from
1565 * bits 5-7 respectively of vbat register
1566 */
ad02ad85
MH		 1567 vbat_reg = w83791d_read(client, W83791D_REG_VBAT);
1568 for (i = 0; i < 3; i++)
1569 data->fan_div[i] |= (vbat_reg >> (3 + i)) & 0x04;
1570
6495ce18
MH		 1571 /* Update PWM duty cycle */
1572 for (i = 0; i < NUMBER_OF_PWM; i++) {
1573 data->pwm[i] = w83791d_read(client,
1574 W83791D_REG_PWM[i]);
1575 }
1576
b5938f8c
MH		 1577 /* Update PWM enable status */
1578 for (i = 0; i < 2; i++) {
1579 reg_array_tmp[i] = w83791d_read(client,
1580 W83791D_REG_FAN_CFG[i]);
1581 }
1582 data->pwm_enable[0] = (reg_array_tmp[0] >> 2) & 0x03;
1583 data->pwm_enable[1] = (reg_array_tmp[0] >> 4) & 0x03;
1584 data->pwm_enable[2] = (reg_array_tmp[1] >> 2) & 0x03;
1585
a5a4598c
MH		 1586 /* Update PWM target temperature */
1587 for (i = 0; i < 3; i++) {
1588 data->temp_target[i] = w83791d_read(client,
1589 W83791D_REG_TEMP_TARGET[i]) & 0x7f;
1590 }
1591
1592 /* Update PWM temperature tolerance */
1593 for (i = 0; i < 2; i++) {
1594 reg_array_tmp[i] = w83791d_read(client,
1595 W83791D_REG_TEMP_TOL[i]);
1596 }
1597 data->temp_tolerance[0] = reg_array_tmp[0] & 0x0f;
1598 data->temp_tolerance[1] = (reg_array_tmp[0] >> 4) & 0x0f;
1599 data->temp_tolerance[2] = reg_array_tmp[1] & 0x0f;
1600
9873964d
CS		 1601 /* Update the first temperature sensor */
1602 for (i = 0; i < 3; i++) {
1603 data->temp1[i] = w83791d_read(client,
1604 W83791D_REG_TEMP1[i]);
1605 }
1606
1607 /* Update the rest of the temperature sensors */
1608 for (i = 0; i < 2; i++) {
1609 for (j = 0; j < 3; j++) {
1610 data->temp_add[i][j] =
1611 (w83791d_read(client,
1612 W83791D_REG_TEMP_ADD[i][j * 2]) << 8) |
1613 w83791d_read(client,
1614 W83791D_REG_TEMP_ADD[i][j * 2 + 1]);
1615 }
1616 }
1617
1618 /* Update the realtime status */
1619 data->alarms =
1620 w83791d_read(client, W83791D_REG_ALARM1) +
1621 (w83791d_read(client, W83791D_REG_ALARM2) << 8) +
1622 (w83791d_read(client, W83791D_REG_ALARM3) << 16);
1623
1624 /* Update the beep configuration information */
1625 data->beep_mask =
1626 w83791d_read(client, W83791D_REG_BEEP_CTRL[0]) +
1627 (w83791d_read(client, W83791D_REG_BEEP_CTRL[1]) << 8) +
1628 (w83791d_read(client, W83791D_REG_BEEP_CTRL[2]) << 16);
1629
125751cb 1630 /* Extract global beep enable flag */
9873964d
CS		 1631 data->beep_enable =
1632 (data->beep_mask >> GLOBAL_BEEP_ENABLE_SHIFT) & 0x01;
1633
1634 /* Update the cpu voltage information */
1635 i = w83791d_read(client, W83791D_REG_VID_FANDIV);
1636 data->vid = i & 0x0f;
1637 data->vid |= (w83791d_read(client, W83791D_REG_DID_VID4) & 0x01)
1638 << 4;
1639
1640 data->last_updated = jiffies;
1641 data->valid = 1;
1642 }
1643
1644 mutex_unlock(&data->update_lock);
1645
1646#ifdef DEBUG
1647 w83791d_print_debug(data, dev);
1648#endif
1649
1650 return data;
1651}
1652
1653#ifdef DEBUG
1654static void w83791d_print_debug(struct w83791d_data *data, struct device *dev)
1655{
1656 int i = 0, j = 0;
1657
1658 dev_dbg(dev, "======Start of w83791d debug values======\n");
1659 dev_dbg(dev, "%d set of Voltages: ===>\n", NUMBER_OF_VIN);
1660 for (i = 0; i < NUMBER_OF_VIN; i++) {
1661 dev_dbg(dev, "vin[%d] is: 0x%02x\n", i, data->in[i]);
1662 dev_dbg(dev, "vin[%d] min is: 0x%02x\n", i, data->in_min[i]);
1663 dev_dbg(dev, "vin[%d] max is: 0x%02x\n", i, data->in_max[i]);
1664 }
1665 dev_dbg(dev, "%d set of Fan Counts/Divisors: ===>\n", NUMBER_OF_FANIN);
1666 for (i = 0; i < NUMBER_OF_FANIN; i++) {
1667 dev_dbg(dev, "fan[%d] is: 0x%02x\n", i, data->fan[i]);
1668 dev_dbg(dev, "fan[%d] min is: 0x%02x\n", i, data->fan_min[i]);
1669 dev_dbg(dev, "fan_div[%d] is: 0x%02x\n", i, data->fan_div[i]);
1670 }
1671
ec1c3194
GR		 1672 /*
1673 * temperature math is signed, but only print out the
1674 * bits that matter
1675 */
9873964d 1676 dev_dbg(dev, "%d set of Temperatures: ===>\n", NUMBER_OF_TEMPIN);
ec1c3194 1677 for (i = 0; i < 3; i++)
9873964d 1678 dev_dbg(dev, "temp1[%d] is: 0x%02x\n", i, (u8) data->temp1[i]);
9873964d
CS		 1679 for (i = 0; i < 2; i++) {
1680 for (j = 0; j < 3; j++) {
1681 dev_dbg(dev, "temp_add[%d][%d] is: 0x%04x\n", i, j,
1682 (u16) data->temp_add[i][j]);
1683 }
1684 }
1685
1686 dev_dbg(dev, "Misc Information: ===>\n");
1687 dev_dbg(dev, "alarm is: 0x%08x\n", data->alarms);
1688 dev_dbg(dev, "beep_mask is: 0x%08x\n", data->beep_mask);
1689 dev_dbg(dev, "beep_enable is: %d\n", data->beep_enable);
1690 dev_dbg(dev, "vid is: 0x%02x\n", data->vid);
1691 dev_dbg(dev, "vrm is: 0x%02x\n", data->vrm);
1692 dev_dbg(dev, "=======End of w83791d debug values========\n");
1693 dev_dbg(dev, "\n");
1694}
1695#endif
1696
f0967eea 1697module_i2c_driver(w83791d_driver);
9873964d
CS		 1698
1699MODULE_AUTHOR("Charles Spirakis <bezaur@gmail.com>");
1700MODULE_DESCRIPTION("W83791D driver");
1701MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)