[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / jc42.c

/*
 * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
 *
 * Copyright (c) 2010  Ericsson AB.
 *
 * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
 *
 * JC42.4 compliant temperature sensors are typically used on memory modules.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/err.h>
#include <linux/mutex.h>

/* Addresses to scan */
static const unsigned short normal_i2c[] = {
	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };

/* JC42 registers. All registers are 16 bit. */
#define JC42_REG_CAP		0x00
#define JC42_REG_CONFIG		0x01
#define JC42_REG_TEMP_UPPER	0x02
#define JC42_REG_TEMP_LOWER	0x03
#define JC42_REG_TEMP_CRITICAL	0x04
#define JC42_REG_TEMP		0x05
#define JC42_REG_MANID		0x06
#define JC42_REG_DEVICEID	0x07

/* Status bits in temperature register */
#define JC42_ALARM_CRIT_BIT	15
#define JC42_ALARM_MAX_BIT	14
#define JC42_ALARM_MIN_BIT	13

/* Configuration register defines */
#define JC42_CFG_CRIT_ONLY	(1 << 2)
#define JC42_CFG_TCRIT_LOCK	(1 << 6)
#define JC42_CFG_EVENT_LOCK	(1 << 7)
#define JC42_CFG_SHUTDOWN	(1 << 8)
#define JC42_CFG_HYST_SHIFT	9
#define JC42_CFG_HYST_MASK	(0x03 << 9)

/* Capabilities */
#define JC42_CAP_RANGE		(1 << 2)

/* Manufacturer IDs */
#define ADT_MANID		0x11d4  /* Analog Devices */
#define ATMEL_MANID		0x001f  /* Atmel */
#define MAX_MANID		0x004d  /* Maxim */
#define IDT_MANID		0x00b3  /* IDT */
#define MCP_MANID		0x0054  /* Microchip */
#define NXP_MANID		0x1131  /* NXP Semiconductors */
#define ONS_MANID		0x1b09  /* ON Semiconductor */
#define STM_MANID		0x104a  /* ST Microelectronics */

/* Supported chips */

/* Analog Devices */
#define ADT7408_DEVID		0x0801
#define ADT7408_DEVID_MASK	0xffff

/* Atmel */
#define AT30TS00_DEVID		0x8201
#define AT30TS00_DEVID_MASK	0xffff

/* IDT */
#define TS3000B3_DEVID		0x2903  /* Also matches TSE2002B3 */
#define TS3000B3_DEVID_MASK	0xffff

#define TS3000GB2_DEVID		0x2912  /* Also matches TSE2002GB2 */
#define TS3000GB2_DEVID_MASK	0xffff

/* Maxim */
#define MAX6604_DEVID		0x3e00
#define MAX6604_DEVID_MASK	0xffff

/* Microchip */
#define MCP9804_DEVID		0x0200
#define MCP9804_DEVID_MASK	0xfffc

#define MCP98242_DEVID		0x2000
#define MCP98242_DEVID_MASK	0xfffc

#define MCP98243_DEVID		0x2100
#define MCP98243_DEVID_MASK	0xfffc

#define MCP98244_DEVID		0x2200
#define MCP98244_DEVID_MASK	0xfffc

#define MCP9843_DEVID		0x0000	/* Also matches mcp9805 */
#define MCP9843_DEVID_MASK	0xfffe

/* NXP */
#define SE97_DEVID		0xa200
#define SE97_DEVID_MASK		0xfffc

#define SE98_DEVID		0xa100
#define SE98_DEVID_MASK		0xfffc

/* ON Semiconductor */
#define CAT6095_DEVID		0x0800	/* Also matches CAT34TS02 */
#define CAT6095_DEVID_MASK	0xffe0

/* ST Microelectronics */
#define STTS424_DEVID		0x0101
#define STTS424_DEVID_MASK	0xffff

#define STTS424E_DEVID		0x0000
#define STTS424E_DEVID_MASK	0xfffe

#define STTS2002_DEVID		0x0300
#define STTS2002_DEVID_MASK	0xffff

#define STTS3000_DEVID		0x0200
#define STTS3000_DEVID_MASK	0xffff

static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };

struct jc42_chips {
	u16 manid;
	u16 devid;
	u16 devid_mask;
};

static struct jc42_chips jc42_chips[] = {
	{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
	{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
	{ IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
	{ IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
	{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
	{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
	{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
	{ MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
	{ MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
	{ MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
	{ NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
	{ ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
	{ NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
	{ STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
	{ STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
	{ STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
	{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
};

/* Each client has this additional data */
struct jc42_data {
	struct device	*hwmon_dev;
	struct mutex	update_lock;	/* protect register access */
	bool		extended;	/* true if extended range supported */
	bool		valid;
	unsigned long	last_updated;	/* In jiffies */
	u16		orig_config;	/* original configuration */
	u16		config;		/* current configuration */
	u16		temp_input;	/* Temperatures */
	u16		temp_crit;
	u16		temp_min;
	u16		temp_max;
};

static int jc42_probe(struct i2c_client *client,
		      const struct i2c_device_id *id);
static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info);
static int jc42_remove(struct i2c_client *client);

static struct jc42_data *jc42_update_device(struct device *dev);

static const struct i2c_device_id jc42_id[] = {
	{ "jc42", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, jc42_id);

#ifdef CONFIG_PM

static int jc42_suspend(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);

	data->config |= JC42_CFG_SHUTDOWN;
	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
	return 0;
}

static int jc42_resume(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);

	data->config &= ~JC42_CFG_SHUTDOWN;
	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
	return 0;
}

static const struct dev_pm_ops jc42_dev_pm_ops = {
	.suspend = jc42_suspend,
	.resume = jc42_resume,
};

#define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
#else
#define JC42_DEV_PM_OPS NULL
#endif /* CONFIG_PM */

/* This is the driver that will be inserted */
static struct i2c_driver jc42_driver = {
	.class		= I2C_CLASS_SPD,
	.driver = {
		.name	= "jc42",
		.pm = JC42_DEV_PM_OPS,
	},
	.probe		= jc42_probe,
	.remove		= jc42_remove,
	.id_table	= jc42_id,
	.detect		= jc42_detect,
	.address_list	= normal_i2c,
};

#define JC42_TEMP_MIN_EXTENDED	(-40000)
#define JC42_TEMP_MIN		0
#define JC42_TEMP_MAX		125000

static u16 jc42_temp_to_reg(int temp, bool extended)
{
	int ntemp = clamp_val(temp,
			      extended ? JC42_TEMP_MIN_EXTENDED :
			      JC42_TEMP_MIN, JC42_TEMP_MAX);

	/* convert from 0.001 to 0.0625 resolution */
	return (ntemp * 2 / 125) & 0x1fff;
}

static int jc42_temp_from_reg(s16 reg)
{
	reg &= 0x1fff;

	/* sign extend register */
	if (reg & 0x1000)
		reg |= 0xf000;

	/* convert from 0.0625 to 0.001 resolution */
	return reg * 125 / 2;
}

/* sysfs stuff */

/* read routines for temperature limits */
#define show(value)	\
static ssize_t show_##value(struct device *dev,				\
			    struct device_attribute *attr,		\
			    char *buf)					\
{									\
	struct jc42_data *data = jc42_update_device(dev);		\
	if (IS_ERR(data))						\
		return PTR_ERR(data);					\
	return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value));	\
}

show(temp_input);
show(temp_crit);
show(temp_min);
show(temp_max);

/* read routines for hysteresis values */
static ssize_t show_temp_crit_hyst(struct device *dev,
				   struct device_attribute *attr, char *buf)
{
	struct jc42_data *data = jc42_update_device(dev);
	int temp, hyst;

	if (IS_ERR(data))
		return PTR_ERR(data);

	temp = jc42_temp_from_reg(data->temp_crit);
	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
			       >> JC42_CFG_HYST_SHIFT];
	return sprintf(buf, "%d\n", temp - hyst);
}

static ssize_t show_temp_max_hyst(struct device *dev,
				  struct device_attribute *attr, char *buf)
{
	struct jc42_data *data = jc42_update_device(dev);
	int temp, hyst;

	if (IS_ERR(data))
		return PTR_ERR(data);

	temp = jc42_temp_from_reg(data->temp_max);
	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
			       >> JC42_CFG_HYST_SHIFT];
	return sprintf(buf, "%d\n", temp - hyst);
}

/* write routines */
#define set(value, reg)	\
static ssize_t set_##value(struct device *dev,				\
			   struct device_attribute *attr,		\
			   const char *buf, size_t count)		\
{									\
	struct i2c_client *client = to_i2c_client(dev);			\
	struct jc42_data *data = i2c_get_clientdata(client);		\
	int err, ret = count;						\
	long val;							\
	if (kstrtol(buf, 10, &val) < 0)				\
		return -EINVAL;						\
	mutex_lock(&data->update_lock);					\
	data->value = jc42_temp_to_reg(val, data->extended);		\
	err = i2c_smbus_write_word_swapped(client, reg, data->value);	\
	if (err < 0)							\
		ret = err;						\
	mutex_unlock(&data->update_lock);				\
	return ret;							\
}

set(temp_min, JC42_REG_TEMP_LOWER);
set(temp_max, JC42_REG_TEMP_UPPER);
set(temp_crit, JC42_REG_TEMP_CRITICAL);

/*
 * JC42.4 compliant chips only support four hysteresis values.
 * Pick best choice and go from there.
 */
static ssize_t set_temp_crit_hyst(struct device *dev,
				  struct device_attribute *attr,
				  const char *buf, size_t count)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);
	unsigned long val;
	int diff, hyst;
	int err;
	int ret = count;

	if (kstrtoul(buf, 10, &val) < 0)
		return -EINVAL;

	diff = jc42_temp_from_reg(data->temp_crit) - val;
	hyst = 0;
	if (diff > 0) {
		if (diff < 2250)
			hyst = 1;	/* 1.5 degrees C */
		else if (diff < 4500)
			hyst = 2;	/* 3.0 degrees C */
		else
			hyst = 3;	/* 6.0 degrees C */
	}

	mutex_lock(&data->update_lock);
	data->config = (data->config & ~JC42_CFG_HYST_MASK)
	  | (hyst << JC42_CFG_HYST_SHIFT);
	err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG,
					   data->config);
	if (err < 0)
		ret = err;
	mutex_unlock(&data->update_lock);
	return ret;
}

static ssize_t show_alarm(struct device *dev,
			  struct device_attribute *attr, char *buf)
{
	u16 bit = to_sensor_dev_attr(attr)->index;
	struct jc42_data *data = jc42_update_device(dev);
	u16 val;

	if (IS_ERR(data))
		return PTR_ERR(data);

	val = data->temp_input;
	if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
		val = 0;
	return sprintf(buf, "%u\n", (val >> bit) & 1);
}

static DEVICE_ATTR(temp1_input, S_IRUGO,
		   show_temp_input, NULL);
static DEVICE_ATTR(temp1_crit, S_IRUGO,
		   show_temp_crit, set_temp_crit);
static DEVICE_ATTR(temp1_min, S_IRUGO,
		   show_temp_min, set_temp_min);
static DEVICE_ATTR(temp1_max, S_IRUGO,
		   show_temp_max, set_temp_max);

static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
		   show_temp_crit_hyst, set_temp_crit_hyst);
static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
		   show_temp_max_hyst, NULL);

static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
			  JC42_ALARM_CRIT_BIT);
static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
			  JC42_ALARM_MIN_BIT);
static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
			  JC42_ALARM_MAX_BIT);

static struct attribute *jc42_attributes[] = {
	&dev_attr_temp1_input.attr,
	&dev_attr_temp1_crit.attr,
	&dev_attr_temp1_min.attr,
	&dev_attr_temp1_max.attr,
	&dev_attr_temp1_crit_hyst.attr,
	&dev_attr_temp1_max_hyst.attr,
	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
	NULL
};

static umode_t jc42_attribute_mode(struct kobject *kobj,
				  struct attribute *attr, int index)
{
	struct device *dev = container_of(kobj, struct device, kobj);
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);
	unsigned int config = data->config;
	bool readonly;

	if (attr == &dev_attr_temp1_crit.attr)
		readonly = config & JC42_CFG_TCRIT_LOCK;
	else if (attr == &dev_attr_temp1_min.attr ||
		 attr == &dev_attr_temp1_max.attr)
		readonly = config & JC42_CFG_EVENT_LOCK;
	else if (attr == &dev_attr_temp1_crit_hyst.attr)
		readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
	else
		readonly = true;

	return S_IRUGO | (readonly ? 0 : S_IWUSR);
}

static const struct attribute_group jc42_group = {
	.attrs = jc42_attributes,
	.is_visible = jc42_attribute_mode,
};

/* Return 0 if detection is successful, -ENODEV otherwise */
static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
{
	struct i2c_adapter *adapter = client->adapter;
	int i, config, cap, manid, devid;

	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
				     I2C_FUNC_SMBUS_WORD_DATA))
		return -ENODEV;

	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
	manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
	devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);

	if (cap < 0 || config < 0 || manid < 0 || devid < 0)
		return -ENODEV;

	if ((cap & 0xff00) || (config & 0xf800))
		return -ENODEV;

	for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
		struct jc42_chips *chip = &jc42_chips[i];
		if (manid == chip->manid &&
		    (devid & chip->devid_mask) == chip->devid) {
			strlcpy(info->type, "jc42", I2C_NAME_SIZE);
			return 0;
		}
	}
	return -ENODEV;
}

static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
	struct jc42_data *data;
	int config, cap, err;
	struct device *dev = &client->dev;

	data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	i2c_set_clientdata(client, data);
	mutex_init(&data->update_lock);

	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
	if (cap < 0)
		return cap;

	data->extended = !!(cap & JC42_CAP_RANGE);

	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
	if (config < 0)
		return config;

	data->orig_config = config;
	if (config & JC42_CFG_SHUTDOWN) {
		config &= ~JC42_CFG_SHUTDOWN;
		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
	}
	data->config = config;

	/* Register sysfs hooks */
	err = sysfs_create_group(&dev->kobj, &jc42_group);
	if (err)
		return err;

	data->hwmon_dev = hwmon_device_register(dev);
	if (IS_ERR(data->hwmon_dev)) {
		err = PTR_ERR(data->hwmon_dev);
		goto exit_remove;
	}

	return 0;

exit_remove:
	sysfs_remove_group(&dev->kobj, &jc42_group);
	return err;
}

static int jc42_remove(struct i2c_client *client)
{
	struct jc42_data *data = i2c_get_clientdata(client);
	hwmon_device_unregister(data->hwmon_dev);
	sysfs_remove_group(&client->dev.kobj, &jc42_group);

	/* Restore original configuration except hysteresis */
	if ((data->config & ~JC42_CFG_HYST_MASK) !=
	    (data->orig_config & ~JC42_CFG_HYST_MASK)) {
		int config;

		config = (data->orig_config & ~JC42_CFG_HYST_MASK)
		  | (data->config & JC42_CFG_HYST_MASK);
		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
	}
	return 0;
}

static struct jc42_data *jc42_update_device(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct jc42_data *data = i2c_get_clientdata(client);
	struct jc42_data *ret = data;
	int val;

	mutex_lock(&data->update_lock);

	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
		val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
		if (val < 0) {
			ret = ERR_PTR(val);
			goto abort;
		}
		data->temp_input = val;

		val = i2c_smbus_read_word_swapped(client,
						  JC42_REG_TEMP_CRITICAL);
		if (val < 0) {
			ret = ERR_PTR(val);
			goto abort;
		}
		data->temp_crit = val;

		val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
		if (val < 0) {
			ret = ERR_PTR(val);
			goto abort;
		}
		data->temp_min = val;

		val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
		if (val < 0) {
			ret = ERR_PTR(val);
			goto abort;
		}
		data->temp_max = val;

		data->last_updated = jiffies;
		data->valid = true;
	}
abort:
	mutex_unlock(&data->update_lock);
	return ret;
}

module_i2c_driver(jc42_driver);

MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
MODULE_DESCRIPTION("JC42 driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
4453d736 GR	1	/*
	2	* jc42.c - driver for Jedec JC42.4 compliant temperature sensors
	3	*
	4	* Copyright (c) 2010 Ericsson AB.
	5	*
	6	* Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
	7	*
	8	* JC42.4 compliant temperature sensors are typically used on memory modules.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	23	*/
	24
	25	#include <linux/module.h>
	26	#include <linux/init.h>
	27	#include <linux/slab.h>
	28	#include <linux/jiffies.h>
	29	#include <linux/i2c.h>
	30	#include <linux/hwmon.h>
	31	#include <linux/hwmon-sysfs.h>
	32	#include <linux/err.h>
	33	#include <linux/mutex.h>
	34
	35	/* Addresses to scan */
	36	static const unsigned short normal_i2c[] = {
	37	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
	38
	39	/* JC42 registers. All registers are 16 bit. */
	40	#define JC42_REG_CAP 0x00
	41	#define JC42_REG_CONFIG 0x01
	42	#define JC42_REG_TEMP_UPPER 0x02
	43	#define JC42_REG_TEMP_LOWER 0x03
	44	#define JC42_REG_TEMP_CRITICAL 0x04
	45	#define JC42_REG_TEMP 0x05
	46	#define JC42_REG_MANID 0x06
	47	#define JC42_REG_DEVICEID 0x07
	48
	49	/* Status bits in temperature register */
	50	#define JC42_ALARM_CRIT_BIT 15
	51	#define JC42_ALARM_MAX_BIT 14
	52	#define JC42_ALARM_MIN_BIT 13
	53
	54	/* Configuration register defines */
	55	#define JC42_CFG_CRIT_ONLY (1 << 2)
2c6315da CL	56	#define JC42_CFG_TCRIT_LOCK (1 << 6)
2c6315da CL	57	#define JC42_CFG_EVENT_LOCK (1 << 7)
4453d736 GR	58	#define JC42_CFG_SHUTDOWN (1 << 8)
4453d736 GR	59	#define JC42_CFG_HYST_SHIFT 9
2ccc8731	60	#define JC42_CFG_HYST_MASK (0x03 << 9)
4453d736 GR	61
	62	/* Capabilities */
	63	#define JC42_CAP_RANGE (1 << 2)
	64
	65	/* Manufacturer IDs */
	66	#define ADT_MANID 0x11d4 /* Analog Devices */
1bd612a2	67	#define ATMEL_MANID 0x001f /* Atmel */
4453d736 GR	68	#define MAX_MANID 0x004d /* Maxim */
	69	#define IDT_MANID 0x00b3 /* IDT */
	70	#define MCP_MANID 0x0054 /* Microchip */
	71	#define NXP_MANID 0x1131 /* NXP Semiconductors */
	72	#define ONS_MANID 0x1b09 /* ON Semiconductor */
	73	#define STM_MANID 0x104a /* ST Microelectronics */
	74
	75	/* Supported chips */
	76
	77	/* Analog Devices */
	78	#define ADT7408_DEVID 0x0801
	79	#define ADT7408_DEVID_MASK 0xffff
	80
1bd612a2 GR	81	/* Atmel */
	82	#define AT30TS00_DEVID 0x8201
	83	#define AT30TS00_DEVID_MASK 0xffff
	84
4453d736 GR	85	/* IDT */
	86	#define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
	87	#define TS3000B3_DEVID_MASK 0xffff
	88
1bd612a2 GR	89	#define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
	90	#define TS3000GB2_DEVID_MASK 0xffff
	91
4453d736 GR	92	/* Maxim */
	93	#define MAX6604_DEVID 0x3e00
	94	#define MAX6604_DEVID_MASK 0xffff
	95
	96	/* Microchip */
1bd612a2 GR	97	#define MCP9804_DEVID 0x0200
	98	#define MCP9804_DEVID_MASK 0xfffc
	99
4453d736 GR	100	#define MCP98242_DEVID 0x2000
	101	#define MCP98242_DEVID_MASK 0xfffc
	102
	103	#define MCP98243_DEVID 0x2100
	104	#define MCP98243_DEVID_MASK 0xfffc
	105
d4768280 GR	106	#define MCP98244_DEVID 0x2200
	107	#define MCP98244_DEVID_MASK 0xfffc
	108
4453d736 GR	109	#define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
	110	#define MCP9843_DEVID_MASK 0xfffe
	111
	112	/* NXP */
	113	#define SE97_DEVID 0xa200
	114	#define SE97_DEVID_MASK 0xfffc
	115
	116	#define SE98_DEVID 0xa100
	117	#define SE98_DEVID_MASK 0xfffc
	118
	119	/* ON Semiconductor */
	120	#define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
	121	#define CAT6095_DEVID_MASK 0xffe0
	122
	123	/* ST Microelectronics */
	124	#define STTS424_DEVID 0x0101
	125	#define STTS424_DEVID_MASK 0xffff
	126
	127	#define STTS424E_DEVID 0x0000
	128	#define STTS424E_DEVID_MASK 0xfffe
	129
4de86126 JD	130	#define STTS2002_DEVID 0x0300
	131	#define STTS2002_DEVID_MASK 0xffff
	132
	133	#define STTS3000_DEVID 0x0200
	134	#define STTS3000_DEVID_MASK 0xffff
	135
4453d736 GR	136	static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
	137
	138	struct jc42_chips {
	139	u16 manid;
	140	u16 devid;
	141	u16 devid_mask;
	142	};
	143
	144	static struct jc42_chips jc42_chips[] = {
	145	{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
1bd612a2	146	{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
4453d736	147	{ IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
1bd612a2	148	{ IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
4453d736	149	{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
1bd612a2	150	{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
4453d736 GR	151	{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
4453d736 GR	152	{ MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
d4768280	153	{ MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
4453d736 GR	154	{ MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
	155	{ NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
	156	{ ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
	157	{ NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
	158	{ STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
	159	{ STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
4de86126 JD	160	{ STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
4de86126 JD	161	{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
4453d736 GR	162	};
	163
	164	/* Each client has this additional data */
	165	struct jc42_data {
	166	struct device *hwmon_dev;
	167	struct mutex update_lock; /* protect register access */
	168	bool extended; /* true if extended range supported */
	169	bool valid;
	170	unsigned long last_updated; /* In jiffies */
	171	u16 orig_config; /* original configuration */
	172	u16 config; /* current configuration */
	173	u16 temp_input; /* Temperatures */
	174	u16 temp_crit;
	175	u16 temp_min;
	176	u16 temp_max;
	177	};
	178
	179	static int jc42_probe(struct i2c_client *client,
	180	const struct i2c_device_id *id);
	181	static int jc42_detect(struct i2c_client client, struct i2c_board_info info);
	182	static int jc42_remove(struct i2c_client *client);
4453d736 GR	183
	184	static struct jc42_data jc42_update_device(struct device dev);
	185
	186	static const struct i2c_device_id jc42_id[] = {
4453d736	187	{ "jc42", 0 },
4453d736 GR	188	{ }
	189	};
	190	MODULE_DEVICE_TABLE(i2c, jc42_id);
	191
	192	#ifdef CONFIG_PM
	193
	194	static int jc42_suspend(struct device *dev)
	195	{
	196	struct i2c_client *client = to_i2c_client(dev);
	197	struct jc42_data *data = i2c_get_clientdata(client);
	198
	199	data->config \|= JC42_CFG_SHUTDOWN;
90f4102c	200	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
4453d736 GR	201	return 0;
	202	}
	203
	204	static int jc42_resume(struct device *dev)
	205	{
	206	struct i2c_client *client = to_i2c_client(dev);
	207	struct jc42_data *data = i2c_get_clientdata(client);
	208
	209	data->config &= ~JC42_CFG_SHUTDOWN;
90f4102c	210	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
4453d736 GR	211	return 0;
	212	}
	213
	214	static const struct dev_pm_ops jc42_dev_pm_ops = {
	215	.suspend = jc42_suspend,
	216	.resume = jc42_resume,
	217	};
	218
	219	#define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
	220	#else
	221	#define JC42_DEV_PM_OPS NULL
	222	#endif /* CONFIG_PM */
	223
	224	/* This is the driver that will be inserted */
	225	static struct i2c_driver jc42_driver = {
774466ad	226	.class = I2C_CLASS_SPD,
4453d736 GR	227	.driver = {
	228	.name = "jc42",
	229	.pm = JC42_DEV_PM_OPS,
	230	},
	231	.probe = jc42_probe,
	232	.remove = jc42_remove,
	233	.id_table = jc42_id,
	234	.detect = jc42_detect,
	235	.address_list = normal_i2c,
	236	};
	237
	238	#define JC42_TEMP_MIN_EXTENDED (-40000)
	239	#define JC42_TEMP_MIN 0
	240	#define JC42_TEMP_MAX 125000
	241
	242	static u16 jc42_temp_to_reg(int temp, bool extended)
	243	{
2a844c14 GR	244	int ntemp = clamp_val(temp,
	245	extended ? JC42_TEMP_MIN_EXTENDED :
	246	JC42_TEMP_MIN, JC42_TEMP_MAX);
4453d736 GR	247
	248	/* convert from 0.001 to 0.0625 resolution */
	249	return (ntemp * 2 / 125) & 0x1fff;
	250	}
	251
	252	static int jc42_temp_from_reg(s16 reg)
	253	{
	254	reg &= 0x1fff;
	255
	256	/* sign extend register */
	257	if (reg & 0x1000)
	258	reg \|= 0xf000;
	259
	260	/* convert from 0.0625 to 0.001 resolution */
	261	return reg * 125 / 2;
	262	}
	263
	264	/* sysfs stuff */
	265
	266	/* read routines for temperature limits */
	267	#define show(value) \
	268	static ssize_t show_##value(struct device *dev, \
	269	struct device_attribute *attr, \
	270	char *buf) \
	271	{ \
	272	struct jc42_data *data = jc42_update_device(dev); \
	273	if (IS_ERR(data)) \
	274	return PTR_ERR(data); \
	275	return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \
	276	}
	277
	278	show(temp_input);
	279	show(temp_crit);
	280	show(temp_min);
	281	show(temp_max);
	282
	283	/* read routines for hysteresis values */
	284	static ssize_t show_temp_crit_hyst(struct device *dev,
	285	struct device_attribute attr, char buf)
	286	{
	287	struct jc42_data *data = jc42_update_device(dev);
	288	int temp, hyst;
	289
	290	if (IS_ERR(data))
	291	return PTR_ERR(data);
	292
	293	temp = jc42_temp_from_reg(data->temp_crit);
2ccc8731 JD	294	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
2ccc8731 JD	295	>> JC42_CFG_HYST_SHIFT];
4453d736 GR	296	return sprintf(buf, "%d\n", temp - hyst);
	297	}
	298
	299	static ssize_t show_temp_max_hyst(struct device *dev,
	300	struct device_attribute attr, char buf)
	301	{
	302	struct jc42_data *data = jc42_update_device(dev);
	303	int temp, hyst;
	304
	305	if (IS_ERR(data))
	306	return PTR_ERR(data);
	307
	308	temp = jc42_temp_from_reg(data->temp_max);
2ccc8731 JD	309	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
2ccc8731 JD	310	>> JC42_CFG_HYST_SHIFT];
4453d736 GR	311	return sprintf(buf, "%d\n", temp - hyst);
	312	}
	313
	314	/* write routines */
	315	#define set(value, reg) \
	316	static ssize_t set_##value(struct device *dev, \
	317	struct device_attribute *attr, \
	318	const char *buf, size_t count) \
	319	{ \
	320	struct i2c_client *client = to_i2c_client(dev); \
	321	struct jc42_data *data = i2c_get_clientdata(client); \
	322	int err, ret = count; \
	323	long val; \
179c4fdb	324	if (kstrtol(buf, 10, &val) < 0) \
4453d736 GR	325	return -EINVAL; \
	326	mutex_lock(&data->update_lock); \
	327	data->value = jc42_temp_to_reg(val, data->extended); \
90f4102c	328	err = i2c_smbus_write_word_swapped(client, reg, data->value); \
4453d736 GR	329	if (err < 0) \
	330	ret = err; \
	331	mutex_unlock(&data->update_lock); \
	332	return ret; \
	333	}
	334
	335	set(temp_min, JC42_REG_TEMP_LOWER);
	336	set(temp_max, JC42_REG_TEMP_UPPER);
	337	set(temp_crit, JC42_REG_TEMP_CRITICAL);
	338
5d577dba GR	339	/*
	340	* JC42.4 compliant chips only support four hysteresis values.
	341	* Pick best choice and go from there.
	342	*/
4453d736 GR	343	static ssize_t set_temp_crit_hyst(struct device *dev,
	344	struct device_attribute *attr,
	345	const char *buf, size_t count)
	346	{
	347	struct i2c_client *client = to_i2c_client(dev);
	348	struct jc42_data *data = i2c_get_clientdata(client);
e8667296	349	unsigned long val;
4453d736 GR	350	int diff, hyst;
	351	int err;
	352	int ret = count;
	353
179c4fdb	354	if (kstrtoul(buf, 10, &val) < 0)
4453d736 GR	355	return -EINVAL;
	356
	357	diff = jc42_temp_from_reg(data->temp_crit) - val;
	358	hyst = 0;
	359	if (diff > 0) {
	360	if (diff < 2250)
	361	hyst = 1; /* 1.5 degrees C */
	362	else if (diff < 4500)
	363	hyst = 2; /* 3.0 degrees C */
	364	else
	365	hyst = 3; /* 6.0 degrees C */
	366	}
	367
	368	mutex_lock(&data->update_lock);
2ccc8731	369	data->config = (data->config & ~JC42_CFG_HYST_MASK)
4453d736	370	\| (hyst << JC42_CFG_HYST_SHIFT);
90f4102c JD	371	err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG,
90f4102c JD	372	data->config);
4453d736 GR	373	if (err < 0)
	374	ret = err;
	375	mutex_unlock(&data->update_lock);
	376	return ret;
	377	}
	378
	379	static ssize_t show_alarm(struct device *dev,
	380	struct device_attribute attr, char buf)
	381	{
	382	u16 bit = to_sensor_dev_attr(attr)->index;
	383	struct jc42_data *data = jc42_update_device(dev);
	384	u16 val;
	385
	386	if (IS_ERR(data))
	387	return PTR_ERR(data);
	388
	389	val = data->temp_input;
	390	if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
	391	val = 0;
	392	return sprintf(buf, "%u\n", (val >> bit) & 1);
	393	}
	394
	395	static DEVICE_ATTR(temp1_input, S_IRUGO,
	396	show_temp_input, NULL);
2c6315da	397	static DEVICE_ATTR(temp1_crit, S_IRUGO,
4453d736	398	show_temp_crit, set_temp_crit);
2c6315da	399	static DEVICE_ATTR(temp1_min, S_IRUGO,
4453d736	400	show_temp_min, set_temp_min);
2c6315da	401	static DEVICE_ATTR(temp1_max, S_IRUGO,
4453d736 GR	402	show_temp_max, set_temp_max);
4453d736 GR	403
2c6315da	404	static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
4453d736 GR	405	show_temp_crit_hyst, set_temp_crit_hyst);
	406	static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
	407	show_temp_max_hyst, NULL);
	408
	409	static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
	410	JC42_ALARM_CRIT_BIT);
	411	static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
	412	JC42_ALARM_MIN_BIT);
	413	static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
	414	JC42_ALARM_MAX_BIT);
	415
	416	static struct attribute *jc42_attributes[] = {
	417	&dev_attr_temp1_input.attr,
	418	&dev_attr_temp1_crit.attr,
	419	&dev_attr_temp1_min.attr,
	420	&dev_attr_temp1_max.attr,
	421	&dev_attr_temp1_crit_hyst.attr,
	422	&dev_attr_temp1_max_hyst.attr,
	423	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
	424	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
	425	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
	426	NULL
	427	};
	428
587a1f16	429	static umode_t jc42_attribute_mode(struct kobject *kobj,
2c6315da CL	430	struct attribute *attr, int index)
	431	{
	432	struct device *dev = container_of(kobj, struct device, kobj);
	433	struct i2c_client *client = to_i2c_client(dev);
	434	struct jc42_data *data = i2c_get_clientdata(client);
	435	unsigned int config = data->config;
	436	bool readonly;
	437
	438	if (attr == &dev_attr_temp1_crit.attr)
	439	readonly = config & JC42_CFG_TCRIT_LOCK;
	440	else if (attr == &dev_attr_temp1_min.attr \|\|
	441	attr == &dev_attr_temp1_max.attr)
	442	readonly = config & JC42_CFG_EVENT_LOCK;
	443	else if (attr == &dev_attr_temp1_crit_hyst.attr)
	444	readonly = config & (JC42_CFG_EVENT_LOCK \| JC42_CFG_TCRIT_LOCK);
	445	else
	446	readonly = true;
	447
	448	return S_IRUGO \| (readonly ? 0 : S_IWUSR);
	449	}
	450
4453d736 GR	451	static const struct attribute_group jc42_group = {
4453d736 GR	452	.attrs = jc42_attributes,
2c6315da	453	.is_visible = jc42_attribute_mode,
4453d736 GR	454	};
	455
	456	/* Return 0 if detection is successful, -ENODEV otherwise */
f15df57d	457	static int jc42_detect(struct i2c_client client, struct i2c_board_info info)
4453d736	458	{
f15df57d	459	struct i2c_adapter *adapter = client->adapter;
4453d736 GR	460	int i, config, cap, manid, devid;
	461
	462	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA \|
	463	I2C_FUNC_SMBUS_WORD_DATA))
	464	return -ENODEV;
	465
f15df57d GR	466	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
	467	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
	468	manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
	469	devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
4453d736 GR	470
	471	if (cap < 0 \|\| config < 0 \|\| manid < 0 \|\| devid < 0)
	472	return -ENODEV;
	473
	474	if ((cap & 0xff00) \|\| (config & 0xf800))
	475	return -ENODEV;
	476
	477	for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
	478	struct jc42_chips *chip = &jc42_chips[i];
	479	if (manid == chip->manid &&
	480	(devid & chip->devid_mask) == chip->devid) {
	481	strlcpy(info->type, "jc42", I2C_NAME_SIZE);
	482	return 0;
	483	}
	484	}
	485	return -ENODEV;
	486	}
	487
f15df57d	488	static int jc42_probe(struct i2c_client client, const struct i2c_device_id id)
4453d736 GR	489	{
	490	struct jc42_data *data;
	491	int config, cap, err;
f15df57d	492	struct device *dev = &client->dev;
4453d736	493
f15df57d GR	494	data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
	495	if (!data)
	496	return -ENOMEM;
4453d736	497
f15df57d	498	i2c_set_clientdata(client, data);
4453d736 GR	499	mutex_init(&data->update_lock);
4453d736 GR	500
f15df57d GR	501	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
	502	if (cap < 0)
	503	return cap;
	504
4453d736 GR	505	data->extended = !!(cap & JC42_CAP_RANGE);
4453d736 GR	506
f15df57d GR	507	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
	508	if (config < 0)
	509	return config;
	510
4453d736 GR	511	data->orig_config = config;
	512	if (config & JC42_CFG_SHUTDOWN) {
	513	config &= ~JC42_CFG_SHUTDOWN;
f15df57d	514	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
4453d736 GR	515	}
	516	data->config = config;
	517
	518	/* Register sysfs hooks */
f15df57d	519	err = sysfs_create_group(&dev->kobj, &jc42_group);
4453d736	520	if (err)
f15df57d	521	return err;
4453d736	522
f15df57d	523	data->hwmon_dev = hwmon_device_register(dev);
4453d736 GR	524	if (IS_ERR(data->hwmon_dev)) {
	525	err = PTR_ERR(data->hwmon_dev);
	526	goto exit_remove;
	527	}
	528
	529	return 0;
	530
	531	exit_remove:
f15df57d	532	sysfs_remove_group(&dev->kobj, &jc42_group);
4453d736 GR	533	return err;
	534	}
	535
	536	static int jc42_remove(struct i2c_client *client)
	537	{
	538	struct jc42_data *data = i2c_get_clientdata(client);
	539	hwmon_device_unregister(data->hwmon_dev);
	540	sysfs_remove_group(&client->dev.kobj, &jc42_group);
5953e276 JD	541
	542	/* Restore original configuration except hysteresis */
	543	if ((data->config & ~JC42_CFG_HYST_MASK) !=
	544	(data->orig_config & ~JC42_CFG_HYST_MASK)) {
	545	int config;
	546
	547	config = (data->orig_config & ~JC42_CFG_HYST_MASK)
	548	\| (data->config & JC42_CFG_HYST_MASK);
	549	i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
	550	}
4453d736 GR	551	return 0;
	552	}
	553
4453d736 GR	554	static struct jc42_data jc42_update_device(struct device dev)
	555	{
	556	struct i2c_client *client = to_i2c_client(dev);
	557	struct jc42_data *data = i2c_get_clientdata(client);
	558	struct jc42_data *ret = data;
	559	int val;
	560
	561	mutex_lock(&data->update_lock);
	562
	563	if (time_after(jiffies, data->last_updated + HZ) \|\| !data->valid) {
90f4102c	564	val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
4453d736 GR	565	if (val < 0) {
	566	ret = ERR_PTR(val);
	567	goto abort;
	568	}
	569	data->temp_input = val;
	570
90f4102c JD	571	val = i2c_smbus_read_word_swapped(client,
90f4102c JD	572	JC42_REG_TEMP_CRITICAL);
4453d736 GR	573	if (val < 0) {
	574	ret = ERR_PTR(val);
	575	goto abort;
	576	}
	577	data->temp_crit = val;
	578
90f4102c	579	val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
4453d736 GR	580	if (val < 0) {
	581	ret = ERR_PTR(val);
	582	goto abort;
	583	}
	584	data->temp_min = val;
	585
90f4102c	586	val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
4453d736 GR	587	if (val < 0) {
	588	ret = ERR_PTR(val);
	589	goto abort;
	590	}
	591	data->temp_max = val;
	592
	593	data->last_updated = jiffies;
	594	data->valid = true;
	595	}
	596	abort:
	597	mutex_unlock(&data->update_lock);
	598	return ret;
	599	}
	600
f0967eea	601	module_i2c_driver(jc42_driver);
4453d736	602
bb9a80e5	603	MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4453d736 GR	604	MODULE_DESCRIPTION("JC42 driver");
4453d736 GR	605	MODULE_LICENSE("GPL");