projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
hwmon: (max6697) fix MAX6581 ideality
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / fschmd.c
CommitLineData
525ad373
GR		 1/*
2 * fschmd.c
569ff102 3 *
c69ab2b7 4 * Copyright (C) 2007 - 2009 Hans de Goede <hdegoede@redhat.com>
569ff102
HG		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21/*
22 * Merged Fujitsu Siemens hwmon driver, supporting the Poseidon, Hermes,
de15f093 23 * Scylla, Heracles, Heimdall, Hades and Syleus chips
569ff102
HG		 24 *
25 * Based on the original 2.4 fscscy, 2.6 fscpos, 2.6 fscher and 2.6
26 * (candidate) fschmd drivers:
27 * Copyright (C) 2006 Thilo Cestonaro
28 * <thilo.cestonaro.external@fujitsu-siemens.com>
29 * Copyright (C) 2004, 2005 Stefan Ott <stefan@desire.ch>
30 * Copyright (C) 2003, 2004 Reinhard Nissl <rnissl@gmx.de>
31 * Copyright (c) 2001 Martin Knoblauch <mkn@teraport.de, knobi@knobisoft.de>
32 * Copyright (C) 2000 Hermann Jung <hej@odn.de>
33 */
34
35#include <linux/module.h>
36#include <linux/init.h>
37#include <linux/slab.h>
38#include <linux/jiffies.h>
39#include <linux/i2c.h>
40#include <linux/hwmon.h>
41#include <linux/hwmon-sysfs.h>
42#include <linux/err.h>
43#include <linux/mutex.h>
44#include <linux/sysfs.h>
7845cd79 45#include <linux/dmi.h>
97950c3d
HG		 46#include <linux/fs.h>
47#include <linux/watchdog.h>
48#include <linux/miscdevice.h>
49#include <linux/uaccess.h>
50#include <linux/kref.h>
569ff102
HG		 51
52/* Addresses to scan */
25e9c86d 53static const unsigned short normal_i2c[] = { 0x73, I2C_CLIENT_END };
569ff102
HG		 54
55/* Insmod parameters */
86a1e189
WVS		 56static bool nowayout = WATCHDOG_NOWAYOUT;
57module_param(nowayout, bool, 0);
97950c3d
HG		 58MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
59 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
e5e9f44c
JD		 60
61enum chips { fscpos, fscher, fscscy, fschrc, fschmd, fschds, fscsyl };
569ff102
HG		 62
63/*
64 * The FSCHMD registers and other defines
65 */
66
67/* chip identification */
68#define FSCHMD_REG_IDENT_0 0x00
69#define FSCHMD_REG_IDENT_1 0x01
70#define FSCHMD_REG_IDENT_2 0x02
71#define FSCHMD_REG_REVISION 0x03
72
73/* global control and status */
74#define FSCHMD_REG_EVENT_STATE 0x04
75#define FSCHMD_REG_CONTROL 0x05
76
453e308d 77#define FSCHMD_CONTROL_ALERT_LED 0x01
569ff102 78
97950c3d 79/* watchdog */
525ad373
GR		 80static const u8 FSCHMD_REG_WDOG_CONTROL[7] = {
81 0x21, 0x21, 0x21, 0x21, 0x21, 0x28, 0x28 };
82static const u8 FSCHMD_REG_WDOG_STATE[7] = {
83 0x23, 0x23, 0x23, 0x23, 0x23, 0x29, 0x29 };
84static const u8 FSCHMD_REG_WDOG_PRESET[7] = {
85 0x28, 0x28, 0x28, 0x28, 0x28, 0x2a, 0x2a };
569ff102 86
97950c3d
HG		 87#define FSCHMD_WDOG_CONTROL_TRIGGER 0x10
88#define FSCHMD_WDOG_CONTROL_STARTED 0x10 /* the same as trigger */
89#define FSCHMD_WDOG_CONTROL_STOP 0x20
90#define FSCHMD_WDOG_CONTROL_RESOLUTION 0x40
91
92#define FSCHMD_WDOG_STATE_CARDRESET 0x02
93
569ff102 94/* voltages, weird order is to keep the same order as the old drivers */
de15f093 95static const u8 FSCHMD_REG_VOLT[7][6] = {
c69ab2b7
HG		 96 { 0x45, 0x42, 0x48 }, /* pos */
97 { 0x45, 0x42, 0x48 }, /* her */
98 { 0x45, 0x42, 0x48 }, /* scy */
99 { 0x45, 0x42, 0x48 }, /* hrc */
100 { 0x45, 0x42, 0x48 }, /* hmd */
de15f093 101 { 0x21, 0x20, 0x22 }, /* hds */
c69ab2b7
HG		 102 { 0x21, 0x20, 0x22, 0x23, 0x24, 0x25 }, /* syl */
103};
104
de15f093 105static const int FSCHMD_NO_VOLT_SENSORS[7] = { 3, 3, 3, 3, 3, 3, 6 };
569ff102 106
525ad373
GR		 107/*
108 * minimum pwm at which the fan is driven (pwm can by increased depending on
109 * the temp. Notice that for the scy some fans share there minimum speed.
110 * Also notice that with the scy the sensor order is different than with the
111 * other chips, this order was in the 2.4 driver and kept for consistency.
112 */
de15f093 113static const u8 FSCHMD_REG_FAN_MIN[7][7] = {
569ff102
HG		 114 { 0x55, 0x65 }, /* pos */
115 { 0x55, 0x65, 0xb5 }, /* her */
116 { 0x65, 0x65, 0x55, 0xa5, 0x55, 0xa5 }, /* scy */
117 { 0x55, 0x65, 0xa5, 0xb5 }, /* hrc */
118 { 0x55, 0x65, 0xa5, 0xb5, 0xc5 }, /* hmd */
de15f093 119 { 0x55, 0x65, 0xa5, 0xb5, 0xc5 }, /* hds */
c69ab2b7 120 { 0x54, 0x64, 0x74, 0x84, 0x94, 0xa4, 0xb4 }, /* syl */
569ff102
HG		 121};
122
123/* actual fan speed */
de15f093 124static const u8 FSCHMD_REG_FAN_ACT[7][7] = {
569ff102
HG		 125 { 0x0e, 0x6b, 0xab }, /* pos */
126 { 0x0e, 0x6b, 0xbb }, /* her */
127 { 0x6b, 0x6c, 0x0e, 0xab, 0x5c, 0xbb }, /* scy */
128 { 0x0e, 0x6b, 0xab, 0xbb }, /* hrc */
129 { 0x5b, 0x6b, 0xab, 0xbb, 0xcb }, /* hmd */
de15f093 130 { 0x5b, 0x6b, 0xab, 0xbb, 0xcb }, /* hds */
c69ab2b7 131 { 0x57, 0x67, 0x77, 0x87, 0x97, 0xa7, 0xb7 }, /* syl */
569ff102
HG		 132};
133
134/* fan status registers */
de15f093 135static const u8 FSCHMD_REG_FAN_STATE[7][7] = {
569ff102
HG		 136 { 0x0d, 0x62, 0xa2 }, /* pos */
137 { 0x0d, 0x62, 0xb2 }, /* her */
138 { 0x62, 0x61, 0x0d, 0xa2, 0x52, 0xb2 }, /* scy */
139 { 0x0d, 0x62, 0xa2, 0xb2 }, /* hrc */
140 { 0x52, 0x62, 0xa2, 0xb2, 0xc2 }, /* hmd */
de15f093 141 { 0x52, 0x62, 0xa2, 0xb2, 0xc2 }, /* hds */
c69ab2b7 142 { 0x50, 0x60, 0x70, 0x80, 0x90, 0xa0, 0xb0 }, /* syl */
569ff102
HG		 143};
144
145/* fan ripple / divider registers */
de15f093 146static const u8 FSCHMD_REG_FAN_RIPPLE[7][7] = {
569ff102
HG		 147 { 0x0f, 0x6f, 0xaf }, /* pos */
148 { 0x0f, 0x6f, 0xbf }, /* her */
149 { 0x6f, 0x6f, 0x0f, 0xaf, 0x0f, 0xbf }, /* scy */
150 { 0x0f, 0x6f, 0xaf, 0xbf }, /* hrc */
151 { 0x5f, 0x6f, 0xaf, 0xbf, 0xcf }, /* hmd */
de15f093 152 { 0x5f, 0x6f, 0xaf, 0xbf, 0xcf }, /* hds */
c69ab2b7 153 { 0x56, 0x66, 0x76, 0x86, 0x96, 0xa6, 0xb6 }, /* syl */
569ff102
HG		 154};
155
de15f093 156static const int FSCHMD_NO_FAN_SENSORS[7] = { 3, 3, 6, 4, 5, 5, 7 };
569ff102
HG		 157
158/* Fan status register bitmasks */
453e308d 159#define FSCHMD_FAN_ALARM 0x04 /* called fault by FSC! */
c69ab2b7
HG		 160#define FSCHMD_FAN_NOT_PRESENT 0x08
161#define FSCHMD_FAN_DISABLED 0x80
569ff102
HG		 162
163
164/* actual temperature registers */
de15f093 165static const u8 FSCHMD_REG_TEMP_ACT[7][11] = {
569ff102
HG		 166 { 0x64, 0x32, 0x35 }, /* pos */
167 { 0x64, 0x32, 0x35 }, /* her */
168 { 0x64, 0xD0, 0x32, 0x35 }, /* scy */
169 { 0x64, 0x32, 0x35 }, /* hrc */
170 { 0x70, 0x80, 0x90, 0xd0, 0xe0 }, /* hmd */
de15f093 171 { 0x70, 0x80, 0x90, 0xd0, 0xe0 }, /* hds */
c69ab2b7
HG		 172 { 0x58, 0x68, 0x78, 0x88, 0x98, 0xa8, /* syl */
173 0xb8, 0xc8, 0xd8, 0xe8, 0xf8 },
569ff102
HG		 174};
175
176/* temperature state registers */
de15f093 177static const u8 FSCHMD_REG_TEMP_STATE[7][11] = {
569ff102
HG		 178 { 0x71, 0x81, 0x91 }, /* pos */
179 { 0x71, 0x81, 0x91 }, /* her */
180 { 0x71, 0xd1, 0x81, 0x91 }, /* scy */
181 { 0x71, 0x81, 0x91 }, /* hrc */
7dcf9a31 182 { 0x71, 0x81, 0x91, 0xd1, 0xe1 }, /* hmd */
de15f093 183 { 0x71, 0x81, 0x91, 0xd1, 0xe1 }, /* hds */
c69ab2b7
HG		 184 { 0x59, 0x69, 0x79, 0x89, 0x99, 0xa9, /* syl */
185 0xb9, 0xc9, 0xd9, 0xe9, 0xf9 },
569ff102
HG		 186};
187
525ad373
GR		 188/*
189 * temperature high limit registers, FSC does not document these. Proven to be
190 * there with field testing on the fscher and fschrc, already supported / used
191 * in the fscscy 2.4 driver. FSC has confirmed that the fschmd has registers
192 * at these addresses, but doesn't want to confirm they are the same as with
193 * the fscher??
194 */
de15f093 195static const u8 FSCHMD_REG_TEMP_LIMIT[7][11] = {
569ff102
HG		 196 { 0, 0, 0 }, /* pos */
197 { 0x76, 0x86, 0x96 }, /* her */
198 { 0x76, 0xd6, 0x86, 0x96 }, /* scy */
199 { 0x76, 0x86, 0x96 }, /* hrc */
7dcf9a31 200 { 0x76, 0x86, 0x96, 0xd6, 0xe6 }, /* hmd */
de15f093 201 { 0x76, 0x86, 0x96, 0xd6, 0xe6 }, /* hds */
c69ab2b7
HG		 202 { 0x5a, 0x6a, 0x7a, 0x8a, 0x9a, 0xaa, /* syl */
203 0xba, 0xca, 0xda, 0xea, 0xfa },
569ff102
HG		 204};
205
525ad373
GR		 206/*
207 * These were found through experimenting with an fscher, currently they are
208 * not used, but we keep them around for future reference.
209 * On the fscsyl AUTOP1 lives at 0x#c (so 0x5c for fan1, 0x6c for fan2, etc),
210 * AUTOP2 lives at 0x#e, and 0x#1 is a bitmask defining which temps influence
211 * the fan speed.
212 * static const u8 FSCHER_REG_TEMP_AUTOP1[] = { 0x73, 0x83, 0x93 };
213 * static const u8 FSCHER_REG_TEMP_AUTOP2[] = { 0x75, 0x85, 0x95 };
214 */
569ff102 215
de15f093 216static const int FSCHMD_NO_TEMP_SENSORS[7] = { 3, 3, 4, 3, 5, 5, 11 };
569ff102
HG		 217
218/* temp status register bitmasks */
453e308d
HG		 219#define FSCHMD_TEMP_WORKING 0x01
220#define FSCHMD_TEMP_ALERT 0x02
c69ab2b7 221#define FSCHMD_TEMP_DISABLED 0x80
569ff102
HG		 222/* there only really is an alarm if the sensor is working and alert == 1 */
223#define FSCHMD_TEMP_ALARM_MASK \
453e308d 224 (FSCHMD_TEMP_WORKING | FSCHMD_TEMP_ALERT)
569ff102
HG		 225
226/*
227 * Functions declarations
228 */
229
40ac1994
JD		 230static int fschmd_probe(struct i2c_client *client,
231 const struct i2c_device_id *id);
310ec792 232static int fschmd_detect(struct i2c_client *client,
40ac1994
JD		 233 struct i2c_board_info *info);
234static int fschmd_remove(struct i2c_client *client);
569ff102
HG		 235static struct fschmd_data *fschmd_update_device(struct device *dev);
236
237/*
238 * Driver data (common to all clients)
239 */
240
40ac1994
JD		 241static const struct i2c_device_id fschmd_id[] = {
242 { "fscpos", fscpos },
243 { "fscher", fscher },
244 { "fscscy", fscscy },
245 { "fschrc", fschrc },
246 { "fschmd", fschmd },
de15f093 247 { "fschds", fschds },
c69ab2b7 248 { "fscsyl", fscsyl },
40ac1994
JD		 249 { }
250};
251MODULE_DEVICE_TABLE(i2c, fschmd_id);
252
569ff102 253static struct i2c_driver fschmd_driver = {
40ac1994 254 .class = I2C_CLASS_HWMON,
569ff102 255 .driver = {
453e308d 256 .name = "fschmd",
569ff102 257 },
40ac1994
JD		 258 .probe = fschmd_probe,
259 .remove = fschmd_remove,
260 .id_table = fschmd_id,
261 .detect = fschmd_detect,
c3813d6a 262 .address_list = normal_i2c,
569ff102
HG		 263};
264
265/*
266 * Client data (each client gets its own)
267 */
268
269struct fschmd_data {
97950c3d 270 struct i2c_client *client;
569ff102
HG		 271 struct device *hwmon_dev;
272 struct mutex update_lock;
97950c3d
HG		 273 struct mutex watchdog_lock;
274 struct list_head list; /* member of the watchdog_data_list */
275 struct kref kref;
276 struct miscdevice watchdog_miscdev;
dc71afe5 277 enum chips kind;
97950c3d
HG		 278 unsigned long watchdog_is_open;
279 char watchdog_expect_close;
280 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
569ff102
HG		 281 char valid; /* zero until following fields are valid */
282 unsigned long last_updated; /* in jiffies */
283
284 /* register values */
97950c3d 285 u8 revision; /* chip revision */
569ff102 286 u8 global_control; /* global control register */
97950c3d
HG		 287 u8 watchdog_control; /* watchdog control register */
288 u8 watchdog_state; /* watchdog status register */
289 u8 watchdog_preset; /* watchdog counter preset on trigger val */
c69ab2b7
HG		 290 u8 volt[6]; /* voltage */
291 u8 temp_act[11]; /* temperature */
292 u8 temp_status[11]; /* status of sensor */
293 u8 temp_max[11]; /* high temp limit, notice: undocumented! */
294 u8 fan_act[7]; /* fans revolutions per second */
295 u8 fan_status[7]; /* fan status */
296 u8 fan_min[7]; /* fan min value for rps */
297 u8 fan_ripple[7]; /* divider for rps */
569ff102
HG		 298};
299
525ad373
GR		 300/*
301 * Global variables to hold information read from special DMI tables, which are
302 * available on FSC machines with an fscher or later chip. There is no need to
303 * protect these with a lock as they are only modified from our attach function
304 * which always gets called with the i2c-core lock held and never accessed
305 * before the attach function is done with them.
306 */
c69ab2b7
HG		 307static int dmi_mult[6] = { 490, 200, 100, 100, 200, 100 };
308static int dmi_offset[6] = { 0, 0, 0, 0, 0, 0 };
7845cd79
HG		 309static int dmi_vref = -1;
310
525ad373
GR		 311/*
312 * Somewhat ugly :( global data pointer list with all fschmd devices, so that
313 * we can find our device data as when using misc_register there is no other
314 * method to get to ones device data from the open fop.
315 */
97950c3d
HG		 316static LIST_HEAD(watchdog_data_list);
317/* Note this lock not only protect list access, but also data.kref access */
318static DEFINE_MUTEX(watchdog_data_mutex);
319
525ad373
GR		 320/*
321 * Release our data struct when we're detached from the i2c client *and* all
322 * references to our watchdog device are released
323 */
97950c3d
HG		 324static void fschmd_release_resources(struct kref *ref)
325{
326 struct fschmd_data *data = container_of(ref, struct fschmd_data, kref);
327 kfree(data);
328}
7845cd79 329
569ff102
HG		 330/*
331 * Sysfs attr show / store functions
332 */
333
334static ssize_t show_in_value(struct device *dev,
335 struct device_attribute *devattr, char *buf)
336{
337 const int max_reading[3] = { 14200, 6600, 3300 };
338 int index = to_sensor_dev_attr(devattr)->index;
339 struct fschmd_data *data = fschmd_update_device(dev);
340
dc71afe5 341 if (data->kind == fscher || data->kind >= fschrc)
7845cd79
HG		 342 return sprintf(buf, "%d\n", (data->volt[index] * dmi_vref *
343 dmi_mult[index]) / 255 + dmi_offset[index]);
344 else
345 return sprintf(buf, "%d\n", (data->volt[index] *
346 max_reading[index] + 128) / 255);
569ff102
HG		 347}
348
349
350#define TEMP_FROM_REG(val) (((val) - 128) * 1000)
351
352static ssize_t show_temp_value(struct device *dev,
353 struct device_attribute *devattr, char *buf)
354{
355 int index = to_sensor_dev_attr(devattr)->index;
356 struct fschmd_data *data = fschmd_update_device(dev);
357
358 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_act[index]));
359}
360
361static ssize_t show_temp_max(struct device *dev,
362 struct device_attribute *devattr, char *buf)
363{
364 int index = to_sensor_dev_attr(devattr)->index;
365 struct fschmd_data *data = fschmd_update_device(dev);
366
367 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[index]));
368}
369
370static ssize_t store_temp_max(struct device *dev, struct device_attribute
371 *devattr, const char *buf, size_t count)
372{
373 int index = to_sensor_dev_attr(devattr)->index;
374 struct fschmd_data *data = dev_get_drvdata(dev);
525ad373
GR		 375 long v;
376 int err;
377
378 err = kstrtol(buf, 10, &v);
379 if (err)
380 return err;
569ff102 381
2a844c14 382 v = clamp_val(v / 1000, -128, 127) + 128;
569ff102
HG		 383
384 mutex_lock(&data->update_lock);
40ac1994 385 i2c_smbus_write_byte_data(to_i2c_client(dev),
569ff102
HG		 386 FSCHMD_REG_TEMP_LIMIT[data->kind][index], v);
387 data->temp_max[index] = v;
388 mutex_unlock(&data->update_lock);
389
390 return count;
391}
392
393static ssize_t show_temp_fault(struct device *dev,
394 struct device_attribute *devattr, char *buf)
395{
396 int index = to_sensor_dev_attr(devattr)->index;
397 struct fschmd_data *data = fschmd_update_device(dev);
398
399 /* bit 0 set means sensor working ok, so no fault! */
453e308d 400 if (data->temp_status[index] & FSCHMD_TEMP_WORKING)
569ff102
HG		 401 return sprintf(buf, "0\n");
402 else
403 return sprintf(buf, "1\n");
404}
405
406static ssize_t show_temp_alarm(struct device *dev,
407 struct device_attribute *devattr, char *buf)
408{
409 int index = to_sensor_dev_attr(devattr)->index;
410 struct fschmd_data *data = fschmd_update_device(dev);
411
412 if ((data->temp_status[index] & FSCHMD_TEMP_ALARM_MASK) ==
413 FSCHMD_TEMP_ALARM_MASK)
414 return sprintf(buf, "1\n");
415 else
416 return sprintf(buf, "0\n");
417}
418
419
420#define RPM_FROM_REG(val) ((val) * 60)
421
422static ssize_t show_fan_value(struct device *dev,
423 struct device_attribute *devattr, char *buf)
424{
425 int index = to_sensor_dev_attr(devattr)->index;
426 struct fschmd_data *data = fschmd_update_device(dev);
427
428 return sprintf(buf, "%u\n", RPM_FROM_REG(data->fan_act[index]));
429}
430
431static ssize_t show_fan_div(struct device *dev,
432 struct device_attribute *devattr, char *buf)
433{
434 int index = to_sensor_dev_attr(devattr)->index;
435 struct fschmd_data *data = fschmd_update_device(dev);
436
437 /* bits 2..7 reserved => mask with 3 */
438 return sprintf(buf, "%d\n", 1 << (data->fan_ripple[index] & 3));
439}
440
441static ssize_t store_fan_div(struct device *dev, struct device_attribute
442 *devattr, const char *buf, size_t count)
443{
444 u8 reg;
445 int index = to_sensor_dev_attr(devattr)->index;
446 struct fschmd_data *data = dev_get_drvdata(dev);
447 /* supported values: 2, 4, 8 */
525ad373
GR		 448 unsigned long v;
449 int err;
450
451 err = kstrtoul(buf, 10, &v);
452 if (err)
453 return err;
569ff102
HG		 454
455 switch (v) {
525ad373
GR		 456 case 2:
457 v = 1;
458 break;
459 case 4:
460 v = 2;
461 break;
462 case 8:
463 v = 3;
464 break;
569ff102 465 default:
b55f3757
GR		 466 dev_err(dev,
467 "fan_div value %lu not supported. Choose one of 2, 4 or 8!\n",
468 v);
569ff102
HG		 469 return -EINVAL;
470 }
471
472 mutex_lock(&data->update_lock);
473
40ac1994 474 reg = i2c_smbus_read_byte_data(to_i2c_client(dev),
569ff102
HG		 475 FSCHMD_REG_FAN_RIPPLE[data->kind][index]);
476
477 /* bits 2..7 reserved => mask with 0x03 */
478 reg &= ~0x03;
479 reg |= v;
480
40ac1994 481 i2c_smbus_write_byte_data(to_i2c_client(dev),
569ff102
HG		 482 FSCHMD_REG_FAN_RIPPLE[data->kind][index], reg);
483
484 data->fan_ripple[index] = reg;
485
486 mutex_unlock(&data->update_lock);
487
488 return count;
489}
490
491static ssize_t show_fan_alarm(struct device *dev,
492 struct device_attribute *devattr, char *buf)
493{
494 int index = to_sensor_dev_attr(devattr)->index;
495 struct fschmd_data *data = fschmd_update_device(dev);
496
453e308d 497 if (data->fan_status[index] & FSCHMD_FAN_ALARM)
569ff102
HG		 498 return sprintf(buf, "1\n");
499 else
500 return sprintf(buf, "0\n");
501}
502
503static ssize_t show_fan_fault(struct device *dev,
504 struct device_attribute *devattr, char *buf)
505{
506 int index = to_sensor_dev_attr(devattr)->index;
507 struct fschmd_data *data = fschmd_update_device(dev);
508
453e308d 509 if (data->fan_status[index] & FSCHMD_FAN_NOT_PRESENT)
569ff102
HG		 510 return sprintf(buf, "1\n");
511 else
512 return sprintf(buf, "0\n");
513}
514
515
516static ssize_t show_pwm_auto_point1_pwm(struct device *dev,
517 struct device_attribute *devattr, char *buf)
518{
519 int index = to_sensor_dev_attr(devattr)->index;
c69ab2b7
HG		 520 struct fschmd_data *data = fschmd_update_device(dev);
521 int val = data->fan_min[index];
569ff102 522
c69ab2b7 523 /* 0 = allow turning off (except on the syl), 1-255 = 50-100% */
dc71afe5 524 if (val || data->kind == fscsyl)
569ff102
HG		 525 val = val / 2 + 128;
526
527 return sprintf(buf, "%d\n", val);
528}
529
530static ssize_t store_pwm_auto_point1_pwm(struct device *dev,
531 struct device_attribute *devattr, const char *buf, size_t count)
532{
533 int index = to_sensor_dev_attr(devattr)->index;
534 struct fschmd_data *data = dev_get_drvdata(dev);
525ad373
GR		 535 unsigned long v;
536 int err;
537
538 err = kstrtoul(buf, 10, &v);
539 if (err)
540 return err;
569ff102 541
c69ab2b7 542 /* reg: 0 = allow turning off (except on the syl), 1-255 = 50-100% */
dc71afe5 543 if (v || data->kind == fscsyl) {
2a844c14 544 v = clamp_val(v, 128, 255);
569ff102
HG		 545 v = (v - 128) * 2 + 1;
546 }
547
548 mutex_lock(&data->update_lock);
549
40ac1994 550 i2c_smbus_write_byte_data(to_i2c_client(dev),
569ff102
HG		 551 FSCHMD_REG_FAN_MIN[data->kind][index], v);
552 data->fan_min[index] = v;
553
554 mutex_unlock(&data->update_lock);
555
556 return count;
557}
558
559
525ad373
GR		 560/*
561 * The FSC hwmon family has the ability to force an attached alert led to flash
562 * from software, we export this as an alert_led sysfs attr
563 */
569ff102
HG		 564static ssize_t show_alert_led(struct device *dev,
565 struct device_attribute *devattr, char *buf)
566{
567 struct fschmd_data *data = fschmd_update_device(dev);
568
453e308d 569 if (data->global_control & FSCHMD_CONTROL_ALERT_LED)
569ff102
HG		 570 return sprintf(buf, "1\n");
571 else
572 return sprintf(buf, "0\n");
573}
574
575static ssize_t store_alert_led(struct device *dev,
576 struct device_attribute *devattr, const char *buf, size_t count)
577{
578 u8 reg;
579 struct fschmd_data *data = dev_get_drvdata(dev);
525ad373
GR		 580 unsigned long v;
581 int err;
582
583 err = kstrtoul(buf, 10, &v);
584 if (err)
585 return err;
569ff102
HG		 586
587 mutex_lock(&data->update_lock);
588
40ac1994 589 reg = i2c_smbus_read_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL);
569ff102
HG		 590
591 if (v)
453e308d 592 reg |= FSCHMD_CONTROL_ALERT_LED;
569ff102 593 else
453e308d 594 reg &= ~FSCHMD_CONTROL_ALERT_LED;
569ff102 595
40ac1994 596 i2c_smbus_write_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL, reg);
569ff102
HG		 597
598 data->global_control = reg;
599
600 mutex_unlock(&data->update_lock);
601
602 return count;
603}
604
c69ab2b7
HG		 605static DEVICE_ATTR(alert_led, 0644, show_alert_led, store_alert_led);
606
569ff102
HG		 607static struct sensor_device_attribute fschmd_attr[] = {
608 SENSOR_ATTR(in0_input, 0444, show_in_value, NULL, 0),
609 SENSOR_ATTR(in1_input, 0444, show_in_value, NULL, 1),
610 SENSOR_ATTR(in2_input, 0444, show_in_value, NULL, 2),
c69ab2b7
HG		 611 SENSOR_ATTR(in3_input, 0444, show_in_value, NULL, 3),
612 SENSOR_ATTR(in4_input, 0444, show_in_value, NULL, 4),
613 SENSOR_ATTR(in5_input, 0444, show_in_value, NULL, 5),
569ff102
HG		 614};
615
616static struct sensor_device_attribute fschmd_temp_attr[] = {
617 SENSOR_ATTR(temp1_input, 0444, show_temp_value, NULL, 0),
618 SENSOR_ATTR(temp1_max, 0644, show_temp_max, store_temp_max, 0),
619 SENSOR_ATTR(temp1_fault, 0444, show_temp_fault, NULL, 0),
620 SENSOR_ATTR(temp1_alarm, 0444, show_temp_alarm, NULL, 0),
621 SENSOR_ATTR(temp2_input, 0444, show_temp_value, NULL, 1),
622 SENSOR_ATTR(temp2_max, 0644, show_temp_max, store_temp_max, 1),
623 SENSOR_ATTR(temp2_fault, 0444, show_temp_fault, NULL, 1),
624 SENSOR_ATTR(temp2_alarm, 0444, show_temp_alarm, NULL, 1),
625 SENSOR_ATTR(temp3_input, 0444, show_temp_value, NULL, 2),
626 SENSOR_ATTR(temp3_max, 0644, show_temp_max, store_temp_max, 2),
627 SENSOR_ATTR(temp3_fault, 0444, show_temp_fault, NULL, 2),
628 SENSOR_ATTR(temp3_alarm, 0444, show_temp_alarm, NULL, 2),
629 SENSOR_ATTR(temp4_input, 0444, show_temp_value, NULL, 3),
630 SENSOR_ATTR(temp4_max, 0644, show_temp_max, store_temp_max, 3),
631 SENSOR_ATTR(temp4_fault, 0444, show_temp_fault, NULL, 3),
632 SENSOR_ATTR(temp4_alarm, 0444, show_temp_alarm, NULL, 3),
633 SENSOR_ATTR(temp5_input, 0444, show_temp_value, NULL, 4),
634 SENSOR_ATTR(temp5_max, 0644, show_temp_max, store_temp_max, 4),
635 SENSOR_ATTR(temp5_fault, 0444, show_temp_fault, NULL, 4),
636 SENSOR_ATTR(temp5_alarm, 0444, show_temp_alarm, NULL, 4),
c69ab2b7
HG		 637 SENSOR_ATTR(temp6_input, 0444, show_temp_value, NULL, 5),
638 SENSOR_ATTR(temp6_max, 0644, show_temp_max, store_temp_max, 5),
639 SENSOR_ATTR(temp6_fault, 0444, show_temp_fault, NULL, 5),
640 SENSOR_ATTR(temp6_alarm, 0444, show_temp_alarm, NULL, 5),
641 SENSOR_ATTR(temp7_input, 0444, show_temp_value, NULL, 6),
642 SENSOR_ATTR(temp7_max, 0644, show_temp_max, store_temp_max, 6),
643 SENSOR_ATTR(temp7_fault, 0444, show_temp_fault, NULL, 6),
644 SENSOR_ATTR(temp7_alarm, 0444, show_temp_alarm, NULL, 6),
645 SENSOR_ATTR(temp8_input, 0444, show_temp_value, NULL, 7),
646 SENSOR_ATTR(temp8_max, 0644, show_temp_max, store_temp_max, 7),
647 SENSOR_ATTR(temp8_fault, 0444, show_temp_fault, NULL, 7),
648 SENSOR_ATTR(temp8_alarm, 0444, show_temp_alarm, NULL, 7),
649 SENSOR_ATTR(temp9_input, 0444, show_temp_value, NULL, 8),
650 SENSOR_ATTR(temp9_max, 0644, show_temp_max, store_temp_max, 8),
651 SENSOR_ATTR(temp9_fault, 0444, show_temp_fault, NULL, 8),
652 SENSOR_ATTR(temp9_alarm, 0444, show_temp_alarm, NULL, 8),
653 SENSOR_ATTR(temp10_input, 0444, show_temp_value, NULL, 9),
654 SENSOR_ATTR(temp10_max, 0644, show_temp_max, store_temp_max, 9),
655 SENSOR_ATTR(temp10_fault, 0444, show_temp_fault, NULL, 9),
656 SENSOR_ATTR(temp10_alarm, 0444, show_temp_alarm, NULL, 9),
657 SENSOR_ATTR(temp11_input, 0444, show_temp_value, NULL, 10),
658 SENSOR_ATTR(temp11_max, 0644, show_temp_max, store_temp_max, 10),
659 SENSOR_ATTR(temp11_fault, 0444, show_temp_fault, NULL, 10),
660 SENSOR_ATTR(temp11_alarm, 0444, show_temp_alarm, NULL, 10),
569ff102
HG		 661};
662
663static struct sensor_device_attribute fschmd_fan_attr[] = {
664 SENSOR_ATTR(fan1_input, 0444, show_fan_value, NULL, 0),
665 SENSOR_ATTR(fan1_div, 0644, show_fan_div, store_fan_div, 0),
666 SENSOR_ATTR(fan1_alarm, 0444, show_fan_alarm, NULL, 0),
667 SENSOR_ATTR(fan1_fault, 0444, show_fan_fault, NULL, 0),
668 SENSOR_ATTR(pwm1_auto_point1_pwm, 0644, show_pwm_auto_point1_pwm,
669 store_pwm_auto_point1_pwm, 0),
670 SENSOR_ATTR(fan2_input, 0444, show_fan_value, NULL, 1),
671 SENSOR_ATTR(fan2_div, 0644, show_fan_div, store_fan_div, 1),
672 SENSOR_ATTR(fan2_alarm, 0444, show_fan_alarm, NULL, 1),
673 SENSOR_ATTR(fan2_fault, 0444, show_fan_fault, NULL, 1),
674 SENSOR_ATTR(pwm2_auto_point1_pwm, 0644, show_pwm_auto_point1_pwm,
675 store_pwm_auto_point1_pwm, 1),
676 SENSOR_ATTR(fan3_input, 0444, show_fan_value, NULL, 2),
677 SENSOR_ATTR(fan3_div, 0644, show_fan_div, store_fan_div, 2),
678 SENSOR_ATTR(fan3_alarm, 0444, show_fan_alarm, NULL, 2),
679 SENSOR_ATTR(fan3_fault, 0444, show_fan_fault, NULL, 2),
680 SENSOR_ATTR(pwm3_auto_point1_pwm, 0644, show_pwm_auto_point1_pwm,
681 store_pwm_auto_point1_pwm, 2),
682 SENSOR_ATTR(fan4_input, 0444, show_fan_value, NULL, 3),
683 SENSOR_ATTR(fan4_div, 0644, show_fan_div, store_fan_div, 3),
684 SENSOR_ATTR(fan4_alarm, 0444, show_fan_alarm, NULL, 3),
685 SENSOR_ATTR(fan4_fault, 0444, show_fan_fault, NULL, 3),
686 SENSOR_ATTR(pwm4_auto_point1_pwm, 0644, show_pwm_auto_point1_pwm,
687 store_pwm_auto_point1_pwm, 3),
688 SENSOR_ATTR(fan5_input, 0444, show_fan_value, NULL, 4),
689 SENSOR_ATTR(fan5_div, 0644, show_fan_div, store_fan_div, 4),
690 SENSOR_ATTR(fan5_alarm, 0444, show_fan_alarm, NULL, 4),
691 SENSOR_ATTR(fan5_fault, 0444, show_fan_fault, NULL, 4),
692 SENSOR_ATTR(pwm5_auto_point1_pwm, 0644, show_pwm_auto_point1_pwm,
693 store_pwm_auto_point1_pwm, 4),
694 SENSOR_ATTR(fan6_input, 0444, show_fan_value, NULL, 5),
695 SENSOR_ATTR(fan6_div, 0644, show_fan_div, store_fan_div, 5),
696 SENSOR_ATTR(fan6_alarm, 0444, show_fan_alarm, NULL, 5),
697 SENSOR_ATTR(fan6_fault, 0444, show_fan_fault, NULL, 5),
698 SENSOR_ATTR(pwm6_auto_point1_pwm, 0644, show_pwm_auto_point1_pwm,
699 store_pwm_auto_point1_pwm, 5),
c69ab2b7
HG		 700 SENSOR_ATTR(fan7_input, 0444, show_fan_value, NULL, 6),
701 SENSOR_ATTR(fan7_div, 0644, show_fan_div, store_fan_div, 6),
702 SENSOR_ATTR(fan7_alarm, 0444, show_fan_alarm, NULL, 6),
703 SENSOR_ATTR(fan7_fault, 0444, show_fan_fault, NULL, 6),
704 SENSOR_ATTR(pwm7_auto_point1_pwm, 0644, show_pwm_auto_point1_pwm,
705 store_pwm_auto_point1_pwm, 6),
569ff102
HG		 706};
707
708
709/*
97950c3d
HG		 710 * Watchdog routines
711 */
712
713static int watchdog_set_timeout(struct fschmd_data *data, int timeout)
714{
715 int ret, resolution;
716 int kind = data->kind + 1; /* 0-x array index -> 1-x module param */
717
718 /* 2 second or 60 second resolution? */
719 if (timeout <= 510 || kind == fscpos || kind == fscscy)
720 resolution = 2;
721 else
722 resolution = 60;
723
724 if (timeout < resolution || timeout > (resolution * 255))
725 return -EINVAL;
726
727 mutex_lock(&data->watchdog_lock);
728 if (!data->client) {
729 ret = -ENODEV;
730 goto leave;
731 }
732
733 if (resolution == 2)
734 data->watchdog_control &= ~FSCHMD_WDOG_CONTROL_RESOLUTION;
735 else
736 data->watchdog_control |= FSCHMD_WDOG_CONTROL_RESOLUTION;
737
738 data->watchdog_preset = DIV_ROUND_UP(timeout, resolution);
739
740 /* Write new timeout value */
c69ab2b7
HG		 741 i2c_smbus_write_byte_data(data->client,
742 FSCHMD_REG_WDOG_PRESET[data->kind], data->watchdog_preset);
97950c3d 743 /* Write new control register, do not trigger! */
c69ab2b7
HG		 744 i2c_smbus_write_byte_data(data->client,
745 FSCHMD_REG_WDOG_CONTROL[data->kind],
97950c3d
HG		 746 data->watchdog_control & ~FSCHMD_WDOG_CONTROL_TRIGGER);
747
748 ret = data->watchdog_preset * resolution;
749
750leave:
751 mutex_unlock(&data->watchdog_lock);
752 return ret;
753}
754
755static int watchdog_get_timeout(struct fschmd_data *data)
756{
757 int timeout;
758
759 mutex_lock(&data->watchdog_lock);
760 if (data->watchdog_control & FSCHMD_WDOG_CONTROL_RESOLUTION)
761 timeout = data->watchdog_preset * 60;
762 else
763 timeout = data->watchdog_preset * 2;
764 mutex_unlock(&data->watchdog_lock);
765
766 return timeout;
767}
768
769static int watchdog_trigger(struct fschmd_data *data)
770{
771 int ret = 0;
772
773 mutex_lock(&data->watchdog_lock);
774 if (!data->client) {
775 ret = -ENODEV;
776 goto leave;
777 }
778
779 data->watchdog_control |= FSCHMD_WDOG_CONTROL_TRIGGER;
c69ab2b7
HG		 780 i2c_smbus_write_byte_data(data->client,
781 FSCHMD_REG_WDOG_CONTROL[data->kind],
782 data->watchdog_control);
97950c3d
HG		 783leave:
784 mutex_unlock(&data->watchdog_lock);
785 return ret;
786}
787
788static int watchdog_stop(struct fschmd_data *data)
789{
790 int ret = 0;
791
792 mutex_lock(&data->watchdog_lock);
793 if (!data->client) {
794 ret = -ENODEV;
795 goto leave;
796 }
797
798 data->watchdog_control &= ~FSCHMD_WDOG_CONTROL_STARTED;
525ad373
GR		 799 /*
800 * Don't store the stop flag in our watchdog control register copy, as
801 * its a write only bit (read always returns 0)
802 */
c69ab2b7
HG		 803 i2c_smbus_write_byte_data(data->client,
804 FSCHMD_REG_WDOG_CONTROL[data->kind],
97950c3d
HG		 805 data->watchdog_control | FSCHMD_WDOG_CONTROL_STOP);
806leave:
807 mutex_unlock(&data->watchdog_lock);
808 return ret;
809}
810
811static int watchdog_open(struct inode *inode, struct file *filp)
812{
813 struct fschmd_data *pos, *data = NULL;
c453615f 814 int watchdog_is_open;
97950c3d 815
525ad373
GR		 816 /*
817 * We get called from drivers/char/misc.c with misc_mtx hold, and we
818 * call misc_register() from fschmd_probe() with watchdog_data_mutex
819 * hold, as misc_register() takes the misc_mtx lock, this is a possible
820 * deadlock, so we use mutex_trylock here.
821 */
97950c3d
HG		 822 if (!mutex_trylock(&watchdog_data_mutex))
823 return -ERESTARTSYS;
824 list_for_each_entry(pos, &watchdog_data_list, list) {
825 if (pos->watchdog_miscdev.minor == iminor(inode)) {
826 data = pos;
827 break;
828 }
829 }
830 /* Note we can never not have found data, so we don't check for this */
c453615f
HG		 831 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
832 if (!watchdog_is_open)
833 kref_get(&data->kref);
97950c3d
HG		 834 mutex_unlock(&watchdog_data_mutex);
835
c453615f 836 if (watchdog_is_open)
97950c3d
HG		 837 return -EBUSY;
838
839 /* Start the watchdog */
840 watchdog_trigger(data);
841 filp->private_data = data;
842
843 return nonseekable_open(inode, filp);
844}
845
846static int watchdog_release(struct inode *inode, struct file *filp)
847{
848 struct fschmd_data *data = filp->private_data;
849
850 if (data->watchdog_expect_close) {
851 watchdog_stop(data);
852 data->watchdog_expect_close = 0;
853 } else {
854 watchdog_trigger(data);
855 dev_crit(&data->client->dev,
856 "unexpected close, not stopping watchdog!\n");
857 }
858
859 clear_bit(0, &data->watchdog_is_open);
860
861 mutex_lock(&watchdog_data_mutex);
862 kref_put(&data->kref, fschmd_release_resources);
863 mutex_unlock(&watchdog_data_mutex);
864
865 return 0;
866}
867
868static ssize_t watchdog_write(struct file *filp, const char __user *buf,
869 size_t count, loff_t *offset)
870{
c7702c31 871 int ret;
97950c3d
HG		 872 struct fschmd_data *data = filp->private_data;
873
874 if (count) {
875 if (!nowayout) {
876 size_t i;
877
878 /* Clear it in case it was set with a previous write */
879 data->watchdog_expect_close = 0;
880
881 for (i = 0; i != count; i++) {
882 char c;
883 if (get_user(c, buf + i))
884 return -EFAULT;
885 if (c == 'V')
886 data->watchdog_expect_close = 1;
887 }
888 }
889 ret = watchdog_trigger(data);
890 if (ret < 0)
891 return ret;
892 }
893 return count;
894}
895
525ad373
GR		 896static long watchdog_ioctl(struct file *filp, unsigned int cmd,
897 unsigned long arg)
97950c3d 898{
1b7243e8 899 struct watchdog_info ident = {
97950c3d
HG		 900 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
901 WDIOF_CARDRESET,
902 .identity = "FSC watchdog"
903 };
904 int i, ret = 0;
905 struct fschmd_data *data = filp->private_data;
906
907 switch (cmd) {
908 case WDIOC_GETSUPPORT:
909 ident.firmware_version = data->revision;
910 if (!nowayout)
911 ident.options |= WDIOF_MAGICCLOSE;
912 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
913 ret = -EFAULT;
914 break;
915
916 case WDIOC_GETSTATUS:
917 ret = put_user(0, (int __user *)arg);
918 break;
919
920 case WDIOC_GETBOOTSTATUS:
921 if (data->watchdog_state & FSCHMD_WDOG_STATE_CARDRESET)
922 ret = put_user(WDIOF_CARDRESET, (int __user *)arg);
923 else
924 ret = put_user(0, (int __user *)arg);
925 break;
926
927 case WDIOC_KEEPALIVE:
928 ret = watchdog_trigger(data);
929 break;
930
931 case WDIOC_GETTIMEOUT:
932 i = watchdog_get_timeout(data);
933 ret = put_user(i, (int __user *)arg);
934 break;
935
936 case WDIOC_SETTIMEOUT:
937 if (get_user(i, (int __user *)arg)) {
938 ret = -EFAULT;
939 break;
940 }
941 ret = watchdog_set_timeout(data, i);
942 if (ret > 0)
943 ret = put_user(ret, (int __user *)arg);
944 break;
945
946 case WDIOC_SETOPTIONS:
947 if (get_user(i, (int __user *)arg)) {
948 ret = -EFAULT;
949 break;
950 }
951
952 if (i & WDIOS_DISABLECARD)
953 ret = watchdog_stop(data);
954 else if (i & WDIOS_ENABLECARD)
955 ret = watchdog_trigger(data);
956 else
957 ret = -EINVAL;
958
959 break;
960 default:
961 ret = -ENOTTY;
962 }
97950c3d
HG		 963 return ret;
964}
965
828c0950 966static const struct file_operations watchdog_fops = {
97950c3d
HG		 967 .owner = THIS_MODULE,
968 .llseek = no_llseek,
969 .open = watchdog_open,
970 .release = watchdog_release,
971 .write = watchdog_write,
55929332 972 .unlocked_ioctl = watchdog_ioctl,
97950c3d
HG		 973};
974
975
976/*
977 * Detect, register, unregister and update device functions
569ff102
HG		 978 */
979
525ad373
GR		 980/*
981 * DMI decode routine to read voltage scaling factors from special DMI tables,
982 * which are available on FSC machines with an fscher or later chip.
983 */
e7a19c56 984static void fschmd_dmi_decode(const struct dmi_header *header, void *dummy)
7845cd79
HG		 985{
986 int i, mult[3] = { 0 }, offset[3] = { 0 }, vref = 0, found = 0;
987
525ad373
GR		 988 /*
989 * dmi code ugliness, we get passed the address of the contents of
990 * a complete DMI record, but in the form of a dmi_header pointer, in
991 * reality this address holds header->length bytes of which the header
992 * are the first 4 bytes
993 */
7845cd79
HG		 994 u8 *dmi_data = (u8 *)header;
995
996 /* We are looking for OEM-specific type 185 */
997 if (header->type != 185)
998 return;
999
525ad373
GR		 1000 /*
1001 * we are looking for what Siemens calls "subtype" 19, the subtype
1002 * is stored in byte 5 of the dmi block
1003 */
7845cd79
HG		 1004 if (header->length < 5 || dmi_data[4] != 19)
1005 return;
1006
525ad373
GR		 1007 /*
1008 * After the subtype comes 1 unknown byte and then blocks of 5 bytes,
1009 * consisting of what Siemens calls an "Entity" number, followed by
1010 * 2 16-bit words in LSB first order
1011 */
7845cd79
HG		 1012 for (i = 6; (i + 4) < header->length; i += 5) {
1013 /* entity 1 - 3: voltage multiplier and offset */
1014 if (dmi_data[i] >= 1 && dmi_data[i] <= 3) {
1015 /* Our in sensors order and the DMI order differ */
1016 const int shuffle[3] = { 1, 0, 2 };
1017 int in = shuffle[dmi_data[i] - 1];
1018
1019 /* Check for twice the same entity */
1020 if (found & (1 << in))
1021 return;
1022
1023 mult[in] = dmi_data[i + 1] | (dmi_data[i + 2] << 8);
1024 offset[in] = dmi_data[i + 3] | (dmi_data[i + 4] << 8);
1025
1026 found |= 1 << in;
1027 }
1028
1029 /* entity 7: reference voltage */
1030 if (dmi_data[i] == 7) {
1031 /* Check for twice the same entity */
1032 if (found & 0x08)
1033 return;
1034
1035 vref = dmi_data[i + 1] | (dmi_data[i + 2] << 8);
1036
1037 found |= 0x08;
1038 }
1039 }
1040
1041 if (found == 0x0F) {
1042 for (i = 0; i < 3; i++) {
1043 dmi_mult[i] = mult[i] * 10;
1044 dmi_offset[i] = offset[i] * 10;
1045 }
525ad373
GR		 1046 /*
1047 * According to the docs there should be separate dmi entries
1048 * for the mult's and offsets of in3-5 of the syl, but on
1049 * my test machine these are not present
1050 */
c69ab2b7
HG		 1051 dmi_mult[3] = dmi_mult[2];
1052 dmi_mult[4] = dmi_mult[1];
1053 dmi_mult[5] = dmi_mult[2];
1054 dmi_offset[3] = dmi_offset[2];
1055 dmi_offset[4] = dmi_offset[1];
1056 dmi_offset[5] = dmi_offset[2];
7845cd79
HG		 1057 dmi_vref = vref;
1058 }
1059}
1060
310ec792 1061static int fschmd_detect(struct i2c_client *client,
40ac1994 1062 struct i2c_board_info *info)
569ff102 1063{
52df6440 1064 enum chips kind;
40ac1994 1065 struct i2c_adapter *adapter = client->adapter;
52df6440 1066 char id[4];
569ff102
HG		 1067
1068 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
40ac1994 1069 return -ENODEV;
569ff102
HG		 1070
1071 /* Detect & Identify the chip */
52df6440
JD		 1072 id[0] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_0);
1073 id[1] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_1);
1074 id[2] = i2c_smbus_read_byte_data(client, FSCHMD_REG_IDENT_2);
1075 id[3] = '\0';
1076
1077 if (!strcmp(id, "PEG"))
1078 kind = fscpos;
1079 else if (!strcmp(id, "HER"))
1080 kind = fscher;
1081 else if (!strcmp(id, "SCY"))
1082 kind = fscscy;
1083 else if (!strcmp(id, "HRC"))
1084 kind = fschrc;
1085 else if (!strcmp(id, "HMD"))
1086 kind = fschmd;
1087 else if (!strcmp(id, "HDS"))
1088 kind = fschds;
1089 else if (!strcmp(id, "SYL"))
1090 kind = fscsyl;
1091 else
1092 return -ENODEV;
569ff102 1093
dc71afe5 1094 strlcpy(info->type, fschmd_id[kind].name, I2C_NAME_SIZE);
40ac1994
JD		 1095
1096 return 0;
1097}
1098
1099static int fschmd_probe(struct i2c_client *client,
1100 const struct i2c_device_id *id)
1101{
1102 struct fschmd_data *data;
de15f093
HG		 1103 const char * const names[7] = { "Poseidon", "Hermes", "Scylla",
1104 "Heracles", "Heimdall", "Hades", "Syleus" };
97950c3d 1105 const int watchdog_minors[] = { WATCHDOG_MINOR, 212, 213, 214, 215 };
40ac1994
JD		 1106 int i, err;
1107 enum chips kind = id->driver_data;
1108
1109 data = kzalloc(sizeof(struct fschmd_data), GFP_KERNEL);
1110 if (!data)
1111 return -ENOMEM;
1112
1113 i2c_set_clientdata(client, data);
1114 mutex_init(&data->update_lock);
97950c3d
HG		 1115 mutex_init(&data->watchdog_lock);
1116 INIT_LIST_HEAD(&data->list);
1117 kref_init(&data->kref);
525ad373
GR		 1118 /*
1119 * Store client pointer in our data struct for watchdog usage
1120 * (where the client is found through a data ptr instead of the
1121 * otherway around)
1122 */
97950c3d 1123 data->client = client;
dc71afe5 1124 data->kind = kind;
40ac1994 1125
569ff102 1126 if (kind == fscpos) {
525ad373
GR		 1127 /*
1128 * The Poseidon has hardwired temp limits, fill these
1129 * in for the alarm resetting code
1130 */
569ff102
HG		 1131 data->temp_max[0] = 70 + 128;
1132 data->temp_max[1] = 50 + 128;
1133 data->temp_max[2] = 50 + 128;
1134 }
1135
7845cd79 1136 /* Read the special DMI table for fscher and newer chips */
453e308d 1137 if ((kind == fscher || kind >= fschrc) && dmi_vref == -1) {
e7a19c56 1138 dmi_walk(fschmd_dmi_decode, NULL);
7845cd79 1139 if (dmi_vref == -1) {
453e308d
HG		 1140 dev_warn(&client->dev,
1141 "Couldn't get voltage scaling factors from "
7845cd79
HG		 1142 "BIOS DMI table, using builtin defaults\n");
1143 dmi_vref = 33;
1144 }
1145 }
1146
97950c3d
HG		 1147 /* Read in some never changing registers */
1148 data->revision = i2c_smbus_read_byte_data(client, FSCHMD_REG_REVISION);
1149 data->global_control = i2c_smbus_read_byte_data(client,
1150 FSCHMD_REG_CONTROL);
1151 data->watchdog_control = i2c_smbus_read_byte_data(client,
c69ab2b7 1152 FSCHMD_REG_WDOG_CONTROL[data->kind]);
97950c3d 1153 data->watchdog_state = i2c_smbus_read_byte_data(client,
c69ab2b7 1154 FSCHMD_REG_WDOG_STATE[data->kind]);
97950c3d 1155 data->watchdog_preset = i2c_smbus_read_byte_data(client,
c69ab2b7 1156 FSCHMD_REG_WDOG_PRESET[data->kind]);
97950c3d 1157
c69ab2b7
HG		 1158 err = device_create_file(&client->dev, &dev_attr_alert_led);
1159 if (err)
1160 goto exit_detach;
569ff102 1161
c69ab2b7 1162 for (i = 0; i < FSCHMD_NO_VOLT_SENSORS[data->kind]; i++) {
569ff102
HG		 1163 err = device_create_file(&client->dev,
1164 &fschmd_attr[i].dev_attr);
1165 if (err)
1166 goto exit_detach;
1167 }
1168
1169 for (i = 0; i < (FSCHMD_NO_TEMP_SENSORS[data->kind] * 4); i++) {
1170 /* Poseidon doesn't have TEMP_LIMIT registers */
1171 if (kind == fscpos && fschmd_temp_attr[i].dev_attr.show ==
1172 show_temp_max)
1173 continue;
1174
c69ab2b7
HG		 1175 if (kind == fscsyl) {
1176 if (i % 4 == 0)
1177 data->temp_status[i / 4] =
1178 i2c_smbus_read_byte_data(client,
1179 FSCHMD_REG_TEMP_STATE
1180 [data->kind][i / 4]);
1181 if (data->temp_status[i / 4] & FSCHMD_TEMP_DISABLED)
1182 continue;
1183 }
1184
569ff102
HG		 1185 err = device_create_file(&client->dev,
1186 &fschmd_temp_attr[i].dev_attr);
1187 if (err)
1188 goto exit_detach;
1189 }
1190
1191 for (i = 0; i < (FSCHMD_NO_FAN_SENSORS[data->kind] * 5); i++) {
1192 /* Poseidon doesn't have a FAN_MIN register for its 3rd fan */
1193 if (kind == fscpos &&
1194 !strcmp(fschmd_fan_attr[i].dev_attr.attr.name,
1195 "pwm3_auto_point1_pwm"))
1196 continue;
1197
c69ab2b7
HG		 1198 if (kind == fscsyl) {
1199 if (i % 5 == 0)
1200 data->fan_status[i / 5] =
1201 i2c_smbus_read_byte_data(client,
1202 FSCHMD_REG_FAN_STATE
1203 [data->kind][i / 5]);
1204 if (data->fan_status[i / 5] & FSCHMD_FAN_DISABLED)
1205 continue;
1206 }
1207
569ff102
HG		 1208 err = device_create_file(&client->dev,
1209 &fschmd_fan_attr[i].dev_attr);
1210 if (err)
1211 goto exit_detach;
1212 }
1213
1214 data->hwmon_dev = hwmon_device_register(&client->dev);
1215 if (IS_ERR(data->hwmon_dev)) {
1216 err = PTR_ERR(data->hwmon_dev);
1217 data->hwmon_dev = NULL;
1218 goto exit_detach;
1219 }
1220
525ad373
GR		 1221 /*
1222 * We take the data_mutex lock early so that watchdog_open() cannot
1223 * run when misc_register() has completed, but we've not yet added
1224 * our data to the watchdog_data_list (and set the default timeout)
1225 */
97950c3d
HG		 1226 mutex_lock(&watchdog_data_mutex);
1227 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1228 /* Register our watchdog part */
1229 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1230 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1231 data->watchdog_miscdev.name = data->watchdog_name;
1232 data->watchdog_miscdev.fops = &watchdog_fops;
1233 data->watchdog_miscdev.minor = watchdog_minors[i];
1234 err = misc_register(&data->watchdog_miscdev);
1235 if (err == -EBUSY)
1236 continue;
1237 if (err) {
1238 data->watchdog_miscdev.minor = 0;
1239 dev_err(&client->dev,
1240 "Registering watchdog chardev: %d\n", err);
1241 break;
1242 }
1243
1244 list_add(&data->list, &watchdog_data_list);
1245 watchdog_set_timeout(data, 60);
1246 dev_info(&client->dev,
1247 "Registered watchdog chardev major 10, minor: %d\n",
1248 watchdog_minors[i]);
1249 break;
1250 }
1251 if (i == ARRAY_SIZE(watchdog_minors)) {
1252 data->watchdog_miscdev.minor = 0;
b55f3757
GR		 1253 dev_warn(&client->dev,
1254 "Couldn't register watchdog chardev (due to no free minor)\n");
97950c3d
HG		 1255 }
1256 mutex_unlock(&watchdog_data_mutex);
1257
453e308d 1258 dev_info(&client->dev, "Detected FSC %s chip, revision: %d\n",
97950c3d 1259 names[data->kind], (int) data->revision);
569ff102
HG		 1260
1261 return 0;
1262
1263exit_detach:
40ac1994 1264 fschmd_remove(client); /* will also free data for us */
569ff102
HG		 1265 return err;
1266}
1267
40ac1994 1268static int fschmd_remove(struct i2c_client *client)
569ff102
HG		 1269{
1270 struct fschmd_data *data = i2c_get_clientdata(client);
40ac1994 1271 int i;
569ff102 1272
97950c3d
HG		 1273 /* Unregister the watchdog (if registered) */
1274 if (data->watchdog_miscdev.minor) {
1275 misc_deregister(&data->watchdog_miscdev);
1276 if (data->watchdog_is_open) {
1277 dev_warn(&client->dev,
1278 "i2c client detached with watchdog open! "
1279 "Stopping watchdog.\n");
1280 watchdog_stop(data);
1281 }
1282 mutex_lock(&watchdog_data_mutex);
1283 list_del(&data->list);
1284 mutex_unlock(&watchdog_data_mutex);
1285 /* Tell the watchdog code the client is gone */
1286 mutex_lock(&data->watchdog_lock);
1287 data->client = NULL;
1288 mutex_unlock(&data->watchdog_lock);
1289 }
1290
525ad373
GR		 1291 /*
1292 * Check if registered in case we're called from fschmd_detect
1293 * to cleanup after an error
1294 */
569ff102
HG		 1295 if (data->hwmon_dev)
1296 hwmon_device_unregister(data->hwmon_dev);
1297
c69ab2b7
HG		 1298 device_remove_file(&client->dev, &dev_attr_alert_led);
1299 for (i = 0; i < (FSCHMD_NO_VOLT_SENSORS[data->kind]); i++)
569ff102
HG		 1300 device_remove_file(&client->dev, &fschmd_attr[i].dev_attr);
1301 for (i = 0; i < (FSCHMD_NO_TEMP_SENSORS[data->kind] * 4); i++)
1302 device_remove_file(&client->dev,
1303 &fschmd_temp_attr[i].dev_attr);
1304 for (i = 0; i < (FSCHMD_NO_FAN_SENSORS[data->kind] * 5); i++)
1305 device_remove_file(&client->dev,
1306 &fschmd_fan_attr[i].dev_attr);
1307
97950c3d
HG		 1308 mutex_lock(&watchdog_data_mutex);
1309 kref_put(&data->kref, fschmd_release_resources);
1310 mutex_unlock(&watchdog_data_mutex);
1311
569ff102
HG		 1312 return 0;
1313}
1314
1315static struct fschmd_data *fschmd_update_device(struct device *dev)
1316{
1317 struct i2c_client *client = to_i2c_client(dev);
1318 struct fschmd_data *data = i2c_get_clientdata(client);
1319 int i;
1320
1321 mutex_lock(&data->update_lock);
1322
1323 if (time_after(jiffies, data->last_updated + 2 * HZ) || !data->valid) {
1324
1325 for (i = 0; i < FSCHMD_NO_TEMP_SENSORS[data->kind]; i++) {
1326 data->temp_act[i] = i2c_smbus_read_byte_data(client,
1327 FSCHMD_REG_TEMP_ACT[data->kind][i]);
1328 data->temp_status[i] = i2c_smbus_read_byte_data(client,
1329 FSCHMD_REG_TEMP_STATE[data->kind][i]);
1330
1331 /* The fscpos doesn't have TEMP_LIMIT registers */
1332 if (FSCHMD_REG_TEMP_LIMIT[data->kind][i])
1333 data->temp_max[i] = i2c_smbus_read_byte_data(
1334 client,
1335 FSCHMD_REG_TEMP_LIMIT[data->kind][i]);
1336
525ad373
GR		 1337 /*
1338 * reset alarm if the alarm condition is gone,
1339 * the chip doesn't do this itself
1340 */
569ff102
HG		 1341 if ((data->temp_status[i] & FSCHMD_TEMP_ALARM_MASK) ==
1342 FSCHMD_TEMP_ALARM_MASK &&
1343 data->temp_act[i] < data->temp_max[i])
1344 i2c_smbus_write_byte_data(client,
1345 FSCHMD_REG_TEMP_STATE[data->kind][i],
c69ab2b7 1346 data->temp_status[i]);
569ff102
HG		 1347 }
1348
1349 for (i = 0; i < FSCHMD_NO_FAN_SENSORS[data->kind]; i++) {
1350 data->fan_act[i] = i2c_smbus_read_byte_data(client,
1351 FSCHMD_REG_FAN_ACT[data->kind][i]);
1352 data->fan_status[i] = i2c_smbus_read_byte_data(client,
1353 FSCHMD_REG_FAN_STATE[data->kind][i]);
1354 data->fan_ripple[i] = i2c_smbus_read_byte_data(client,
1355 FSCHMD_REG_FAN_RIPPLE[data->kind][i]);
1356
1357 /* The fscpos third fan doesn't have a fan_min */
1358 if (FSCHMD_REG_FAN_MIN[data->kind][i])
1359 data->fan_min[i] = i2c_smbus_read_byte_data(
1360 client,
1361 FSCHMD_REG_FAN_MIN[data->kind][i]);
1362
1363 /* reset fan status if speed is back to > 0 */
453e308d 1364 if ((data->fan_status[i] & FSCHMD_FAN_ALARM) &&
569ff102
HG		 1365 data->fan_act[i])
1366 i2c_smbus_write_byte_data(client,
1367 FSCHMD_REG_FAN_STATE[data->kind][i],
c69ab2b7 1368 data->fan_status[i]);
569ff102
HG		 1369 }
1370
c69ab2b7 1371 for (i = 0; i < FSCHMD_NO_VOLT_SENSORS[data->kind]; i++)
569ff102 1372 data->volt[i] = i2c_smbus_read_byte_data(client,
c69ab2b7 1373 FSCHMD_REG_VOLT[data->kind][i]);
569ff102 1374
569ff102
HG		 1375 data->last_updated = jiffies;
1376 data->valid = 1;
1377 }
1378
1379 mutex_unlock(&data->update_lock);
1380
1381 return data;
1382}
1383
f0967eea 1384module_i2c_driver(fschmd_driver);
569ff102 1385
453e308d 1386MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
de15f093
HG		 1387MODULE_DESCRIPTION("FSC Poseidon, Hermes, Scylla, Heracles, Heimdall, Hades "
1388 "and Syleus driver");
569ff102 1389MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)